{ "design": { "design_info": { "boundary_crc": "0x8FB8F73D359E6BB8", "device": "xc7z020clg484-1", "name": "vivado_system", "synth_flow_mode": "None", "tool_version": "2018.3.1", "validated": "true" }, "design_tree": { "xillybus_lite_0": "", "xillybus_ip_0": "", "xillyvga_0": "", "processing_system7_0": "", "rst_processing_system7_0_100M": "", "xlconcat_0": "", "ps7_0_axi_periph": { "xbar": "", "s00_couplers": { "auto_pc": "" }, "m00_couplers": {}, "m01_couplers": {}, "m02_couplers": {} } }, "interface_ports": { "xillybus_M_AXI": { "mode": "Slave", "vlnv": "xilinx.com:interface:aximm_rtl:1.0", "parameters": { "ADDR_WIDTH": { "value": "32" }, "ARUSER_WIDTH": { "value": "0" }, "AWUSER_WIDTH": { "value": "0" }, "BUSER_WIDTH": { "value": "0" }, "DATA_WIDTH": { "value": "64" }, "FREQ_HZ": { "value": "100000000" }, "HAS_BRESP": { "value": "1" }, "HAS_BURST": { "value": "1" }, "HAS_CACHE": { "value": "1" }, "HAS_LOCK": { "value": "1" }, "HAS_PROT": { "value": "1" }, "HAS_QOS": { "value": "1" }, "HAS_REGION": { "value": "1" }, "HAS_RRESP": { "value": "1" }, "HAS_WSTRB": { "value": "1" }, "ID_WIDTH": { "value": "0" }, "INSERT_VIP": { "value": "0", "value_src": "default" }, "MAX_BURST_LENGTH": { "value": "16" }, "NUM_READ_OUTSTANDING": { "value": "1" }, "NUM_READ_THREADS": { "value": "1" }, "NUM_WRITE_OUTSTANDING": { "value": "1" }, "NUM_WRITE_THREADS": { "value": "1" }, "PHASE": { "value": "0.000" }, "PROTOCOL": { "value": "AXI3" }, "READ_WRITE_MODE": { "value": "READ_WRITE" }, "RUSER_BITS_PER_BYTE": { "value": "0" }, "RUSER_WIDTH": { "value": "0" }, "SUPPORTS_NARROW_BURST": { "value": "1" }, "WUSER_BITS_PER_BYTE": { "value": "0" }, "WUSER_WIDTH": { "value": "0" } } }, "xillybus_S_AXI": { "mode": "Master", "vlnv": "xilinx.com:interface:aximm_rtl:1.0", "parameters": { "ADDR_WIDTH": { "value": "32" }, "ARUSER_WIDTH": { "value": "0", "value_src": "const_prop" }, "AWUSER_WIDTH": { "value": "0", "value_src": "const_prop" }, "BUSER_WIDTH": { "value": "0", "value_src": "const_prop" }, "DATA_WIDTH": { "value": "32" }, "FREQ_HZ": { "value": "100000000", "value_src": "default" }, "HAS_BRESP": { "value": "1", "value_src": "const_prop" }, "HAS_BURST": { "value": "0", "value_src": "const_prop" }, "HAS_CACHE": { "value": "0", "value_src": "const_prop" }, "HAS_LOCK": { "value": "0", "value_src": "const_prop" }, "HAS_PROT": { "value": "0", "value_src": "const_prop" }, "HAS_QOS": { "value": "0", "value_src": "const_prop" }, "HAS_REGION": { "value": "0", "value_src": "const_prop" }, "HAS_RRESP": { "value": "1", "value_src": "const_prop" }, "HAS_WSTRB": { "value": "1", "value_src": "const_prop" }, "ID_WIDTH": { "value": "0", "value_src": "const_prop" }, "INSERT_VIP": { "value": "0", "value_src": "default" }, "MAX_BURST_LENGTH": { "value": "1", "value_src": "auto_prop" }, "NUM_READ_OUTSTANDING": { "value": "1", "value_src": "auto_prop" }, "NUM_READ_THREADS": { "value": "1", "value_src": "default" }, "NUM_WRITE_OUTSTANDING": { "value": "1", "value_src": "auto_prop" }, "NUM_WRITE_THREADS": { "value": "1", "value_src": "default" }, "PHASE": { "value": "0.000", "value_src": "default" }, "PROTOCOL": { "value": "AXI4LITE" }, "READ_WRITE_MODE": { "value": "READ_WRITE", "value_src": "const_prop" }, "RUSER_BITS_PER_BYTE": { "value": "0", "value_src": "default" }, "RUSER_WIDTH": { "value": "0", "value_src": "const_prop" }, "SUPPORTS_NARROW_BURST": { "value": "0", "value_src": "auto_prop" }, "WUSER_BITS_PER_BYTE": { "value": "0", "value_src": "default" }, "WUSER_WIDTH": { "value": "0", "value_src": "const_prop" } } }, "DDR": { "mode": "Master", "vlnv": "xilinx.com:interface:ddrx_rtl:1.0", "parameters": { "AXI_ARBITRATION_SCHEME": { "value": "TDM", "value_src": "default" }, "BURST_LENGTH": { "value": "8", "value_src": "default" }, "CAN_DEBUG": { "value": "false", "value_src": "default" }, "CAS_LATENCY": { "value": "11", "value_src": "default" }, "CAS_WRITE_LATENCY": { "value": "11", "value_src": "default" }, "CS_ENABLED": { "value": "true", "value_src": "default" }, "DATA_MASK_ENABLED": { "value": "true", "value_src": "default" }, "DATA_WIDTH": { "value": "8", "value_src": "default" }, "MEMORY_TYPE": { "value": "COMPONENTS", "value_src": "default" }, "MEM_ADDR_MAP": { "value": "ROW_COLUMN_BANK", "value_src": "default" }, "SLOT": { "value": "Single", "value_src": "default" }, "TIMEPERIOD_PS": { "value": "1250", "value_src": "default" } } }, "FIXED_IO": { "mode": "Master", "vlnv": "xilinx.com:display_processing_system7:fixedio_rtl:1.0", "parameters": { "CAN_DEBUG": { "value": "false", "value_src": "default" } } }, "USBIND_0": { "mode": "Master", "vlnv": "xilinx.com:display_processing_system7:usbctrl_rtl:1.0" }, "GPIO_0": { "mode": "Master", "vlnv": "xilinx.com:interface:gpio_rtl:1.0" } }, "ports": { "xillybus_host_interrupt": { "direction": "I" }, "xillybus_bus_rst_n": { "direction": "O" }, "xillybus_bus_clk": { "direction": "O" }, "vga_vsync": { "direction": "O" }, "vga_de": { "direction": "O" }, "vga_blue": { "direction": "O", "left": "7", "right": "0" }, "vga_green": { "direction": "O", "left": "7", "right": "0" }, "vga_clk": { "direction": "O" }, "vga_red": { "direction": "O", "left": "7", "right": "0" }, "vga_hsync": { "direction": "O" }, "clk_in": { "direction": "I" }, "user_wstrb": { "direction": "O", "left": "3", "right": "0" }, "user_addr": { "direction": "O", "left": "31", "right": "0" }, "user_irq": { "direction": "I" }, "user_wren": { "direction": "O" }, "user_clk": { "direction": "O" }, "user_rden": { "direction": "O" }, "user_wr_data": { "direction": "O", "left": "31", "right": "0" }, "user_rd_data": { "direction": "I", "left": "31", "right": "0" } }, "components": { "xillybus_lite_0": { "vlnv": "xillybus:xillybus:xillybus_lite:1.0", "xci_name": "vivado_system_xillybus_lite_0_0" }, "xillybus_ip_0": { "vlnv": "xillybus:xillybus:xillybus_ip:1.0", "xci_name": "vivado_system_xillybus_ip_0_0" }, "xillyvga_0": { "vlnv": "xillybus:xillybus:xillyvga:1.0", "xci_name": "vivado_system_xillyvga_0_0" }, "processing_system7_0": { "vlnv": "xilinx.com:ip:processing_system7:5.5", "xci_name": "vivado_system_processing_system7_0_0", "parameters": { "PCW_ACT_APU_PERIPHERAL_FREQMHZ": { "value": "666.666687" }, "PCW_ACT_CAN_PERIPHERAL_FREQMHZ": { "value": "10.000000" }, "PCW_ACT_DCI_PERIPHERAL_FREQMHZ": { "value": "10.158730" }, "PCW_ACT_ENET0_PERIPHERAL_FREQMHZ": { "value": "125.000000" }, "PCW_ACT_ENET1_PERIPHERAL_FREQMHZ": { "value": "10.000000" }, "PCW_ACT_FPGA0_PERIPHERAL_FREQMHZ": { "value": "10.000000" }, "PCW_ACT_FPGA1_PERIPHERAL_FREQMHZ": { "value": "100.000000" }, "PCW_ACT_FPGA2_PERIPHERAL_FREQMHZ": { "value": "10.000000" }, "PCW_ACT_FPGA3_PERIPHERAL_FREQMHZ": { "value": "10.000000" }, "PCW_ACT_PCAP_PERIPHERAL_FREQMHZ": { "value": "200.000000" }, "PCW_ACT_QSPI_PERIPHERAL_FREQMHZ": { "value": "200.000000" }, "PCW_ACT_SDIO_PERIPHERAL_FREQMHZ": { "value": "50.000000" }, "PCW_ACT_SMC_PERIPHERAL_FREQMHZ": { "value": "10.000000" }, "PCW_ACT_SPI_PERIPHERAL_FREQMHZ": { "value": "10.000000" }, "PCW_ACT_TPIU_PERIPHERAL_FREQMHZ": { "value": "200.000000" }, "PCW_ACT_TTC0_CLK0_PERIPHERAL_FREQMHZ": { "value": "111.111115" }, "PCW_ACT_TTC0_CLK1_PERIPHERAL_FREQMHZ": { "value": "111.111115" }, "PCW_ACT_TTC0_CLK2_PERIPHERAL_FREQMHZ": { "value": "111.111115" }, "PCW_ACT_TTC1_CLK0_PERIPHERAL_FREQMHZ": { "value": "111.111115" }, "PCW_ACT_TTC1_CLK1_PERIPHERAL_FREQMHZ": { "value": "111.111115" }, "PCW_ACT_TTC1_CLK2_PERIPHERAL_FREQMHZ": { "value": "111.111115" }, "PCW_ACT_UART_PERIPHERAL_FREQMHZ": { "value": "50.000000" }, "PCW_ACT_WDT_PERIPHERAL_FREQMHZ": { "value": "111.111115" }, "PCW_APU_PERIPHERAL_FREQMHZ": { "value": "666.666667" }, "PCW_CLK0_FREQ": { "value": "10000000" }, "PCW_CLK1_FREQ": { "value": "100000000" }, "PCW_CLK2_FREQ": { "value": "10000000" }, "PCW_CLK3_FREQ": { "value": "10000000" }, "PCW_CRYSTAL_PERIPHERAL_FREQMHZ": { "value": "33.333333" }, "PCW_DCI_PERIPHERAL_CLKSRC": { "value": "DDR PLL" }, "PCW_DDR_RAM_HIGHADDR": { "value": "0x1FFFFFFF" }, "PCW_ENET0_ENET0_IO": { "value": "MIO 16 .. 27" }, "PCW_ENET0_GRP_MDIO_ENABLE": { "value": "1" }, "PCW_ENET0_GRP_MDIO_IO": { "value": "MIO 52 .. 53" }, "PCW_ENET0_PERIPHERAL_CLKSRC": { "value": "IO PLL" }, "PCW_ENET0_PERIPHERAL_ENABLE": { "value": "1" }, "PCW_ENET0_PERIPHERAL_FREQMHZ": { "value": "1000 Mbps" }, "PCW_EN_CLK0_PORT": { "value": "0" }, "PCW_EN_CLK1_PORT": { "value": "1" }, "PCW_EN_CLK3_PORT": { "value": "0" }, "PCW_EN_EMIO_ENET0": { "value": "0" }, "PCW_EN_EMIO_GPIO": { "value": "1" }, "PCW_EN_EMIO_I2C0": { "value": "0" }, "PCW_EN_EMIO_WP_SDIO0": { "value": "0" }, "PCW_EN_ENET0": { "value": "1" }, "PCW_EN_GPIO": { "value": "0" }, "PCW_EN_I2C0": { "value": "0" }, "PCW_EN_QSPI": { "value": "1" }, "PCW_EN_RST0_PORT": { "value": "0" }, "PCW_EN_RST1_PORT": { "value": "1" }, "PCW_EN_SDIO0": { "value": "1" }, "PCW_EN_UART1": { "value": "1" }, "PCW_EN_USB0": { "value": "1" }, "PCW_FCLK2_PERIPHERAL_CLKSRC": { "value": "IO PLL" }, "PCW_FCLK_CLK1_BUF": { "value": "TRUE" }, "PCW_FPGA0_PERIPHERAL_FREQMHZ": { "value": "100.000000" }, "PCW_FPGA1_PERIPHERAL_FREQMHZ": { "value": "100.000000" }, "PCW_FPGA2_PERIPHERAL_FREQMHZ": { "value": "50" }, "PCW_FPGA3_PERIPHERAL_FREQMHZ": { "value": "50" }, "PCW_FPGA_FCLK1_ENABLE": { "value": "1" }, "PCW_GPIO_EMIO_GPIO_ENABLE": { "value": "1" }, "PCW_GPIO_EMIO_GPIO_IO": { "value": "56" }, "PCW_GPIO_EMIO_GPIO_WIDTH": { "value": "56" }, "PCW_GPIO_MIO_GPIO_ENABLE": { "value": "0" }, "PCW_GPIO_PERIPHERAL_ENABLE": { "value": "1" }, "PCW_I2C0_PERIPHERAL_ENABLE": { "value": "0" }, "PCW_IRQ_F2P_INTR": { "value": "1" }, "PCW_IRQ_F2P_MODE": { "value": "DIRECT" }, "PCW_MIO_16_IOTYPE": { "value": "LVCMOS 1.8V" }, "PCW_MIO_16_PULLUP": { "value": "disabled" }, "PCW_MIO_16_SLEW": { "value": "fast" }, "PCW_MIO_17_IOTYPE": { "value": "LVCMOS 1.8V" }, "PCW_MIO_17_PULLUP": { "value": "disabled" }, "PCW_MIO_17_SLEW": { "value": "fast" }, "PCW_MIO_18_IOTYPE": { "value": "LVCMOS 1.8V" }, "PCW_MIO_18_PULLUP": { "value": "disabled" }, "PCW_MIO_18_SLEW": { "value": "fast" }, "PCW_MIO_19_IOTYPE": { "value": "LVCMOS 1.8V" }, "PCW_MIO_19_PULLUP": { "value": "disabled" }, "PCW_MIO_19_SLEW": { "value": "fast" }, "PCW_MIO_1_IOTYPE": { "value": "LVCMOS 3.3V" }, "PCW_MIO_1_PULLUP": { "value": "disabled" }, "PCW_MIO_1_SLEW": { "value": "fast" }, "PCW_MIO_20_IOTYPE": { "value": "LVCMOS 1.8V" }, "PCW_MIO_20_PULLUP": { "value": "disabled" }, "PCW_MIO_20_SLEW": { "value": "fast" }, "PCW_MIO_21_IOTYPE": { "value": "LVCMOS 1.8V" }, "PCW_MIO_21_PULLUP": { "value": "disabled" }, "PCW_MIO_21_SLEW": { "value": "fast" }, "PCW_MIO_22_IOTYPE": { "value": "LVCMOS 1.8V" }, "PCW_MIO_22_PULLUP": { "value": "disabled" }, "PCW_MIO_22_SLEW": { "value": "fast" }, "PCW_MIO_23_IOTYPE": { "value": "LVCMOS 1.8V" }, "PCW_MIO_23_PULLUP": { "value": "disabled" }, "PCW_MIO_23_SLEW": { "value": "fast" }, "PCW_MIO_24_IOTYPE": { "value": "LVCMOS 1.8V" }, "PCW_MIO_24_PULLUP": { "value": "disabled" }, "PCW_MIO_24_SLEW": { "value": "fast" }, "PCW_MIO_25_IOTYPE": { "value": "LVCMOS 1.8V" }, "PCW_MIO_25_PULLUP": { "value": "disabled" }, "PCW_MIO_25_SLEW": { "value": "fast" }, "PCW_MIO_26_IOTYPE": { "value": "LVCMOS 1.8V" }, "PCW_MIO_26_PULLUP": { "value": "disabled" }, "PCW_MIO_26_SLEW": { "value": "fast" }, "PCW_MIO_27_IOTYPE": { "value": "LVCMOS 1.8V" }, "PCW_MIO_27_PULLUP": { "value": "disabled" }, "PCW_MIO_27_SLEW": { "value": "fast" }, "PCW_MIO_28_IOTYPE": { "value": "LVCMOS 1.8V" }, "PCW_MIO_28_PULLUP": { "value": "disabled" }, "PCW_MIO_28_SLEW": { "value": "fast" }, "PCW_MIO_29_IOTYPE": { "value": "LVCMOS 1.8V" }, "PCW_MIO_29_PULLUP": { "value": "disabled" }, "PCW_MIO_29_SLEW": { "value": "fast" }, "PCW_MIO_2_IOTYPE": { "value": "LVCMOS 3.3V" }, "PCW_MIO_2_SLEW": { "value": "fast" }, "PCW_MIO_30_IOTYPE": { "value": "LVCMOS 1.8V" }, "PCW_MIO_30_PULLUP": { "value": "disabled" }, "PCW_MIO_30_SLEW": { "value": "fast" }, "PCW_MIO_31_IOTYPE": { "value": "LVCMOS 1.8V" }, "PCW_MIO_31_PULLUP": { "value": "disabled" }, "PCW_MIO_31_SLEW": { "value": "fast" }, "PCW_MIO_32_IOTYPE": { "value": "LVCMOS 1.8V" }, "PCW_MIO_32_PULLUP": { "value": "disabled" }, "PCW_MIO_32_SLEW": { "value": "fast" }, "PCW_MIO_33_IOTYPE": { "value": "LVCMOS 1.8V" }, "PCW_MIO_33_PULLUP": { "value": "disabled" }, "PCW_MIO_33_SLEW": { "value": "fast" }, "PCW_MIO_34_IOTYPE": { "value": "LVCMOS 1.8V" }, "PCW_MIO_34_PULLUP": { "value": "disabled" }, "PCW_MIO_34_SLEW": { "value": "fast" }, "PCW_MIO_35_IOTYPE": { "value": "LVCMOS 1.8V" }, "PCW_MIO_35_PULLUP": { "value": "disabled" }, "PCW_MIO_35_SLEW": { "value": "fast" }, "PCW_MIO_36_IOTYPE": { "value": "LVCMOS 1.8V" }, "PCW_MIO_36_PULLUP": { "value": "disabled" }, "PCW_MIO_36_SLEW": { "value": "fast" }, "PCW_MIO_37_IOTYPE": { "value": "LVCMOS 1.8V" }, "PCW_MIO_37_PULLUP": { "value": "disabled" }, "PCW_MIO_37_SLEW": { "value": "fast" }, "PCW_MIO_38_IOTYPE": { "value": "LVCMOS 1.8V" }, "PCW_MIO_38_PULLUP": { "value": "disabled" }, "PCW_MIO_38_SLEW": { "value": "fast" }, "PCW_MIO_39_IOTYPE": { "value": "LVCMOS 1.8V" }, "PCW_MIO_39_PULLUP": { "value": "disabled" }, "PCW_MIO_39_SLEW": { "value": "fast" }, "PCW_MIO_3_IOTYPE": { "value": "LVCMOS 3.3V" }, "PCW_MIO_3_SLEW": { "value": "fast" }, "PCW_MIO_40_IOTYPE": { "value": "LVCMOS 1.8V" }, "PCW_MIO_40_PULLUP": { "value": "disabled" }, "PCW_MIO_40_SLEW": { "value": "fast" }, "PCW_MIO_41_IOTYPE": { "value": "LVCMOS 1.8V" }, "PCW_MIO_41_PULLUP": { "value": "disabled" }, "PCW_MIO_41_SLEW": { "value": "fast" }, "PCW_MIO_42_IOTYPE": { "value": "LVCMOS 1.8V" }, "PCW_MIO_42_PULLUP": { "value": "disabled" }, "PCW_MIO_42_SLEW": { "value": "fast" }, "PCW_MIO_43_IOTYPE": { "value": "LVCMOS 1.8V" }, "PCW_MIO_43_PULLUP": { "value": "disabled" }, "PCW_MIO_43_SLEW": { "value": "fast" }, "PCW_MIO_44_IOTYPE": { "value": "LVCMOS 1.8V" }, "PCW_MIO_44_PULLUP": { "value": "disabled" }, "PCW_MIO_44_SLEW": { "value": "fast" }, "PCW_MIO_45_IOTYPE": { "value": "LVCMOS 1.8V" }, "PCW_MIO_45_PULLUP": { "value": "disabled" }, "PCW_MIO_45_SLEW": { "value": "fast" }, "PCW_MIO_46_IOTYPE": { "value": "LVCMOS 1.8V" }, "PCW_MIO_46_PULLUP": { "value": "disabled" }, "PCW_MIO_46_SLEW": { "value": "slow" }, "PCW_MIO_47_IOTYPE": { "value": "LVCMOS 1.8V" }, "PCW_MIO_47_PULLUP": { "value": "disabled" }, "PCW_MIO_47_SLEW": { "value": "slow" }, "PCW_MIO_48_IOTYPE": { "value": "LVCMOS 1.8V" }, "PCW_MIO_48_PULLUP": { "value": "disabled" }, "PCW_MIO_48_SLEW": { "value": "slow" }, "PCW_MIO_49_IOTYPE": { "value": "LVCMOS 1.8V" }, "PCW_MIO_49_PULLUP": { "value": "disabled" }, "PCW_MIO_49_SLEW": { "value": "slow" }, "PCW_MIO_4_IOTYPE": { "value": "LVCMOS 3.3V" }, "PCW_MIO_4_SLEW": { "value": "fast" }, "PCW_MIO_52_IOTYPE": { "value": "LVCMOS 1.8V" }, "PCW_MIO_52_PULLUP": { "value": "disabled" }, "PCW_MIO_52_SLEW": { "value": "slow" }, "PCW_MIO_53_IOTYPE": { "value": "LVCMOS 1.8V" }, "PCW_MIO_53_PULLUP": { "value": "disabled" }, "PCW_MIO_53_SLEW": { "value": "slow" }, "PCW_MIO_5_IOTYPE": { "value": "LVCMOS 3.3V" }, "PCW_MIO_5_SLEW": { "value": "fast" }, "PCW_MIO_6_IOTYPE": { "value": "LVCMOS 3.3V" }, "PCW_MIO_6_SLEW": { "value": "fast" }, "PCW_MIO_TREE_PERIPHERALS": { "value": "unassigned#Quad SPI Flash#Quad SPI Flash#Quad SPI Flash#Quad SPI Flash#Quad SPI Flash#Quad SPI Flash#unassigned#unassigned#unassigned#unassigned#unassigned#unassigned#unassigned#unassigned#unassigned#Enet 0#Enet 0#Enet 0#Enet 0#Enet 0#Enet 0#Enet 0#Enet 0#Enet 0#Enet 0#Enet 0#Enet 0#USB 0#USB 0#USB 0#USB 0#USB 0#USB 0#USB 0#USB 0#USB 0#USB 0#USB 0#USB 0#SD 0#SD 0#SD 0#SD 0#SD 0#SD 0#SD 0#SD 0#UART 1#UART 1#unassigned#unassigned#Enet 0#Enet 0" }, "PCW_MIO_TREE_SIGNALS": { "value": "unassigned#qspi0_ss_b#qspi0_io[0]#qspi0_io[1]#qspi0_io[2]#qspi0_io[3]/HOLD_B#qspi0_sclk#unassigned#unassigned#unassigned#unassigned#unassigned#unassigned#unassigned#unassigned#unassigned#tx_clk#txd[0]#txd[1]#txd[2]#txd[3]#tx_ctl#rx_clk#rxd[0]#rxd[1]#rxd[2]#rxd[3]#rx_ctl#data[4]#dir#stp#nxt#data[0]#data[1]#data[2]#data[3]#clk#data[5]#data[6]#data[7]#clk#cmd#data[0]#data[1]#data[2]#data[3]#wp#cd#tx#rx#unassigned#unassigned#mdc#mdio" }, "PCW_PACKAGE_DDR_BOARD_DELAY0": { "value": "0.063" }, "PCW_PACKAGE_DDR_BOARD_DELAY1": { "value": "0.062" }, "PCW_PACKAGE_DDR_BOARD_DELAY2": { "value": "0.065" }, "PCW_PACKAGE_DDR_BOARD_DELAY3": { "value": "0.083" }, "PCW_PACKAGE_DDR_DQS_TO_CLK_DELAY_0": { "value": "-0.007" }, "PCW_PACKAGE_DDR_DQS_TO_CLK_DELAY_1": { "value": "-0.010" }, "PCW_PACKAGE_DDR_DQS_TO_CLK_DELAY_2": { "value": "-0.006" }, "PCW_PACKAGE_DDR_DQS_TO_CLK_DELAY_3": { "value": "-0.048" }, "PCW_PCAP_PERIPHERAL_CLKSRC": { "value": "IO PLL" }, "PCW_PRESET_BANK1_VOLTAGE": { "value": "LVCMOS 1.8V" }, "PCW_QSPI_GRP_FBCLK_ENABLE": { "value": "0" }, "PCW_QSPI_GRP_IO1_ENABLE": { "value": "0" }, "PCW_QSPI_GRP_SINGLE_SS_ENABLE": { "value": "1" }, "PCW_QSPI_GRP_SINGLE_SS_IO": { "value": "MIO 1 .. 6" }, "PCW_QSPI_GRP_SS1_ENABLE": { "value": "0" }, "PCW_QSPI_PERIPHERAL_ENABLE": { "value": "1" }, "PCW_QSPI_PERIPHERAL_FREQMHZ": { "value": "200" }, "PCW_QSPI_QSPI_IO": { "value": "MIO 1 .. 6" }, "PCW_SD0_GRP_CD_ENABLE": { "value": "1" }, "PCW_SD0_GRP_CD_IO": { "value": "MIO 47" }, "PCW_SD0_GRP_POW_ENABLE": { "value": "0" }, "PCW_SD0_GRP_WP_ENABLE": { "value": "1" }, "PCW_SD0_GRP_WP_IO": { "value": "MIO 46" }, "PCW_SD0_PERIPHERAL_ENABLE": { "value": "1" }, "PCW_SD0_SD0_IO": { "value": "MIO 40 .. 45" }, "PCW_SDIO_PERIPHERAL_FREQMHZ": { "value": "50" }, "PCW_SDIO_PERIPHERAL_VALID": { "value": "1" }, "PCW_SINGLE_QSPI_DATA_MODE": { "value": "x4" }, "PCW_S_AXI_HP2_DATA_WIDTH": { "value": "32" }, "PCW_UART1_GRP_FULL_ENABLE": { "value": "0" }, "PCW_UART1_PERIPHERAL_ENABLE": { "value": "1" }, "PCW_UART1_UART1_IO": { "value": "MIO 48 .. 49" }, "PCW_UART_PERIPHERAL_FREQMHZ": { "value": "50" }, "PCW_UART_PERIPHERAL_VALID": { "value": "1" }, "PCW_UIPARAM_ACT_DDR_FREQ_MHZ": { "value": "533.333374" }, "PCW_UIPARAM_DDR_BOARD_DELAY0": { "value": "0.41" }, "PCW_UIPARAM_DDR_BOARD_DELAY1": { "value": "0.411" }, "PCW_UIPARAM_DDR_BOARD_DELAY2": { "value": "0.341" }, "PCW_UIPARAM_DDR_BOARD_DELAY3": { "value": "0.358" }, "PCW_UIPARAM_DDR_CLOCK_0_LENGTH_MM": { "value": "0" }, "PCW_UIPARAM_DDR_CLOCK_0_PROPOGATION_DELAY": { "value": "160" }, "PCW_UIPARAM_DDR_CLOCK_1_LENGTH_MM": { "value": "0" }, "PCW_UIPARAM_DDR_CLOCK_1_PROPOGATION_DELAY": { "value": "160" }, "PCW_UIPARAM_DDR_CLOCK_2_LENGTH_MM": { "value": "0" }, "PCW_UIPARAM_DDR_CLOCK_2_PROPOGATION_DELAY": { "value": "160" }, "PCW_UIPARAM_DDR_CLOCK_3_LENGTH_MM": { "value": "0" }, "PCW_UIPARAM_DDR_CLOCK_3_PROPOGATION_DELAY": { "value": "160" }, "PCW_UIPARAM_DDR_DQS_0_LENGTH_MM": { "value": "0" }, "PCW_UIPARAM_DDR_DQS_0_PROPOGATION_DELAY": { "value": "160" }, "PCW_UIPARAM_DDR_DQS_1_LENGTH_MM": { "value": "0" }, "PCW_UIPARAM_DDR_DQS_1_PROPOGATION_DELAY": { "value": "160" }, "PCW_UIPARAM_DDR_DQS_2_LENGTH_MM": { "value": "0" }, "PCW_UIPARAM_DDR_DQS_2_PROPOGATION_DELAY": { "value": "160" }, "PCW_UIPARAM_DDR_DQS_3_LENGTH_MM": { "value": "0" }, "PCW_UIPARAM_DDR_DQS_3_PROPOGATION_DELAY": { "value": "160" }, "PCW_UIPARAM_DDR_DQS_TO_CLK_DELAY_0": { "value": "0.025" }, "PCW_UIPARAM_DDR_DQS_TO_CLK_DELAY_1": { "value": "0.028" }, "PCW_UIPARAM_DDR_DQS_TO_CLK_DELAY_2": { "value": "-0.009" }, "PCW_UIPARAM_DDR_DQS_TO_CLK_DELAY_3": { "value": "-0.061" }, "PCW_UIPARAM_DDR_DQ_0_LENGTH_MM": { "value": "0" }, "PCW_UIPARAM_DDR_DQ_0_PROPOGATION_DELAY": { "value": "160" }, "PCW_UIPARAM_DDR_DQ_1_LENGTH_MM": { "value": "0" }, "PCW_UIPARAM_DDR_DQ_1_PROPOGATION_DELAY": { "value": "160" }, "PCW_UIPARAM_DDR_DQ_2_LENGTH_MM": { "value": "0" }, "PCW_UIPARAM_DDR_DQ_2_PROPOGATION_DELAY": { "value": "160" }, "PCW_UIPARAM_DDR_DQ_3_LENGTH_MM": { "value": "0" }, "PCW_UIPARAM_DDR_DQ_3_PROPOGATION_DELAY": { "value": "160" }, "PCW_UIPARAM_DDR_FREQ_MHZ": { "value": "533.333313" }, "PCW_UIPARAM_DDR_PARTNO": { "value": "MT41J128M16 HA-15E" }, "PCW_UIPARAM_DDR_TRAIN_DATA_EYE": { "value": "1" }, "PCW_UIPARAM_DDR_TRAIN_READ_GATE": { "value": "1" }, "PCW_UIPARAM_DDR_TRAIN_WRITE_LEVEL": { "value": "1" }, "PCW_USB0_PERIPHERAL_ENABLE": { "value": "1" }, "PCW_USB0_USB0_IO": { "value": "MIO 28 .. 39" }, "PCW_USE_DEFAULT_ACP_USER_VAL": { "value": "1" }, "PCW_USE_FABRIC_INTERRUPT": { "value": "1" }, "PCW_USE_S_AXI_ACP": { "value": "1" }, "PCW_USE_S_AXI_HP2": { "value": "1" } } }, "rst_processing_system7_0_100M": { "vlnv": "xilinx.com:ip:proc_sys_reset:5.0", "xci_name": "vivado_system_rst_processing_system7_0_100M_0" }, "xlconcat_0": { "vlnv": "xilinx.com:ip:xlconcat:2.1", "xci_name": "vivado_system_xlconcat_0_0", "parameters": { "NUM_PORTS": { "value": "16" } } }, "ps7_0_axi_periph": { "vlnv": "xilinx.com:ip:axi_interconnect:2.1", "xci_name": "vivado_system_ps7_0_axi_periph_0", "parameters": { "NUM_MI": { "value": "3" } }, "interface_ports": { "S00_AXI": { "mode": "Slave", "vlnv": "xilinx.com:interface:aximm_rtl:1.0" }, "M00_AXI": { "mode": "Master", "vlnv": "xilinx.com:interface:aximm_rtl:1.0" }, "M01_AXI": { "mode": "Master", "vlnv": "xilinx.com:interface:aximm_rtl:1.0" }, "M02_AXI": { "mode": "Master", "vlnv": "xilinx.com:interface:aximm_rtl:1.0" } }, "ports": { "ACLK": { "type": "clk", "direction": "I", "parameters": { "ASSOCIATED_RESET": { "value": "ARESETN" } } }, "ARESETN": { "type": "rst", "direction": "I" }, "S00_ACLK": { "type": "clk", "direction": "I", "parameters": { "ASSOCIATED_BUSIF": { "value": "S00_AXI" }, "ASSOCIATED_RESET": { "value": "S00_ARESETN" } } }, "S00_ARESETN": { "type": "rst", "direction": "I" }, "M00_ACLK": { "type": "clk", "direction": "I", "parameters": { "ASSOCIATED_BUSIF": { "value": "M00_AXI" }, "ASSOCIATED_RESET": { "value": "M00_ARESETN" } } }, "M00_ARESETN": { "type": "rst", "direction": "I" }, "M01_ACLK": { "type": "clk", "direction": "I", "parameters": { "ASSOCIATED_BUSIF": { "value": "M01_AXI" }, "ASSOCIATED_RESET": { "value": "M01_ARESETN" } } }, "M01_ARESETN": { "type": "rst", "direction": "I" }, "M02_ACLK": { "type": "clk", "direction": "I", "parameters": { "ASSOCIATED_BUSIF": { "value": "M02_AXI" }, "ASSOCIATED_RESET": { "value": "M02_ARESETN" } } }, "M02_ARESETN": { "type": "rst", "direction": "I" } }, "components": { "xbar": { "vlnv": "xilinx.com:ip:axi_crossbar:2.1", "xci_name": "vivado_system_xbar_0", "parameters": { "NUM_MI": { "value": "3" }, "NUM_SI": { "value": "1" }, "STRATEGY": { "value": "0" } } }, "s00_couplers": { "interface_ports": { "M_AXI": { "mode": "Master", "vlnv": "xilinx.com:interface:aximm_rtl:1.0" }, "S_AXI": { "mode": "Slave", "vlnv": "xilinx.com:interface:aximm_rtl:1.0" } }, "ports": { "M_ACLK": { "type": "clk", "direction": "I", "parameters": { "ASSOCIATED_BUSIF": { "value": "M_AXI" }, "ASSOCIATED_RESET": { "value": "M_ARESETN" } } }, "M_ARESETN": { "type": "rst", "direction": "I" }, "S_ACLK": { "type": "clk", "direction": "I", "parameters": { "ASSOCIATED_BUSIF": { "value": "S_AXI" }, "ASSOCIATED_RESET": { "value": "S_ARESETN" } } }, "S_ARESETN": { "type": "rst", "direction": "I" } }, "components": { "auto_pc": { "vlnv": "xilinx.com:ip:axi_protocol_converter:2.1", "xci_name": "vivado_system_auto_pc_0", "parameters": { "MI_PROTOCOL": { "value": "AXI4LITE" }, "SI_PROTOCOL": { "value": "AXI3" } } } }, "interface_nets": { "s00_couplers_to_auto_pc": { "interface_ports": [ "S_AXI", "auto_pc/S_AXI" ] }, "auto_pc_to_s00_couplers": { "interface_ports": [ "M_AXI", "auto_pc/M_AXI" ] } }, "nets": { "S_ACLK_1": { "ports": [ "S_ACLK", "auto_pc/aclk" ] }, "S_ARESETN_1": { "ports": [ "S_ARESETN", "auto_pc/aresetn" ] } } }, "m00_couplers": { "interface_ports": { "M_AXI": { "mode": "Master", "vlnv": "xilinx.com:interface:aximm_rtl:1.0" }, "S_AXI": { "mode": "Slave", "vlnv": "xilinx.com:interface:aximm_rtl:1.0" } }, "ports": { "M_ACLK": { "type": "clk", "direction": "I", "parameters": { "ASSOCIATED_BUSIF": { "value": "M_AXI" }, "ASSOCIATED_RESET": { "value": "M_ARESETN" } } }, "M_ARESETN": { "type": "rst", "direction": "I" }, "S_ACLK": { "type": "clk", "direction": "I", "parameters": { "ASSOCIATED_BUSIF": { "value": "S_AXI" }, "ASSOCIATED_RESET": { "value": "S_ARESETN" } } }, "S_ARESETN": { "type": "rst", "direction": "I" } }, "interface_nets": { "m00_couplers_to_m00_couplers": { "interface_ports": [ "S_AXI", "M_AXI" ] } } }, "m01_couplers": { "interface_ports": { "M_AXI": { "mode": "Master", "vlnv": "xilinx.com:interface:aximm_rtl:1.0" }, "S_AXI": { "mode": "Slave", "vlnv": "xilinx.com:interface:aximm_rtl:1.0" } }, "ports": { "M_ACLK": { "type": "clk", "direction": "I", "parameters": { "ASSOCIATED_BUSIF": { "value": "M_AXI" }, "ASSOCIATED_RESET": { "value": "M_ARESETN" } } }, "M_ARESETN": { "type": "rst", "direction": "I" }, "S_ACLK": { "type": "clk", "direction": "I", "parameters": { "ASSOCIATED_BUSIF": { "value": "S_AXI" }, "ASSOCIATED_RESET": { "value": "S_ARESETN" } } }, "S_ARESETN": { "type": "rst", "direction": "I" } }, "interface_nets": { "m01_couplers_to_m01_couplers": { "interface_ports": [ "S_AXI", "M_AXI" ] } } }, "m02_couplers": { "interface_ports": { "M_AXI": { "mode": "Master", "vlnv": "xilinx.com:interface:aximm_rtl:1.0" }, "S_AXI": { "mode": "Slave", "vlnv": "xilinx.com:interface:aximm_rtl:1.0" } }, "ports": { "M_ACLK": { "type": "clk", "direction": "I", "parameters": { "ASSOCIATED_BUSIF": { "value": "M_AXI" }, "ASSOCIATED_RESET": { "value": "M_ARESETN" } } }, "M_ARESETN": { "type": "rst", "direction": "I" }, "S_ACLK": { "type": "clk", "direction": "I", "parameters": { "ASSOCIATED_BUSIF": { "value": "S_AXI" }, "ASSOCIATED_RESET": { "value": "S_ARESETN" } } }, "S_ARESETN": { "type": "rst", "direction": "I" } }, "interface_nets": { "m02_couplers_to_m02_couplers": { "interface_ports": [ "S_AXI", "M_AXI" ] } } } }, "interface_nets": { "ps7_0_axi_periph_to_s00_couplers": { "interface_ports": [ "S00_AXI", "s00_couplers/S_AXI" ] }, "s00_couplers_to_xbar": { "interface_ports": [ "s00_couplers/M_AXI", "xbar/S00_AXI" ] }, "xbar_to_m00_couplers": { "interface_ports": [ "xbar/M00_AXI", "m00_couplers/S_AXI" ] }, "m01_couplers_to_ps7_0_axi_periph": { "interface_ports": [ "M01_AXI", "m01_couplers/M_AXI" ] }, "xbar_to_m01_couplers": { "interface_ports": [ "xbar/M01_AXI", "m01_couplers/S_AXI" ] }, "m00_couplers_to_ps7_0_axi_periph": { "interface_ports": [ "M00_AXI", "m00_couplers/M_AXI" ] }, "m02_couplers_to_ps7_0_axi_periph": { "interface_ports": [ "M02_AXI", "m02_couplers/M_AXI" ] }, "xbar_to_m02_couplers": { "interface_ports": [ "xbar/M02_AXI", "m02_couplers/S_AXI" ] } }, "nets": { "ps7_0_axi_periph_ACLK_net": { "ports": [ "ACLK", "xbar/aclk", "s00_couplers/S_ACLK", "s00_couplers/M_ACLK", "m00_couplers/M_ACLK", "m01_couplers/M_ACLK", "m02_couplers/M_ACLK", "m00_couplers/S_ACLK", "m01_couplers/S_ACLK", "m02_couplers/S_ACLK" ] }, "ps7_0_axi_periph_ARESETN_net": { "ports": [ "ARESETN", "xbar/aresetn", "s00_couplers/S_ARESETN", "s00_couplers/M_ARESETN", "m00_couplers/M_ARESETN", "m01_couplers/M_ARESETN", "m02_couplers/M_ARESETN", "m00_couplers/S_ARESETN", "m01_couplers/S_ARESETN", "m02_couplers/S_ARESETN" ] } } } }, "interface_nets": { "processing_system7_0_M_AXI_GP0": { "interface_ports": [ "processing_system7_0/M_AXI_GP0", "ps7_0_axi_periph/S00_AXI" ] }, "ps7_0_axi_periph_M00_AXI": { "interface_ports": [ "ps7_0_axi_periph/M00_AXI", "xillybus_ip_0/S_AXI" ] }, "ps7_0_axi_periph_M01_AXI": { "interface_ports": [ "ps7_0_axi_periph/M01_AXI", "xillyvga_0/S_AXI" ] }, "ps7_0_axi_periph_M02_AXI": { "interface_ports": [ "ps7_0_axi_periph/M02_AXI", "xillybus_lite_0/S_AXI" ] }, "xillybus_ip_0_m_axi": { "interface_ports": [ "xillybus_ip_0/m_axi", "processing_system7_0/S_AXI_ACP" ] }, "xillyvga_0_m_axi": { "interface_ports": [ "xillyvga_0/m_axi", "processing_system7_0/S_AXI_HP2" ] }, "xillybus_M_AXI_1": { "interface_ports": [ "xillybus_M_AXI", "xillybus_ip_0/xillybus_M_AXI" ] }, "processing_system7_0_DDR": { "interface_ports": [ "DDR", "processing_system7_0/DDR" ] }, "processing_system7_0_FIXED_IO": { "interface_ports": [ "FIXED_IO", "processing_system7_0/FIXED_IO" ] }, "processing_system7_0_USBIND_0": { "interface_ports": [ "USBIND_0", "processing_system7_0/USBIND_0" ] }, "processing_system7_0_GPIO_0": { "interface_ports": [ "GPIO_0", "processing_system7_0/GPIO_0" ] }, "xillybus_ip_0_xillybus_S_AXI": { "interface_ports": [ "xillybus_S_AXI", "xillybus_ip_0/xillybus_S_AXI" ] } }, "nets": { "processing_system7_0_FCLK_CLK1": { "ports": [ "processing_system7_0/FCLK_CLK1", "xillybus_lite_0/S_AXI_ACLK", "xillyvga_0/m_axi_aclk", "xillybus_ip_0/S_AXI_ACLK", "xillybus_ip_0/m_axi_aclk", "xillyvga_0/S_AXI_ACLK", "processing_system7_0/M_AXI_GP0_ACLK", "processing_system7_0/S_AXI_ACP_ACLK", "processing_system7_0/S_AXI_HP2_ACLK", "rst_processing_system7_0_100M/slowest_sync_clk", "ps7_0_axi_periph/S00_ACLK", "ps7_0_axi_periph/M00_ACLK", "ps7_0_axi_periph/ACLK", "ps7_0_axi_periph/M01_ACLK", "ps7_0_axi_periph/M02_ACLK" ] }, "processing_system7_0_FCLK_RESET1_N": { "ports": [ "processing_system7_0/FCLK_RESET1_N", "rst_processing_system7_0_100M/ext_reset_in" ] }, "rst_processing_system7_0_100M_peripheral_aresetn": { "ports": [ "rst_processing_system7_0_100M/peripheral_aresetn", "xillybus_lite_0/S_AXI_ARESETN", "xillyvga_0/m_axi_aresetn", "xillybus_ip_0/S_AXI_ARESETN", "xillybus_ip_0/m_axi_aresetn", "xillyvga_0/S_AXI_ARESETN", "ps7_0_axi_periph/S00_ARESETN", "ps7_0_axi_periph/M00_ARESETN", "ps7_0_axi_periph/ARESETN", "ps7_0_axi_periph/M01_ARESETN", "ps7_0_axi_periph/M02_ARESETN" ] }, "xillybus_host_interrupt_1": { "ports": [ "xillybus_host_interrupt", "xillybus_ip_0/xillybus_host_interrupt" ] }, "xillybus_ip_0_xillybus_bus_rst_n": { "ports": [ "xillybus_ip_0/xillybus_bus_rst_n", "xillybus_bus_rst_n" ] }, "xillybus_ip_0_xillybus_bus_clk": { "ports": [ "xillybus_ip_0/xillybus_bus_clk", "xillybus_bus_clk" ] }, "xlconcat_0_dout": { "ports": [ "xlconcat_0/dout", "processing_system7_0/IRQ_F2P" ] }, "xillybus_ip_0_Interrupt": { "ports": [ "xillybus_ip_0/Interrupt", "xlconcat_0/In15" ] }, "xillybus_lite_0_host_interrupt": { "ports": [ "xillybus_lite_0/host_interrupt", "xlconcat_0/In14" ] }, "xillyvga_0_vga_vsync": { "ports": [ "xillyvga_0/vga_vsync", "vga_vsync" ] }, "xillyvga_0_vga_de": { "ports": [ "xillyvga_0/vga_de", "vga_de" ] }, "xillyvga_0_vga_blue": { "ports": [ "xillyvga_0/vga_blue", "vga_blue" ] }, "xillyvga_0_vga_green": { "ports": [ "xillyvga_0/vga_green", "vga_green" ] }, "xillyvga_0_vga_clk": { "ports": [ "xillyvga_0/vga_clk", "vga_clk" ] }, "xillyvga_0_vga_red": { "ports": [ "xillyvga_0/vga_red", "vga_red" ] }, "xillyvga_0_vga_hsync": { "ports": [ "xillyvga_0/vga_hsync", "vga_hsync" ] }, "clk_in_1": { "ports": [ "clk_in", "xillyvga_0/clk_in" ] }, "xillybus_lite_0_user_wstrb": { "ports": [ "xillybus_lite_0/user_wstrb", "user_wstrb" ] }, "xillybus_lite_0_user_addr": { "ports": [ "xillybus_lite_0/user_addr", "user_addr" ] }, "user_irq_1": { "ports": [ "user_irq", "xillybus_lite_0/user_irq" ] }, "xillybus_lite_0_user_wren": { "ports": [ "xillybus_lite_0/user_wren", "user_wren" ] }, "xillybus_lite_0_user_clk": { "ports": [ "xillybus_lite_0/user_clk", "user_clk" ] }, "xillybus_lite_0_user_rden": { "ports": [ "xillybus_lite_0/user_rden", "user_rden" ] }, "xillybus_lite_0_user_wr_data": { "ports": [ "xillybus_lite_0/user_wr_data", "user_wr_data" ] }, "user_rd_data_1": { "ports": [ "user_rd_data", "xillybus_lite_0/user_rd_data" ] } }, "addressing": { "/": { "address_spaces": { "xillybus_M_AXI": { "range": "4G", "width": "32", "segments": { "SEG_xillybus_ip_0_reg0": { "address_block": "/xillybus_ip_0/xillybus_M_AXI/reg0", "offset": "0x00000000", "range": "4G" } } } }, "memory_maps": { "xillybus_S_AXI": { "address_blocks": { "Reg": { "base_address": "0", "range": "64K", "width": "32", "usage": "register" } } } } }, "/xillybus_ip_0": { "address_spaces": { "m_axi": { "range": "4G", "width": "32", "segments": { "SEG_processing_system7_0_ACP_DDR_LOWOCM": { "address_block": "/processing_system7_0/S_AXI_ACP/ACP_DDR_LOWOCM", "offset": "0x00000000", "range": "512M" } } }, "xillybus_S_AXI": { "range": "4G", "width": "32" } } }, "/xillyvga_0": { "address_spaces": { "m_axi": { "range": "4G", "width": "32", "segments": { "SEG_processing_system7_0_HP2_DDR_LOWOCM": { "address_block": "/processing_system7_0/S_AXI_HP2/HP2_DDR_LOWOCM", "offset": "0x00000000", "range": "512M" } } } } }, "/processing_system7_0": { "address_spaces": { "Data": { "range": "4G", "width": "32", "segments": { "SEG_xillybus_ip_0_reg0": { "address_block": "/xillybus_ip_0/S_AXI/reg0", "offset": "0x50000000", "range": "4K" }, "SEG_xillybus_lite_0_reg0": { "address_block": "/xillybus_lite_0/S_AXI/reg0", "offset": "0x50002000", "range": "4K" }, "SEG_xillyvga_0_reg0": { "address_block": "/xillyvga_0/S_AXI/reg0", "offset": "0x50001000", "range": "4K" } } } } } } } }