library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;

library osvvm; -- Utility Library
context osvvm.OsvvmContext;

use work.rtps_package.all;
use work.user_config.all;
use work.rtps_config_package.all;
use work.rtps_test_package.all;

entity L0_dds_writer_test1 is
end entity;

-- This testbench tests the General Operation of the DDS Writer. It tests the correctness of the RTPS 
-- GET_MIN_SN, GET_MAX_SN, GET_CACHE_CHANGE, REMOVE_CACHE_CHANGE, ACK_CACHE_CHANGE, and NACK_CACHE_CHANGE Operations and the
-- DDS REGISTER_INSTANCE, UNREGISTER_INSTANCE, WRITE, DISPOSE, and LOOKUP_INSTANCE Operations.
-- More specifically the testbench covers following tests:
-- TEST: GET_MIN_SN/GET_MAX_SN ON EMPTY
-- TEST: GET_MIN_SN/GET_MAX_SN ON 1 SAMPLE
-- TEST: GET_MIN_SN/GET_MAX_SN ON >1 SAMPLE
-- TEST: ADD SAMPLE WITH KEY_HASH [UNKNOWN INSTANCE]
-- TEST: ADD SAMPLE WITH KEY_HASH [KNOWN INSTANCE]
-- TEST: ADD SAMPLE WITH HANDLE_NIL [UNKNOWN INSTANCE]
-- TEST: ADD SAMPLE WITH HANDLE_NIL [KNOWN INSTANCE]
-- TEST: NORMAL WRITE
-- TEST: WRITE ON PAYLOAD MEMORY FULL [WITHOUT ACKed SAMPLES]
-- TEST: WRITE ON PAYLOAD MEMORY FULL [WITH ACKed SAMPLES]
-- TEST: WRITE ON DISPOSED INSTANCE
-- TEST: WRITE ON UNREGISTERED INSTANCE
-- TEST: WRITE ALIGNED PAYLOAD
-- TEST: WRITE UNALIGNED PAYLOAD [>1 SLOT]
-- TEST: WRITE UNALIGNED PAYLOAD [<1 SLOT]
-- TEST: NORMAL REGISTER
-- TEST: REGISTER INSTANCE [KNOWN INSTANCE]
-- TEST: REGISTER INSTANCE ON MAX_INSTANCES [UNKNOWN INSTANCE, WITHOUT STALE INSTANCE]
-- TEST: REGISTER INSTANCE ON MAX_INSTANCES [UNKNOWN INSTANCE, WITH STALE INSTANCE]
-- TEST: REGISTER ON UNREGISTERED INSTANCE
-- TEST: NORMAL DISPOSE
-- TEST: DISPOSE ON PAYLOAD MEMORY FULL [WITHOUT ACKed SAMPLES]
-- TEST: DISPOSE ON PAYLOAD MEMORY FULL [WITH ACKed SAMPLES]
-- TEST: DISPOSE ON UNREGISTERED INSTANCE
-- TEST: GET_CACHE_CHANGE [UNKNOWN SN]
-- TEST: GET_CACHE_CHANGE [KNOWN SN, ALIGNED PAYLOAD]
-- TEST: GET_CACHE_CHANGE [KNOWN SN, UNALIGNED PAYLOAD, >1 SLOT]
-- TEST: GET_CACHE_CHANGE [KNOWN SN, UNALIGNED PAYLOAD, <1 SLOT]
-- TEST: NORMAL ACK_CACHE_CHANGE
-- TEST: ACK_CACHE_CHANGE [ALREADY ACKed SN]
-- TEST: ACK_CACHE_CHANGE [UNKNOWN SN]
-- TEST: NORMAL NACK_CACHE_CHANGE
-- TEST: REMOVE_CACHE_CHANGE [UNKNOWN SN]
-- TEST: REMOVE_CACHE_CHANGE [KNOWN SN]
-- TEST: NORMAL UNREGISTER
-- TEST: UNREGISTER INSTANCE ON PAYLOAD MEMORY FULL [WITHOUT ACKed SAMPLES]
-- TEST: UNREGISTER INSTANCE ON PAYLOAD MEMORY FULL [WITH ACKed SAMPLES]
-- TEST: UNREGISTER ON DISPOSED INSTANCE
-- TEST: UNREGISTER UNKNOWN INSTANCE
-- TEST: REMOVE STALE INSTANCE WITH 0 SAMPLES
-- TEST: REMOVE STALE INSTANCE WITH 1 SAMPLES
-- TEST: REMOVE STALE INSTANCE WITH >1 SAMPLES
-- TEST: ADD SAMPLE ON MAX_INSTANCES [UNKNOWN INSTANCE, WITH STALE INSTANCE]
-- TEST: ADD SAMPLE ON MAX_INSTANCES [UNKNOWN INSTANCE, WITHOUT STALE INSTANCES]
-- TEST: ADD SAMPLE ON MAX_INSTANCES [UNKNOWN INSTANCE, WITH FULLY ACKed INSTANCE, WITHOUT STALE INSTANCE]
-- TEST: ADD SAMPLE ON MAX_SAMPLES_PER_INSTANCE [KNOWN INSTANCE, WITHOUT ACKed SAMPLES]
-- TEST: ADD SAMPLE ON MAX_SAMPLES_PER_INSTANCE [KNOWN INSTANCE, WITH ACKed SAMPLES, WITHOUT ACKed INSTANCE SAMPLES]
-- TEST: ADD SAMPLE ON MAX_SAMPLES_PER_INSTANCE [KNOWN INSTANCE, WITH ACKed INSTANCE SAMPLE]
-- TEST: ADD SAMPLE ON MAX_SAMPLES_PER_INSTANCE [KNOWN INSTANCE, WITH ACKed INSTANCE SAMPLES(>1)]
-- TEST: ADD SAMPLE ON MAX_SAMPLES [KNOWN INSTANCE,WITHOUT ACKed SAMPLES]
-- TEST: ADD SAMPLE ON MAX_SAMPLES [KNOWN INSTANCE,WITH ACKed SAMPLE]
-- TEST: ADD SAMPLE ON MAX_SAMPLES [KNOWN INSTANCE,WITH ACKed SAMPLES (>1)]
-- TEST: ADD SAMPLE ON MAX_SAMPLES & MAX_SAMPLES_PER_INSTANCE [KNOWN INSTANCE,WITHOUT ACKed SAMPLES]
-- TEST: ADD SAMPLE ON MAX_SAMPLES & MAX_SAMPLES_PER_INSTANCE [KNOWN INSTANCE,WITH ACKed SAMPLES, WITHOUT ACKed INSTANCE SAMPLES]
-- TEST: ADD SAMPLE ON MAX_SAMPLES & MAX_SAMPLES_PER_INSTANCE [KNOWN INSTANCE,WITH ACKed INSTANCE SAMPLES]
-- TEST: ADD SAMPLE ON MAX_SAMPLES & MAX_INSTANCES [UNKNOWN INSTANCE,WITH STALE INSTANCE, WITHOUT ACKed SAMPLE]
-- TEST: ADD SAMPLE ON MAX_SAMPLES & MAX_INSTANCES [UNKNOWN INSTANCE,WITHOUT STALE INSTANCES,WITHOUT ACKed SAMPLES]
-- TEST: ADD SAMPLE ON MAX_SAMPLES & MAX_INSTANCES [UNKNOWN INSTANCE,WITHOUT STALE INSTANCE, WITH ACKed SAMPLE]
-- TEST: ADD SAMPLE ON MAX_SAMPLES & MAX_INSTANCES [UNKNOWN INSTANCE,WITH STALE INSTANCE (>0 SAMPLES)]
-- TEST: ADD SAMPLE ON MAX_SAMPLES & MAX_INSTANCES [UNKNOWN INSTANCE,WITH STALE INSTANCE (>0 SAMPLES), OLDEST SAMPLE ACKed AND /= STALE INSTANCE] (Induce Double Removal)
-- TEST: ADD SAMPLE ON MAX_SAMPLES & MAX_INSTANCES [UNKNOWN INSTANCE,WITH STALE INSTANCE, WITH ACKed SAMPLE]
-- TEST: ADD SAMPLE ON PAYLOAD FULL & MAX_INSTANCES [UNKNOWN INSTANCE,WITH ACKed SAMPLES,WITH STALE INSTANCE (>= 1 SAMPLE)] (Induce Double Removal)
-- TEST: ADD SAMPLE BIGGER THAN AVAILABLE MEMORY SPACE [WITH ACKed SAMPLES]
-- TEST: INSTANCE LOOKUP [KNOWN INSTANCE]
-- TEST: INSTANCE LOOKUP [UNKNOWN INSTANCE]

architecture testbench of L0_dds_writer_test1 is
    
    -- *CONSTANT DECLARATION*
    constant MAX_REMOTE_ENDPOINTS   : natural := 3;
    constant NUM_WRITERS            : natural := 4;
    
    impure function gen_test_config return CONFIG_ARRAY_TYPE is
        variable ret : CONFIG_ARRAY_TYPE(0 to NUM_WRITERS-1) := (others => DEFAULT_WRITER_CONFIG);
    begin
        -- aik
        ret(0).HISTORY_QOS              := KEEP_ALL_HISTORY_QOS;
        ret(0).DEADLINE_QOS             := DURATION_INFINITE;
        ret(0).LIFESPAN_QOS             := DURATION_INFINITE;
        ret(0).LEASE_DURATION           := DURATION_INFINITE;
        ret(0).WITH_KEY                 := TRUE;
        ret(0).MAX_SAMPLES              := std_logic_vector(to_unsigned(4,CDR_LONG_WIDTH));
        ret(0).MAX_INSTANCES            := std_logic_vector(to_unsigned(3,CDR_LONG_WIDTH));
        ret(0).MAX_SAMPLES_PER_INSTANCE := std_logic_vector(to_unsigned(2,CDR_LONG_WIDTH));
        ret(0).MAX_PAYLOAD_SIZE         := 40;
        -- ain
        ret(1).HISTORY_QOS              := KEEP_ALL_HISTORY_QOS;
        ret(1).DEADLINE_QOS             := DURATION_INFINITE;
        ret(1).LIFESPAN_QOS             := DURATION_INFINITE;
        ret(1).LEASE_DURATION           := DURATION_INFINITE;
        ret(1).WITH_KEY                 := FALSE;
        ret(1).MAX_SAMPLES              := std_logic_vector(to_unsigned(4,CDR_LONG_WIDTH));
        ret(1).MAX_INSTANCES            := std_logic_vector(to_unsigned(3,CDR_LONG_WIDTH));
        ret(1).MAX_SAMPLES_PER_INSTANCE := std_logic_vector(to_unsigned(4,CDR_LONG_WIDTH));
        ret(1).MAX_PAYLOAD_SIZE         := 40;
        -- lik
        ret(2).HISTORY_QOS              := KEEP_LAST_HISTORY_QOS;
        ret(2).DEADLINE_QOS             := DURATION_INFINITE;
        ret(2).LIFESPAN_QOS             := DURATION_INFINITE;
        ret(2).LEASE_DURATION           := DURATION_INFINITE;
        ret(2).WITH_KEY                 := TRUE;
        ret(2).MAX_SAMPLES              := std_logic_vector(to_unsigned(4,CDR_LONG_WIDTH));
        ret(2).MAX_INSTANCES            := std_logic_vector(to_unsigned(3,CDR_LONG_WIDTH));
        ret(2).MAX_SAMPLES_PER_INSTANCE := std_logic_vector(to_unsigned(2,CDR_LONG_WIDTH));
        ret(2).MAX_PAYLOAD_SIZE         := 35;
        -- afk
        ret(3).HISTORY_QOS              := KEEP_ALL_HISTORY_QOS;
        ret(3).DEADLINE_QOS             := DURATION_INFINITE;
        ret(3).LIFESPAN_QOS             := gen_duration(1,0);
        ret(3).LEASE_DURATION           := DURATION_INFINITE;
        ret(3).WITH_KEY                 := TRUE;
        ret(3).MAX_SAMPLES              := std_logic_vector(to_unsigned(3,CDR_LONG_WIDTH));
        ret(3).MAX_INSTANCES            := std_logic_vector(to_unsigned(3,CDR_LONG_WIDTH));
        ret(3).MAX_SAMPLES_PER_INSTANCE := std_logic_vector(to_unsigned(2,CDR_LONG_WIDTH));
        ret(3).MAX_PAYLOAD_SIZE         := 40;
        return ret;
    end function;
    constant TEST_CONFIG : CONFIG_ARRAY_TYPE := gen_test_config;
    
    -- *TYPE DECLARATION*
    type DDS_STAGE_TYPE is (IDLE, START, PUSH, DONE);
    type RTPS_STAGE_TYPE is (IDLE, START, DONE, CHECK);
    type EMPTY_HEAD_SIG_ARRAY_TYPE is array (0 to NUM_WRITERS-1) of natural;
    
    -- *SIGNAL DECLARATION*
    signal clk : std_logic := '0';
    signal reset : std_logic := '1';
    signal check_time : TIME_TYPE := TIME_ZERO;
    signal start_rtps, start_dds, ack_rtps, ack_dds, done_rtps, done_dds, w_map : std_logic_vector(0 to NUM_WRITERS-1) := (others => '0');
    signal opcode_rtps : HISTORY_CACHE_OPCODE_ARRAY_TYPE(0 to NUM_WRITERS-1) := (others => NOP);
    signal opcode_dds : DDS_WRITER_OPCODE_ARRAY_TYPE(0 to NUM_WRITERS-1) := (others => NOP);
    signal ret_rtps : HISTORY_CACHE_RESPONSE_ARRAY_TYPE(0 to NUM_WRITERS-1) := (others => ERROR);
    signal seq_nr_rtps, cc_seq_nr : SEQUENCENUMBER_ARRAY_TYPE(0 to NUM_WRITERS-1) := (others => SEQUENCENUMBER_UNKNOWN);
    signal ready_out_rtps, valid_out_rtps, last_word_out_rtps : std_logic_vector(0 to NUM_WRITERS-1) := (others => '0');
    signal ready_in_dds, ready_out_dds, valid_in_dds, valid_out_dds, last_word_in_dds, last_word_out_dds : std_logic_vector(0 to NUM_WRITERS-1) := (others => '0');
    signal data_out_rtps, data_in_dds, data_out_dds : WORD_ARRAY_TYPE(0 to NUM_WRITERS-1) := (others => (others => '0'));
    signal get_data_rtps, liveliness_assertion, data_available : std_logic_vector(0 to NUM_WRITERS-1) := (others => '0');
    signal cc_source_timestamp, source_ts_dds : TIME_ARRAY_TYPE(0 to NUM_WRITERS-1) := (others => TIME_INVALID);
    signal cc_kind : CACHE_CHANGE_KIND_ARRAY_TYPE(0 to NUM_WRITERS-1) := (others => ALIVE);
    signal cc_instance_handle, instance_handle_in_dds, instance_handle_out_dds : INSTANCE_HANDLE_ARRAY_TYPE(0 to NUM_WRITERS-1) := (others => HANDLE_NIL);
    signal max_wait_dds : DURATION_ARRAY_TYPE(0 to NUM_WRITERS-1) := (others => DURATION_INFINITE);
    signal return_code_dds : RETURN_CODE_ARRAY_TYPE(0 to NUM_WRITERS-1) := (others => (others => '0'));
    signal status : STATUS_KIND_ARRAY_TYPE(0 to NUM_WRITERS-1) := (others => (others => '0'));
    
    signal ind : natural := 0;
    signal dds_start, dds_done, rtps_start, rtps_done : std_logic := '0';
    signal dds_cnt, rtps_cnt : natural := 0;
    signal dds_stage : DDS_STAGE_TYPE := IDLE;
    signal rtps_stage : RTPS_STAGE_TYPE := IDLE;
    shared variable dds : DDS_WRITER_TEST_TYPE := DEFAULT_DDS_WRITER_TEST;
    shared variable rtps : RTPS_WRITER_TEST_TYPE := DEFAULT_RTPS_WRITER_TEST;
    signal inst_id, kind_id, sn_id, ts_id, data_id, ret_id, ih_id : AlertLogIDType;
    
    -- *FUNCTION DECLARATION*
    function extract_key_hash (payload : TEST_PACKET_TYPE) return INSTANCE_HANDLE_TYPE is
        variable ret : INSTANCE_HANDLE_TYPE := HANDLE_NIL;
    begin
        for i in 0 to 3 loop
            ret(i) := not payload.data(i);
        end loop;
        
        return ret;
    end function;
    
    function gen_sn(input : natural) return SEQUENCENUMBER_TYPE is
        variable ret : SEQUENCENUMBER_TYPE;
    begin
        ret(0)  := (others => '0');
        ret(1)  := unsigned(int(input, WORD_WIDTH));
        return ret;
    end function;
    
    procedure wait_on_sig(signal sig : std_logic) is
    begin
        if (sig /= '1') then
            wait on sig until sig = '1';
        end if;
    end procedure;
    
begin

    -- Unit Under Test
    uut : entity work.dds_writer(arch)
        generic map(
            NUM_WRITERS     => NUM_WRITERS,
            CONFIG_ARRAY    => to_QUARTUS_CONFIG_ARRAY_TYPE(TEST_CONFIG)
        )
        port map (
            clk                     => clk,
            reset                   => reset,
            time                    => check_time,
            start_rtps              => start_rtps,
            opcode_rtps             => opcode_rtps,
            ack_rtps                => ack_rtps,
            done_rtps               => done_rtps,
            ret_rtps                => ret_rtps,
            seq_nr_rtps             => seq_nr_rtps,
            get_data_rtps           => get_data_rtps,
            data_out_rtps           => data_out_rtps,
            valid_out_rtps          => valid_out_rtps,
            ready_out_rtps          => ready_out_rtps,
            last_word_out_rtps      => last_word_out_rtps,
            liveliness_assertion    => liveliness_assertion,
            data_available          => data_available,
            cc_instance_handle      => cc_instance_handle,
            cc_kind                 => cc_kind,
            cc_source_timestamp     => cc_source_timestamp,
            cc_seq_nr               => cc_seq_nr,
            start_dds               => start_dds,
            ack_dds                 => ack_dds,
            opcode_dds              => opcode_dds,
            instance_handle_in_dds  => instance_handle_in_dds,
            source_ts_dds           => source_ts_dds,
            max_wait_dds            => max_wait_dds,
            done_dds                => done_dds,
            return_code_dds         => return_code_dds,
            instance_handle_out_dds => instance_handle_out_dds,
            ready_in_dds            => ready_in_dds,
            valid_in_dds            => valid_in_dds,
            data_in_dds             => data_in_dds,
            last_word_in_dds        => last_word_in_dds,
            ready_out_dds           => ready_out_dds,
            valid_out_dds           => valid_out_dds,
            data_out_dds            => data_out_dds,
            last_word_out_dds       => last_word_out_dds,
            status                  => status
        );
    
    stimulus_prc : process
        variable RV                 : RandomPType;
        variable kh1, kh2, kh3, kh4 : INSTANCE_HANDLE_TYPE := HANDLE_NIL;
        variable cc1, cc2, cc3, cc4, cc : CACHE_CHANGE_TYPE := DEFAULT_CACHE_CHANGE;
        
        alias idle_sig is <<signal uut.idle_sig : std_logic>>;
        alias inst_op_done is <<signal uut.inst_op_done : std_logic>>;
        alias empty_inst_head is <<signal uut.empty_inst_head_sig : EMPTY_HEAD_SIG_ARRAY_TYPE>>;
        alias empty_sample_head is <<signal uut.empty_sample_head_sig : EMPTY_HEAD_SIG_ARRAY_TYPE>>;
        alias empty_payload_head is <<signal uut.empty_payload_head_sig : EMPTY_HEAD_SIG_ARRAY_TYPE>>;
        
        impure function gen_payload(key_hash : INSTANCE_HANDLE_TYPE; len : natural) return TEST_PACKET_TYPE is
            variable ret : TEST_PACKET_TYPE := EMPTY_TEST_PACKET;
        begin
            assert (len >= 4) report "Payload length has to be at least 16 Bytes long" severity FAILURE;
            
            for i in 0 to len-1 loop
                if (i < 4) then
                    -- NOTE: Beginning of payload is negated key to allow deterministic Key Hash generation from the kh_prc
                    ret.data(ret.length) := not key_hash(i);
                else
                    ret.data(ret.length) := RV.RandSlv(WORD_WIDTH);
                end if;
                ret.length  := ret.length + 1;
            end loop;
            ret.last(ret.length-1)  := '1';
            
            return ret;
        end function;
        
        impure function gen_key_hash return KEY_HASH_TYPE is
            variable ret : KEY_HASH_TYPE := KEY_HASH_NIL;
        begin
            for i in 0 to KEY_HASH_TYPE'length-1 loop
                ret(i) := RV.RandSlv(WORD_WIDTH);
            end loop;
            return ret;
        end function;
        
        procedure start_dds is
        begin
            dds_start  <= '1';
            wait until rising_edge(clk);
            dds_start  <= '0';
            wait until rising_edge(clk);
        end procedure;
        
        procedure start_rtps is
        begin
            rtps_start   <= '1';
            wait until rising_edge(clk);
            rtps_start   <= '0';
            wait until rising_edge(clk);
        end procedure;
        
        procedure wait_on_completion is
        begin
            if (rtps_done /= '1' or dds_done /= '1') then
                wait until rtps_done = '1' and dds_done = '1';
            end if;
        end procedure;
        
        -- NOTE: This procedure waits until the idle_sig is high for at least
        --       two consecutive clock cycles.
        procedure wait_on_idle is
            variable first : boolean := TRUE;
        begin
            loop
                if (idle_sig /= '1') then
                    wait until idle_sig = '1';
                elsif (not first) then
                    exit;
                end if;
                wait until rising_edge(clk);
                wait until rising_edge(clk);
                first := FALSE;
            end loop;
            wait_on_sig(inst_op_done);
        end procedure;
        
    begin
        SetAlertLogName("L0_dds_writer_test1 - General");
        SetAlertEnable(FAILURE, TRUE);
        SetAlertEnable(ERROR, TRUE);
        SetAlertEnable(WARNING, TRUE);
        SetLogEnable(DEBUG, FALSE);
        SetLogEnable(PASSED, FALSE);
        SetLogEnable(INFO, TRUE);
        RV.InitSeed(RV'instance_name);
        inst_id <= GetAlertLogID("Instance", ALERTLOG_BASE_ID);
        kind_id <= GetAlertLogID("Cache Change Kind", ALERTLOG_BASE_ID);
        sn_id   <= GetAlertLogID("SequenceNumber", ALERTLOG_BASE_ID);
        ts_id   <= GetAlertLogID("TimeStamp", ALERTLOG_BASE_ID);
        ih_id   <= GetAlertLogID("Instance Handle", ALERTLOG_BASE_ID);
        data_id <= GetAlertLogID("Data Out", ALERTLOG_BASE_ID);
        ret_id  <= GetAlertLogID("Return Code", ALERTLOG_BASE_ID);
        
        -- Key Hashes
        kh1 := gen_key_hash;
        kh2 := gen_key_hash;
        kh3 := gen_key_hash;
        kh4 := gen_key_hash;
        
        Log("Initiating Test", INFO);
        reset   <= '1';
        wait until rising_edge(clk);
        wait until rising_edge(clk);
        reset   <= '0';
        wait_on_idle;
        
        -- *WRITER 0 / WRITER 3*
        Log("*WRITER 0 / WRITER 3*", INFO);
        -- WRITER 0
        AlertIf(empty_sample_head(0) /= 0, "Sample Memory Empty List Head incorrect", FAILURE);
        AlertIf(empty_payload_head(0) /= 0, "Payload Memory Empty List Head incorrect", FAILURE);
        AlertIf(empty_inst_head(0) /= 0, "Instance Memory Empty List Head incorrect", FAILURE);
        -- SAMPLE MEMORY:      -/0,11,22,33,44
        -- PAYLOAD MEMORY:     -/0,11,22,33,44
        -- INSTANCE MEMORY:    -/0,9,18
        -- WRITER 3
        AlertIf(empty_sample_head(3) /= 0, "Sample Memory Empty List Head incorrect", FAILURE);
        AlertIf(empty_payload_head(3) /= 0, "Payload Memory Empty List Head incorrect", FAILURE);
        AlertIf(empty_inst_head(3) /= 0, "Instance Memory Empty List Head incorrect", FAILURE);
        -- SAMPLE MEMORY:      -/0,11,22,33
        -- PAYLOAD MEMORY:     -/0,11,22,33
        -- INSTANCE MEMORY:    -/0,9,18
        
        
        -- TEST: GET_MIN_SN/GET_MAX_SN ON EMPTY
        
        Log("W0,W3: RTPS Operation GET_MIN_SN", INFO);
        Log("W0,W3: Expected SEQUENCENUMBER_UNKNOWN", DEBUG);
        rtps           := DEFAULT_RTPS_WRITER_TEST;
        rtps.opcode    := GET_MIN_SN;
        rtps.cc.seq_nr := SEQUENCENUMBER_UNKNOWN;
        -- WRITER 0
        ind <= 0;
        start_rtps;
        wait_on_sig(rtps_done);
        -- WRITER 3
        ind <= 3;
        start_rtps;
        wait_on_sig(rtps_done);
        wait_on_idle;
        
        Log("W0,W3: RTPS Operation GET_MAX_SN", INFO);
        Log("W0,W3: Expected SEQUENCENUMBER_UNKNOWN", DEBUG);
        rtps           := DEFAULT_RTPS_WRITER_TEST;
        rtps.opcode    := GET_MAX_SN;
        rtps.cc.seq_nr := SEQUENCENUMBER_UNKNOWN;
        -- WRITE 0
        ind <= 0;
        start_rtps;
        wait_on_sig(rtps_done);
        -- WRITE 3
        ind <= 3;
        start_rtps;
        wait_on_sig(rtps_done);
        wait_on_idle;
        
        -- TEST: WRITE ALIGNED PAYLOAD
        -- TEST: NORMAL WRITE
        -- TEST: ADD SAMPLE WITH KEY_HASH [UNKNOWN INSTANCE]
        
        cc                  := DEFAULT_CACHE_CHANGE;
        cc.serialized_key   := FALSE;
        cc.kind             := ALIVE;
        cc.instance         := kh1;
        cc.payload          := gen_payload(kh1,10);
        cc.seq_nr           := gen_sn(1);
        cc.src_timestamp    := gen_duration(1,0);
        
        Log("W0,W3: DDS Operation WRITE [TS 1s, Instance 1]", INFO);
        Log("W0,W3: REJECTED [Instance not Registered]", DEBUG);
        dds            := DEFAULT_DDS_WRITER_TEST;
        dds.opcode     := WRITE;
        dds.cc         := cc;
        dds.ret_code   := RETCODE_BAD_PARAMETER;
        -- WRITER 0
        ind <= 0;
        start_dds;
        wait_on_sig(dds_done);
        -- WRITER 3
        ind <= 3;
        start_dds;
        wait_on_sig(dds_done);
        wait_on_idle;
        
        -- TEST: ADD SAMPLE WITH HANDLE_NIL [UNKNOWN INSTANCE]
        
        Log("W0,W3: DDS Operation WRITE [TS 1s, Instance 1, HANDLE_NIL]", INFO);
        Log("W0,W3: ACCEPTED", DEBUG);
        dds            := DEFAULT_DDS_WRITER_TEST;
        dds.opcode     := WRITE;
        dds.cc         := cc;
        dds.cc.instance:= HANDLE_NIL;
        dds.ret_code   := RETCODE_OK;
        -- WRITER 0
        ind <= 0;
        start_dds;
        wait_on_sig(dds_done);
        -- WRITER 3
        ind <= 3;
        start_dds;
        wait_on_sig(dds_done);
        wait_on_idle;
        cc1 := cc;
        -- WRITER 0
        AlertIf(empty_sample_head(0) /= 11, "Sample Memory Empty List Head incorrect", FAILURE);
        AlertIf(empty_payload_head(0) /= 11, "Payload Memory Empty List Head incorrect", FAILURE);
        AlertIf(empty_inst_head(0) /= 9, "Instance Memory Empty List Head incorrect", FAILURE);
        -- SAMPLE MEMORY:      0(I1S1)/11,22,33,44
        -- PAYLOAD MEMORY:     0(I1S1)/11,22,33,44
        -- INSTANCE MEMORY:    0(I1)/9,18
        -- WRITER 3
        AlertIf(empty_sample_head(3) /= 11, "Sample Memory Empty List Head incorrect", FAILURE);
        AlertIf(empty_payload_head(3) /= 11, "Payload Memory Empty List Head incorrect", FAILURE);
        AlertIf(empty_inst_head(3) /= 9, "Instance Memory Empty List Head incorrect", FAILURE);
        -- SAMPLE MEMORY:      0(I1S1)/11,22,33
        -- PAYLOAD MEMORY:     0(I1S1)/11,22,33
        -- INSTANCE MEMORY:    0(I1)/9,18
        
        -- TEST: GET_MIN_SN/GET_MAX_SN ON 1 SAMPLE
        
        Log("W0,W3: RTPS Operation GET_MIN_SN", INFO);
        Log("W0,W3: Expected SN 1", DEBUG);
        rtps           := DEFAULT_RTPS_WRITER_TEST;
        rtps.opcode    := GET_MIN_SN;
        rtps.cc.seq_nr := gen_sn(1);
        -- WRITER 0
        ind <= 0;
        start_rtps;
        wait_on_sig(rtps_done);
        -- WRITER 3
        ind <= 3;
        start_rtps;
        wait_on_sig(rtps_done);
        wait_on_idle;
        
        Log("W0,W3: RTPS Operation GET_MAX_SN", INFO);
        Log("W0,W3: Expected SN 1", DEBUG);
        rtps           := DEFAULT_RTPS_WRITER_TEST;
        rtps.opcode    := GET_MAX_SN;
        rtps.cc.seq_nr := gen_sn(1);
        -- WRITER 0
        ind <= 0;
        start_rtps;
        wait_on_sig(rtps_done);
        -- WRITER 3
        ind <= 3;
        start_rtps;
        wait_on_sig(rtps_done);
        wait_on_idle;
        
        -- TEST: WRITE UNALIGNED PAYLOAD [>1 SLOT]
        
        cc                  := DEFAULT_CACHE_CHANGE;
        cc.serialized_key   := FALSE;
        cc.kind             := ALIVE;
        cc.instance         := kh2;
        cc.payload          := gen_payload(kh2,12);
        cc.seq_nr           := gen_sn(2);
        cc.src_timestamp    := gen_duration(2,0);
        
        Log("W0,W3: DDS Operation WRITE [TS 2s, Instance 2, Unaligned Payload (2 Slots)]", INFO);
        Log("W0,W3: REJECTED [Instance not Registered]", DEBUG);
        dds            := DEFAULT_DDS_WRITER_TEST;
        dds.opcode     := WRITE;
        dds.cc         := cc;
        dds.ret_code   := RETCODE_BAD_PARAMETER;
        -- WRITER 0
        ind <= 0;
        start_dds;
        wait_on_sig(dds_done);
        -- WRITER 3
        ind <= 3;
        start_dds;
        wait_on_sig(dds_done);
        wait_on_idle;
        
        -- TEST: NORMAL REGISTER
        
        Log("W0,W3: DDS Operation REGISTER_INSTANCE 2", INFO);
        Log("W0,W3: ACCEPTED", DEBUG);
        dds            := DEFAULT_DDS_WRITER_TEST;
        dds.opcode     := REGISTER_INSTANCE;
        dds.cc         := cc;
        dds.ret_code   := RETCODE_OK;
        -- WRITER 0
        ind <= 0;
        start_dds;
        wait_on_sig(dds_done);
        -- WRITER 3
        ind <= 3;
        start_dds;
        wait_on_sig(dds_done);
        wait_on_idle;
        -- WRITER 0
        AlertIf(empty_sample_head(0) /= 11, "Sample Memory Empty List Head incorrect", FAILURE);
        AlertIf(empty_payload_head(0) /= 11, "Payload Memory Empty List Head incorrect", FAILURE);
        AlertIf(empty_inst_head(0) /= 18, "Instance Memory Empty List Head incorrect", FAILURE);
        -- SAMPLE MEMORY:      0(I1S1)/11,22,33,44
        -- PAYLOAD MEMORY:     0(I1S1)/11,22,33,44
        -- INSTANCE MEMORY:    9(I2),0(I1)/18
        -- WRITER 3
        AlertIf(empty_sample_head(3) /= 11, "Sample Memory Empty List Head incorrect", FAILURE);
        AlertIf(empty_payload_head(3) /= 11, "Payload Memory Empty List Head incorrect", FAILURE);
        AlertIf(empty_inst_head(3) /= 18, "Instance Memory Empty List Head incorrect", FAILURE);
        -- SAMPLE MEMORY:      0(I1S1)/11,22,33
        -- PAYLOAD MEMORY:     0(I1S1)/11,22,33
        -- INSTANCE MEMORY:    9(I2),0(I1)/18
        
        -- TEST: ADD SAMPLE WITH KEY_HASH [KNOWN INSTANCE]
        
        Log("W0,W3: DDS Operation WRITE [TS 2s, Instance 2, Unaligned Payload (2 Slots)]", INFO);
        Log("W0,W3: ACCEPTED", DEBUG);
        dds            := DEFAULT_DDS_WRITER_TEST;
        dds.opcode     := WRITE;
        dds.cc         := cc;
        dds.ret_code   := RETCODE_OK;
        -- WRITER 0
        ind <= 0;
        start_dds;
        wait_on_sig(dds_done);
        -- WRITER 3
        ind <= 3;
        start_dds;
        wait_on_sig(dds_done);
        wait_on_idle;
        cc2 := cc;
        -- WRITER 0
        AlertIf(empty_sample_head(0) /= 22, "Sample Memory Empty List Head incorrect", FAILURE);
        AlertIf(empty_payload_head(0) /= 33, "Payload Memory Empty List Head incorrect", FAILURE);
        AlertIf(empty_inst_head(0) /= 18, "Instance Memory Empty List Head incorrect", FAILURE);
        -- SAMPLE MEMORY:      0(I1S1),11(I2S2)/22,33,44
        -- PAYLOAD MEMORY:     0(I1S1),11(I2S2),22(I2S2)/33,44
        -- INSTANCE MEMORY:    9(I2),0(I1)/18
        -- WRITER 3
        AlertIf(empty_sample_head(3) /= 22, "Sample Memory Empty List Head incorrect", FAILURE);
        AlertIf(empty_payload_head(3) /= 33, "Payload Memory Empty List Head incorrect", FAILURE);
        AlertIf(empty_inst_head(3) /= 18, "Instance Memory Empty List Head incorrect", FAILURE);
        -- SAMPLE MEMORY:      0(I1S1),11(I2S2)/22,33
        -- PAYLOAD MEMORY:     0(I1S1),11(I2S2),22(I2S2)/33
        -- INSTANCE MEMORY:    9(I2),0(I1)/18
        
        -- TEST: ADD SAMPLE WITH HANDLE_NIL [KNOWN INSTANCE]
        
        cc                  := DEFAULT_CACHE_CHANGE;
        cc.serialized_key   := FALSE;
        cc.kind             := ALIVE;
        cc.instance         := kh1;
        cc.payload          := gen_payload(kh1,15);
        cc.seq_nr           := gen_sn(3);
        cc.src_timestamp    := gen_duration(3,0);
        
        Log("W0,W3: DDS Operation WRITE [TS 3s, Instance 1, Unaligned Payload (2 Slots)]", INFO);
        Log("W0: ACCEPTED", DEBUG);
        Log("W3: REJECTED [Payload memory Full]", DEBUG);
        dds            := DEFAULT_DDS_WRITER_TEST;
        dds.opcode     := WRITE;
        dds.cc         := cc;
        dds.cc.instance:= HANDLE_NIL;
        -- WRITER 0
        dds.ret_code   := RETCODE_OK;
        ind <= 0;
        start_dds;
        wait_on_sig(dds_done);
        -- WRITER 3
        dds.ret_code   := RETCODE_OUT_OF_RESOURCES;
        ind <= 3;
        start_dds;
        wait_on_sig(dds_done);
        wait_on_idle;
        cc3 := cc;
        -- WRITER 0
        AlertIf(empty_sample_head(0) /= 33, "Sample Memory Empty List Head incorrect", FAILURE);
        AlertIf(empty_payload_head(0) /= 54, "Payload Memory Empty List Head incorrect", FAILURE);
        AlertIf(empty_inst_head(0) /= 18, "Instance Memory Empty List Head incorrect", FAILURE);
        -- SAMPLE MEMORY:      0(I1S1),11(I2S2),22(I1S3)/33,44
        -- PAYLOAD MEMORY:     0(I1S1),11(I2S2),22(I2S2),33(I1S3),44(I1S3)/-
        -- INSTANCE MEMORY:    9(I2),0(I1)/18
        -- WRITER 3
        AlertIf(empty_sample_head(3) /= 22, "Sample Memory Empty List Head incorrect", FAILURE);
        AlertIf(empty_payload_head(3) /= 33, "Payload Memory Empty List Head incorrect", FAILURE);
        AlertIf(empty_inst_head(3) /= 18, "Instance Memory Empty List Head incorrect", FAILURE);
        -- SAMPLE MEMORY:      0(I1S1),11(I2S2)/22,33
        -- PAYLOAD MEMORY:     0(I1S1),11(I2S2),22(I2S2)/33
        -- INSTANCE MEMORY:    9(I2),0(I1)/18
        
        -- TEST: GET_CACHE_CHANGE [UNKNOWN SN]
        
        Log("W0,W3: RTPS Operation GET_CACHE_CHANGE SN 4", INFO);
        Log("W0,W3: INVALID", DEBUG);
        rtps           := DEFAULT_RTPS_WRITER_TEST;
        rtps.opcode    := GET_CACHE_CHANGE;
        rtps.cc.seq_nr := gen_sn(4);
        rtps.ret_code  := INVALID;
        -- WRITER 0
        ind <= 0;
        start_rtps;
        wait_on_sig(rtps_done);
        -- WRITER 3
        ind <= 3;
        start_rtps;
        wait_on_sig(rtps_done);
        wait_on_idle;
        
        -- TEST: GET_CACHE_CHANGE [KNOWN SN, ALIGNED PAYLOAD]
        
        Log("W0,W3: RTPS Operation GET_CACHE_CHANGE SN 1", INFO);
        rtps           := DEFAULT_RTPS_WRITER_TEST;
        rtps.opcode    := GET_CACHE_CHANGE;
        rtps.cc        := cc1;
        -- WRITER 0
        ind <= 0;
        start_rtps;
        wait_on_sig(rtps_done);
        -- WRITER 3
        ind <= 3;
        start_rtps;
        wait_on_sig(rtps_done);
        wait_on_idle;
        
        -- TEST: GET_CACHE_CHANGE [KNOWN SN, UNALIGNED PAYLOAD, >1 SLOT]
        
        Log("W0,W3: RTPS Operation GET_CACHE_CHANGE SN 2", INFO);
        rtps           := DEFAULT_RTPS_WRITER_TEST;
        rtps.opcode    := GET_CACHE_CHANGE;
        rtps.cc        := cc2;
        -- WRITER 0
        ind <= 0;
        start_rtps;
        wait_on_sig(rtps_done);
        -- WRITER 3
        ind <= 3;
        start_rtps;
        wait_on_sig(rtps_done);
        wait_on_idle;
        
        Log("W0,W3: RTPS Operation GET_CACHE_CHANGE SN 3", INFO);
        Log("W3: INVALID", DEBUG);
        rtps           := DEFAULT_RTPS_WRITER_TEST;
        rtps.opcode    := GET_CACHE_CHANGE;
        rtps.cc        := cc3;
        -- WRITER 0
        ind <= 0;
        start_rtps;
        wait_on_sig(rtps_done);
        -- WRITER 3
        rtps.ret_code  := INVALID;
        ind <= 3;
        start_rtps;
        wait_on_sig(rtps_done);
        wait_on_idle;
        
        -- TEST: WRITE UNALIGNED PAYLOAD [<1 SLOT]
        
        cc                  := DEFAULT_CACHE_CHANGE;
        cc.serialized_key   := FALSE;
        cc.kind             := ALIVE;
        cc.instance         := kh3;
        cc.payload          := gen_payload(kh3,8);
        cc.seq_nr           := gen_sn(4);
        cc.src_timestamp    := gen_duration(4,0);
        
        -- TEST: WRITE ON PAYLOAD MEMORY FULL [WITHOUT ACKed SAMPLES]
        
        Log("W0,W3: DDS Operation WRITE [TS 4s, Instance 3, HANDLE_NIL, Unaligned Payload (1 Slot)]", INFO);
        Log("W0: REJECTED [Payload Memory Full]", DEBUG);
        Log("W3: ACCEPTED", DEBUG);
        dds            := DEFAULT_DDS_WRITER_TEST;
        dds.opcode     := WRITE;
        dds.cc         := cc;
        dds.cc.instance:= HANDLE_NIL;
        -- WRITER 0
        dds.ret_code   := RETCODE_OUT_OF_RESOURCES;
        ind <= 0;
        start_dds;
        wait_on_sig(dds_done);
        -- WRITER 3
        dds.ret_code   := RETCODE_OK;
        ind <= 3;
        start_dds;
        wait_on_sig(dds_done);
        wait_on_idle;
        -- WRITER 3
        AlertIf(empty_sample_head(3) /= 33, "Sample Memory Empty List Head incorrect", FAILURE);
        AlertIf(empty_payload_head(3) /= 54, "Payload Memory Empty List Head incorrect", FAILURE);
        AlertIf(empty_inst_head(3) /= 26, "Instance Memory Empty List Head incorrect", FAILURE);
        -- SAMPLE MEMORY:      0(I1S1),11(I2S2),22(I3S3)/33
        -- PAYLOAD MEMORY:     0(I1S1),11(I2S2),22(I2S2),33(I3S3)/-
        -- INSTANCE MEMORY:    18(I3),9(I2),0(I1)/-
        
        -- TEST: REMOVE_CACHE_CHANGE [UNKNOWN SN]
        
        Log("W0,W3: RTPS Operation REMOVE_CACHE_CHANGE SN 5", INFO);
        Log("W0,W3: INVALID", DEBUG);
        rtps           := DEFAULT_RTPS_WRITER_TEST;
        rtps.opcode    := REMOVE_CACHE_CHANGE;
        rtps.cc.seq_nr := gen_sn(5);
        rtps.ret_code  := INVALID;
        -- WRITER 0
        ind <= 0;
        start_rtps;
        wait_on_sig(rtps_done);
        -- WRITER 3
        ind <= 3;
        start_rtps;
        wait_on_sig(rtps_done);
        wait_on_idle;
        
        -- TEST: REMOVE_CACHE_CHANGE [KNOWN SN]
        
        Log("W0,W3: RTPS Operation REMOVE_CACHE_CHANGE SN 2", INFO);
        rtps            := DEFAULT_RTPS_WRITER_TEST;
        rtps.opcode     := REMOVE_CACHE_CHANGE;
        rtps.cc.seq_nr  := gen_sn(2);
        -- WRITER 0
        ind <= 0;
        start_rtps;
        wait_on_sig(rtps_done);
        wait_on_idle;
        -- WRITER 3
        ind <= 3;
        start_rtps;
        wait_on_sig(rtps_done);
        wait_on_idle;
        -- WRITER 0
        AlertIf(empty_sample_head(0) /= 33, "Sample Memory Empty List Head incorrect", FAILURE);
        AlertIf(empty_payload_head(0) /= 11, "Payload Memory Empty List Head incorrect", FAILURE);
        AlertIf(empty_inst_head(0) /= 18, "Instance Memory Empty List Head incorrect", FAILURE);
        -- SAMPLE MEMORY:      0(I1S1),22(I1S3)/33,44,11
        -- PAYLOAD MEMORY:     0(I1S1),33(I1S3),44(I1S3)/11,22
        -- INSTANCE MEMORY:    9(I2),0(I1)/18
        -- WRITER 3
        AlertIf(empty_sample_head(3) /= 33, "Sample Memory Empty List Head incorrect", FAILURE);
        AlertIf(empty_payload_head(3) /= 11, "Payload Memory Empty List Head incorrect", FAILURE);
        AlertIf(empty_inst_head(3) /= 26, "Instance Memory Empty List Head incorrect", FAILURE);
        -- SAMPLE MEMORY:      0(I1S1),22(I3S3)/33,11
        -- PAYLOAD MEMORY:     0(I1S1),33(I3S3)/11,22
        -- INSTANCE MEMORY:    18(I3),9(I2),0(I1)/-
        
        Log("W0: DDS Operation WRITE [TS 4s, Instance 3, HANDLE_NIL, Unaligned Payload (1 Slot)]", INFO);
        Log("W0: ACCEPTED", DEBUG);
        dds            := DEFAULT_DDS_WRITER_TEST;
        dds.opcode     := WRITE;
        dds.cc         := cc;
        dds.cc.instance:= HANDLE_NIL;
        dds.ret_code   := RETCODE_OK;
        -- WRITER 0
        ind <= 0;
        start_dds;
        wait_on_sig(dds_done);
        wait_on_idle;
        cc2 := cc;
        -- WRITER 0
        AlertIf(empty_sample_head(0) /= 44, "Sample Memory Empty List Head incorrect", FAILURE);
        AlertIf(empty_payload_head(0) /= 22, "Payload Memory Empty List Head incorrect", FAILURE);
        AlertIf(empty_inst_head(0) /= 26, "Instance Memory Empty List Head incorrect", FAILURE);
        -- SAMPLE MEMORY:      0(I1S1),22(I1S3),33(I3S4)/44,11
        -- PAYLOAD MEMORY:     0(I1S1),33(I1S3),44(I1S3),11(I3S4)/22
        -- INSTANCE MEMORY:    18(I3),9(I2),0(I1)/-
        
        -- TEST: GET_CACHE_CHANGE [KNOWN SN, UNALIGNED PAYLOAD, <1 SLOT]
        
        Log("W0,W3: RTPS Operation GET_CACHE_CHANGE SN 4", INFO);
        Log("W3: INVALID", DEBUG);
        rtps           := DEFAULT_RTPS_WRITER_TEST;
        rtps.opcode    := GET_CACHE_CHANGE;
        rtps.cc        := cc2;
        -- WRITER 0
        ind <= 0;
        start_rtps;
        wait_on_sig(rtps_done);
        -- WRITER 3
        rtps.ret_code  := INVALID;
        ind <= 3;
        start_rtps;
        wait_on_sig(rtps_done);
        wait_on_idle;
        
        -- TEST: REGISTER INSTANCE [KNOWN INSTANCE]
        
        Log("W0,W3: DDS Operation REGISTER_INSTANCE 3", INFO);
        Log("W0,W3: No Change", DEBUG);
        dds            := DEFAULT_DDS_WRITER_TEST;
        dds.opcode     := REGISTER_INSTANCE;
        dds.cc         := cc2;
        dds.ret_code   := RETCODE_OK;
        -- WRITER 0
        ind <= 0;
        start_dds;
        wait_on_sig(dds_done);
        -- WRITER 3
        ind <= 3;
        start_dds;
        wait_on_sig(dds_done);
        wait_on_idle;
        
        -- TEST: NORMAL DISPOSE
        
        cc                  := DEFAULT_CACHE_CHANGE;
        cc.serialized_key   := TRUE;
        cc.kind             := NOT_ALIVE_DISPOSED;
        cc.instance         := kh1;
        cc.payload          := gen_payload(kh1,5);
        cc.seq_nr           := gen_sn(5);
        cc.src_timestamp    := gen_duration(5,0);
        
        -- TEST: ADD SAMPLE ON MAX_SAMPLES_PER_INSTANCE [KNOWN INSTANCE, WITHOUT ACKed SAMPLES]
        
        Log("W0,W3: DDS Operation DISPOSE [TS 5s, Instance 1]", INFO);
        Log("W0: REJECTED [MAX_SAMPLES_PER_INSTANCE Exceeded]", DEBUG);
        Log("W3: ACCEPTED", DEBUG);
        dds            := DEFAULT_DDS_WRITER_TEST;
        dds.opcode     := DISPOSE;
        dds.cc         := cc;
        -- WRITER 0
        dds.ret_code   := RETCODE_OUT_OF_RESOURCES;
        ind <= 0;
        start_dds;
        wait_on_sig(dds_done);
        -- WRITER 3
        dds.ret_code   := RETCODE_OK;
        ind <= 3;
        start_dds;
        wait_on_sig(dds_done);
        wait_on_idle;
        -- WRITER 3
        AlertIf(empty_sample_head(3) /= 11, "Sample Memory Empty List Head incorrect", FAILURE);
        AlertIf(empty_payload_head(3) /= 22, "Payload Memory Empty List Head incorrect", FAILURE);
        AlertIf(empty_inst_head(3) /= 26, "Instance Memory Empty List Head incorrect", FAILURE);
        -- SAMPLE MEMORY:      0(I1S1),22(I3S3),33(I1S4)/11
        -- PAYLOAD MEMORY:     0(I1S1),33(I3S3),11(I1S4)/22
        -- INSTANCE MEMORY:    18(I3),9(I2),0(I1)/-
        
        -- TEST: NORMAL ACK_CACHE_CHANGE
        
        Log("W0,W3: RTPS Operation ACK_CACHE_CHANGE SN 4", INFO);
        rtps            := DEFAULT_RTPS_WRITER_TEST;
        rtps.opcode     := ACK_CACHE_CHANGE;
        rtps.cc.seq_nr  := gen_sn(4);
        -- WRITER 0
        ind <= 0;
        start_rtps;
        wait_on_sig(rtps_done);
        -- WRITER 3
        ind <= 3;
        start_rtps;
        wait_on_sig(rtps_done);
        wait_on_idle;
        
        -- TEST: ADD SAMPLE ON MAX_SAMPLES_PER_INSTANCE [KNOWN INSTANCE, WITH ACKed SAMPLES, WITHOUT ACKed INSTANCE SAMPLES]
        
        Log("W0: DDS Operation DISPOSE [TS 5s, Instance 1]", INFO);
        Log("W0: REJECTED [MAX_SAMPLES_PER_INSTANCE Exceeded]", DEBUG);
        dds            := DEFAULT_DDS_WRITER_TEST;
        dds.opcode     := DISPOSE;
        dds.cc         := cc;
        dds.ret_code   := RETCODE_OUT_OF_RESOURCES;
        -- WRITER 0
        ind <= 0;
        start_dds;
        wait_on_sig(dds_done);
        wait_on_idle;
        
        Log("W0,W3: RTPS Operation ACK_CACHE_CHANGE SN 1", INFO);
        rtps            := DEFAULT_RTPS_WRITER_TEST;
        rtps.opcode     := ACK_CACHE_CHANGE;
        rtps.cc.seq_nr  := gen_sn(1);
        -- WRITER 0
        ind <= 0;
        start_rtps;
        wait_on_sig(rtps_done);
        -- WRITER 3
        ind <= 3;
        start_rtps;
        wait_on_sig(rtps_done);
        wait_on_idle;
        
        -- TEST: ADD SAMPLE ON MAX_SAMPLES_PER_INSTANCE [KNOWN INSTANCE, WITH ACKed INSTANCE SAMPLE]
        
        Log("W0: DDS Operation DISPOSE [TS 5s, Instance 1]", INFO);
        Log("W0: ACCEPTED", DEBUG);
        dds            := DEFAULT_DDS_WRITER_TEST;
        dds.opcode     := DISPOSE;
        dds.cc         := cc;
        dds.ret_code   := RETCODE_OK;
        -- WRITER 0
        ind <= 0;
        start_dds;
        wait_on_sig(dds_done);
        wait_on_idle;
        cc1 := cc;
        -- WRITER 0
        AlertIf(empty_sample_head(0) /= 11, "Sample Memory Empty List Head incorrect", FAILURE);
        AlertIf(empty_payload_head(0) /= 0, "Payload Memory Empty List Head incorrect", FAILURE);
        AlertIf(empty_inst_head(0) /= 26, "Instance Memory Empty List Head incorrect", FAILURE);
        -- SAMPLE MEMORY:      22(I1S3),33(I3S4),44(I1S5)/11,0
        -- PAYLOAD MEMORY:     33(I1S3),44(I1S3),11(I3S4),22(I1S5)/0
        -- INSTANCE MEMORY:    18(I3),9(I2),0(I1)/-
        
        -- VALIDATE STATE
        -- TEST: GET_MIN_SN/GET_MAX_SN ON >1 SAMPLE
        
        Log("W0,W3: RTPS Operation GET_MIN_SN", INFO);
        Log("W0: Expected SN 3", DEBUG);
        Log("W3: Expected SN 1", DEBUG);
        rtps           := DEFAULT_RTPS_WRITER_TEST;
        rtps.opcode    := GET_MIN_SN;
        -- WRITER 0
        rtps.cc.seq_nr := gen_sn(3);
        ind <= 0;
        start_rtps;
        wait_on_sig(rtps_done);
        -- WRITER 3
        rtps.cc.seq_nr := gen_sn(1);
        ind <= 3;
        start_rtps;
        wait_on_sig(rtps_done);
        wait_on_idle;
        
        Log("W0,W3: RTPS Operation GET_MAX_SN", INFO);
        Log("W0: Expected SN 5", DEBUG);
        Log("W3: Expected SN 4", DEBUG);
        rtps           := DEFAULT_RTPS_WRITER_TEST;
        rtps.opcode    := GET_MAX_SN;
        -- WRITER 0
        rtps.cc.seq_nr := gen_sn(5);
        ind <= 0;
        start_rtps;
        wait_on_sig(rtps_done);
        -- WRITER 3
        rtps.cc.seq_nr := gen_sn(4);
        ind <= 3;
        start_rtps;
        wait_on_sig(rtps_done);
        wait_on_idle;
        
        Log("W0: RTPS Operation GET_CACHE_CHANGE SN 5", INFO);
        rtps           := DEFAULT_RTPS_WRITER_TEST;
        rtps.opcode    := GET_CACHE_CHANGE;
        rtps.cc        := cc1;
        -- WRITER 0
        ind <= 0;
        start_rtps;
        wait_on_sig(rtps_done);
        wait_on_idle;
        
        Log("W3: RTPS Operation GET_CACHE_CHANGE SN 4", INFO);
        rtps           := DEFAULT_RTPS_WRITER_TEST;
        rtps.opcode    := GET_CACHE_CHANGE;
        rtps.cc        := cc1;
        -- WRITER 3
        rtps.cc.seq_nr  := gen_sn(4);
        ind <= 3;
        start_rtps;
        wait_on_sig(rtps_done);
        wait_on_idle;
        
        cc                  := DEFAULT_CACHE_CHANGE;
        cc.serialized_key   := FALSE;
        cc.kind             := ALIVE;
        cc.instance         := kh4;
        cc.payload          := gen_payload(kh4,10);
        cc.seq_nr           := gen_sn(6);
        cc.src_timestamp    := gen_duration(6,0);
        
        -- TEST: ADD SAMPLE ON MAX_INSTANCES [UNKNOWN INSTANCE, WITHOUT STALE INSTANCES]
        
        Log("W0,W3: DDS Operation WRITE [TS 6s, Instance 4, HANDLE_NIL, Aligned Payload]", INFO);
        Log("W0,W3: REJECTED [MAX_INSTANCES exceeded]", DEBUG);
        dds            := DEFAULT_DDS_WRITER_TEST;
        dds.opcode     := WRITE;
        dds.cc         := cc;
        dds.cc.instance:= HANDLE_NIL;
        dds.ret_code   := RETCODE_OUT_OF_RESOURCES;
        -- WRITER 0
        ind <= 0;
        start_dds;
        wait_on_sig(dds_done);
        -- WRITER 3
        ind <= 3;
        start_dds;
        wait_on_sig(dds_done);
        wait_on_idle;
        
        Log("W0,W3: RTPS Operation ACK_CACHE_CHANGE SN 3", INFO);
        rtps            := DEFAULT_RTPS_WRITER_TEST;
        rtps.opcode     := ACK_CACHE_CHANGE;
        rtps.cc.seq_nr  := gen_sn(3);
        -- WRITER 0
        ind <= 0;
        start_rtps;
        wait_on_sig(rtps_done);
        -- WRITER 3
        ind <= 3;
        start_rtps;
        wait_on_sig(rtps_done);
        wait_on_idle;
        
        -- TEST: ACK_CACHE_CHANGE [ALREADY ACKed SN]
        
        Log("W0,W3: RTPS Operation ACK_CACHE_CHANGE SN 4", INFO);
        rtps            := DEFAULT_RTPS_WRITER_TEST;
        rtps.opcode     := ACK_CACHE_CHANGE;
        rtps.cc.seq_nr  := gen_sn(4);
        -- WRITER 0
        ind <= 0;
        start_rtps;
        wait_on_sig(rtps_done);
        -- WRITER 3
        ind <= 3;
        start_rtps;
        wait_on_sig(rtps_done);
        wait_on_idle;
        
        -- TEST: ACK_CACHE_CHANGE [UNKNOWN SN]
        
        Log("W0,W3: RTPS Operation ACK_CACHE_CHANGE SN 5", INFO);
        Log("W3: INVALID", DEBUG);
        rtps            := DEFAULT_RTPS_WRITER_TEST;
        rtps.opcode     := ACK_CACHE_CHANGE;
        rtps.cc.seq_nr  := gen_sn(5);
        -- WRITER 0
        ind <= 0;
        start_rtps;
        wait_on_sig(rtps_done);
        -- WRITER 3
        rtps.ret_code  := INVALID;
        ind <= 3;
        start_rtps;
        wait_on_sig(rtps_done);
        wait_on_idle;
        
        -- TEST: ADD SAMPLE ON MAX_INSTANCES [UNKNOWN INSTANCE, WITH FULLY ACKed INSTANCE, WITHOUT STALE INSTANCE]
        
        Log("W0,W3: DDS Operation WRITE [TS 6s, Instance 4, HANDLE_NIL, Aligned Payload]", INFO);
        Log("W0,W3: REJECTED [MAX_INSTANCES exceeded]", DEBUG);
        dds            := DEFAULT_DDS_WRITER_TEST;
        dds.opcode     := WRITE;
        dds.cc         := cc;
        dds.cc.instance:= HANDLE_NIL;
        dds.ret_code   := RETCODE_OUT_OF_RESOURCES;
        -- WRITER 0
        ind <= 0;
        start_dds;
        wait_on_sig(dds_done);
        -- WRITER 3
        ind <= 3;
        start_dds;
        wait_on_sig(dds_done);
        wait_on_idle;
        
        -- TEST: NORMAL UNREGISTER
        
        cc                  := DEFAULT_CACHE_CHANGE;
        cc.serialized_key   := TRUE;
        cc.kind             := NOT_ALIVE_UNREGISTERED;
        cc.instance         := kh1;
        cc.payload          := gen_payload(kh1,5);
        cc.seq_nr           := gen_sn(6);
        cc.src_timestamp    := gen_duration(6,0);
        
        -- TEST: UNREGISTER ON DISPOSED INSTANCE
        
        Log("W0,W3: DDS Operation UNREGISTER_INSTANCE [TS 6s, Instance 1]", INFO);
        Log("W0,W3: ACCEPTED", DEBUG);
        dds            := DEFAULT_DDS_WRITER_TEST;
        dds.opcode     := UNREGISTER_INSTANCE;
        dds.cc         := cc;
        dds.ret_code   := RETCODE_OK;
        -- WRITER 0
        ind <= 0;
        start_dds;
        wait_on_sig(dds_done);
        -- WRITER 3
        ind <= 3;
        start_dds;
        wait_on_sig(dds_done);
        wait_on_idle;
        cc3 := cc;
        -- WRITER 0
        AlertIf(empty_sample_head(0) /= 0, "Sample Memory Empty List Head incorrect", FAILURE);
        AlertIf(empty_payload_head(0) /= 33, "Payload Memory Empty List Head incorrect", FAILURE);
        AlertIf(empty_inst_head(0) /= 26, "Instance Memory Empty List Head incorrect", FAILURE);
        -- SAMPLE MEMORY:      33(I3S4),44(I1S5),11(I1S6)/0,22
        -- PAYLOAD MEMORY:     11(I3S4),22(I1S5),0(I1S6)/33,44
        -- INSTANCE MEMORY:    18(I3),9(I2),0(I1)/-
        -- WRITER 3
        AlertIf(empty_sample_head(3) /= 0, "Sample Memory Empty List Head incorrect", FAILURE);
        AlertIf(empty_payload_head(3) /= 0, "Payload Memory Empty List Head incorrect", FAILURE);
        AlertIf(empty_inst_head(3) /= 26, "Instance Memory Empty List Head incorrect", FAILURE);
        -- SAMPLE MEMORY:      22(I3S3),33(I1S4),11(I1S5)/0
        -- PAYLOAD MEMORY:     33(I3S3),11(I1S4),22(I1S5)/0
        -- INSTANCE MEMORY:    18(I3),9(I2),0(I1)/-
        
        -- VALIDATE STATE
        
        Log("W0,W3: RTPS Operation GET_MIN_SN", INFO);
        Log("W0: Expected SN 4", DEBUG);
        Log("W3: Expected SN 3", DEBUG);
        rtps           := DEFAULT_RTPS_WRITER_TEST;
        rtps.opcode    := GET_MIN_SN;
        -- WRITER 0
        rtps.cc.seq_nr := gen_sn(4);
        ind <= 0;
        start_rtps;
        wait_on_sig(rtps_done);
        -- WRITER 3
        rtps.cc.seq_nr := gen_sn(3);
        ind <= 3;
        start_rtps;
        wait_on_sig(rtps_done);
        wait_on_idle;
        
        Log("W0,W3: RTPS Operation GET_MAX_SN", INFO);
        Log("W0: Expected SN 6", DEBUG);
        Log("W3: Expected SN 5", DEBUG);
        rtps           := DEFAULT_RTPS_WRITER_TEST;
        rtps.opcode    := GET_MAX_SN;
        -- WRITER 0
        rtps.cc.seq_nr := gen_sn(6);
        ind <= 0;
        start_rtps;
        wait_on_sig(rtps_done);
        -- WRITER 3
        rtps.cc.seq_nr := gen_sn(5);
        ind <= 3;
        start_rtps;
        wait_on_sig(rtps_done);
        wait_on_idle;
        
        Log("W0,W3: RTPS Operation GET_CACHE_CHANGE SN 6", INFO);
        Log("W3: INVALID", DEBUG);
        rtps           := DEFAULT_RTPS_WRITER_TEST;
        rtps.opcode    := GET_CACHE_CHANGE;
        rtps.cc        := cc3;
        -- WRITER 0
        ind <= 0;
        start_rtps;
        wait_on_sig(rtps_done);
        -- WRITER 3
        rtps.ret_code  := INVALID;
        ind <= 3;
        start_rtps;
        wait_on_sig(rtps_done);
        wait_on_idle;
        
        cc                  := DEFAULT_CACHE_CHANGE;
        cc.serialized_key   := FALSE;
        cc.kind             := ALIVE;
        cc.instance         := kh4;
        cc.payload          := gen_payload(kh4,10);
        cc.seq_nr           := gen_sn(7);
        cc.src_timestamp    := gen_duration(7,0);
        
        Log("W0,W3: DDS Operation WRITE [TS 7s, Instance 4, HANDLE_NIL, Aligned Payload]", INFO);
        Log("W0,W3: REJECTED [MAX_INSTANCES exceeded]", DEBUG);
        dds            := DEFAULT_DDS_WRITER_TEST;
        dds.opcode     := WRITE;
        dds.cc         := cc;
        dds.cc.instance:= HANDLE_NIL;
        dds.ret_code   := RETCODE_OUT_OF_RESOURCES;
        -- WRITER 0
        ind <= 0;
        start_dds;
        wait_on_sig(dds_done);
        -- WRITE3R 3
        ind <= 3;
        start_dds;
        wait_on_sig(dds_done);
        wait_on_idle;
        
        Log("W0: RTPS Operation ACK_CACHE_CHANGE SN 6", INFO);
        rtps            := DEFAULT_RTPS_WRITER_TEST;
        rtps.opcode     := ACK_CACHE_CHANGE;
        rtps.cc.seq_nr  := gen_sn(6);
        -- WRITER 0
        ind <= 0;
        start_rtps;
        wait_on_sig(rtps_done);
        wait_on_idle;
        
        Log("W3: RTPS Operation ACK_CACHE_CHANGE SN 5", INFO);
        rtps            := DEFAULT_RTPS_WRITER_TEST;
        rtps.opcode     := ACK_CACHE_CHANGE;
        rtps.cc.seq_nr  := gen_sn(5);
        -- WRITER 3
        ind <= 3;
        start_rtps;
        wait_on_sig(rtps_done);
        wait_on_idle;
        
        -- TEST: ADD SAMPLE ON MAX_SAMPLES & MAX_INSTANCES [UNKNOWN INSTANCE,WITH STALE INSTANCE (>=1 SAMPLES), OLDEST SAMPLE ACKed AND /= STALE INSTANCE] (Induce Double Removal)
        -- TEST: ADD SAMPLE ON MAX_INSTANCES [UNKNOWN INSTANCE, WITH STALE INSTANCE]
        -- TEST: REMOVE STALE INSTANCE WITH >1 SAMPLES
        
        Log("W0,W3: DDS Operation WRITE [TS 7s, Instance 4, HANDLE_NIL, Aligned Payload]", INFO);
        Log("W0,W3: ACCEPTED", DEBUG);
        dds            := DEFAULT_DDS_WRITER_TEST;
        dds.opcode     := WRITE;
        dds.cc         := cc;
        dds.cc.instance:= HANDLE_NIL;
        dds.ret_code   := RETCODE_OK;
        -- WRITER 0
        ind <= 0;
        start_dds;
        wait_on_sig(dds_done);
        -- WRITER 3
        ind <= 3;
        start_dds;
        wait_on_sig(dds_done);
        wait_on_idle;
        cc1 := cc;
        -- WRITER 0
        AlertIf(empty_sample_head(0) /= 22, "Sample Memory Empty List Head incorrect", FAILURE);
        AlertIf(empty_payload_head(0) /= 0, "Payload Memory Empty List Head incorrect", FAILURE);
        AlertIf(empty_inst_head(0) /= 26, "Instance Memory Empty List Head incorrect", FAILURE);
        -- SAMPLE MEMORY:      33(I3S4),0(I4S7)/22,44,11
        -- PAYLOAD MEMORY:     11(I3S4),33(I4S7)/0,22,44
        -- INSTANCE MEMORY:    0(I4),18(I3),9(I2)/-
        -- WRITER 3
        AlertIf(empty_sample_head(3) /= 22, "Sample Memory Empty List Head incorrect", FAILURE);
        AlertIf(empty_payload_head(3) /= 22, "Payload Memory Empty List Head incorrect", FAILURE);
        AlertIf(empty_inst_head(3) /= 26, "Instance Memory Empty List Head incorrect", FAILURE);
        -- SAMPLE MEMORY:      0(I4S6)/22,33,11
        -- PAYLOAD MEMORY:     0(I4S6)/22,11,33
        -- INSTANCE MEMORY:    0(I4),18(I3),9(I2)/-
        
        Log("W0,W3: RTPS Operation GET_CACHE_CHANGE SN 5", INFO);
        Log("W0,W3: INVALID", DEBUG);
        rtps           := DEFAULT_RTPS_WRITER_TEST;
        rtps.opcode    := GET_CACHE_CHANGE;
        rtps.cc.seq_nr := gen_sn(5);
        rtps.ret_code  := INVALID;
        -- WRITER 0
        ind <= 0;
        start_rtps;
        wait_on_sig(rtps_done);
        -- WRITER 3
        ind <= 3;
        start_rtps;
        wait_on_sig(rtps_done);
        wait_on_idle;
        
        Log("W0,W3: RTPS Operation GET_CACHE_CHANGE SN 6", INFO);
        Log("W0: INVALID", DEBUG);
        rtps           := DEFAULT_RTPS_WRITER_TEST;
        rtps.opcode    := GET_CACHE_CHANGE;
        rtps.cc := cc1;
        rtps.cc.seq_nr := gen_sn(6);
        -- WRITER 0
        rtps.ret_code  := INVALID;
        ind <= 0;
        start_rtps;
        wait_on_sig(rtps_done);
        -- WRITER 3
        rtps.ret_code  := OK;
        ind <= 3;
        start_rtps;
        wait_on_sig(rtps_done);
        wait_on_idle;
        
        Log("W0,W3: RTPS Operation GET_CACHE_CHANGE SN 7", INFO);
        Log("W3: INVALID", DEBUG);
        rtps           := DEFAULT_RTPS_WRITER_TEST;
        rtps.opcode    := GET_CACHE_CHANGE;
        rtps.cc        := cc1;
        -- WRITER 0
        ind <= 0;
        start_rtps;
        wait_on_sig(rtps_done);
        -- WRITER 3
        rtps.ret_code  := INVALID;
        ind <= 3;
        start_rtps;
        wait_on_sig(rtps_done);
        wait_on_idle;
        
        cc                  := DEFAULT_CACHE_CHANGE;
        cc.serialized_key   := FALSE;
        cc.kind             := ALIVE;
        cc.instance         := kh2;
        cc.payload          := gen_payload(kh2,15);
        cc.seq_nr           := gen_sn(8);
        cc.src_timestamp    := gen_duration(8,0);
        
        Log("W0,W3: DDS Operation WRITE [TS 8s, Instance 2, Unaligned Payload (2 Slot)]", INFO);
        Log("W0,W3: ACCEPTED", DEBUG);
        dds            := DEFAULT_DDS_WRITER_TEST;
        dds.opcode     := WRITE;
        dds.cc         := cc;
        dds.ret_code   := RETCODE_OK;
        -- WRITER 0
        ind <= 0;
        start_dds;
        wait_on_sig(dds_done);
        -- WRITER 3
        ind <= 3;
        start_dds;
        wait_on_sig(dds_done);
        wait_on_idle;
        cc3 := cc;
        -- WRITER 0
        AlertIf(empty_sample_head(0) /= 44, "Sample Memory Empty List Head incorrect", FAILURE);
        AlertIf(empty_payload_head(0) /= 44, "Payload Memory Empty List Head incorrect", FAILURE);
        AlertIf(empty_inst_head(0) /= 26, "Instance Memory Empty List Head incorrect", FAILURE);
        -- SAMPLE MEMORY:      33(I3S4),0(I4S7),22(I2S8)/44,11
        -- PAYLOAD MEMORY:     11(I3S4),33(I4S7),0(I2S8),22(I2S8)/44
        -- INSTANCE MEMORY:    0(I4),18(I3),9(I2)/-
        -- WRITER 3
        AlertIf(empty_sample_head(3) /= 33, "Sample Memory Empty List Head incorrect", FAILURE);
        AlertIf(empty_payload_head(3) /= 33, "Payload Memory Empty List Head incorrect", FAILURE);
        AlertIf(empty_inst_head(3) /= 26, "Instance Memory Empty List Head incorrect", FAILURE);
        -- SAMPLE MEMORY:      0(I4S6),22(I2S7)/33,11
        -- PAYLOAD MEMORY:     0(I4S6),22(I2S7),11(I2S7)/33
        -- INSTANCE MEMORY:    0(I4),18(I3),9(I2)/-
        
        cc                  := DEFAULT_CACHE_CHANGE;
        cc.serialized_key   := FALSE;
        cc.kind             := ALIVE;
        cc.instance         := kh1;
        cc.payload          := gen_payload(kh1,10);
        cc.seq_nr           := gen_sn(9);
        cc.src_timestamp    := gen_duration(9,0);
        
        Log("W0,W3: DDS Operation WRITE [TS 9s, Instance 1, Aligned Payload]", INFO);
        Log("W0,W3: REJECTED [Instance not Registered]", DEBUG);
        dds            := DEFAULT_DDS_WRITER_TEST;
        dds.opcode     := WRITE;
        dds.cc         := cc;
        dds.ret_code   := RETCODE_BAD_PARAMETER;
        -- WRITER 0
        ind <= 0;
        start_dds;
        wait_on_sig(dds_done);
        -- WRITER 3
        ind <= 3;
        start_dds;
        wait_on_sig(dds_done);
        wait_on_idle;
        
        -- TEST: REGISTER INSTANCE ON MAX_INSTANCES [UNKNOWN INSTANCE, WITHOUT STALE INSTANCE]
        
        Log("W0,W3: DDS Operation REGISTER_INSTANCE 1", INFO);
        Log("W0,W3: REJECTED [MAX_INSTANCES exceeded]", DEBUG);
        dds            := DEFAULT_DDS_WRITER_TEST;
        dds.opcode     := REGISTER_INSTANCE;
        dds.cc         := cc;
        dds.cc.instance:= HANDLE_NIL;
        -- WRITER 0
        ind <= 0;
        start_dds;
        wait_on_sig(dds_done);
        -- WRITER 3
        ind <= 3;
        start_dds;
        wait_on_sig(dds_done);
        wait_on_idle;
        
        cc                  := DEFAULT_CACHE_CHANGE;
        cc.serialized_key   := FALSE;
        cc.kind             := NOT_ALIVE_UNREGISTERED;
        cc.instance         := kh3;
        cc.payload          := gen_payload(kh3,5);
        cc.seq_nr           := gen_sn(9);
        cc.src_timestamp    := gen_duration(9,0);
        
        Log("W0,W3: DDS Operation UNREGISTER_INSTANCE [TS 9s, Instance 3]", INFO);
        Log("W0,W3: ACCEPTED", DEBUG);
        dds            := DEFAULT_DDS_WRITER_TEST;
        dds.opcode     := UNREGISTER_INSTANCE;
        dds.cc         := cc;
        dds.ret_code   := RETCODE_OK;
        -- WRITER 0
        ind <= 0;
        start_dds;
        wait_on_sig(dds_done);
        -- WRITER 3
        ind <= 3;
        start_dds;
        wait_on_sig(dds_done);
        wait_on_idle;
        cc4 := cc;
        -- WRITER 0
        AlertIf(empty_sample_head(0) /= 11, "Sample Memory Empty List Head incorrect", FAILURE);
        AlertIf(empty_payload_head(0) /= 54, "Payload Memory Empty List Head incorrect", FAILURE);
        AlertIf(empty_inst_head(0) /= 26, "Instance Memory Empty List Head incorrect", FAILURE);
        -- SAMPLE MEMORY:      33(I3S4),0(I4S7),22(I2S8),44(I3S9)/11
        -- PAYLOAD MEMORY:     11(I3S4),33(I4S7),0(I2S8),22(I2S8),44(I3S9)/-
        -- INSTANCE MEMORY:    0(I4),18(I3),9(I2)/-
        -- WRITER 3
        AlertIf(empty_sample_head(3) /= 11, "Sample Memory Empty List Head incorrect", FAILURE);
        AlertIf(empty_payload_head(3) /= 54, "Payload Memory Empty List Head incorrect", FAILURE);
        AlertIf(empty_inst_head(3) /= 26, "Instance Memory Empty List Head incorrect", FAILURE);
        -- SAMPLE MEMORY:      0(I4S6),22(I2S7),33(I3S8)/11
        -- PAYLOAD MEMORY:     0(I4S6),22(I2S7),11(I2S7),33(I3S8)/-
        -- INSTANCE MEMORY:    0(I4),18(I3),9(I2)/-
        
        -- VALIDATE STATE
        
        Log("W0,W3: RTPS Operation GET_MIN_SN", INFO);
        Log("W0: Expected SN 4", DEBUG);
        Log("W3: Expected SN 6", DEBUG);
        rtps           := DEFAULT_RTPS_WRITER_TEST;
        rtps.opcode    := GET_MIN_SN;
        -- WRITER 0
        rtps.cc.seq_nr := gen_sn(4);
        ind <= 0;
        start_rtps;
        wait_on_sig(rtps_done);
        -- WRITER 3
        rtps.cc.seq_nr := gen_sn(6);
        ind <= 3;
        start_rtps;
        wait_on_sig(rtps_done);
        wait_on_idle;
        
        Log("W0,W3: RTPS Operation GET_MAX_SN", INFO);
        Log("W0: Expected SN 9", DEBUG);
        Log("W3: Expected SN 8", DEBUG);
        rtps           := DEFAULT_RTPS_WRITER_TEST;
        rtps.opcode    := GET_MAX_SN;
        -- WRITER 0
        rtps.cc.seq_nr := gen_sn(9);
        ind <= 0;
        start_rtps;
        wait_on_sig(rtps_done);
        -- WRITER 3
        rtps.cc.seq_nr := gen_sn(8);
        ind <= 3;
        start_rtps;
        wait_on_sig(rtps_done);
        wait_on_idle;
        
        Log("W0,W3: RTPS Operation GET_CACHE_CHANGE SN 8", INFO);
        rtps           := DEFAULT_RTPS_WRITER_TEST;
        rtps.opcode    := GET_CACHE_CHANGE;
        -- WRITER 0
        rtps.cc        := cc3;
        ind <= 0;
        start_rtps;
        wait_on_sig(rtps_done);
        -- WRITER 3
        rtps.cc         := cc4;
        rtps.cc.seq_nr  := gen_sn(8);
        ind <= 3;
        start_rtps;
        wait_on_sig(rtps_done);
        wait_on_idle;
        
        Log("W0,W3: RTPS Operation GET_CACHE_CHANGE SN 9", INFO);
        Log("W3: INVALID", DEBUG);
        rtps           := DEFAULT_RTPS_WRITER_TEST;
        rtps.opcode    := GET_CACHE_CHANGE;
        rtps.cc        := cc4;
        -- WRITER 0
        ind <= 0;
        start_rtps;
        wait_on_sig(rtps_done);
        -- WRITER 3
        rtps.ret_code  := INVALID;
        ind <= 3;
        start_rtps;
        wait_on_sig(rtps_done);
        wait_on_idle;
        
        Log("W0: RTPS Operation ACK_CACHE_CHANGE SN 9", INFO);
        rtps            := DEFAULT_RTPS_WRITER_TEST;
        rtps.opcode     := ACK_CACHE_CHANGE;
        rtps.cc.seq_nr  := gen_sn(9);
        -- WRITER 0
        ind <= 0;
        start_rtps;
        wait_on_sig(rtps_done);
        wait_on_idle;
        
        Log("W3: RTPS Operation ACK_CACHE_CHANGE SN 8", INFO);
        rtps            := DEFAULT_RTPS_WRITER_TEST;
        rtps.opcode     := ACK_CACHE_CHANGE;
        rtps.cc.seq_nr  := gen_sn(8);
        -- WRITER 3
        ind <= 3;
        start_rtps;
        wait_on_sig(rtps_done);
        wait_on_idle;
        
        cc                  := DEFAULT_CACHE_CHANGE;
        cc.serialized_key   := FALSE;
        cc.kind             := ALIVE;
        cc.instance         := kh1;
        cc.payload          := gen_payload(kh1,10);
        cc.seq_nr           := gen_sn(10);
        cc.src_timestamp    := gen_duration(10,0);
        
        -- TEST: REGISTER INSTANCE ON MAX_INSTANCES [UNKNOWN INSTANCE, WITH STALE INSTANCE]
        
        Log("W0,W3: DDS Operation REGISTER_INSTANCE 1", INFO);
        Log("W0,W3: ACCEPTED", DEBUG);
        dds            := DEFAULT_DDS_WRITER_TEST;
        dds.opcode     := REGISTER_INSTANCE;
        dds.cc         := cc;
        dds.ret_code   := RETCODE_OK;
        -- WRITER 0
        ind <= 0;
        start_dds;
        wait_on_sig(dds_done);
        -- WRITER 3
        ind <= 3;
        start_dds;
        wait_on_sig(dds_done);
        wait_on_idle;
        -- WRITER 0
        AlertIf(empty_sample_head(0) /= 11, "Sample Memory Empty List Head incorrect", FAILURE);
        AlertIf(empty_payload_head(0) /= 44, "Payload Memory Empty List Head incorrect", FAILURE);
        AlertIf(empty_inst_head(0) /= 26, "Instance Memory Empty List Head incorrect", FAILURE);
        -- SAMPLE MEMORY:      0(I4S7),22(I2S8)/11,33,44
        -- PAYLOAD MEMORY:     33(I4S7),0(I2S8),22(I2S8)/44,11
        -- INSTANCE MEMORY:    18(I1),0(I4),9(I2)/-
        -- WRITER 3
        AlertIf(empty_sample_head(3) /= 11, "Sample Memory Empty List Head incorrect", FAILURE);
        AlertIf(empty_payload_head(3) /= 33, "Payload Memory Empty List Head incorrect", FAILURE);
        AlertIf(empty_inst_head(3) /= 26, "Instance Memory Empty List Head incorrect", FAILURE);
        -- SAMPLE MEMORY:      0(I4S6),22(I2S7)/11,33
        -- PAYLOAD MEMORY:     0(I4S6),22(I2S7),11(I2S7)/33
        -- INSTANCE MEMORY:    18(I1),0(I4),9(I2)/-
        
        Log("W0,W3: DDS Operation WRITE [TS 10s, Instance 1, Aligned Payload]", INFO);
        Log("W0,W3: ACCEPTED", DEBUG);
        dds            := DEFAULT_DDS_WRITER_TEST;
        dds.opcode     := WRITE;
        dds.cc         := cc;
        dds.ret_code   := RETCODE_OK;
        -- WRITER 0
        ind <= 0;
        start_dds;
        wait_on_sig(dds_done);
        -- WRITER 3
        ind <= 3;
        start_dds;
        wait_on_sig(dds_done);
        wait_on_idle;
        cc2 := cc;
        -- WRITER 0
        AlertIf(empty_sample_head(0) /= 33, "Sample Memory Empty List Head incorrect", FAILURE);
        AlertIf(empty_payload_head(0) /= 11, "Payload Memory Empty List Head incorrect", FAILURE);
        AlertIf(empty_inst_head(0) /= 26, "Instance Memory Empty List Head incorrect", FAILURE);
        -- SAMPLE MEMORY:      0(I4S7),22(I2S8),11(I1S10)/33,44
        -- PAYLOAD MEMORY:     33(I4S7),0(I2S8),22(I2S8),44(I1S10)/11
        -- INSTANCE MEMORY:    18(I1),0(I4),9(I2)/-
        -- WRITER 3
        AlertIf(empty_sample_head(3) /= 33, "Sample Memory Empty List Head incorrect", FAILURE);
        AlertIf(empty_payload_head(3) /= 54, "Payload Memory Empty List Head incorrect", FAILURE);
        AlertIf(empty_inst_head(3) /= 26, "Instance Memory Empty List Head incorrect", FAILURE);
        -- SAMPLE MEMORY:      0(I4S6),22(I2S7),11(I1S9)/33
        -- PAYLOAD MEMORY:     0(I4S6),22(I2S7),11(I2S7),33(I1S9)/-
        -- INSTANCE MEMORY:    18(I1),0(I4),9(I2)/-
        
        cc                  := DEFAULT_CACHE_CHANGE;
        cc.serialized_key   := FALSE;
        cc.kind             := ALIVE;
        cc.instance         := kh4;
        cc.payload          := gen_payload(kh4,10);
        cc.seq_nr           := gen_sn(11);
        cc.src_timestamp    := gen_duration(11,0);
        
        Log("W0,W3: DDS Operation WRITE [TS 11s, Instance 1, Aligned Payload]", INFO);
        Log("W0: ACCEPTED", DEBUG);
        Log("W3: REJECTED [Payload memory Full]", DEBUG);
        dds            := DEFAULT_DDS_WRITER_TEST;
        dds.opcode     := WRITE;
        dds.cc         := cc;
        -- WRITER 0
        dds.ret_code   := RETCODE_OK;
        ind <= 0;
        start_dds;
        wait_on_sig(dds_done);
        -- WRITER 3
        dds.ret_code   := RETCODE_OUT_OF_RESOURCES;
        ind <= 3;
        start_dds;
        wait_on_sig(dds_done);
        wait_on_idle;
        cc4 := cc;
        AlertIf(empty_sample_head(0) /= 44, "Sample Memory Empty List Head incorrect", FAILURE);
        AlertIf(empty_payload_head(0) /= 54, "Payload Memory Empty List Head incorrect", FAILURE);
        AlertIf(empty_inst_head(0) /= 26, "Instance Memory Empty List Head incorrect", FAILURE);
        -- SAMPLE MEMORY:      0(I4S7),22(I2S8),11(I1S10),33(I4S11)/44
        -- PAYLOAD MEMORY:     33(I4S7),0(I2S8),22(I2S8),44(I1S10),11(I4S11)/-
        -- INSTANCE MEMORY:    18(I1),0(I4),9(I2)/-
        
        cc                  := DEFAULT_CACHE_CHANGE;
        cc.serialized_key   := FALSE;
        cc.kind             := ALIVE;
        cc.instance         := kh2;
        cc.payload          := gen_payload(kh2,10);
        cc.seq_nr           := gen_sn(12);
        cc.src_timestamp    := gen_duration(12,0);
        
        Log("W0,W3: DDS Operation WRITE [TS 12s, Instance 2, Aligned Payload]", INFO);
        Log("W0,W3: REJECTED [Payload Memory Full]", DEBUG);
        dds            := DEFAULT_DDS_WRITER_TEST;
        dds.opcode     := WRITE;
        dds.cc         := cc;
        dds.ret_code   := RETCODE_OUT_OF_RESOURCES;
        -- WRITER 0
        ind <= 0;
        start_dds;
        wait_on_sig(dds_done);
        -- WRITER 3
        ind <= 3;
        start_dds;
        wait_on_sig(dds_done);
        wait_on_idle;
        
        Log("W0: RTPS Operation ACK_CACHE_CHANGE SN 8", INFO);
        rtps            := DEFAULT_RTPS_WRITER_TEST;
        rtps.opcode     := ACK_CACHE_CHANGE;
        rtps.cc.seq_nr  := gen_sn(8);
        -- WRITER 0
        ind <= 0;
        start_rtps;
        wait_on_sig(rtps_done);
        wait_on_idle;
        
        Log("W3: RTPS Operation ACK_CACHE_CHANGE SN 7", INFO);
        rtps            := DEFAULT_RTPS_WRITER_TEST;
        rtps.opcode     := ACK_CACHE_CHANGE;
        rtps.cc.seq_nr  := gen_sn(7);
        -- WRITER 3
        ind <= 3;
        start_rtps;
        wait_on_sig(rtps_done);
        wait_on_idle;
        
        -- TEST: WRITE ON PAYLOAD MEMORY FULL [WITH ACKed SAMPLES]
        
        Log("W0,W3: DDS Operation WRITE [TS 12s, Instance 2, Aligned Payload]", INFO);
        Log("W0,W3: ACCEPTED", DEBUG);
        dds            := DEFAULT_DDS_WRITER_TEST;
        dds.opcode     := WRITE;
        dds.cc         := cc;
        dds.ret_code   := RETCODE_OK;
        -- WRITER 0
        ind <= 0;
        start_dds;
        wait_on_sig(dds_done);
        -- WRITER 3
        ind <= 3;
        start_dds;
        wait_on_sig(dds_done);
        wait_on_idle;
        cc3 := cc;
        -- WRITER 0
        AlertIf(empty_sample_head(0) /= 22, "Sample Memory Empty List Head incorrect", FAILURE);
        AlertIf(empty_payload_head(0) /= 22, "Payload Memory Empty List Head incorrect", FAILURE);
        AlertIf(empty_inst_head(0) /= 26, "Instance Memory Empty List Head incorrect", FAILURE);
        -- SAMPLE MEMORY:      0(I4S7),11(I1S10),33(I4S11),44(I2S12)/22
        -- PAYLOAD MEMORY:     33(I4S7),44(I1S10),11(I4S11),0(I2S12)/22
        -- INSTANCE MEMORY:    18(I1),0(I4),9(I2)/-
        -- WRITER 3
        AlertIf(empty_sample_head(3) /= 22, "Sample Memory Empty List Head incorrect", FAILURE);
        AlertIf(empty_payload_head(3) /= 11, "Payload Memory Empty List Head incorrect", FAILURE);
        AlertIf(empty_inst_head(3) /= 26, "Instance Memory Empty List Head incorrect", FAILURE);
        -- SAMPLE MEMORY:      0(I4S6),11(I1S9),33(I2S10)/22
        -- PAYLOAD MEMORY:     0(I4S6),33(I1S9),22(I2S10)/11
        -- INSTANCE MEMORY:    18(I1),0(I4),9(I2)/-
        
        cc                  := DEFAULT_CACHE_CHANGE;
        cc.serialized_key   := FALSE;
        cc.kind             := ALIVE;
        cc.instance         := kh4;
        cc.payload          := gen_payload(kh4,10);
        cc.seq_nr           := gen_sn(13);
        cc.src_timestamp    := gen_duration(13,0);
        
        -- TEST: ADD SAMPLE ON MAX_SAMPLES [KNOWN INSTANCE,WITHOUT ACKed SAMPLES]
        
        Log("W0,W3: DDS Operation WRITE [TS 13s, Instance 4, Aligned Payload]", INFO);
        Log("W0,W3: REJECTED [MAX_SAMPLES exceeded]", DEBUG);
        dds            := DEFAULT_DDS_WRITER_TEST;
        dds.opcode     := WRITE;
        dds.cc         := cc;
        dds.ret_code   := RETCODE_OUT_OF_RESOURCES;
        -- WRITER 0
        ind <= 0;
        start_dds;
        wait_on_sig(dds_done);
        -- WRITER 3
        ind <= 3;
        start_dds;
        wait_on_sig(dds_done);
        wait_on_idle;
        
        Log("W0: RTPS Operation ACK_CACHE_CHANGE SN 7", INFO);
        rtps            := DEFAULT_RTPS_WRITER_TEST;
        rtps.opcode     := ACK_CACHE_CHANGE;
        rtps.cc.seq_nr  := gen_sn(7);
        -- WRITER 0
        ind <= 0;
        start_rtps;
        wait_on_sig(rtps_done);
        wait_on_idle;
        
        Log("W3: RTPS Operation ACK_CACHE_CHANGE SN 6", INFO);
        rtps            := DEFAULT_RTPS_WRITER_TEST;
        rtps.opcode     := ACK_CACHE_CHANGE;
        rtps.cc.seq_nr  := gen_sn(6);
        -- WRITER 3
        ind <= 3;
        start_rtps;
        wait_on_sig(rtps_done);
        wait_on_idle;
        
        -- TEST: ADD SAMPLE ON MAX_SAMPLES [KNOWN INSTANCE,WITH ACKed SAMPLES]
        
        Log("W0,W3: DDS Operation WRITE [TS 13s, Instance 4, Aligned Payload]", INFO);
        Log("W0,W3: ACCEPTED", DEBUG);
        dds            := DEFAULT_DDS_WRITER_TEST;
        dds.opcode     := WRITE;
        dds.cc         := cc;
        dds.ret_code   := RETCODE_OK;
        -- WRITER 0
        ind <= 0;
        start_dds;
        wait_on_sig(dds_done);
        -- WRITER 3
        ind <= 3;
        start_dds;
        wait_on_sig(dds_done);
        wait_on_idle;
        cc1 := cc;
        -- WRITER 0
        AlertIf(empty_sample_head(0) /= 0, "Sample Memory Empty List Head incorrect", FAILURE);
        AlertIf(empty_payload_head(0) /= 33, "Payload Memory Empty List Head incorrect", FAILURE);
        AlertIf(empty_inst_head(0) /= 26, "Instance Memory Empty List Head incorrect", FAILURE);
        -- SAMPLE MEMORY:      11(I1S10),33(I4S11),44(I2S12),22(I4S13)/0
        -- PAYLOAD MEMORY:     44(I1S10),11(I4S11),0(I2S12),22(I4S13)/33
        -- INSTANCE MEMORY:    18(I1),0(I4),9(I2)/-
        -- WRITER 3
        AlertIf(empty_sample_head(3) /= 0, "Sample Memory Empty List Head incorrect", FAILURE);
        AlertIf(empty_payload_head(3) /= 0, "Payload Memory Empty List Head incorrect", FAILURE);
        AlertIf(empty_inst_head(3) /= 26, "Instance Memory Empty List Head incorrect", FAILURE);
        -- SAMPLE MEMORY:      11(I1S9),33(I2S10),22(I4S11)/0
        -- PAYLOAD MEMORY:     33(I1S9),22(I2S10),11(I4S11)/0
        -- INSTANCE MEMORY:    18(I1),0(I4),9(I2)/-
        
        -- VALIDATE STATE
        
        Log("W0,W3: RTPS Operation GET_MIN_SN", INFO);
        Log("W0: Expected SN 10", DEBUG);
        Log("W3: Expected SN 9", DEBUG);
        rtps           := DEFAULT_RTPS_WRITER_TEST;
        rtps.opcode    := GET_MIN_SN;
        -- WRITER 0
        rtps.cc.seq_nr := gen_sn(10);
        ind <= 0;
        start_rtps;
        wait_on_sig(rtps_done);
        -- WRITER 3
        rtps.cc.seq_nr := gen_sn(9);
        ind <= 3;
        start_rtps;
        wait_on_sig(rtps_done);
        wait_on_idle;
        
        Log("W0,W3: RTPS Operation GET_MAX_SN", INFO);
        Log("W0: Expected SN 13", DEBUG);
        Log("W3: Expected SN 11", DEBUG);
        rtps           := DEFAULT_RTPS_WRITER_TEST;
        rtps.opcode    := GET_MAX_SN;
        -- WRITER 0
        rtps.cc.seq_nr := gen_sn(13);
        ind <= 0;
        start_rtps;
        wait_on_sig(rtps_done);
        -- WRITER 3
        rtps.cc.seq_nr := gen_sn(11);
        ind <= 3;
        start_rtps;
        wait_on_sig(rtps_done);
        wait_on_idle;
        
        Log("W0,W3: RTPS Operation GET_CACHE_CHANGE SN 10", INFO);
        rtps           := DEFAULT_RTPS_WRITER_TEST;
        rtps.opcode    := GET_CACHE_CHANGE;
        -- WRITER 0
        rtps.cc        := cc2;
        ind <= 0;
        start_rtps;
        wait_on_sig(rtps_done);
        -- WRITER 3
        rtps.cc         := cc3;
        rtps.cc.seq_nr  := gen_sn(10);
        ind <= 3;
        start_rtps;
        wait_on_sig(rtps_done);
        wait_on_idle;
        
        Log("W0,W3: RTPS Operation GET_CACHE_CHANGE SN 11", INFO);
        rtps           := DEFAULT_RTPS_WRITER_TEST;
        rtps.opcode    := GET_CACHE_CHANGE;
        -- WRITER 0
        rtps.cc        := cc4;
        ind <= 0;
        start_rtps;
        wait_on_sig(rtps_done);
        -- WRITER 3
        rtps.cc         := cc1;
        rtps.cc.seq_nr  := gen_sn(11);
        ind <= 3;
        start_rtps;
        wait_on_sig(rtps_done);
        wait_on_idle;
        
        Log("W0: RTPS Operation GET_CACHE_CHANGE SN 12", INFO);
        rtps           := DEFAULT_RTPS_WRITER_TEST;
        rtps.opcode    := GET_CACHE_CHANGE;
        rtps.cc        := cc3;
        -- WRITER 0
        ind <= 0;
        start_rtps;
        wait_on_sig(rtps_done);
        wait_on_idle;
        
        Log("W0: RTPS Operation GET_CACHE_CHANGE SN 13", INFO);
        rtps           := DEFAULT_RTPS_WRITER_TEST;
        rtps.opcode    := GET_CACHE_CHANGE;
        rtps.cc        := cc1;
        -- WRITER 0
        ind <= 0;
        start_rtps;
        wait_on_sig(rtps_done);
        wait_on_idle;
        
        Log("W0: RTPS Operation ACK_CACHE_CHANGE SN 12", INFO);
        rtps            := DEFAULT_RTPS_WRITER_TEST;
        rtps.opcode     := ACK_CACHE_CHANGE;
        rtps.cc.seq_nr  := gen_sn(12);
        -- WRITER 0
        ind <= 0;
        start_rtps;
        wait_on_sig(rtps_done);
        wait_on_idle;
        
        Log("W3: RTPS Operation ACK_CACHE_CHANGE SN 10", INFO);
        rtps            := DEFAULT_RTPS_WRITER_TEST;
        rtps.opcode     := ACK_CACHE_CHANGE;
        rtps.cc.seq_nr  := gen_sn(10);
        -- WRITER 3
        ind <= 3;
        start_rtps;
        wait_on_sig(rtps_done);
        wait_on_idle;
        
        cc                  := DEFAULT_CACHE_CHANGE;
        cc.serialized_key   := FALSE;
        cc.kind             := NOT_ALIVE_UNREGISTERED;
        cc.instance         := kh2;
        cc.payload          := gen_payload(kh2,5);
        cc.seq_nr           := gen_sn(14);
        cc.src_timestamp    := gen_duration(14,0);
        
        Log("W0,W3: DDS Operation UNREGISTER_INSTANCE [TS 14s, Instance 2]", INFO);
        Log("W0,W3: ACCEPTED", DEBUG);
        dds            := DEFAULT_DDS_WRITER_TEST;
        dds.opcode     := UNREGISTER_INSTANCE;
        dds.cc         := cc;
        dds.ret_code   := RETCODE_OK;
        -- WRITER 0
        ind <= 0;
        start_dds;
        wait_on_sig(dds_done);
        -- WRITER 3
        ind <= 3;
        start_dds;
        wait_on_sig(dds_done);
        wait_on_idle;
        cc3 := cc;
        -- WRITER 0
        AlertIf(empty_sample_head(0) /= 44, "Sample Memory Empty List Head incorrect", FAILURE);
        AlertIf(empty_payload_head(0) /= 0, "Payload Memory Empty List Head incorrect", FAILURE);
        AlertIf(empty_inst_head(0) /= 26, "Instance Memory Empty List Head incorrect", FAILURE);
        -- SAMPLE MEMORY:      11(I1S10),33(I4S11),22(I4S13),0(I2S14)/44
        -- PAYLOAD MEMORY:     44(I1S10),11(I4S11),22(I4S13),33(I2S14)/0
        -- INSTANCE MEMORY:    18(I1),0(I4),9(I2)/-
        -- WRITER 3
        AlertIf(empty_sample_head(3) /= 33, "Sample Memory Empty List Head incorrect", FAILURE);
        AlertIf(empty_payload_head(3) /= 22, "Payload Memory Empty List Head incorrect", FAILURE);
        AlertIf(empty_inst_head(3) /= 26, "Instance Memory Empty List Head incorrect", FAILURE);
        -- SAMPLE MEMORY:      11(I1S9),22(I4S11),0(I2S12)/33
        -- PAYLOAD MEMORY:     33(I1S9),11(I4S11),0(I2S12)/22
        -- INSTANCE MEMORY:    18(I1),0(I4),9(I2)/-
        
        Log("W0,W3: RTPS Operation ACK_CACHE_CHANGE SN 11", INFO);
        rtps            := DEFAULT_RTPS_WRITER_TEST;
        rtps.opcode     := ACK_CACHE_CHANGE;
        rtps.cc.seq_nr  := gen_sn(11);
        -- WRITER 0
        ind <= 0;
        start_rtps;
        wait_on_sig(rtps_done);
        -- WRITER 3
        ind <= 3;
        start_rtps;
        wait_on_sig(rtps_done);
        wait_on_idle;
        
        cc                  := DEFAULT_CACHE_CHANGE;
        cc.serialized_key   := FALSE;
        cc.kind             := ALIVE;
        cc.instance         := kh4;
        cc.payload          := gen_payload(kh4,20);
        cc.seq_nr           := gen_sn(15);
        cc.src_timestamp    := gen_duration(15,0);
        
        -- TEST: ADD SAMPLE BIGGER THAN AVAILABLE MEMORY SPACE [WITH ACKed SAMPLES]
        
        Log("W0,W3: DDS Operation WRITE [TS 15s, Instance 4, Aligned Payload (2 Slots)]", INFO);
        Log("W0,W3: REJECTED [Payload Memory Full]", DEBUG);
        dds            := DEFAULT_DDS_WRITER_TEST;
        dds.opcode     := WRITE;
        dds.cc         := cc;
        dds.ret_code   := RETCODE_OUT_OF_RESOURCES;
        -- WRITER 0
        ind <= 0;
        start_dds;
        wait_on_sig(dds_done);
        -- WRITER 3
        ind <= 3;
        start_dds;
        wait_on_sig(dds_done);
        wait_on_idle;
        
        Log("W0,W3: RTPS Operation REMOVE_CACHE_CHANGE SN 11", INFO);
        rtps            := DEFAULT_RTPS_WRITER_TEST;
        rtps.opcode     := REMOVE_CACHE_CHANGE;
        rtps.cc.seq_nr  := gen_sn(11);
        -- WRITER 0
        ind <= 0;
        start_rtps;
        wait_on_sig(rtps_done);
        -- WRITER 3
        ind <= 3;
        start_rtps;
        wait_on_sig(rtps_done);
        wait_on_idle;
        -- WRITER 0
        AlertIf(empty_sample_head(0) /= 44, "Sample Memory Empty List Head incorrect", FAILURE);
        AlertIf(empty_payload_head(0) /= 11, "Payload Memory Empty List Head incorrect", FAILURE);
        AlertIf(empty_inst_head(0) /= 26, "Instance Memory Empty List Head incorrect", FAILURE);
        -- SAMPLE MEMORY:      11(I1S10),22(I4S13),0(I2S14)/44,33
        -- PAYLOAD MEMORY:     44(I1S10),22(I4S13),33(I2S14)/11,0
        -- INSTANCE MEMORY:    18(I1),0(I4),9(I2)/-
        -- WRITER 3
        AlertIf(empty_sample_head(3) /= 33, "Sample Memory Empty List Head incorrect", FAILURE);
        AlertIf(empty_payload_head(3) /= 11, "Payload Memory Empty List Head incorrect", FAILURE);
        AlertIf(empty_inst_head(3) /= 26, "Instance Memory Empty List Head incorrect", FAILURE);
        -- SAMPLE MEMORY:      11(I1S9),0(I2S12)/33,22
        -- PAYLOAD MEMORY:     33(I1S9),0(I2S12)/11,22
        -- INSTANCE MEMORY:    18(I1),0(I4),9(I2)/-
        
        
        
        Log("W0,W3: DDS Operation WRITE [TS 15s, Instance 4, Aligned Payload (2 Slots)]", INFO);
        Log("W0,W3: ACCEPTED", DEBUG);
        dds            := DEFAULT_DDS_WRITER_TEST;
        dds.opcode     := WRITE;
        dds.cc         := cc;
        dds.ret_code   := RETCODE_OK;
        -- WRITER 0
        ind <= 0;
        start_dds;
        wait_on_sig(dds_done);
        -- WRITER 3
        ind <= 3;
        start_dds;
        wait_on_sig(dds_done);
        wait_on_idle;
        cc4 := cc;
        -- WRITER 0
        AlertIf(empty_sample_head(0) /= 33, "Sample Memory Empty List Head incorrect", FAILURE);
        AlertIf(empty_payload_head(0) /= 54, "Payload Memory Empty List Head incorrect", FAILURE);
        AlertIf(empty_inst_head(0) /= 26, "Instance Memory Empty List Head incorrect", FAILURE);
        -- SAMPLE MEMORY:      11(I1S10),22(I4S13),0(I2S14),44(I4S15)/33
        -- PAYLOAD MEMORY:     44(I1S10),22(I4S13),33(I2S14),11(I4S15),0(I4S15)/-
        -- INSTANCE MEMORY:    18(I1),0(I4),9(I2)/-
        -- WRITER 3
        AlertIf(empty_sample_head(3) /= 22, "Sample Memory Empty List Head incorrect", FAILURE);
        AlertIf(empty_payload_head(3) /= 54, "Payload Memory Empty List Head incorrect", FAILURE);
        AlertIf(empty_inst_head(3) /= 26, "Instance Memory Empty List Head incorrect", FAILURE);
        -- SAMPLE MEMORY:      11(I1S9),0(I2S12),33(I4S13)/22
        -- PAYLOAD MEMORY:     33(I1S9),0(I2S12),11(I4S13),22(I4S13)/-
        -- INSTANCE MEMORY:    18(I1),0(I4),9(I2)/-
        
        -- TEST: UNREGISTER INSTANCE ON PAYLOAD MEMORY FULL [WITHOUT ACKed SAMPLES]
        
        cc                  := DEFAULT_CACHE_CHANGE;
        cc.serialized_key   := FALSE;
        cc.kind             := NOT_ALIVE_UNREGISTERED;
        cc.instance         := kh1;
        cc.payload          := gen_payload(kh1,5);
        cc.seq_nr           := gen_sn(16);
        cc.src_timestamp    := gen_duration(16,0);
        
        Log("W0,W3: DDS Operation UNREGISTER_INSTANCE [TS 16s, Instance 1]", INFO);
        Log("W0,W3: REJECTED [Payload memory Full, MAX_SAMPLES exceeded]", DEBUG);
        dds            := DEFAULT_DDS_WRITER_TEST;
        dds.opcode     := UNREGISTER_INSTANCE;
        dds.cc         := cc;
        dds.ret_code   := RETCODE_OUT_OF_RESOURCES;
        -- WRITER 0
        ind <= 0;
        start_dds;
        wait_on_sig(dds_done);
        -- WRITER 3
        ind <= 3;
        start_dds;
        wait_on_sig(dds_done);
        wait_on_idle;
        
        Log("W0: RTPS Operation ACK_CACHE_CHANGE SN 10", INFO);
        rtps            := DEFAULT_RTPS_WRITER_TEST;
        rtps.opcode     := ACK_CACHE_CHANGE;
        rtps.cc.seq_nr  := gen_sn(10);
        -- WRITER 0
        ind <= 0;
        start_rtps;
        wait_on_sig(rtps_done);
        wait_on_idle;
        
        Log("W3: RTPS Operation ACK_CACHE_CHANGE SN 9", INFO);
        rtps            := DEFAULT_RTPS_WRITER_TEST;
        rtps.opcode     := ACK_CACHE_CHANGE;
        rtps.cc.seq_nr  := gen_sn(9);
        -- WRITER 3
        ind <= 3;
        start_rtps;
        wait_on_sig(rtps_done);
        wait_on_idle;
        
        -- TEST: UNREGISTER INSTANCE ON PAYLOAD MEMORY FULL [WITH ACKed SAMPLES]
        
        Log("W0,W3: DDS Operation UNREGISTER_INSTANCE [TS 16s, Instance 1]", INFO);
        Log("W0,W3: ACCEPTED", DEBUG);
        dds            := DEFAULT_DDS_WRITER_TEST;
        dds.opcode     := UNREGISTER_INSTANCE;
        dds.cc         := cc;
        dds.ret_code   := RETCODE_OK;
        -- WRITER 0
        ind <= 0;
        start_dds;
        wait_on_sig(dds_done);
        -- WRITER 3
        ind <= 3;
        start_dds;
        wait_on_sig(dds_done);
        wait_on_idle;
        cc2 := cc;
        -- WRITER 0
        AlertIf(empty_sample_head(0) /= 11, "Sample Memory Empty List Head incorrect", FAILURE);
        AlertIf(empty_payload_head(0) /= 54, "Payload Memory Empty List Head incorrect", FAILURE);
        AlertIf(empty_inst_head(0) /= 26, "Instance Memory Empty List Head incorrect", FAILURE);
        -- SAMPLE MEMORY:      22(I4S13),0(I2S14),44(I4S15),33(I1S16)/11
        -- PAYLOAD MEMORY:     22(I4S13),33(I2S14),11(I4S15),0(I4S15),44(I1S16)/-
        -- INSTANCE MEMORY:    18(I1),0(I4),9(I2)/-
        -- WRITER 3
        AlertIf(empty_sample_head(3) /= 11, "Sample Memory Empty List Head incorrect", FAILURE);
        AlertIf(empty_payload_head(3) /= 54, "Payload Memory Empty List Head incorrect", FAILURE);
        AlertIf(empty_inst_head(3) /= 26, "Instance Memory Empty List Head incorrect", FAILURE);
        -- SAMPLE MEMORY:      0(I2S12),33(I4S13),22(I1S14)/11
        -- PAYLOAD MEMORY:     0(I2S12),11(I4S13),22(I4S13),33(I1S14)/-
        -- INSTANCE MEMORY:    18(I1),0(I4),9(I2)/-
        
        cc                  := DEFAULT_CACHE_CHANGE;
        cc.serialized_key   := FALSE;
        cc.kind             := NOT_ALIVE_DISPOSED;
        cc.instance         := kh3;
        cc.payload          := gen_payload(kh3,5);
        cc.seq_nr           := gen_sn(17);
        cc.src_timestamp    := gen_duration(17,0);
        
        -- TEST: DISPOSE ON PAYLOAD MEMORY FULL [WITHOUT ACKed SAMPLES]
        
        Log("W0,W3: DDS Operation DISPOSE [TS 17s, Instance 3]", INFO);
        Log("W0,W3: REJECTED [Payload memory Full, MAX_SAMPLES exceeded]", DEBUG);
        dds            := DEFAULT_DDS_WRITER_TEST;
        dds.opcode     := DISPOSE;
        dds.cc         := cc;
        dds.cc.instance:= HANDLE_NIL;
        dds.ret_code   := RETCODE_OUT_OF_RESOURCES;
        -- WRITER 0
        ind <= 0;
        start_dds;
        wait_on_sig(dds_done);
        -- WRITER 3
        ind <= 3;
        start_dds;
        wait_on_sig(dds_done);
        wait_on_idle;
        
        Log("W0,W3: RTPS Operation ACK_CACHE_CHANGE SN 13", INFO);
        rtps            := DEFAULT_RTPS_WRITER_TEST;
        rtps.opcode     := ACK_CACHE_CHANGE;
        rtps.cc.seq_nr  := gen_sn(13);
        -- WRITER 0
        ind <= 0;
        start_rtps;
        wait_on_sig(rtps_done);
        -- WRITER 3
        ind <= 3;
        start_rtps;
        wait_on_sig(rtps_done);
        wait_on_idle;
        
        Log("W0,W3: RTPS Operation ACK_CACHE_CHANGE SN 14", INFO);
        rtps            := DEFAULT_RTPS_WRITER_TEST;
        rtps.opcode     := ACK_CACHE_CHANGE;
        rtps.cc.seq_nr  := gen_sn(14);
        -- WRITER 0
        ind <= 0;
        start_rtps;
        wait_on_sig(rtps_done);
        -- WRITER 3
        ind <= 3;
        start_rtps;
        wait_on_sig(rtps_done);
        wait_on_idle;
        
        Log("W3: RTPS Operation ACK_CACHE_CHANGE SN 12", INFO);
        rtps            := DEFAULT_RTPS_WRITER_TEST;
        rtps.opcode     := ACK_CACHE_CHANGE;
        rtps.cc.seq_nr  := gen_sn(12);
        -- WRITER 3
        ind <= 3;
        start_rtps;
        wait_on_sig(rtps_done);
        wait_on_idle;
        
        -- TEST: DISPOSE ON PAYLOAD MEMORY FULL [WITH ACKed SAMPLES]
        -- TEST: ADD SAMPLE ON PAYLOAD FULL & MAX_INSTANCES [UNKNOWN INSTANCE,WITH ACKed SAMPLES,WITH STALE INSTANCE (>= 1 SAMPLE)] (Induce Double Remove)
        -- TEST: REMOVE STALE INSTANCE WITH 1 SAMPLES
        
        Log("W0,W3: DDS Operation DISPOSE [TS 17s, Instance 3]", INFO);
        Log("W0,W3: ACCEPTED", DEBUG);
        dds            := DEFAULT_DDS_WRITER_TEST;
        dds.opcode     := DISPOSE;
        dds.cc         := cc;
        dds.cc.instance:= HANDLE_NIL;
        dds.ret_code   := RETCODE_OK;
        -- WRITER 0
        ind <= 0;
        start_dds;
        wait_on_sig(dds_done);
        -- WRITER 3
        ind <= 3;
        start_dds;
        wait_on_sig(dds_done);
        wait_on_idle;
        cc1 := cc;
        -- WRITER 0
        AlertIf(empty_sample_head(0) /= 22, "Sample Memory Empty List Head incorrect", FAILURE);
        AlertIf(empty_payload_head(0) /= 33, "Payload Memory Empty List Head incorrect", FAILURE);
        AlertIf(empty_inst_head(0) /= 26, "Instance Memory Empty List Head incorrect", FAILURE);
        -- SAMPLE MEMORY:      44(I4S15),33(I1S16),11(I3S17)/22,0
        -- PAYLOAD MEMORY:     11(I4S15),0(I4S15),44(I1S16),22(I3S17)/33
        -- INSTANCE MEMORY:    9(I3),18(I1),0(I4)/-
        -- WRITER 3
        AlertIf(empty_sample_head(3) /= 0, "Sample Memory Empty List Head incorrect", FAILURE);
        AlertIf(empty_payload_head(3) /= 33, "Payload Memory Empty List Head incorrect", FAILURE);
        AlertIf(empty_inst_head(3) /= 26, "Instance Memory Empty List Head incorrect", FAILURE);
        -- SAMPLE MEMORY:      33(I4S13),11(I3S15)/0,22
        -- PAYLOAD MEMORY:     11(I4S13),22(I4S13),0(I3S15)/33
        -- INSTANCE MEMORY:    18(I3),0(I4),9(I2)/-
        
        -- VALIDATE STATE
        
        Log("W0,W3: RTPS Operation GET_MIN_SN", INFO);
        Log("W0: Expected SN 15", DEBUG);
        Log("W3: Expected SN 13", DEBUG);
        rtps           := DEFAULT_RTPS_WRITER_TEST;
        rtps.opcode    := GET_MIN_SN;
        -- WRITER 0
        rtps.cc.seq_nr := gen_sn(15);
        ind <= 0;
        start_rtps;
        wait_on_sig(rtps_done);
        -- WRITER 3
        rtps.cc.seq_nr := gen_sn(13);
        ind <= 3;
        start_rtps;
        wait_on_sig(rtps_done);
        wait_on_idle;
        
        Log("W0,W3: RTPS Operation GET_MAX_SN", INFO);
        Log("W0: Expected SN 17", DEBUG);
        Log("W3: Expected SN 15", DEBUG);
        rtps           := DEFAULT_RTPS_WRITER_TEST;
        rtps.opcode    := GET_MAX_SN;
        -- WRITER 0
        rtps.cc.seq_nr := gen_sn(17);
        ind <= 0;
        start_rtps;
        wait_on_sig(rtps_done);
        -- WRITER 3
        rtps.cc.seq_nr := gen_sn(15);
        ind <= 3;
        start_rtps;
        wait_on_sig(rtps_done);
        wait_on_idle;
        
        Log("W0,W3: RTPS Operation GET_CACHE_CHANGE SN 15", INFO);
        rtps           := DEFAULT_RTPS_WRITER_TEST;
        rtps.opcode    := GET_CACHE_CHANGE;
        -- WRITER 0
        rtps.cc        := cc4;
        ind <= 0;
        start_rtps;
        wait_on_sig(rtps_done);
        -- WRITER 3
        rtps.cc         := cc1;
        rtps.cc.seq_nr  := gen_sn(15);
        ind <= 3;
        start_rtps;
        wait_on_sig(rtps_done);
        wait_on_idle;
        
        Log("W0: RTPS Operation GET_CACHE_CHANGE SN 16", INFO);
        rtps           := DEFAULT_RTPS_WRITER_TEST;
        rtps.opcode    := GET_CACHE_CHANGE;
        rtps.cc        := cc2;
        -- WRITER 0
        ind <= 0;
        start_rtps;
        wait_on_sig(rtps_done);
        wait_on_idle;
        
        Log("W0: RTPS Operation GET_CACHE_CHANGE SN 17", INFO);
        rtps           := DEFAULT_RTPS_WRITER_TEST;
        rtps.opcode    := GET_CACHE_CHANGE;
        rtps.cc        := cc1;
        -- WRITER 0
        ind <= 0;
        start_rtps;
        wait_on_sig(rtps_done);
        wait_on_idle;
        
        Log("W0,W3: RTPS Operation REMOVE_CACHE_CHANGE SN 15", INFO);
        rtps            := DEFAULT_RTPS_WRITER_TEST;
        rtps.opcode     := REMOVE_CACHE_CHANGE;
        rtps.cc.seq_nr  := gen_sn(15);
        -- WRITER 0
        ind <= 0;
        start_rtps;
        wait_on_sig(rtps_done);
        -- WRITER 3
        ind <= 3;
        start_rtps;
        wait_on_sig(rtps_done);
        wait_on_idle;
        -- WRITER 0
        AlertIf(empty_sample_head(0) /= 22, "Sample Memory Empty List Head incorrect", FAILURE);
        AlertIf(empty_payload_head(0) /= 11, "Payload Memory Empty List Head incorrect", FAILURE);
        AlertIf(empty_inst_head(0) /= 26, "Instance Memory Empty List Head incorrect", FAILURE);
        -- SAMPLE MEMORY:      33(I1S16),11(I3S17)/22,0,44
        -- PAYLOAD MEMORY:     44(I1S16),22(I3S17)/11,0,33
        -- INSTANCE MEMORY:    9(I3),18(I1),0(I4)/-
        -- WRITER 3
        AlertIf(empty_sample_head(3) /= 0, "Sample Memory Empty List Head incorrect", FAILURE);
        AlertIf(empty_payload_head(3) /= 0, "Payload Memory Empty List Head incorrect", FAILURE);
        AlertIf(empty_inst_head(3) /= 26, "Instance Memory Empty List Head incorrect", FAILURE);
        -- SAMPLE MEMORY:      33(I4S13)/0,22,11
        -- PAYLOAD MEMORY:     11(I4S13),22(I4S13)/0,33
        -- INSTANCE MEMORY:    18(I3),0(I4),9(I2)/-
        
        cc                  := DEFAULT_CACHE_CHANGE;
        cc.serialized_key   := FALSE;
        cc.kind             := ALIVE;
        cc.instance         := kh3;
        cc.payload          := gen_payload(kh3,10);
        cc.seq_nr           := gen_sn(18);
        cc.src_timestamp    := gen_duration(18,0);
        
        -- TEST: WRITE ON DISPOSED INSTANCE
        
        Log("W0,W3: DDS Operation WRITE [TS 18s, Instance 3, Aligned Payload]", INFO);
        Log("W0,W3: ACCEPTED", DEBUG);
        dds            := DEFAULT_DDS_WRITER_TEST;
        dds.opcode     := WRITE;
        dds.cc         := cc;
        dds.ret_code   := RETCODE_OK;
        -- WRITER 0
        ind <= 0;
        start_dds;
        wait_on_sig(dds_done);
        -- WRITER 3
        ind <= 3;
        start_dds;
        wait_on_sig(dds_done);
        wait_on_idle;
        cc3 := cc;
        -- WRITER 0
        AlertIf(empty_sample_head(0) /= 0, "Sample Memory Empty List Head incorrect", FAILURE);
        AlertIf(empty_payload_head(0) /= 0, "Payload Memory Empty List Head incorrect", FAILURE);
        AlertIf(empty_inst_head(0) /= 26, "Instance Memory Empty List Head incorrect", FAILURE);
        -- SAMPLE MEMORY:      33(I1S16),11(I3S17),22(I3S18)/0,44
        -- PAYLOAD MEMORY:     44(I1S16),22(I3S17),11(I3S18)/0,33
        -- INSTANCE MEMORY:    9(I3),18(I1),0(I4)/-
        -- WRITER 3
        AlertIf(empty_sample_head(3) /= 22, "Sample Memory Empty List Head incorrect", FAILURE);
        AlertIf(empty_payload_head(3) /= 33, "Payload Memory Empty List Head incorrect", FAILURE);
        AlertIf(empty_inst_head(3) /= 26, "Instance Memory Empty List Head incorrect", FAILURE);
        -- SAMPLE MEMORY:      33(I4S13),0(I3S16)/22,11
        -- PAYLOAD MEMORY:     11(I4S13),22(I4S13),0(I3S16)/33
        -- INSTANCE MEMORY:    18(I3),0(I4),9(I2)/-
        
        cc                  := DEFAULT_CACHE_CHANGE;
        cc.serialized_key   := FALSE;
        cc.kind             := ALIVE;
        cc.instance         := kh4;
        cc.payload          := gen_payload(kh4,10);
        cc.seq_nr           := gen_sn(19);
        cc.src_timestamp    := gen_duration(19,0);
        
        Log("W0,W3: DDS Operation WRITE [TS 19s, Instance 4, Aligned Payload]", INFO);
        Log("W0,W3: ACCEPTED", DEBUG);
        dds            := DEFAULT_DDS_WRITER_TEST;
        dds.opcode     := WRITE;
        dds.cc         := cc;
        dds.ret_code   := RETCODE_OK;
        -- WRITER 0
        ind <= 0;
        start_dds;
        wait_on_sig(dds_done);
        -- WRITER 3
        ind <= 3;
        start_dds;
        wait_on_sig(dds_done);
        wait_on_idle;
        cc4 := cc;
        -- WRITER 0
        AlertIf(empty_sample_head(0) /= 44, "Sample Memory Empty List Head incorrect", FAILURE);
        AlertIf(empty_payload_head(0) /= 33, "Payload Memory Empty List Head incorrect", FAILURE);
        AlertIf(empty_inst_head(0) /= 26, "Instance Memory Empty List Head incorrect", FAILURE);
        -- SAMPLE MEMORY:      33(I1S16),11(I3S17),22(I3S18),0(I4S19)/44
        -- PAYLOAD MEMORY:     44(I1S16),22(I3S17),11(I3S18),0(I4S19)/33
        -- INSTANCE MEMORY:    9(I3),18(I1),0(I4)/-
        -- WRITER 3
        AlertIf(empty_sample_head(3) /= 11, "Sample Memory Empty List Head incorrect", FAILURE);
        AlertIf(empty_payload_head(3) /= 54, "Payload Memory Empty List Head incorrect", FAILURE);
        AlertIf(empty_inst_head(3) /= 26, "Instance Memory Empty List Head incorrect", FAILURE);
        -- SAMPLE MEMORY:      33(I4S13),0(I3S16),22(I4S17)/11
        -- PAYLOAD MEMORY:     11(I4S13),22(I4S13),0(I3S16),33(I4S17)/-
        -- INSTANCE MEMORY:    18(I3),0(I4),9(I2)/-
        
        cc                  := DEFAULT_CACHE_CHANGE;
        cc.serialized_key   := FALSE;
        cc.kind             := ALIVE;
        cc.instance         := kh2;
        cc.payload          := gen_payload(kh2,10);
        cc.seq_nr           := gen_sn(20);
        cc.src_timestamp    := gen_duration(20,0);
        
        -- TEST: ADD SAMPLE ON MAX_SAMPLES & MAX_INSTANCES [UNKNOWN INSTANCE,WITHOUT STALE INSTANCES,WITHOUT ACKed SAMPLES]
        
        Log("W0,W3: DDS Operation WRITE [TS 20s, Instance 2, Aligned Payload]", INFO);
        Log("W0: REJECTED [MAX_SAMPLES exceeded, MAX_INSTANCES exceeded]", DEBUG);
        Log("W0: ACCEPTED", DEBUG);
        dds            := DEFAULT_DDS_WRITER_TEST;
        dds.opcode     := WRITE;
        dds.cc         := cc;
        dds.cc.instance:= HANDLE_NIL;
        -- WRITER 0
        dds.ret_code   := RETCODE_OUT_OF_RESOURCES;
        ind <= 0;
        start_dds;
        wait_on_sig(dds_done);
        -- WRITER 3
        dds.ret_code   := RETCODE_OK;
        ind <= 3;
        start_dds;
        wait_on_sig(dds_done);
        wait_on_idle;
        -- WRITER 3
        AlertIf(empty_sample_head(3) /= 33, "Sample Memory Empty List Head incorrect", FAILURE);
        AlertIf(empty_payload_head(3) /= 22, "Payload Memory Empty List Head incorrect", FAILURE);
        AlertIf(empty_inst_head(3) /= 26, "Instance Memory Empty List Head incorrect", FAILURE);
        -- SAMPLE MEMORY:      0(I3S16),22(I4S17),11(I2S18)/33
        -- PAYLOAD MEMORY:     0(I3S16),33(I4S17),11(I2S18)/22
        -- INSTANCE MEMORY:    18(I3),0(I4),9(I2)/-
        
        Log("W0,W3: RTPS Operation ACK_CACHE_CHANGE SN 16", INFO);
        rtps            := DEFAULT_RTPS_WRITER_TEST;
        rtps.opcode     := ACK_CACHE_CHANGE;
        rtps.cc.seq_nr  := gen_sn(16);
        -- WRITER 0
        ind <= 0;
        start_rtps;
        wait_on_sig(rtps_done);
        -- WRITER 3
        ind <= 3;
        start_rtps;
        wait_on_sig(rtps_done);
        wait_on_idle;
        
        -- TEST: ADD SAMPLE ON MAX_SAMPLES & MAX_INSTANCES [UNKNOWN INSTANCE,WITH STALE INSTANCE (>0 SAMPLES)]
        
        Log("W0: DDS Operation WRITE [TS 20s, Instance 2, Aligned Payload]", INFO);
        Log("W0: ACCEPTED", DEBUG);
        dds            := DEFAULT_DDS_WRITER_TEST;
        dds.opcode     := WRITE;
        dds.cc         := cc;
        dds.cc.instance:= HANDLE_NIL;
        dds.ret_code   := RETCODE_OK;
        -- WRITER 0
        ind <= 0;
        start_dds;
        wait_on_sig(dds_done);
        wait_on_idle;
        cc2 := cc;
        -- WRITER 0
        AlertIf(empty_sample_head(0) /= 33, "Sample Memory Empty List Head incorrect", FAILURE);
        AlertIf(empty_payload_head(0) /= 44, "Payload Memory Empty List Head incorrect", FAILURE);
        AlertIf(empty_inst_head(0) /= 26, "Instance Memory Empty List Head incorrect", FAILURE);
        -- SAMPLE MEMORY:      11(I3S17),22(I3S18),0(I4S19),44(I2S20)/33
        -- PAYLOAD MEMORY:     22(I3S17),11(I3S18),0(I4S19),33(I2S20)/44
        -- INSTANCE MEMORY:    18(I2),9(I3),0(I4)/-
        
        Log("W0,W3: RTPS Operation ACK_CACHE_CHANGE SN 17", INFO);
        rtps            := DEFAULT_RTPS_WRITER_TEST;
        rtps.opcode     := ACK_CACHE_CHANGE;
        rtps.cc.seq_nr  := gen_sn(17);
        -- WRITER 0
        ind <= 0;
        start_rtps;
        wait_on_sig(rtps_done);
        -- WRITER 3
        ind <= 3;
        start_rtps;
        wait_on_sig(rtps_done);
        wait_on_idle;
        
        cc                  := DEFAULT_CACHE_CHANGE;
        cc.serialized_key   := FALSE;
        cc.kind             := NOT_ALIVE_UNREGISTERED;
        cc.instance         := kh4;
        cc.payload          := gen_payload(kh4,5);
        cc.seq_nr           := gen_sn(21);
        cc.src_timestamp    := gen_duration(21,0);
        
        Log("W0,W3: DDS Operation UNREGISTER_INSTANCE [TS 21s, Instance 4]", INFO);
        Log("W0,W3: ACCEPTED", DEBUG);
        dds            := DEFAULT_DDS_WRITER_TEST;
        dds.opcode     := UNREGISTER_INSTANCE;
        dds.cc         := cc;
        dds.ret_code   := RETCODE_OK;
        -- WRITER 0
        ind <= 0;
        start_dds;
        wait_on_sig(dds_done);
        -- WRITER 3
        ind <= 3;
        start_dds;
        wait_on_sig(dds_done);
        wait_on_idle;
        cc1 := cc;
        -- WRITER 0
        AlertIf(empty_sample_head(0) /= 11, "Sample Memory Empty List Head incorrect", FAILURE);
        AlertIf(empty_payload_head(0) /= 22, "Payload Memory Empty List Head incorrect", FAILURE);
        AlertIf(empty_inst_head(0) /= 26, "Instance Memory Empty List Head incorrect", FAILURE);
        -- SAMPLE MEMORY:      22(I3S18),0(I4S19),44(I2S20),33(I4S21)/11
        -- PAYLOAD MEMORY:     11(I3S18),0(I4S19),33(I2S20),44(I4S21)/22
        -- INSTANCE MEMORY:    18(I2),9(I3),0(I4)/-
        -- WRITER 3
        AlertIf(empty_sample_head(3) /= 0, "Sample Memory Empty List Head incorrect", FAILURE);
        AlertIf(empty_payload_head(3) /= 0, "Payload Memory Empty List Head incorrect", FAILURE);
        AlertIf(empty_inst_head(3) /= 26, "Instance Memory Empty List Head incorrect", FAILURE);
        -- SAMPLE MEMORY:      22(I4S17),11(I2S18),33(I4S19)/0
        -- PAYLOAD MEMORY:     33(I4S17),11(I2S18),22(I4S19)/0
        -- INSTANCE MEMORY:    18(I3),0(I4),9(I2)/-
        
        Log("W0,W3: RTPS Operation ACK_CACHE_CHANGE SN 19", INFO);
        rtps            := DEFAULT_RTPS_WRITER_TEST;
        rtps.opcode     := ACK_CACHE_CHANGE;
        rtps.cc.seq_nr  := gen_sn(19);
        -- WRIITER 0
        ind <= 0;
        start_rtps;
        wait_on_sig(rtps_done);
        -- WRIITER 3
        ind <= 3;
        start_rtps;
        wait_on_sig(rtps_done);
        wait_on_idle;
        
        cc                  := DEFAULT_CACHE_CHANGE;
        cc.serialized_key   := FALSE;
        cc.kind             := ALIVE;
        cc.instance         := kh1;
        cc.payload          := gen_payload(kh1,10);
        cc.seq_nr           := gen_sn(22);
        cc.src_timestamp    := gen_duration(22,0);
        
        -- TEST: ADD SAMPLE ON MAX_SAMPLES & MAX_INSTANCES [UNKNOWN INSTANCE,WITHOUT STALE INSTANCE, WITH ACKed SAMPLE]
        
        Log("W0,W3: DDS Operation WRITE [TS 22s, Instance 1, Aligned Payload]", INFO);
        Log("W0: REJECTED [MAX_SAMPLES exceeded, MAX_INSTANCES exceeded]", DEBUG);
        Log("W3: ACCEPTED", DEBUG);
        dds            := DEFAULT_DDS_WRITER_TEST;
        dds.opcode     := WRITE;
        dds.cc         := cc;
        dds.cc.instance:= HANDLE_NIL;
        -- WRITER 0
        dds.ret_code   := RETCODE_OUT_OF_RESOURCES;
        ind <= 0;
        start_dds;
        wait_on_sig(dds_done);
        -- WRITER 3
        dds.ret_code   := RETCODE_OK;
        ind <= 3;
        start_dds;
        wait_on_sig(dds_done);
        wait_on_idle;
        -- WRITER 3
        AlertIf(empty_sample_head(3) /= 22, "Sample Memory Empty List Head incorrect", FAILURE);
        AlertIf(empty_payload_head(3) /= 22, "Payload Memory Empty List Head incorrect", FAILURE);
        AlertIf(empty_inst_head(3) /= 26, "Instance Memory Empty List Head incorrect", FAILURE);
        -- SAMPLE MEMORY:      11(I2S18),0(I1S20)/22,33
        -- PAYLOAD MEMORY:     11(I2S18),0(I1S20)/22,33
        -- INSTANCE MEMORY:    0(I1),18(I3),9(I2)/-
        
        Log("W0,W3: RTPS Operation REMOVE_CACHE_CHANGE SN 19", INFO);
        Log("W3: INVALID", DEBUG);
        rtps            := DEFAULT_RTPS_WRITER_TEST;
        rtps.opcode     := REMOVE_CACHE_CHANGE;
        rtps.cc.seq_nr  := gen_sn(19);
        -- WRITER 0
        ind <= 0;
        start_rtps;
        wait_on_sig(rtps_done);
        -- WRITER 3
        rtps.ret_code  := INVALID;
        ind <= 3;
        start_rtps;
        wait_on_sig(rtps_done);
        wait_on_idle;
        -- WRITER 0
        AlertIf(empty_sample_head(0) /= 11, "Sample Memory Empty List Head incorrect", FAILURE);
        AlertIf(empty_payload_head(0) /= 0, "Payload Memory Empty List Head incorrect", FAILURE);
        AlertIf(empty_inst_head(0) /= 26, "Instance Memory Empty List Head incorrect", FAILURE);
        -- SAMPLE MEMORY:      22(I3S18),44(I2S20),33(I4S21)/11,0
        -- PAYLOAD MEMORY:     11(I3S18),33(I2S20),44(I4S21)/0,22
        -- INSTANCE MEMORY:    18(I2),9(I3),0(I4)/-
        
        Log("W0,W3: RTPS Operation REMOVE_CACHE_CHANGE SN 21", INFO);
        Log("W3: INVALID", DEBUG);
        rtps            := DEFAULT_RTPS_WRITER_TEST;
        rtps.opcode     := REMOVE_CACHE_CHANGE;
        rtps.cc.seq_nr  := gen_sn(21);
        -- WRITER 0
        ind <= 0;
        start_rtps;
        wait_on_sig(rtps_done);
        -- WRITER 3
        rtps.ret_code  := INVALID;
        ind <= 3;
        start_rtps;
        wait_on_sig(rtps_done);
        wait_on_idle;
        wait_on_idle;
        -- WRITER 0
        AlertIf(empty_sample_head(0) /= 11, "Sample Memory Empty List Head incorrect", FAILURE);
        AlertIf(empty_payload_head(0) /= 44, "Payload Memory Empty List Head incorrect", FAILURE);
        AlertIf(empty_inst_head(0) /= 26, "Instance Memory Empty List Head incorrect", FAILURE);
        -- SAMPLE MEMORY:      22(I3S18),44(I2S20)/11,0,33
        -- PAYLOAD MEMORY:     11(I3S18),33(I2S20)/44,0,22
        -- INSTANCE MEMORY:    18(I2),9(I3),0(I4)/-
        
        cc                  := DEFAULT_CACHE_CHANGE;
        cc.serialized_key   := FALSE;
        cc.kind             := NOT_ALIVE_UNREGISTERED;
        cc.instance         := kh2;
        cc.payload          := gen_payload(kh2,5);
        cc.seq_nr           := gen_sn(22);
        cc.src_timestamp    := gen_duration(22,0);
        
        Log("W0,W3: DDS Operation UNREGISTER_INSTANCE [TS 22s, Instance 2]", INFO);
        Log("W0,W3: ACCEPTED", DEBUG);
        dds            := DEFAULT_DDS_WRITER_TEST;
        dds.opcode     := UNREGISTER_INSTANCE;
        dds.cc         := cc;
        dds.ret_code   := RETCODE_OK;
        -- WRITER 0
        ind <= 0;
        start_dds;
        wait_on_sig(dds_done);
        -- WRITER 3
        ind <= 3;
        start_dds;
        wait_on_sig(dds_done);
        wait_on_idle;
        cc1 := cc;
        -- WRITER 0
        AlertIf(empty_sample_head(0) /= 0, "Sample Memory Empty List Head incorrect", FAILURE);
        AlertIf(empty_payload_head(0) /= 0, "Payload Memory Empty List Head incorrect", FAILURE);
        AlertIf(empty_inst_head(0) /= 26, "Instance Memory Empty List Head incorrect", FAILURE);
        -- SAMPLE MEMORY:      22(I3S18),44(I2S20),11(I2S22)/0,33
        -- PAYLOAD MEMORY:     11(I3S18),33(I2S20),44(I2S22)/0,22
        -- INSTANCE MEMORY:    18(I2),9(I3),0(I4)/-
        -- WRITER 3
        AlertIf(empty_sample_head(3) /= 33, "Sample Memory Empty List Head incorrect", FAILURE);
        AlertIf(empty_payload_head(3) /= 33, "Payload Memory Empty List Head incorrect", FAILURE);
        AlertIf(empty_inst_head(3) /= 26, "Instance Memory Empty List Head incorrect", FAILURE);
        -- SAMPLE MEMORY:      11(I2S18),0(I1S20),22(I2S21)/33
        -- PAYLOAD MEMORY:     11(I2S18),0(I1S20),22(I2S21)/33
        -- INSTANCE MEMORY:    0(I1),18(I3),9(I2)/-
        
        cc                  := DEFAULT_CACHE_CHANGE;
        cc.serialized_key   := FALSE;
        cc.kind             := NOT_ALIVE_UNREGISTERED;
        cc.instance         := kh3;
        cc.payload          := gen_payload(kh3,5);
        cc.seq_nr           := gen_sn(23);
        cc.src_timestamp    := gen_duration(23,0);
        
        Log("W0,W3: DDS Operation UNREGISTER_INSTANCE [TS 23s, Instance 3]", INFO);
        Log("W0: ACCEPTED", DEBUG);
        Log("W3: REJECTED (MAX SAMPLES)", DEBUG);
        dds            := DEFAULT_DDS_WRITER_TEST;
        dds.opcode     := UNREGISTER_INSTANCE;
        dds.cc         := cc;
        -- WRITER 0
        dds.ret_code   := RETCODE_OK;
        ind <= 0;
        start_dds;
        wait_on_sig(dds_done);
        -- WRITER 3
        dds.ret_code   := RETCODE_OUT_OF_RESOURCES;
        ind <= 3;
        start_dds;
        wait_on_sig(dds_done);
        wait_on_idle;
        cc4 := cc;
        -- WRITER 0
        AlertIf(empty_sample_head(0) /= 33, "Sample Memory Empty List Head incorrect", FAILURE);
        AlertIf(empty_payload_head(0) /= 22, "Payload Memory Empty List Head incorrect", FAILURE);
        AlertIf(empty_inst_head(0) /= 26, "Instance Memory Empty List Head incorrect", FAILURE);
        -- SAMPLE MEMORY:      22(I3S18),44(I2S20),11(I2S22),0(I3S23)/33
        -- PAYLOAD MEMORY:     11(I3S18),33(I2S20),44(I2S22),0(I3S23)/22
        -- INSTANCE MEMORY:    18(I2),9(I3),0(I4)/-
        
        -- TEST: ADD SAMPLE ON MAX_SAMPLES & MAX_INSTANCES [UNKNOWN INSTANCE,WITH STALE INSTANCE, WITHOUT ACKed SAMPLE]
        
        cc                  := DEFAULT_CACHE_CHANGE;
        cc.serialized_key   := FALSE;
        cc.kind             := ALIVE;
        cc.instance         := kh1;
        cc.payload          := gen_payload(kh1,10);
        cc.seq_nr           := gen_sn(24);
        cc.src_timestamp    := gen_duration(24,0);
        
        Log("W0,W3: DDS Operation WRITE [TS 24s, Instance 1, Aligned Payload]", INFO);
        Log("W0,W3: REJECTED [MAX_SAMPLES exceeded, MAX_INSTANCES exceeded]", DEBUG);
        dds            := DEFAULT_DDS_WRITER_TEST;
        dds.opcode     := WRITE;
        dds.cc         := cc;
        dds.cc.instance:= HANDLE_NIL;
        dds.ret_code   := RETCODE_OUT_OF_RESOURCES;
        -- WRITER 0
        ind <= 0;
        start_dds;
        wait_on_sig(dds_done);
        -- WRITER 3
        ind <= 3;
        start_dds;
        wait_on_sig(dds_done);
        wait_on_idle;
        
        Log("W0,W3: RTPS Operation ACK_CACHE_CHANGE SN 20", INFO);
        rtps            := DEFAULT_RTPS_WRITER_TEST;
        rtps.opcode     := ACK_CACHE_CHANGE;
        rtps.cc.seq_nr  := gen_sn(20);
        -- WRITER 0
        ind <= 0;
        start_rtps;
        wait_on_sig(rtps_done);
        -- WRITER 3
        ind <= 3;
        start_rtps;
        wait_on_sig(rtps_done);
        wait_on_idle;
        
        -- TEST: REMOVE STALE INSTANCE WITH 0 SAMPLES
        -- TEST: ADD SAMPLE ON MAX_SAMPLES & MAX_INSTANCES [UNKNOWN INSTANCE,WITH STALE INSTANCE, WITH ACKed SAMPLE]
        
        Log("W0,W3: DDS Operation WRITE [TS 24s, Instance 1, Aligned Payload]", INFO);
        Log("W0,W3: ACCEPTED", DEBUG);
        dds            := DEFAULT_DDS_WRITER_TEST;
        dds.opcode     := WRITE;
        dds.cc         := cc;
        dds.cc.instance:= HANDLE_NIL;
        dds.ret_code   := RETCODE_OK;
        -- WRITER 0
        ind <= 0;
        start_dds;
        wait_on_sig(dds_done);
        -- WRITER 3
        ind <= 3;
        start_dds;
        wait_on_sig(dds_done);
        wait_on_idle;
        cc2 := cc;
        -- WRITER 0
        AlertIf(empty_sample_head(0) /= 44, "Sample Memory Empty List Head incorrect", FAILURE);
        AlertIf(empty_payload_head(0) /= 33, "Payload Memory Empty List Head incorrect", FAILURE);
        AlertIf(empty_inst_head(0) /= 26, "Instance Memory Empty List Head incorrect", FAILURE);
        -- SAMPLE MEMORY:      22(I3S18),11(I2S22),0(I3S23),33(I1S24)/44
        -- PAYLOAD MEMORY:     11(I3S18),44(I2S22),0(I3S23),22(I1S24)/33
        -- INSTANCE MEMORY:    0(I1),18(I2),9(I3)/-
        -- WRITER 3
        AlertIf(empty_sample_head(3) /= 0, "Sample Memory Empty List Head incorrect", FAILURE);
        AlertIf(empty_payload_head(3) /= 0, "Payload Memory Empty List Head incorrect", FAILURE);
        AlertIf(empty_inst_head(3) /= 26, "Instance Memory Empty List Head incorrect", FAILURE);
        -- SAMPLE MEMORY:      11(I2S18),22(I2S21),33(I1S22)/0
        -- PAYLOAD MEMORY:     11(I2S18),22(I2S21),33(I1S22)/0
        -- INSTANCE MEMORY:    0(I1),18(I3),9(I2)/-
        
        Log("W0,W3: RTPS Operation ACK_CACHE_CHANGE SN 22", INFO);
        rtps            := DEFAULT_RTPS_WRITER_TEST;
        rtps.opcode     := ACK_CACHE_CHANGE;
        rtps.cc.seq_nr  := gen_sn(22);
        -- WRITER 0
        ind <= 0;
        start_rtps;
        wait_on_sig(rtps_done);
        -- WRITER 3
        ind <= 3;
        start_rtps;
        wait_on_sig(rtps_done);
        wait_on_idle;
        
        -- TEST: NORMAL NACK_CACHE_CHANGE
        
        Log("W0,W3: RTPS Operation NACK_CACHE_CHANGE SN 22", INFO);
        rtps            := DEFAULT_RTPS_WRITER_TEST;
        rtps.opcode     := NACK_CACHE_CHANGE;
        rtps.cc.seq_nr  := gen_sn(22);
        -- WRITER 0
        ind <= 0;
        start_rtps;
        wait_on_sig(rtps_done);
        -- WRITER 3
        ind <= 3;
        start_rtps;
        wait_on_sig(rtps_done);
        wait_on_idle;
        
        cc                  := DEFAULT_CACHE_CHANGE;
        cc.serialized_key   := FALSE;
        cc.kind             := ALIVE;
        cc.instance         := kh4;
        cc.payload          := gen_payload(kh4,10);
        cc.seq_nr           := gen_sn(25);
        cc.src_timestamp    := gen_duration(25,0);
        
        Log("W0,W3: DDS Operation REGISTER_INSTANCE 4", INFO);
        Log("W0,W3: REJECTED [MAX_INSTANCES exceeded]", DEBUG);
        dds            := DEFAULT_DDS_WRITER_TEST;
        dds.opcode     := REGISTER_INSTANCE;
        dds.cc         := cc;
        dds.cc.instance:= HANDLE_NIL;
        -- WRITER 0
        ind <= 0;
        start_dds;
        wait_on_sig(dds_done);
        -- WRITER 3
        ind <= 3;
        start_dds;
        wait_on_sig(dds_done);
        wait_on_idle;
        
        Log("W0,W3: RTPS Operation ACK_CACHE_CHANGE SN 22", INFO);
        rtps            := DEFAULT_RTPS_WRITER_TEST;
        rtps.opcode     := ACK_CACHE_CHANGE;
        rtps.cc.seq_nr  := gen_sn(22);
        -- WRITER 0
        ind <= 0;
        start_rtps;
        wait_on_sig(rtps_done);
        -- WRITER 3
        ind <= 3;
        start_rtps;
        wait_on_sig(rtps_done);
        wait_on_idle;
        
        -- TEST: REGISTER ON UNREGISTERED INSTANCE
        
        Log("W0,W3: DDS Operation REGISTER_INSTANCE 2", INFO);
        Log("W0,W3: ACCEPTED", DEBUG);
        dds            := DEFAULT_DDS_WRITER_TEST;
        dds.opcode     := REGISTER_INSTANCE;
        dds.cc         := cc1;
        dds.ret_code   := RETCODE_OK;
        -- WRITER 0
        ind <= 0;
        start_dds;
        wait_on_sig(dds_done);
        -- WRITER 3
        ind <= 3;
        start_dds;
        wait_on_sig(dds_done);
        wait_on_idle;
        
        Log("W0,W3: DDS Operation REGISTER_INSTANCE 4", INFO);
        Log("W0,W3: REJECTED [MAX_INSTANCES exceeded]", DEBUG);
        dds            := DEFAULT_DDS_WRITER_TEST;
        dds.opcode     := REGISTER_INSTANCE;
        dds.cc         := cc;
        dds.cc.instance:= HANDLE_NIL;
        -- WRITER 0
        ind <= 0;
        start_dds;
        wait_on_sig(dds_done);
        -- WRITER 3
        ind <= 3;
        start_dds;
        wait_on_sig(dds_done);
        wait_on_idle;
        
        Log("W0,W3: RTPS Operation ACK_CACHE_CHANGE SN 18", INFO);
        rtps            := DEFAULT_RTPS_WRITER_TEST;
        rtps.opcode     := ACK_CACHE_CHANGE;
        rtps.cc.seq_nr  := gen_sn(18);
        -- WRITER 0
        ind <= 0;
        start_rtps;
        wait_on_sig(rtps_done);
        -- WRITER 3
        ind <= 3;
        start_rtps;
        wait_on_sig(rtps_done);
        wait_on_idle;
        
        Log("W0,W3: RTPS Operation ACK_CACHE_CHANGE SN 23", INFO);
        Log("W3: INVALID", DEBUG);
        rtps            := DEFAULT_RTPS_WRITER_TEST;
        rtps.opcode     := ACK_CACHE_CHANGE;
        rtps.cc.seq_nr  := gen_sn(23);
        -- WRITER 0
        ind <= 0;
        start_rtps;
        wait_on_sig(rtps_done);
        -- WRITER 3
        rtps.ret_code  := INVALID;
        ind <= 3;
        start_rtps;
        wait_on_sig(rtps_done);
        wait_on_idle;
        
        cc                  := DEFAULT_CACHE_CHANGE;
        cc.serialized_key   := FALSE;
        cc.kind             := ALIVE;
        cc.instance         := kh3;
        cc.payload          := gen_payload(kh3,10);
        cc.seq_nr           := gen_sn(25);
        cc.src_timestamp    := gen_duration(25,0);
        
        -- TEST: WRITE ON UNREGISTERED INSTANCE
        
        Log("W0,W3: DDS Operation WRITE [TS 25s, Instance 3, Aligned Payload]", INFO);
        Log("W0,W3: ACCEPTED", DEBUG);
        dds            := DEFAULT_DDS_WRITER_TEST;
        dds.opcode     := WRITE;
        dds.cc         := cc;
        dds.cc.instance:= HANDLE_NIL;
        dds.ret_code   := RETCODE_OK;
        -- WRITER 0
        ind <= 0;
        start_dds;
        wait_on_sig(dds_done);
        -- WRITER 3
        ind <= 3;
        start_dds;
        wait_on_sig(dds_done);
        wait_on_idle;
        cc3 := cc;
        -- WRITER 0
        AlertIf(empty_sample_head(0) /= 22, "Sample Memory Empty List Head incorrect", FAILURE);
        AlertIf(empty_payload_head(0) /= 11, "Payload Memory Empty List Head incorrect", FAILURE);
        AlertIf(empty_inst_head(0) /= 26, "Instance Memory Empty List Head incorrect", FAILURE);
        -- SAMPLE MEMORY:      11(I2S22),0(I3S23),33(I1S24),44(I3S25)/22
        -- PAYLOAD MEMORY:     44(I2S22),0(I3S23),22(I1S24),33(I3S25)/11
        -- INSTANCE MEMORY:    0(I1),18(I2),9(I3)/-
        -- WRITER 3
        AlertIf(empty_sample_head(3) /= 11, "Sample Memory Empty List Head incorrect", FAILURE);
        AlertIf(empty_payload_head(3) /= 11, "Payload Memory Empty List Head incorrect", FAILURE);
        AlertIf(empty_inst_head(3) /= 26, "Instance Memory Empty List Head incorrect", FAILURE);
        -- SAMPLE MEMORY:      22(I2S21),33(I1S22),0(I3S23)/11
        -- PAYLOAD MEMORY:     22(I2S21),33(I1S22),0(I3S23)/11
        -- INSTANCE MEMORY:    0(I1),18(I3),9(I2)/-
        
        cc                  := DEFAULT_CACHE_CHANGE;
        cc.serialized_key   := FALSE;
        cc.kind             := ALIVE;
        cc.instance         := kh4;
        cc.payload          := gen_payload(kh4,10);
        cc.seq_nr           := gen_sn(26);
        cc.src_timestamp    := gen_duration(26,0);
        
        Log("W0,W3: DDS Operation REGISTER_INSTANCE 4", INFO);
        Log("W0,W3: REJECTED [MAX_INSTANCES exceeded]", DEBUG);
        dds            := DEFAULT_DDS_WRITER_TEST;
        dds.opcode     := REGISTER_INSTANCE;
        dds.cc         := cc;
        -- WRITER 0
        dds.cc.instance:= HANDLE_NIL;
        ind <= 0;
        start_dds;
        wait_on_sig(dds_done);
        -- WRITER 3
        ind <= 3;
        start_dds;
        wait_on_sig(dds_done);
        wait_on_idle;
        
        cc                  := DEFAULT_CACHE_CHANGE;
        cc.serialized_key   := FALSE;
        cc.kind             := NOT_ALIVE_UNREGISTERED;
        cc.instance         := kh4;
        cc.payload          := gen_payload(kh4,5);
        cc.seq_nr           := gen_sn(26);
        cc.src_timestamp    := gen_duration(26,0);
        
        -- TEST: UNREGISTER UNKNOWN INSTANCE
        
        Log("W0,W3: DDS Operation UNREGISTER_INSTANCE [TS 26s, HANDLE_NIL, Instance 4]", INFO);
        Log("W0,W3: IGNORED", DEBUG);
        dds            := DEFAULT_DDS_WRITER_TEST;
        dds.opcode     := UNREGISTER_INSTANCE;
        dds.cc         := cc;
        dds.cc.instance:= HANDLE_NIL;
        dds.ret_code   := RETCODE_OK;
        -- WRITER 0
        ind <= 0;
        start_dds;
        wait_on_sig(dds_done);
        -- WRITER 3
        ind <= 3;
        start_dds;
        wait_on_sig(dds_done);
        wait_on_idle;
        
        Log("W0,W3: RTPS Operation NACK_CACHE_CHANGE SN 22", INFO);
        rtps            := DEFAULT_RTPS_WRITER_TEST;
        rtps.opcode     := NACK_CACHE_CHANGE;
        rtps.cc.seq_nr  := gen_sn(22);
        -- WRITER 0
        ind <= 0;
        start_rtps;
        wait_on_sig(rtps_done);
        -- WRITER 3
        ind <= 3;
        start_rtps;
        wait_on_sig(rtps_done);
        wait_on_idle;
        
        Log("W0,W3: RTPS Operation NACK_CACHE_CHANGE SN 23", INFO);
        rtps            := DEFAULT_RTPS_WRITER_TEST;
        rtps.opcode     := NACK_CACHE_CHANGE;
        rtps.cc.seq_nr  := gen_sn(23);
        -- WRITER 0
        ind <= 0;
        start_rtps;
        wait_on_sig(rtps_done);
        -- WRITER 3
        ind <= 3;
        start_rtps;
        wait_on_sig(rtps_done);
        wait_on_idle;
        
        cc                  := DEFAULT_CACHE_CHANGE;
        cc.serialized_key   := TRUE;
        cc.kind             := NOT_ALIVE_UNREGISTERED;
        cc.instance         := kh3;
        cc.payload          := gen_payload(kh3,5);
        cc.seq_nr           := gen_sn(26);
        cc.src_timestamp    := gen_duration(26,0);
        
        -- TEST: ADD SAMPLE ON MAX_SAMPLES & MAX_SAMPLES_PER_INSTANCE [KNOWN INSTANCE,WITHOUT ACKed SAMPLES]
        
        Log("W0,W3: DDS Operation UNREGISTER_INSTANCE [TS 26s, Instance 3]", INFO);
        Log("W0: REJECTED [MAX_SAMPLES_PER_INSTANCE exceeded, MAX_SAMPLES exceeded]", DEBUG);
        Log("W3: REJECTED [MAX_SAMPLES exceeded]", DEBUG);
        dds            := DEFAULT_DDS_WRITER_TEST;
        dds.opcode     := UNREGISTER_INSTANCE;
        dds.cc         := cc;
        dds.ret_code   := RETCODE_OUT_OF_RESOURCES;
        -- WRITER 0
        ind <= 0;
        start_dds;
        wait_on_sig(dds_done);
        -- WRITER 3
        ind <= 3;
        start_dds;
        wait_on_sig(dds_done);
        wait_on_idle;
        
        Log("W0,W3: RTPS Operation ACK_CACHE_CHANGE SN 22", INFO);
        rtps            := DEFAULT_RTPS_WRITER_TEST;
        rtps.opcode     := ACK_CACHE_CHANGE;
        rtps.cc.seq_nr  := gen_sn(22);
        -- WRITER 0
        ind <= 0;
        start_rtps;
        wait_on_sig(rtps_done);
        -- WRITER 3
        ind <= 3;
        start_rtps;
        wait_on_sig(rtps_done);
        wait_on_idle;
        
        -- TEST: ADD SAMPLE ON MAX_SAMPLES & MAX_SAMPLES_PER_INSTANCE [KNOWN INSTANCE,WITH ACKed SAMPLES, WITHOUT ACKed INSTANCE SAMPLES]
        
        Log("W0,W3: DDS Operation UNREGISTER_INSTANCE [TS 26s, Instance 3]", INFO);
        Log("W0: REJECTED [MAX_SAMPLES_PER_INSTANCE exceeded, MAX_SAMPLES exceeded]", DEBUG);
        Log("W3: ACCEPTED", DEBUG);
        dds            := DEFAULT_DDS_WRITER_TEST;
        dds.opcode     := UNREGISTER_INSTANCE;
        dds.cc         := cc;
        -- WRITER 0
        dds.ret_code   := RETCODE_OUT_OF_RESOURCES;
        ind <= 0;
        start_dds;
        wait_on_sig(dds_done);
        -- WRITER 3
        dds.ret_code   := RETCODE_OK;
        ind <= 3;
        start_dds;
        wait_on_sig(dds_done);
        wait_on_idle;
        -- WRITER 3
        AlertIf(empty_sample_head(3) /= 33, "Sample Memory Empty List Head incorrect", FAILURE);
        AlertIf(empty_payload_head(3) /= 33, "Payload Memory Empty List Head incorrect", FAILURE);
        AlertIf(empty_inst_head(3) /= 26, "Instance Memory Empty List Head incorrect", FAILURE);
        -- SAMPLE MEMORY:      22(I2S21),0(I3S23),11(I3S24)/33
        -- PAYLOAD MEMORY:     22(I2S21),0(I3S23),11(I3S24)/33
        -- INSTANCE MEMORY:    0(I1),18(I3),9(I2)/-
        
        Log("W0,W3: RTPS Operation ACK_CACHE_CHANGE SN 23", INFO);
        rtps            := DEFAULT_RTPS_WRITER_TEST;
        rtps.opcode     := ACK_CACHE_CHANGE;
        rtps.cc.seq_nr  := gen_sn(23);
        -- WRITER 0
        ind <= 0;
        start_rtps;
        wait_on_sig(rtps_done);
        -- WRITER 3
        ind <= 3;
        start_rtps;
        wait_on_sig(rtps_done);
        wait_on_idle;
        
        -- TEST: ADD SAMPLE ON MAX_SAMPLES & MAX_SAMPLES_PER_INSTANCE [KNOWN INSTANCE,WITH ACKed INSTANCE SAMPLES]
        
        Log("W0: DDS Operation UNREGISTER_INSTANCE [TS 26s, Instance 3]", INFO);
        Log("W0: ACCEPTED", DEBUG);
        dds            := DEFAULT_DDS_WRITER_TEST;
        dds.opcode     := UNREGISTER_INSTANCE;
        dds.cc         := cc;
        dds.ret_code   := RETCODE_OK;
        -- WRITER 0
        ind <= 0;
        start_dds;
        wait_on_sig(dds_done);
        wait_on_idle;
        cc4 := cc;
        -- WRITER 0
        AlertIf(empty_sample_head(0) /= 0, "Sample Memory Empty List Head incorrect", FAILURE);
        AlertIf(empty_payload_head(0) /= 0, "Payload Memory Empty List Head incorrect", FAILURE);
        AlertIf(empty_inst_head(0) /= 26, "Instance Memory Empty List Head incorrect", FAILURE);
        -- SAMPLE MEMORY:      11(I2S22),33(I1S24),44(I3S25),22(I3S26)/0
        -- PAYLOAD MEMORY:     44(I2S22),22(I1S24),33(I3S25),11(I3S26)/0
        -- INSTANCE MEMORY:    0(I1),18(I2),9(I3)/-
        
        Log("W0,W3: RTPS Operation ACK_CACHE_CHANGE SN 25", INFO);
        rtps            := DEFAULT_RTPS_WRITER_TEST;
        rtps.opcode     := ACK_CACHE_CHANGE;
        rtps.cc.seq_nr  := gen_sn(25);
        -- WRITER 0
        ind <= 0;
        start_rtps;
        wait_on_sig(rtps_done);
        -- WRITER 3
        rtps.ret_code  := INVALID;
        ind <= 3;
        start_rtps;
        wait_on_sig(rtps_done);
        wait_on_idle;
        
        cc                  := DEFAULT_CACHE_CHANGE;
        cc.serialized_key   := TRUE;
        cc.kind             := NOT_ALIVE_DISPOSED;
        cc.instance         := kh3;
        cc.payload          := gen_payload(kh3,5);
        cc.seq_nr           := gen_sn(27);
        cc.src_timestamp    := gen_duration(27,0);
        
        -- TEST: DISPOSE ON UNREGISTERED INSTANCE
        
        Log("W0,W3: DDS Operation DISPOSE [TS 27s, Instance 3]", INFO);
        Log("W0,W3: ACCEPTED", DEBUG);
        dds            := DEFAULT_DDS_WRITER_TEST;
        dds.opcode     := DISPOSE;
        dds.cc         := cc;
        dds.ret_code   := RETCODE_OK;
        -- WRITER 0
        ind <= 0;
        start_dds;
        wait_on_sig(dds_done);
        -- WRITER 3
        ind <= 3;
        start_dds;
        wait_on_sig(dds_done);
        wait_on_idle;
        cc3 := cc;
        -- WRITER 0
        AlertIf(empty_sample_head(0) /= 44, "Sample Memory Empty List Head incorrect", FAILURE);
        AlertIf(empty_payload_head(0) /= 33, "Payload Memory Empty List Head incorrect", FAILURE);
        AlertIf(empty_inst_head(0) /= 26, "Instance Memory Empty List Head incorrect", FAILURE);
        -- SAMPLE MEMORY:      11(I2S22),33(I1S24),22(I3S26),0(I3S27)/44
        -- PAYLOAD MEMORY:     44(I2S22),22(I1S24),11(I3S26),0(I3S27)/33
        -- INSTANCE MEMORY:    0(I1),18(I2),9(I3)/-
        -- WRITER 3
        AlertIf(empty_sample_head(3) /= 0, "Sample Memory Empty List Head incorrect", FAILURE);
        AlertIf(empty_payload_head(3) /= 0, "Payload Memory Empty List Head incorrect", FAILURE);
        AlertIf(empty_inst_head(3) /= 26, "Instance Memory Empty List Head incorrect", FAILURE);
        -- SAMPLE MEMORY:      22(I2S21),11(I3S24),33(I3S25)/0
        -- PAYLOAD MEMORY:     22(I2S21),11(I3S24),33(I3S25)/0
        -- INSTANCE MEMORY:    0(I1),18(I3),9(I2)/-
        
        Log("W0,W3: RTPS Operation ACK_CACHE_CHANGE SN 26", INFO);
        Log("W3: INVALID", INFO);
        rtps            := DEFAULT_RTPS_WRITER_TEST;
        rtps.opcode     := ACK_CACHE_CHANGE;
        rtps.cc.seq_nr  := gen_sn(26);
        -- WRITER 0
        ind <= 0;
        start_rtps;
        wait_on_sig(rtps_done);
        -- WRITER 3
        rtps.ret_code  := INVALID;
        ind <= 3;
        start_rtps;
        wait_on_sig(rtps_done);
        wait_on_idle;
        
        Log("W0: RTPS Operation ACK_CACHE_CHANGE SN 27", INFO);
        rtps            := DEFAULT_RTPS_WRITER_TEST;
        rtps.opcode     := ACK_CACHE_CHANGE;
        rtps.cc.seq_nr  := gen_sn(27);
        -- WRITER 0
        ind <= 0;
        start_rtps;
        wait_on_sig(rtps_done);
        wait_on_idle;
        
        cc                  := DEFAULT_CACHE_CHANGE;
        cc.serialized_key   := FALSE;
        cc.kind             := ALIVE;
        cc.instance         := kh4;
        cc.payload          := gen_payload(kh4,10);
        cc.seq_nr           := gen_sn(28);
        cc.src_timestamp    := gen_duration(28,0);
        
        Log("W0,W3: DDS Operation REGISTER_INSTANCE 4", INFO);
        Log("W0: ACCEPTED", DEBUG);
        Log("W0: REJECTED [MAX_INSTANCES exceeded]", DEBUG);
        dds            := DEFAULT_DDS_WRITER_TEST;
        dds.opcode     := REGISTER_INSTANCE;
        dds.cc         := cc;
        dds.ret_code   := RETCODE_OK;
        -- WRITER 0
        ind <= 0;
        start_dds;
        wait_on_sig(dds_done);
        -- WRITER 3
        dds.cc.instance := HANDLE_NIL;
        ind <= 3;
        start_dds;
        wait_on_sig(dds_done);
        wait_on_idle;
        -- WRITER 0
        AlertIf(empty_sample_head(0) /= 44, "Sample Memory Empty List Head incorrect", FAILURE);
        AlertIf(empty_payload_head(0) /= 0, "Payload Memory Empty List Head incorrect", FAILURE);
        AlertIf(empty_inst_head(0) /= 26, "Instance Memory Empty List Head incorrect", FAILURE);
        -- SAMPLE MEMORY:      11(I2S22),33(I1S24)/44,22,0
        -- PAYLOAD MEMORY:     44(I2S22),22(I1S24)/0,11,33
        -- INSTANCE MEMORY:    9(I4),0(I1),18(I2)/-
        
        -- VALIDATE STATE
        
        Log("W0,W3: RTPS Operation GET_MIN_SN", INFO);
        Log("W0: Expected SN 22", DEBUG);
        Log("W0: Expected SN 21", DEBUG);
        rtps           := DEFAULT_RTPS_WRITER_TEST;
        rtps.opcode    := GET_MIN_SN;
        -- WRITER 0
        rtps.cc.seq_nr := gen_sn(22);
        ind <= 0;
        start_rtps;
        wait_on_sig(rtps_done);
        -- WRITER 3
        rtps.cc.seq_nr := gen_sn(21);
        ind <= 3;
        start_rtps;
        wait_on_sig(rtps_done);
        wait_on_idle;
        
        Log("W0,W3: RTPS Operation GET_MAX_SN", INFO);
        Log("W0: Expected SN 24", DEBUG);
        Log("W3: Expected SN 25", DEBUG);
        rtps           := DEFAULT_RTPS_WRITER_TEST;
        rtps.opcode    := GET_MAX_SN;
        -- WRITER 0
        rtps.cc.seq_nr := gen_sn(24);
        ind <= 0;
        start_rtps;
        wait_on_sig(rtps_done);
        -- WRITER 3
        rtps.cc.seq_nr := gen_sn(25);
        ind <= 3;
        start_rtps;
        wait_on_sig(rtps_done);
        wait_on_idle;
        
        Log("W0,W3: RTPS Operation GET_CACHE_CHANGE SN 22", INFO);
        Log("W3: INVALID", DEBUG);
        rtps           := DEFAULT_RTPS_WRITER_TEST;
        rtps.opcode    := GET_CACHE_CHANGE;
        rtps.cc        := cc1;
        -- WRITER 0
        ind <= 0;
        start_rtps;
        wait_on_sig(rtps_done);
        -- WRITER 3
        rtps.ret_code  := INVALID;
        ind <= 3;
        start_rtps;
        wait_on_sig(rtps_done);
        wait_on_idle;
        
        Log("W0,W3: RTPS Operation GET_CACHE_CHANGE SN 24", INFO);
        rtps           := DEFAULT_RTPS_WRITER_TEST;
        rtps.opcode    := GET_CACHE_CHANGE;
        -- WRITER 0
        rtps.cc        := cc2;
        ind <= 0;
        start_rtps;
        wait_on_sig(rtps_done);
        -- WRITER 3
        rtps.cc         := cc4;
        rtps.cc.seq_nr  := gen_sn(24);
        ind <= 3;
        start_rtps;
        wait_on_sig(rtps_done);
        wait_on_idle;
        
        Log("W0: RTPS Operation NACK_CACHE_CHANGE SN 22", INFO);
        rtps            := DEFAULT_RTPS_WRITER_TEST;
        rtps.opcode     := NACK_CACHE_CHANGE;
        rtps.cc.seq_nr  := gen_sn(22);
        -- WRITER 0
        ind <= 0;
        start_rtps;
        wait_on_sig(rtps_done);
        wait_on_idle;
        
        Log("W0,W3: RTPS Operation NACK_CACHE_CHANGE SN 24", INFO);
        rtps            := DEFAULT_RTPS_WRITER_TEST;
        rtps.opcode     := NACK_CACHE_CHANGE;
        rtps.cc.seq_nr  := gen_sn(24);
        -- WRITER 0
        ind <= 0;
        start_rtps;
        wait_on_sig(rtps_done);
        -- WRITER 3
        ind <= 3;
        start_rtps;
        wait_on_sig(rtps_done);
        wait_on_idle;
        
        Log("W0,W3: DDS Operation WRITE [TS 28s, Instance 4, Aligned Payload]", INFO);
        Log("W0: ACCEPTED", DEBUG);
        Log("W3: REJECTED [BAD PARAMETER, Instance 4 not registered]", DEBUG);
        dds            := DEFAULT_DDS_WRITER_TEST;
        dds.opcode     := WRITE;
        dds.cc         := cc;
        -- WRITER 0
        dds.ret_code   := RETCODE_OK;
        ind <= 0;
        start_dds;
        wait_on_sig(dds_done);
        -- WRITER 3
        dds.ret_code   := RETCODE_BAD_PARAMETER;
        ind <= 3;
        start_dds;
        wait_on_sig(dds_done);
        wait_on_idle;
        cc3 := cc;
        -- WRITER 0
        AlertIf(empty_sample_head(0) /= 22, "Sample Memory Empty List Head incorrect", FAILURE);
        AlertIf(empty_payload_head(0) /= 11, "Payload Memory Empty List Head incorrect", FAILURE);
        AlertIf(empty_inst_head(0) /= 26, "Instance Memory Empty List Head incorrect", FAILURE);
        -- SAMPLE MEMORY:      11(I2S22),33(I1S24),44(I4S28)/22,0
        -- PAYLOAD MEMORY:     44(I2S22),22(I1S24),0(I4S28)/11,33
        -- INSTANCE MEMORY:    9(I4),0(I1),18(I2)/-
        
        cc                  := DEFAULT_CACHE_CHANGE;
        cc.serialized_key   := FALSE;
        cc.kind             := ALIVE;
        cc.instance         := kh2;
        cc.payload          := gen_payload(kh2,10);
        cc.seq_nr           := gen_sn(29);
        cc.src_timestamp    := gen_duration(29,0);
        
        Log("W0,W3: DDS Operation WRITE [TS 29s, Instance 2, Aligned Payload]", INFO);
        Log("W0: ACCEPTED", DEBUG);
        Log("W3: REJECTED [MAX_INSTANCES exceeded, MAX_SAMPLES exceeded]", DEBUG);
        dds            := DEFAULT_DDS_WRITER_TEST;
        dds.opcode     := WRITE;
        dds.cc         := cc;
        -- WRITER 0
        dds.ret_code   := RETCODE_OK;
        ind <= 0;
        start_dds;
        wait_on_sig(dds_done);
        -- WRITER 3
        dds.ret_code   := RETCODE_OUT_OF_RESOURCES;
        ind <= 3;
        start_dds;
        wait_on_sig(dds_done);
        wait_on_idle;
        cc4 := cc;
        -- WRITER 0
        AlertIf(empty_sample_head(0) /= 0, "Sample Memory Empty List Head incorrect", FAILURE);
        AlertIf(empty_payload_head(0) /= 33, "Payload Memory Empty List Head incorrect", FAILURE);
        AlertIf(empty_inst_head(0) /= 26, "Instance Memory Empty List Head incorrect", FAILURE);
        -- SAMPLE MEMORY:      11(I2S22),33(I1S24),44(I4S28),22(I2S29)/0
        -- PAYLOAD MEMORY:     44(I2S22),22(I1S24),0(I4S28),11(I2S29)/33
        -- INSTANCE MEMORY:    9(I4),0(I1),18(I2)/-
        
        Log("W0,W3: RTPS Operation ACK_CACHE_CHANGE SN 24", INFO);
        rtps            := DEFAULT_RTPS_WRITER_TEST;
        rtps.opcode     := ACK_CACHE_CHANGE;
        rtps.cc.seq_nr  := gen_sn(24);
        -- WRITER 0
        ind <= 0;
        start_rtps;
        wait_on_sig(rtps_done);
        -- WRITER 3
        ind <= 3;
        start_rtps;
        wait_on_sig(rtps_done);
        wait_on_idle;
        
        Log("W0,W3: RTPS Operation ACK_CACHE_CHANGE SN 28", INFO);
        Log("W3: INVALID", DEBUG);
        rtps            := DEFAULT_RTPS_WRITER_TEST;
        rtps.opcode     := ACK_CACHE_CHANGE;
        rtps.cc.seq_nr  := gen_sn(28);
        -- WRITER 0
        ind <= 0;
        start_rtps;
        wait_on_sig(rtps_done);
        -- WRITER 3
        rtps.ret_code  := INVALID;
        ind <= 3;
        start_rtps;
        wait_on_sig(rtps_done);
        wait_on_idle;
        
        cc                  := DEFAULT_CACHE_CHANGE;
        cc.serialized_key   := FALSE;
        cc.kind             := ALIVE;
        cc.instance         := kh1;
        cc.payload          := gen_payload(kh1,10);
        cc.seq_nr           := gen_sn(30);
        cc.src_timestamp    := gen_duration(30,0);
        
        -- TEST: ADD SAMPLE ON MAX_SAMPLES [KNOWN INSTANCE,WITH ACKed SAMPLES (>1)]
        
        Log("W0,W3: DDS Operation WRITE [TS 30s, Instance 1, Aligned Payload]", INFO);
        Log("W0,W3: ACCEPTED", DEBUG);
        dds            := DEFAULT_DDS_WRITER_TEST;
        dds.opcode     := WRITE;
        dds.cc         := cc;
        dds.ret_code   := RETCODE_OK;
        -- WRITER 0
        ind <= 0;
        start_dds;
        wait_on_sig(dds_done);
        -- WRITER 3
        ind <= 3;
        start_dds;
        wait_on_sig(dds_done);
        wait_on_idle;
        cc2 := cc;
        -- WRITER 0
        AlertIf(empty_sample_head(0) /= 33, "Sample Memory Empty List Head incorrect", FAILURE);
        AlertIf(empty_payload_head(0) /= 22, "Payload Memory Empty List Head incorrect", FAILURE);
        AlertIf(empty_inst_head(0) /= 26, "Instance Memory Empty List Head incorrect", FAILURE);
        -- SAMPLE MEMORY:      11(I2S22),44(I4S28),22(I2S29),0(I1S30)/33
        -- PAYLOAD MEMORY:     44(I2S22),0(I4S28),11(I2S29),33(I1S30)/22
        -- INSTANCE MEMORY:    9(I4),0(I1),18(I2)/-
        -- WRITER 3
        AlertIf(empty_sample_head(3) /= 11, "Sample Memory Empty List Head incorrect", FAILURE);
        AlertIf(empty_payload_head(3) /= 11, "Payload Memory Empty List Head incorrect", FAILURE);
        AlertIf(empty_inst_head(3) /= 26, "Instance Memory Empty List Head incorrect", FAILURE);
        -- SAMPLE MEMORY:      22(I2S21),33(I3S25),0(I1S26)/11
        -- PAYLOAD MEMORY:     22(I2S21),33(I3S25),0(I1S26)/11
        -- INSTANCE MEMORY:    0(I1),18(I3),9(I2)/-
        
        Log("W0: RTPS Operation REMOVE_CACHE_CHANGE SN 28", INFO);
        rtps            := DEFAULT_RTPS_WRITER_TEST;
        rtps.opcode     := REMOVE_CACHE_CHANGE;
        rtps.cc.seq_nr  := gen_sn(28);
        -- WRITER 0
        ind <= 0;
        start_rtps;
        wait_on_sig(rtps_done);
        wait_on_idle;
        AlertIf(empty_sample_head(0) /= 33, "Sample Memory Empty List Head incorrect", FAILURE);
        AlertIf(empty_payload_head(0) /= 0, "Payload Memory Empty List Head incorrect", FAILURE);
        AlertIf(empty_inst_head(0) /= 26, "Instance Memory Empty List Head incorrect", FAILURE);
        -- SAMPLE MEMORY:      11(I2S22),22(I2S29),0(I1S30)/33,44
        -- PAYLOAD MEMORY:     44(I2S22),11(I2S29),33(I1S30)/0,22
        -- INSTANCE MEMORY:    9(I4),0(I1),18(I2)/-
        
        Log("W0: RTPS Operation ACK_CACHE_CHANGE SN 22", INFO);
        rtps            := DEFAULT_RTPS_WRITER_TEST;
        rtps.opcode     := ACK_CACHE_CHANGE;
        rtps.cc.seq_nr  := gen_sn(22);
        -- WRITER 0
        ind <= 0;
        start_rtps;
        wait_on_sig(rtps_done);
        wait_on_idle;
        
        Log("W0: RTPS Operation ACK_CACHE_CHANGE SN 29", INFO);
        rtps            := DEFAULT_RTPS_WRITER_TEST;
        rtps.opcode     := ACK_CACHE_CHANGE;
        rtps.cc.seq_nr  := gen_sn(29);
        -- WRITER 0
        ind <= 0;
        start_rtps;
        wait_on_sig(rtps_done);
        wait_on_idle;
        
        cc                  := DEFAULT_CACHE_CHANGE;
        cc.serialized_key   := FALSE;
        cc.kind             := ALIVE;
        cc.instance         := kh2;
        cc.payload          := gen_payload(kh2,10);
        cc.seq_nr           := gen_sn(31);
        cc.src_timestamp    := gen_duration(31,0);
        
        -- TEST: ADD SAMPLE ON MAX_SAMPLES_PER_INSTANCE [KNOWN INSTANCE, WITH ACKed INSTANCE SAMPLES(>1)]
        
        Log("W0,W3: DDS Operation WRITE [TS 31s, Instance 2, Aligned Payload]", INFO);
        Log("W0: ACCEPTED", DEBUG);
        Log("W3: REJECTED [MAX_SAMPLES exceeded]", DEBUG);
        dds            := DEFAULT_DDS_WRITER_TEST;
        dds.opcode     := WRITE;
        dds.cc         := cc;
        -- WRITER 0
        dds.ret_code   := RETCODE_OK;
        ind <= 0;
        start_dds;
        wait_on_sig(dds_done);
        -- WRITER 3
        dds.ret_code   := RETCODE_OUT_OF_RESOURCES;
        ind <= 3;
        start_dds;
        wait_on_sig(dds_done);
        wait_on_idle;
        cc1 := cc;
        AlertIf(empty_sample_head(0) /= 44, "Sample Memory Empty List Head incorrect", FAILURE);
        AlertIf(empty_payload_head(0) /= 44, "Payload Memory Empty List Head incorrect", FAILURE);
        AlertIf(empty_inst_head(0) /= 26, "Instance Memory Empty List Head incorrect", FAILURE);
        -- SAMPLE MEMORY:      22(I2S29),0(I1S30),33(I2S31)/44,11
        -- PAYLOAD MEMORY:     11(I2S29),33(I1S30),0(I2S31)/44,22
        -- INSTANCE MEMORY:    9(I4),0(I1),18(I2)/-
        
        -- VALIDATE STATE
        
        Log("W0,W3: RTPS Operation GET_MIN_SN", INFO);
        Log("W0: Expected SN 29", DEBUG);
        Log("W3: Expected SN 21", DEBUG);
        rtps           := DEFAULT_RTPS_WRITER_TEST;
        rtps.opcode    := GET_MIN_SN;
        -- WRITER 0
        rtps.cc.seq_nr := gen_sn(29);
        ind <= 0;
        start_rtps;
        wait_on_sig(rtps_done);
        -- WRITER 3
        rtps.cc.seq_nr := gen_sn(21);
        ind <= 3;
        start_rtps;
        wait_on_sig(rtps_done);
        wait_on_idle;
        
        Log("W0: RTPS Operation GET_MAX_SN", INFO);
        Log("W0: Expected SN 31", DEBUG);
        Log("W3: Expected SN 26", DEBUG);
        rtps           := DEFAULT_RTPS_WRITER_TEST;
        rtps.opcode    := GET_MAX_SN;
        -- WRITER 0
        rtps.cc.seq_nr := gen_sn(31);
        ind <= 0;
        start_rtps;
        wait_on_sig(rtps_done);
        -- WRITER 3
        rtps.cc.seq_nr := gen_sn(26);
        ind <= 3;
        start_rtps;
        wait_on_sig(rtps_done);
        wait_on_idle;
        
        Log("W0: RTPS Operation GET_CACHE_CHANGE SN 29", INFO);
        rtps           := DEFAULT_RTPS_WRITER_TEST;
        rtps.opcode    := GET_CACHE_CHANGE;
        rtps.cc        := cc4;
        -- WRITER 0
        ind <= 0;
        start_rtps;
        wait_on_sig(rtps_done);
        wait_on_idle;
        
        Log("W0: RTPS Operation GET_CACHE_CHANGE SN 30", INFO);
        rtps           := DEFAULT_RTPS_WRITER_TEST;
        rtps.opcode    := GET_CACHE_CHANGE;
        rtps.cc        := cc2;
        -- WRITER 0
        ind <= 0;
        start_rtps;
        wait_on_sig(rtps_done);
        wait_on_idle;
        
        Log("W0: RTPS Operation GET_CACHE_CHANGE SN 31", INFO);
        rtps           := DEFAULT_RTPS_WRITER_TEST;
        rtps.opcode    := GET_CACHE_CHANGE;
        rtps.cc        := cc1;
        -- WRITER 0
        ind <= 0;
        start_rtps;
        wait_on_sig(rtps_done);
        wait_on_idle;
        
        cc                  := DEFAULT_CACHE_CHANGE;
        cc.serialized_key   := FALSE;
        cc.kind             := ALIVE;
        cc.instance         := kh1;
        cc.payload          := gen_payload(kh1,10);
        cc.seq_nr           := gen_sn(1);
        cc.src_timestamp    := gen_duration(1,0);
        
        -- TEST: INSTANCE LOOKUP [KNOWN INSTANCE]
        
        Log("W0,W3: DDS Operation LOOKUP_INSTANCE [Instance 1]", INFO);
        dds            := DEFAULT_DDS_WRITER_TEST;
        dds.opcode     := LOOKUP_INSTANCE;
        dds.cc         := cc;
        dds.ret_code   := RETCODE_OK;
        -- WRITER 0
        ind <= 0;
        start_dds;
        wait_on_sig(dds_done);
        -- WRITER 3
        ind <= 3;
        start_dds;
        wait_on_sig(dds_done);
        wait_on_idle;
        
        cc                  := DEFAULT_CACHE_CHANGE;
        cc.serialized_key   := FALSE;
        cc.kind             := ALIVE;
        cc.instance         := kh3;
        cc.payload          := gen_payload(kh3,10);
        cc.seq_nr           := gen_sn(1);
        cc.src_timestamp    := gen_duration(1,0);
        
        -- TEST: INSTANCE LOOKUP [UNKNOWN INSTANCE]
        
        Log("W0: DDS Operation LOOKUP_INSTANCE [Unknown Instance]", INFO);
        dds            := DEFAULT_DDS_WRITER_TEST;
        dds.opcode     := LOOKUP_INSTANCE;
        dds.cc         := cc;
        dds.cc.instance:= HANDLE_NIL;
        -- WRITER 0
        ind <= 0;
        start_dds;
        wait_on_sig(dds_done);
        wait_on_idle;
        
        -- *WRITER 1*
        Log("*WRITER 1*", INFO);
        AlertIf(empty_sample_head(1) /= 0, "Sample Memory Empty List Head incorrect", FAILURE);
        AlertIf(empty_payload_head(1) /= 0, "Payload Memory Empty List Head incorrect", FAILURE);
        -- SAMPLE MEMORY:      -/0,11,22,33,44
        -- PAYLOAD MEMORY:     -/0,11,22,33,44
        
        -- TEST: GET_MIN_SN/GET_MAX_SN ON EMPTY
        
        Log("W1: RTPS Operation GET_MIN_SN ", INFO);
        Log("W1: Expected SEQUENCENUMBER_UNKNOWN", DEBUG);
        rtps           := DEFAULT_RTPS_WRITER_TEST;
        rtps.opcode    := GET_MIN_SN;
        rtps.cc.seq_nr := SEQUENCENUMBER_UNKNOWN;
        ind <= 1;
        start_rtps;
        wait_on_sig(rtps_done);
        wait_on_idle;
        
        Log("W1: RTPS Operation GET_MAX_SN", INFO);
        Log("W1: Expected SEQUENCENUMBER_UNKNOWN", DEBUG);
        rtps           := DEFAULT_RTPS_WRITER_TEST;
        rtps.opcode    := GET_MAX_SN;
        rtps.cc.seq_nr := SEQUENCENUMBER_UNKNOWN;
        ind <= 1;
        start_rtps;
        wait_on_sig(rtps_done);
        wait_on_idle;
        
        -- TEST: WRITE ALIGNED PAYLOAD
        -- TEST: NORMAL WRITE
        -- TEST: ADD SAMPLE WITH KEY_HASH
        
        cc                  := DEFAULT_CACHE_CHANGE;
        cc.serialized_key   := FALSE;
        cc.kind             := ALIVE;
        cc.instance         := kh1;
        cc.payload          := gen_payload(kh1,10);
        cc.seq_nr           := gen_sn(1);
        cc.src_timestamp    := gen_duration(1,0);
        
        Log("W1: DDS Operation WRITE [TS 1s, Aligned Payload, Key Hash /= HANDLE_NIL]", INFO);
        Log("W1: REJECTED [Key Hash /= HANDLE_NIL]", DEBUG);
        dds            := DEFAULT_DDS_WRITER_TEST;
        dds.opcode     := WRITE;
        dds.cc         := cc;
        dds.ret_code   := RETCODE_BAD_PARAMETER;
        ind <= 1;
        start_dds;
        wait_on_sig(dds_done);
        wait_on_idle;
        
        -- TEST: ADD SAMPLE WITH HANDLE_NIL
        
        Log("W1: DDS Operation WRITE [TS 1s, Aligned Payload]", INFO);
        Log("W1: ACCEPTED", DEBUG);
        dds            := DEFAULT_DDS_WRITER_TEST;
        dds.opcode     := WRITE;
        dds.cc         := cc;
        dds.cc.instance:= HANDLE_NIL;
        dds.ret_code   := RETCODE_OK;
        ind <= 1;
        start_dds;
        wait_on_sig(dds_done);
        wait_on_idle;
        cc1 := cc;
        AlertIf(empty_sample_head(1) /= 11, "Sample Memory Empty List Head incorrect", FAILURE);
        AlertIf(empty_payload_head(1) /= 11, "Payload Memory Empty List Head incorrect", FAILURE);
        -- SAMPLE MEMORY:      0(S1)/11,22,33,44
        -- PAYLOAD MEMORY:     0(S1)/11,22,33,44
        
        -- TEST: GET_MIN_SN/GET_MAX_SN ON 1 SAMPLE
        
        Log("W1: RTPS Operation GET_MIN_SN", INFO);
        Log("W1: Expected SN 1", DEBUG);
        rtps           := DEFAULT_RTPS_WRITER_TEST;
        rtps.opcode    := GET_MIN_SN;
        rtps.cc.seq_nr := gen_sn(1);
        ind <= 1;
        start_rtps;
        wait_on_sig(rtps_done);
        wait_on_idle;
        
        Log("W1: RTPS Operation GET_MAX_SN", INFO);
        Log("W1: Expected SN 1", DEBUG);
        rtps           := DEFAULT_RTPS_WRITER_TEST;
        rtps.opcode    := GET_MAX_SN;
        rtps.cc.seq_nr := gen_sn(1);
        ind <= 1;
        start_rtps;
        wait_on_sig(rtps_done);
        wait_on_idle;
        
        -- TEST: WRITE UNALIGNED PAYLOAD [>1 SLOT]
        
        cc                  := DEFAULT_CACHE_CHANGE;
        cc.serialized_key   := FALSE;
        cc.kind             := ALIVE;
        cc.instance         := kh1;
        cc.payload          := gen_payload(kh1,18);
        cc.seq_nr           := gen_sn(2);
        cc.src_timestamp    := gen_duration(2,0);
        
        Log("W1: DDS Operation WRITE [TS 2s, Unaligned Payload (2 Slots)]", INFO);
        Log("W1: ACCEPTED", DEBUG);
        dds            := DEFAULT_DDS_WRITER_TEST;
        dds.opcode     := WRITE;
        dds.cc         := cc;
        dds.cc.instance:= HANDLE_NIL;
        dds.ret_code   := RETCODE_OK;
        ind <= 1;
        start_dds;
        wait_on_sig(dds_done);
        wait_on_idle;
        cc2 := cc;
        AlertIf(empty_sample_head(1) /= 22, "Sample Memory Empty List Head incorrect", FAILURE);
        AlertIf(empty_payload_head(1) /= 33, "Payload Memory Empty List Head incorrect", FAILURE);
        -- SAMPLE MEMORY:      0(S1),11(S2)/22,33,44
        -- PAYLOAD MEMORY:     0(S1),11(S2),22(S2)/33,44
        
        cc                  := DEFAULT_CACHE_CHANGE;
        cc.serialized_key   := FALSE;
        cc.kind             := ALIVE;
        cc.instance         := kh2;
        cc.payload          := gen_payload(kh2,10);
        cc.seq_nr           := gen_sn(3);
        cc.src_timestamp    := gen_duration(3,0);
        
        -- TEST: NORMAL REGISTER
        
        Log("W1: DDS Operation REGISTER_INSTANCE 2", INFO);
        Log("W1: Illegal Operation", DEBUG);
        dds            := DEFAULT_DDS_WRITER_TEST;
        dds.opcode     := REGISTER_INSTANCE;
        dds.cc         := cc;
        dds.cc.instance:= HANDLE_NIL;
        ind <= 1;
        start_dds;
        wait_on_sig(dds_done);
        wait_on_idle;
        
        -- TEST: NORMAL DISPOSE
        -- TEST: WRITE UNALIGNED PAYLOAD [<1 SLOT]
        
        cc                  := DEFAULT_CACHE_CHANGE;
        cc.serialized_key   := TRUE;
        cc.kind             := NOT_ALIVE_DISPOSED;
        cc.instance         := kh1;
        cc.payload          := gen_payload(kh1,5);
        cc.seq_nr           := gen_sn(3);
        cc.src_timestamp    := gen_duration(3,0);
        
        Log("W1: DDS Operation DISPOSE [TS 3s, Key Hash /= HANDLE_NIL]", INFO);
        Log("W1: REJECTED [Key Hash /= HANDLE_NIL]", DEBUG);
        dds            := DEFAULT_DDS_WRITER_TEST;
        dds.opcode     := DISPOSE;
        dds.cc         := cc;
        dds.ret_code   := RETCODE_BAD_PARAMETER;
        ind <= 1;
        start_dds;
        wait_on_sig(dds_done);
        wait_on_idle;
        
        Log("W1: DDS Operation DISPOSE [TS 3s]", INFO);
        Log("W1: ACCEPTED", DEBUG);
        dds            := DEFAULT_DDS_WRITER_TEST;
        dds.opcode     := DISPOSE;
        dds.cc         := cc;
        dds.cc.instance:= HANDLE_NIL;
        dds.ret_code   := RETCODE_OK;
        ind <= 1;
        start_dds;
        wait_on_sig(dds_done);
        wait_on_idle;
        cc3 := cc;
        AlertIf(empty_sample_head(1) /= 33, "Sample Memory Empty List Head incorrect", FAILURE);
        AlertIf(empty_payload_head(1) /= 44, "Payload Memory Empty List Head incorrect", FAILURE);
        -- SAMPLE MEMORY:      0(S1),11(S2),22(S3)/33,44
        -- PAYLOAD MEMORY:     0(S1),11(S2),22(S2),33(S3)/44
        
        -- TEST: GET_MIN_SN/GET_MAX_SN ON >1 SAMPLE
        
        Log("W1: RTPS Operation GET_MIN_SN", INFO);
        Log("W1: Expected SN 1", DEBUG);
        rtps           := DEFAULT_RTPS_WRITER_TEST;
        rtps.opcode    := GET_MIN_SN;
        rtps.cc.seq_nr := gen_sn(1);
        ind <= 1;
        start_rtps;
        wait_on_sig(rtps_done);
        wait_on_idle;
        
        Log("W1: RTPS Operation GET_MAX_SN", INFO);
        Log("W1: Expected SN 3", DEBUG);
        rtps           := DEFAULT_RTPS_WRITER_TEST;
        rtps.opcode    := GET_MAX_SN;
        rtps.cc.seq_nr := gen_sn(3);
        ind <= 1;
        start_rtps;
        wait_on_sig(rtps_done);
        wait_on_idle;
        
        -- TEST: GET_CACHE_CHANGE [UNKNOWN SN]
        
        Log("W1: RTPS Operation GET_CACHE_CHANGE SN 4", INFO);
        Log("W1: Invalid", DEBUG);
        rtps           := DEFAULT_RTPS_WRITER_TEST;
        rtps.opcode    := GET_CACHE_CHANGE;
        rtps.cc.seq_nr := gen_sn(4);
        rtps.ret_code  := INVALID;
        ind <= 1;
        start_rtps;
        wait_on_sig(rtps_done);
        wait_on_idle;
        
        -- TEST: GET_CACHE_CHANGE [KNOWN SN, ALIGNED PAYLOAD]
        
        Log("W1: RTPS Operation GET_CACHE_CHANGE SN 1", INFO);
        rtps           := DEFAULT_RTPS_WRITER_TEST;
        rtps.opcode    := GET_CACHE_CHANGE;
        rtps.cc        := cc1;
        rtps.cc.instance    := HANDLE_NIL;
        ind <= 1;
        start_rtps;
        wait_on_sig(rtps_done);
        wait_on_idle;
        
        -- TEST: GET_CACHE_CHANGE [KNOWN SN, UNALIGNED PAYLOAD, >1 SLOT]
        
        Log("W1: RTPS Operation GET_CACHE_CHANGE SN 2", INFO);
        rtps           := DEFAULT_RTPS_WRITER_TEST;
        rtps.opcode    := GET_CACHE_CHANGE;
        rtps.cc        := cc2;
        rtps.cc.instance    := HANDLE_NIL;
        ind <= 1;
        start_rtps;
        wait_on_sig(rtps_done);
        wait_on_idle;
        
        -- TEST: GET_CACHE_CHANGE [KNOWN SN, UNALIGNED PAYLOAD, <1 SLOT]
        
        Log("W1: RTPS Operation GET_CACHE_CHANGE SN 3", INFO);
        rtps           := DEFAULT_RTPS_WRITER_TEST;
        rtps.opcode    := GET_CACHE_CHANGE;
        rtps.cc        := cc3;
        rtps.cc.instance    := HANDLE_NIL;
        ind <= 1;
        start_rtps;
        wait_on_sig(rtps_done);
        wait_on_idle;
        
        cc                  := DEFAULT_CACHE_CHANGE;
        cc.serialized_key   := FALSE;
        cc.kind             := ALIVE;
        cc.instance         := kh1;
        cc.payload          := gen_payload(kh1,10);
        cc.seq_nr           := gen_sn(4);
        cc.src_timestamp    := gen_duration(4,0);
        
        -- TEST: WRITE ON DISPOSED INSTANCE
        
        Log("W1: DDS Operation WRITE [TS 2s, Aligned Payload]", INFO);
        Log("W1: ACCEPTED", DEBUG);
        dds            := DEFAULT_DDS_WRITER_TEST;
        dds.opcode     := WRITE;
        dds.cc         := cc;
        dds.cc.instance:= HANDLE_NIL;
        dds.ret_code   := RETCODE_OK;
        ind <= 1;
        start_dds;
        wait_on_sig(dds_done);
        wait_on_idle;
        cc4 := cc;
        AlertIf(empty_sample_head(1) /= 44, "Sample Memory Empty List Head incorrect", FAILURE);
        AlertIf(empty_payload_head(1) /= 54, "Payload Memory Empty List Head incorrect", FAILURE);
        -- SAMPLE MEMORY:      0(S1),11(S2),22(S3),33(S4)/44
        -- PAYLOAD MEMORY:     0(S1),11(S2),22(S2),33(S3),44(S4)/-
        
        cc                  := DEFAULT_CACHE_CHANGE;
        cc.serialized_key   := TRUE;
        cc.kind             := NOT_ALIVE_UNREGISTERED;
        cc.instance         := kh1;
        cc.payload          := gen_payload(kh1,5);
        cc.seq_nr           := gen_sn(5);
        cc.src_timestamp    := gen_duration(5,0);
        
        -- TEST: UNREGISTER INSTANCE ON PAYLOAD MEMORY FULL [WITHOUT ACKed SAMPLES]
        
        Log("W1: DDS Operation UNREGISTER_INSTANCE [TS 5s]", INFO);
        Log("W1: REJECTED [Payload Memory Full]", DEBUG);
        dds            := DEFAULT_DDS_WRITER_TEST;
        dds.opcode     := UNREGISTER_INSTANCE;
        dds.cc         := cc;
        dds.cc.instance:= HANDLE_NIL;
        dds.ret_code   := RETCODE_OUT_OF_RESOURCES;
        ind <= 1;
        start_dds;
        wait_on_sig(dds_done);
        wait_on_idle;
        
        -- TEST: NORMAL ACK_CACHE_CHANGE
        
        Log("W1: RTPS Operation ACK_CACHE_CHANGE SN 1", INFO);
        rtps            := DEFAULT_RTPS_WRITER_TEST;
        rtps.opcode     := ACK_CACHE_CHANGE;
        rtps.cc.seq_nr  := gen_sn(1);
        ind <= 1;
        start_rtps;
        wait_on_sig(rtps_done);
        wait_on_idle;
        
        -- TEST: UNREGISTER INSTANCE ON PAYLOAD MEMORY FULL [WITH ACKed SAMPLES]
        -- TEST: NORMAL UNREGISTER
        
        Log("W1: DDS Operation UNREGISTER_INSTANCE [TS 5s, Key Hash /= HANDLE_NIL]", INFO);
        Log("W1: REJECTED [Key Hash /= HANDLE_NIL]", DEBUG);
        dds            := DEFAULT_DDS_WRITER_TEST;
        dds.opcode     := UNREGISTER_INSTANCE;
        dds.cc         := cc;
        dds.ret_code   := RETCODE_BAD_PARAMETER;
        ind <= 1;
        start_dds;
        wait_on_sig(dds_done);
        wait_on_idle;
        
        Log("W1: DDS Operation UNREGISTER_INSTANCE [TS 5s]", INFO);
        Log("W1: ACCEPTED", DEBUG);
        dds            := DEFAULT_DDS_WRITER_TEST;
        dds.opcode     := UNREGISTER_INSTANCE;
        dds.cc         := cc;
        dds.cc.instance:= HANDLE_NIL;
        dds.ret_code   := RETCODE_OK;
        ind <= 1;
        start_dds;
        wait_on_sig(dds_done);
        wait_on_idle;
        cc1 := cc;
        AlertIf(empty_sample_head(1) /= 0, "Sample Memory Empty List Head incorrect", FAILURE);
        AlertIf(empty_payload_head(1) /= 54, "Payload Memory Empty List Head incorrect", FAILURE);
        -- SAMPLE MEMORY:      11(S2),22(S3),33(S4),44(S5)/0
        -- PAYLOAD MEMORY:     11(S2),22(S2),33(S3),44(S4),0(S5)/-
        
        cc                  := DEFAULT_CACHE_CHANGE;
        cc.serialized_key   := FALSE;
        cc.kind             := ALIVE;
        cc.instance         := kh1;
        cc.payload          := gen_payload(kh1,10);
        cc.seq_nr           := gen_sn(6);
        cc.src_timestamp    := gen_duration(6,0);
        
        -- TEST: WRITE ON PAYLOAD MEMORY FULL [WITHOUT ACKed SAMPLES]
        
        Log("W1: DDS Operation WRITE [TS 6s, Aligned Payload]", INFO);
        Log("W1: REJECTED [Payload Memory Full]", DEBUG);
        dds            := DEFAULT_DDS_WRITER_TEST;
        dds.opcode     := WRITE;
        dds.cc         := cc;
        dds.cc.instance:= HANDLE_NIL;
        dds.ret_code   := RETCODE_OUT_OF_RESOURCES;
        ind <= 1;
        start_dds;
        wait_on_sig(dds_done);
        wait_on_idle;
        
        Log("W1: RTPS Operation ACK_CACHE_CHANGE SN 2", INFO);
        rtps            := DEFAULT_RTPS_WRITER_TEST;
        rtps.opcode     := ACK_CACHE_CHANGE;
        rtps.cc.seq_nr  := gen_sn(2);
        ind <= 1;
        start_rtps;
        wait_on_sig(rtps_done);
        wait_on_idle;
        
        Log("W1: RTPS Operation ACK_CACHE_CHANGE SN 3", INFO);
        rtps            := DEFAULT_RTPS_WRITER_TEST;
        rtps.opcode     := ACK_CACHE_CHANGE;
        rtps.cc.seq_nr  := gen_sn(3);
        ind <= 1;
        start_rtps;
        wait_on_sig(rtps_done);
        wait_on_idle;
        
        -- TEST: NORMAL NACK_CACHE_CHANGE
        
        Log("W1: RTPS Operation NACK_CACHE_CHANGE SN 2", INFO);
        rtps            := DEFAULT_RTPS_WRITER_TEST;
        rtps.opcode     := NACK_CACHE_CHANGE;
        rtps.cc.seq_nr  := gen_sn(2);
        ind <= 1;
        start_rtps;
        wait_on_sig(rtps_done);
        wait_on_idle;
        
        -- TEST: WRITE ON PAYLOAD MEMORY FULL [WITH ACKed SAMPLES]
        -- TEST: WRITE ON UNREGISTERED INSTANCE
        
        Log("W1: DDS Operation WRITE [TS 6s, Aligned Payload]", INFO);
        Log("W1: ACCEPTED", DEBUG);
        dds            := DEFAULT_DDS_WRITER_TEST;
        dds.opcode     := WRITE;
        dds.cc         := cc;
        dds.cc.instance:= HANDLE_NIL;
        dds.ret_code   := RETCODE_OK;
        ind <= 1;
        start_dds;
        wait_on_sig(dds_done);
        wait_on_idle;
        cc3 := cc;
        AlertIf(empty_sample_head(1) /= 22, "Sample Memory Empty List Head incorrect", FAILURE);
        AlertIf(empty_payload_head(1) /= 54, "Payload Memory Empty List Head incorrect", FAILURE);
        -- SAMPLE MEMORY:      11(S2),33(S4),44(S5),0(S6)/22
        -- PAYLOAD MEMORY:     11(S2),22(S2),44(S4),0(S5),33(S6)/-
        
        cc                  := DEFAULT_CACHE_CHANGE;
        cc.serialized_key   := TRUE;
        cc.kind             := NOT_ALIVE_DISPOSED;
        cc.instance         := kh1;
        cc.payload          := gen_payload(kh1,5);
        cc.seq_nr           := gen_sn(7);
        cc.src_timestamp    := gen_duration(7,0);
        
        -- TEST: DISPOSE ON PAYLOAD MEMORY FULL [WITHOUT ACKed SAMPLES]
        
        Log("W1: DDS Operation DISPOSE [TS 7s]", INFO);
        Log("W1: REJECTED [Payload Memory Full]", DEBUG);
        dds            := DEFAULT_DDS_WRITER_TEST;
        dds.opcode     := DISPOSE;
        dds.cc         := cc;
        dds.cc.instance:= HANDLE_NIL;
        dds.ret_code   := RETCODE_OUT_OF_RESOURCES;
        ind <= 1;
        start_dds;
        wait_on_sig(dds_done);
        wait_on_idle;
        
        Log("W1: RTPS Operation ACK_CACHE_CHANGE SN 2", INFO);
        rtps            := DEFAULT_RTPS_WRITER_TEST;
        rtps.opcode     := ACK_CACHE_CHANGE;
        rtps.cc.seq_nr  := gen_sn(2);
        ind <= 1;
        start_rtps;
        wait_on_sig(rtps_done);
        wait_on_idle;
        
        -- TEST: ACK_CACHE_CHANGE [ALREADY ACKed SN]
        
        Log("W1: RTPS Operation ACK_CACHE_CHANGE SN 2", INFO);
        rtps            := DEFAULT_RTPS_WRITER_TEST;
        rtps.opcode     := ACK_CACHE_CHANGE;
        rtps.cc.seq_nr  := gen_sn(2);
        ind <= 1;
        start_rtps;
        wait_on_sig(rtps_done);
        wait_on_idle;
        
        -- TEST: DISPOSE ON PAYLOAD MEMORY FULL [WITH ACKed SAMPLES]
        
        Log("W1: DDS Operation DISPOSE [TS 7s]", INFO);
        Log("W1: ACCEPTED", DEBUG);
        dds            := DEFAULT_DDS_WRITER_TEST;
        dds.opcode     := DISPOSE;
        dds.cc         := cc;
        dds.cc.instance:= HANDLE_NIL;
        dds.ret_code   := RETCODE_OK;
        ind <= 1;
        start_dds;
        wait_on_sig(dds_done);
        wait_on_idle;
        cc2 := cc;
        AlertIf(empty_sample_head(1) /= 11, "Sample Memory Empty List Head incorrect", FAILURE);
        AlertIf(empty_payload_head(1) /= 22, "Payload Memory Empty List Head incorrect", FAILURE);
        -- SAMPLE MEMORY:      33(S4),44(S5),0(S6),22(S7)/11
        -- PAYLOAD MEMORY:     44(S4),0(S5),33(S6),11(S7)/22
        
        cc                  := DEFAULT_CACHE_CHANGE;
        cc.serialized_key   := TRUE;
        cc.kind             := NOT_ALIVE_UNREGISTERED;
        cc.instance         := kh1;
        cc.payload          := gen_payload(kh1,5);
        cc.seq_nr           := gen_sn(8);
        cc.src_timestamp    := gen_duration(8,0);
        
        -- TEST: ADD SAMPLE ON MAX_SAMPLES [KNOWN INSTANCE,WITHOUT ACKed SAMPLES]
        
        Log("W1: DDS Operation UNREGISTER_INSTANCE [TS 8s]", INFO);
        Log("W1: REJECTED [MAX_SAMPLES exceeded]", DEBUG);
        dds            := DEFAULT_DDS_WRITER_TEST;
        dds.opcode     := UNREGISTER_INSTANCE;
        dds.cc         := cc;
        dds.cc.instance:= HANDLE_NIL;
        dds.ret_code   := RETCODE_OUT_OF_RESOURCES;
        ind <= 1;
        start_dds;
        wait_on_sig(dds_done);
        wait_on_idle;
        
        Log("W1: RTPS Operation ACK_CACHE_CHANGE SN 5", INFO);
        rtps            := DEFAULT_RTPS_WRITER_TEST;
        rtps.opcode     := ACK_CACHE_CHANGE;
        rtps.cc.seq_nr  := gen_sn(5);
        ind <= 1;
        start_rtps;
        wait_on_sig(rtps_done);
        wait_on_idle;
        
        -- TEST: ADD SAMPLE ON MAX_SAMPLES [KNOWN INSTANCE,WITH ACKed SAMPLES]
        -- TEST: UNREGISTER ON DISPOSED INSTANCE
        
        Log("W1: DDS Operation UNREGISTER_INSTANCE [TS 8s]", INFO);
        Log("W1: ACCEPTED", DEBUG);
        dds            := DEFAULT_DDS_WRITER_TEST;
        dds.opcode     := UNREGISTER_INSTANCE;
        dds.cc         := cc;
        dds.cc.instance:= HANDLE_NIL;
        dds.ret_code   := RETCODE_OK;
        ind <= 1;
        start_dds;
        wait_on_sig(dds_done);
        wait_on_idle;
        cc1 := cc;
        AlertIf(empty_sample_head(1) /= 44, "Sample Memory Empty List Head incorrect", FAILURE);
        AlertIf(empty_payload_head(1) /= 0, "Payload Memory Empty List Head incorrect", FAILURE);
        -- SAMPLE MEMORY:      33(S4),0(S6),22(S7),11(S8)/44
        -- PAYLOAD MEMORY:     44(S4),33(S6),11(S7),22(S8)/0
        
        -- VALIDATE STATE
        
        Log("W1: RTPS Operation GET_MIN_SN", INFO);
        Log("W1: Expected SN 4", DEBUG);
        rtps           := DEFAULT_RTPS_WRITER_TEST;
        rtps.opcode    := GET_MIN_SN;
        rtps.cc.seq_nr := gen_sn(4);
        ind <= 1;
        start_rtps;
        wait_on_sig(rtps_done);
        wait_on_idle;
        
        Log("W1: RTPS Operation GET_MAX_SN", INFO);
        Log("W1: Expected SN 8", DEBUG);
        rtps           := DEFAULT_RTPS_WRITER_TEST;
        rtps.opcode    := GET_MAX_SN;
        rtps.cc.seq_nr := gen_sn(8);
        ind <= 1;
        start_rtps;
        wait_on_sig(rtps_done);
        wait_on_idle;
        
        Log("W1: RTPS Operation GET_CACHE_CHANGE SN 4", INFO);
        rtps           := DEFAULT_RTPS_WRITER_TEST;
        rtps.opcode    := GET_CACHE_CHANGE;
        rtps.cc        := cc4;
        rtps.cc.instance    := HANDLE_NIL;
        ind <= 1;
        start_rtps;
        wait_on_sig(rtps_done);
        wait_on_idle;
        
        Log("W1: RTPS Operation GET_CACHE_CHANGE SN 6", INFO);
        rtps           := DEFAULT_RTPS_WRITER_TEST;
        rtps.opcode    := GET_CACHE_CHANGE;
        rtps.cc        := cc3;
        rtps.cc.instance    := HANDLE_NIL;
        ind <= 1;
        start_rtps;
        wait_on_sig(rtps_done);
        wait_on_idle;
        
        Log("W1: RTPS Operation GET_CACHE_CHANGE SN 7", INFO);
        rtps           := DEFAULT_RTPS_WRITER_TEST;
        rtps.opcode    := GET_CACHE_CHANGE;
        rtps.cc        := cc2;
        rtps.cc.instance    := HANDLE_NIL;
        ind <= 1;
        start_rtps;
        wait_on_sig(rtps_done);
        wait_on_idle;
        
        Log("W1: RTPS Operation GET_CACHE_CHANGE SN 8", INFO);
        rtps           := DEFAULT_RTPS_WRITER_TEST;
        rtps.opcode    := GET_CACHE_CHANGE;
        rtps.cc        := cc1;
        rtps.cc.instance    := HANDLE_NIL;
        ind <= 1;
        start_rtps;
        wait_on_sig(rtps_done);
        wait_on_idle;
        
        Log("W1: RTPS Operation ACK_CACHE_CHANGE SN 6", INFO);
        rtps            := DEFAULT_RTPS_WRITER_TEST;
        rtps.opcode     := ACK_CACHE_CHANGE;
        rtps.cc.seq_nr  := gen_sn(6);
        ind <= 1;
        start_rtps;
        wait_on_sig(rtps_done);
        wait_on_idle;
        
        Log("W1: RTPS Operation ACK_CACHE_CHANGE SN 8", INFO);
        rtps            := DEFAULT_RTPS_WRITER_TEST;
        rtps.opcode     := ACK_CACHE_CHANGE;
        rtps.cc.seq_nr  := gen_sn(8);
        ind <= 1;
        start_rtps;
        wait_on_sig(rtps_done);
        wait_on_idle;
        
        cc                  := DEFAULT_CACHE_CHANGE;
        cc.serialized_key   := TRUE;
        cc.kind             := NOT_ALIVE_DISPOSED;
        cc.instance         := kh1;
        cc.payload          := gen_payload(kh1,5);
        cc.seq_nr           := gen_sn(9);
        cc.src_timestamp    := gen_duration(9,0);
        
        -- TEST: ADD SAMPLE ON MAX_SAMPLES [KNOWN INSTANCE,WITH ACKed SAMPLES (>1)]
        
        Log("W1: DDS Operation DISPOSE [TS 9s]", INFO);
        Log("W1: ACCEPTED", DEBUG);
        dds            := DEFAULT_DDS_WRITER_TEST;
        dds.opcode     := DISPOSE;
        dds.cc         := cc;
        dds.cc.instance:= HANDLE_NIL;
        dds.ret_code   := RETCODE_OK;
        ind <= 1;
        start_dds;
        wait_on_sig(dds_done);
        wait_on_idle;
        cc3 := cc;
        AlertIf(empty_sample_head(1) /= 0, "Sample Memory Empty List Head incorrect", FAILURE);
        AlertIf(empty_payload_head(1) /= 33, "Payload Memory Empty List Head incorrect", FAILURE);
        -- SAMPLE MEMORY:      33(S4),22(S7),11(S8),44(S9)/0
        -- PAYLOAD MEMORY:     44(S4),11(S7),22(S8),0(S9)/33
        
        cc                  := DEFAULT_CACHE_CHANGE;
        cc.serialized_key   := TRUE;
        cc.kind             := NOT_ALIVE_UNREGISTERED;
        cc.instance         := kh1;
        cc.payload          := gen_payload(kh1,5);
        cc.seq_nr           := gen_sn(10);
        cc.src_timestamp    := gen_duration(10,0);
        
        -- TEST: DISPOSE ON UNREGISTERED INSTANCE
        
        Log("W1: DDS Operation UNREGISTER_INSTANCE [TS 10s]", INFO);
        Log("W1: ACCEPTED", DEBUG);
        dds            := DEFAULT_DDS_WRITER_TEST;
        dds.opcode     := UNREGISTER_INSTANCE;
        dds.cc         := cc;
        dds.cc.instance:= HANDLE_NIL;
        dds.ret_code   := RETCODE_OK;
        ind <= 1;
        start_dds;
        wait_on_sig(dds_done);
        wait_on_idle;
        cc1 := cc;
        AlertIf(empty_sample_head(1) /= 11, "Sample Memory Empty List Head incorrect", FAILURE);
        AlertIf(empty_payload_head(1) /= 22, "Payload Memory Empty List Head incorrect", FAILURE);
        -- SAMPLE MEMORY:      33(S4),22(S7),44(S9),0(S10)/11
        -- PAYLOAD MEMORY:     44(S4),11(S7),0(S9),33(S10)/22
        
        Log("W1: RTPS Operation ACK_CACHE_CHANGE SN 7", INFO);
        rtps            := DEFAULT_RTPS_WRITER_TEST;
        rtps.opcode     := ACK_CACHE_CHANGE;
        rtps.cc.seq_nr  := gen_sn(7);
        ind <= 1;
        start_rtps;
        wait_on_sig(rtps_done);
        wait_on_idle;
        
        cc                  := DEFAULT_CACHE_CHANGE;
        cc.serialized_key   := FALSE;
        cc.kind             := ALIVE;
        cc.instance         := kh1;
        cc.payload          := gen_payload(kh1,20);
        cc.seq_nr           := gen_sn(11);
        cc.src_timestamp    := gen_duration(11,0);
        
        -- TEST: ADD SAMPLE BIGGER THAN AVAILABLE MEMORY SPACE [WITH ACKed SAMPLES]
        
        Log("W1: DDS Operation WRITE [TS 11s, Aligned Payload (2 Slots)]", INFO);
        Log("W1: REJECTED [Payload Memory Full]", DEBUG);
        dds            := DEFAULT_DDS_WRITER_TEST;
        dds.opcode     := WRITE;
        dds.cc         := cc;
        dds.cc.instance:= HANDLE_NIL;
        dds.ret_code   := RETCODE_OUT_OF_RESOURCES;
        ind <= 1;
        start_dds;
        wait_on_sig(dds_done);
        wait_on_idle;
        
        -- TEST: REMOVE_CACHE_CHANGE [UNKNOWN SN]
        
        Log("W1: RTPS Operation REMOVE_CACHE_CHANGE SN 12", INFO);
        Log("W1: Invalid", DEBUG);
        rtps           := DEFAULT_RTPS_WRITER_TEST;
        rtps.opcode    := REMOVE_CACHE_CHANGE;
        rtps.cc.seq_nr := gen_sn(12);
        rtps.ret_code  := INVALID;
        ind <= 1;
        start_rtps;
        wait_on_sig(rtps_done);
        wait_on_idle;
        
        -- TEST: REMOVE_CACHE_CHANGE [KNOWN SN]
        
        Log("W1: RTPS Operation REMOVE_CACHE_CHANGE SN 4", INFO);
        rtps            := DEFAULT_RTPS_WRITER_TEST;
        rtps.opcode     := REMOVE_CACHE_CHANGE;
        rtps.cc.seq_nr  := gen_sn(4);
        ind <= 1;
        start_rtps;
        wait_on_sig(rtps_done);
        wait_on_idle;
        AlertIf(empty_sample_head(1) /= 11, "Sample Memory Empty List Head incorrect", FAILURE);
        AlertIf(empty_payload_head(1) /= 44, "Payload Memory Empty List Head incorrect", FAILURE);
        -- SAMPLE MEMORY:      22(S7),44(S9),0(S10)/11,33
        -- PAYLOAD MEMORY:     11(S7),0(S9),33(S10)/44,22
        
        Log("W1: DDS Operation WRITE [TS 11s, Aligned Payload (2 Slots)]", INFO);
        Log("W1: ACCEPTED", DEBUG);
        dds            := DEFAULT_DDS_WRITER_TEST;
        dds.opcode     := WRITE;
        dds.cc         := cc;
        dds.cc.instance:= HANDLE_NIL;
        dds.ret_code   := RETCODE_OK;
        ind <= 1;
        start_dds;
        wait_on_sig(dds_done);
        wait_on_idle;
        cc4 := cc;
        AlertIf(empty_sample_head(1) /= 33, "Sample Memory Empty List Head incorrect", FAILURE);
        AlertIf(empty_payload_head(1) /= 54, "Payload Memory Empty List Head incorrect", FAILURE);
        -- SAMPLE MEMORY:      22(S7),44(S9),0(S10),11(S11)/33
        -- PAYLOAD MEMORY:     11(S7),0(S9),33(S10),44(S11),22(S11)/-
        
        -- VALIDATE STATE
        
        Log("W1: RTPS Operation GET_MIN_SN", INFO);
        Log("W1: Expected SN 7", DEBUG);
        rtps           := DEFAULT_RTPS_WRITER_TEST;
        rtps.opcode    := GET_MIN_SN;
        rtps.cc.seq_nr := gen_sn(7);
        ind <= 1;
        start_rtps;
        wait_on_sig(rtps_done);
        wait_on_idle;
        
        Log("W1: RTPS Operation GET_MAX_SN", INFO);
        Log("W1: Expected SN 11", DEBUG);
        rtps           := DEFAULT_RTPS_WRITER_TEST;
        rtps.opcode    := GET_MAX_SN;
        rtps.cc.seq_nr := gen_sn(11);
        ind <= 1;
        start_rtps;
        wait_on_sig(rtps_done);
        wait_on_idle;
        
        Log("W1: RTPS Operation GET_CACHE_CHANGE SN 7", INFO);
        rtps           := DEFAULT_RTPS_WRITER_TEST;
        rtps.opcode    := GET_CACHE_CHANGE;
        rtps.cc        := cc2;
        rtps.cc.instance    := HANDLE_NIL;
        ind <= 1;
        start_rtps;
        wait_on_sig(rtps_done);
        wait_on_idle;
        
        Log("W1: RTPS Operation GET_CACHE_CHANGE SN 9", INFO);
        rtps           := DEFAULT_RTPS_WRITER_TEST;
        rtps.opcode    := GET_CACHE_CHANGE;
        rtps.cc        := cc3;
        rtps.cc.instance    := HANDLE_NIL;
        ind <= 1;
        start_rtps;
        wait_on_sig(rtps_done);
        wait_on_idle;
        
        Log("W1: RTPS Operation GET_CACHE_CHANGE SN 10", INFO);
        rtps           := DEFAULT_RTPS_WRITER_TEST;
        rtps.opcode    := GET_CACHE_CHANGE;
        rtps.cc        := cc1;
        rtps.cc.instance    := HANDLE_NIL;
        ind <= 1;
        start_rtps;
        wait_on_sig(rtps_done);
        wait_on_idle;
        
        Log("W1: RTPS Operation GET_CACHE_CHANGE SN 11", INFO);
        rtps           := DEFAULT_RTPS_WRITER_TEST;
        rtps.opcode    := GET_CACHE_CHANGE;
        rtps.cc        := cc4;
        rtps.cc.instance    := HANDLE_NIL;
        ind <= 1;
        start_rtps;
        wait_on_sig(rtps_done);
        wait_on_idle;
        
        -- TEST: INSTANCE LOOKUP [KNOWN INSTANCE]
        
        Log("W1: DDS Operation LOOKUP_INSTANCE", INFO);
        Log("W1: Illegal Operation", DEBUG);
        dds            := DEFAULT_DDS_WRITER_TEST;
        dds.opcode     := LOOKUP_INSTANCE;
        dds.cc         := cc;
        dds.cc.instance:= HANDLE_NIL;
        ind <= 1;
        start_dds;
        wait_on_sig(dds_done);
        wait_on_idle;
        
        -- *WRITER 2*
        Log("*WRITER 2*", INFO);
        AlertIf(empty_sample_head(2) /= 0, "Sample Memory Empty List Head incorrect", FAILURE);
        AlertIf(empty_payload_head(2) /= 0, "Payload Memory Empty List Head incorrect", FAILURE);
        AlertIf(empty_inst_head(2) /= 0, "Instance Memory Empty List Head incorrect", FAILURE);
        -- SAMPLE MEMORY:      -/0,11,22,33,44
        -- PAYLOAD MEMORY:     -/0,10,20,30,40
        -- INSTANCE MEMORY:    -/0,9,18
        
        -- TEST: GET_MIN_SN/GET_MAX_SN ON EMPTY
        
        Log("W2: RTPS Operation GET_MIN_SN", INFO);
        Log("W2: Expected SEQUENCENUMBER_UNKNOWN", DEBUG);
        rtps           := DEFAULT_RTPS_WRITER_TEST;
        rtps.opcode    := GET_MIN_SN;
        rtps.cc.seq_nr := SEQUENCENUMBER_UNKNOWN;
        ind <= 2;
        start_rtps;
        wait_on_sig(rtps_done);
        wait_on_idle;
        
        Log("W2: RTPS Operation GET_MAX_SN", INFO);
        Log("W2: Expected SEQUENCENUMBER_UNKNOWN", DEBUG);
        rtps           := DEFAULT_RTPS_WRITER_TEST;
        rtps.opcode    := GET_MAX_SN;
        rtps.cc.seq_nr := SEQUENCENUMBER_UNKNOWN;
        ind <= 2;
        start_rtps;
        wait_on_sig(rtps_done);
        wait_on_idle;
        
        -- TEST: ADD SAMPLE WITH KEY_HASH [UNKNOWN INSTANCE]
        
        cc                  := DEFAULT_CACHE_CHANGE;
        cc.serialized_key   := FALSE;
        cc.kind             := ALIVE;
        cc.instance         := kh1;
        cc.payload          := gen_payload(kh1,9);
        cc.seq_nr           := gen_sn(1);
        cc.src_timestamp    := gen_duration(1,0);
        
        Log("W2: DDS Operation WRITE [TS 1s, Instance 1, Aligned Payload]", INFO);
        Log("W2: REJECTED [Instance not Registered]", DEBUG);
        dds            := DEFAULT_DDS_WRITER_TEST;
        dds.opcode     := WRITE;
        dds.cc         := cc;
        dds.ret_code   := RETCODE_BAD_PARAMETER;
        ind <= 2;
        start_dds;
        wait_on_sig(dds_done);
        wait_on_idle;
        
        -- TEST: ADD SAMPLE WITH HANDLE_NIL [UNKNOWN INSTANCE]
        -- TEST: NORMAL WRITE
        -- TEST: WRITE ALIGNED PAYLOAD
        
        Log("W2: DDS Operation WRITE [TS 1s, Instance 1, HANDLE_NIL, Aligned Payload]", INFO);
        Log("W2: ACCEPTED", DEBUG);
        dds            := DEFAULT_DDS_WRITER_TEST;
        dds.opcode     := WRITE;
        dds.cc         := cc;
        dds.cc.instance:= HANDLE_NIL;
        dds.ret_code   := RETCODE_OK;
        ind <= 2;
        start_dds;
        wait_on_sig(dds_done);
        wait_on_idle;
        cc1 := cc;
        AlertIf(empty_sample_head(2) /= 11, "Sample Memory Empty List Head incorrect", FAILURE);
        AlertIf(empty_payload_head(2) /= 10, "Payload Memory Empty List Head incorrect", FAILURE);
        AlertIf(empty_inst_head(2) /= 9, "Instance Memory Empty List Head incorrect", FAILURE);
        -- SAMPLE MEMORY:      0(I1S1)/11,22,33,44
        -- PAYLOAD MEMORY:     0(I1S1)/10,20,30,40
        -- INSTANCE MEMORY:    0(I1)/9,18
        
        -- TEST: GET_MIN_SN/GET_MAX_SN ON 1 SAMPLE
        
        Log("W2: RTPS Operation GET_MIN_SN", INFO);
        Log("W2: Expected SN 1", DEBUG);
        rtps           := DEFAULT_RTPS_WRITER_TEST;
        rtps.opcode    := GET_MIN_SN;
        rtps.cc.seq_nr := gen_sn(1);
        ind <= 2;
        start_rtps;
        wait_on_sig(rtps_done);
        wait_on_idle;
        
        Log("W2: RTPS Operation GET_MAX_SN", INFO);
        Log("W2: Expected SN 1", DEBUG);
        rtps           := DEFAULT_RTPS_WRITER_TEST;
        rtps.opcode    := GET_MAX_SN;
        rtps.cc.seq_nr := gen_sn(1);
        ind <= 2;
        start_rtps;
        wait_on_sig(rtps_done);
        wait_on_idle;
        
        cc                  := DEFAULT_CACHE_CHANGE;
        cc.serialized_key   := FALSE;
        cc.kind             := ALIVE;
        cc.instance         := kh1;
        cc.payload          := gen_payload(kh1,16);
        cc.seq_nr           := gen_sn(2);
        cc.src_timestamp    := gen_duration(2,0);
        
        -- TEST: ADD SAMPLE WITH KEY_HASH [KNOWN INSTANCE]
        -- TEST: WRITE UNALIGNED PAYLOAD [>1 SLOT]
        
        Log("W2: DDS Operation WRITE [TS 2s, Instance 1, Unaligned Payload (2 Slot)]", INFO);
        Log("W2: ACCEPTED", DEBUG);
        dds            := DEFAULT_DDS_WRITER_TEST;
        dds.opcode     := WRITE;
        dds.cc         := cc;
        dds.ret_code   := RETCODE_OK;
        ind <= 2;
        start_dds;
        wait_on_sig(dds_done);
        wait_on_idle;
        cc2 := cc;
        AlertIf(empty_sample_head(2) /= 22, "Sample Memory Empty List Head incorrect", FAILURE);
        AlertIf(empty_payload_head(2) /= 30, "Payload Memory Empty List Head incorrect", FAILURE);
        AlertIf(empty_inst_head(2) /= 9, "Instance Memory Empty List Head incorrect", FAILURE);
        -- SAMPLE MEMORY:      0(I1S1),11(I1S2)/22,33,44
        -- PAYLOAD MEMORY:     0(I1S1),10(I1S2),20(I1S2)/30,40
        -- INSTANCE MEMORY:    0(I1)/9,18
        
        cc                  := DEFAULT_CACHE_CHANGE;
        cc.serialized_key   := TRUE;
        cc.kind             := NOT_ALIVE_DISPOSED;
        cc.instance         := kh2;
        cc.payload          := gen_payload(kh2,5);
        cc.seq_nr           := gen_sn(3);
        cc.src_timestamp    := gen_duration(3,0);
        
        Log("W2: DDS Operation DISPOSE [TS 3s, Instance 2]", INFO);
        Log("W2: REJECTED [Instance not Registered]", DEBUG);
        dds            := DEFAULT_DDS_WRITER_TEST;
        dds.opcode     := DISPOSE;
        dds.cc         := cc;
        dds.ret_code   := RETCODE_BAD_PARAMETER;
        ind <= 2;
        start_dds;
        wait_on_sig(dds_done);
        wait_on_idle;
        
        -- TEST: NORMAL REGISTER
        
        Log("W2: DDS Operation REGISTER_INSTANCE 2", INFO);
        Log("W2: ACCEPTED", DEBUG);
        dds            := DEFAULT_DDS_WRITER_TEST;
        dds.opcode     := REGISTER_INSTANCE;
        dds.cc         := cc;
        dds.ret_code   := RETCODE_OK;
        ind <= 2;
        start_dds;
        wait_on_sig(dds_done);
        wait_on_idle;
        AlertIf(empty_sample_head(2) /= 22, "Sample Memory Empty List Head incorrect", FAILURE);
        AlertIf(empty_payload_head(2) /= 30, "Payload Memory Empty List Head incorrect", FAILURE);
        AlertIf(empty_inst_head(2) /= 18, "Instance Memory Empty List Head incorrect", FAILURE);
        -- SAMPLE MEMORY:      0(I1S1),11(I1S2)/22,33,44
        -- PAYLOAD MEMORY:     0(I1S1),10(I1S2),20(I1S2)/30,40
        -- INSTANCE MEMORY:    9(I2),0(I1)/18
        
        -- TEST: NORMAL DISPOSE
        -- TEST: WRITE UNALIGNED PAYLOAD [<1 SLOT]
        
        Log("W2: DDS Operation DISPOSE [TS 3s, Instance 2]", INFO);
        Log("W2: ACCEPTED", DEBUG);
        dds            := DEFAULT_DDS_WRITER_TEST;
        dds.opcode     := DISPOSE;
        dds.cc         := cc;
        dds.cc.instance:= HANDLE_NIL;
        dds.ret_code   := RETCODE_OK;
        ind <= 2;
        start_dds;
        wait_on_sig(dds_done);
        wait_on_idle;
        cc3 := cc;
        AlertIf(empty_sample_head(2) /= 33, "Sample Memory Empty List Head incorrect", FAILURE);
        AlertIf(empty_payload_head(2) /= 40, "Payload Memory Empty List Head incorrect", FAILURE);
        AlertIf(empty_inst_head(2) /= 18, "Instance Memory Empty List Head incorrect", FAILURE);
        -- SAMPLE MEMORY:      0(I1S1),11(I1S2),22(I2S3)/33,44
        -- PAYLOAD MEMORY:     0(I1S1),10(I1S2),20(I1S2),30(I2S3)/40
        -- INSTANCE MEMORY:    9(I2),0(I1)/18
        
        -- TEST: GET_MIN_SN/GET_MAX_SN ON >1 SAMPLE
        -- VALIDATE STATE
        
        Log("W2: RTPS Operation GET_MIN_SN", INFO);
        Log("W2: Expected SN 1", DEBUG);
        rtps           := DEFAULT_RTPS_WRITER_TEST;
        rtps.opcode    := GET_MIN_SN;
        rtps.cc.seq_nr := gen_sn(1);
        ind <= 2;
        start_rtps;
        wait_on_sig(rtps_done);
        wait_on_idle;
        
        Log("W2: RTPS Operation GET_MAX_SN", INFO);
        Log("W2: Expected SN 3", DEBUG);
        rtps           := DEFAULT_RTPS_WRITER_TEST;
        rtps.opcode    := GET_MAX_SN;
        rtps.cc.seq_nr := gen_sn(3);
        ind <= 2;
        start_rtps;
        wait_on_sig(rtps_done);
        wait_on_idle;
        
        -- TEST: GET_CACHE_CHANGE [UNKNOWN SN]
        
        Log("W2: RTPS Operation GET_CACHE_CHANGE SN 4", INFO);
        Log("W2: INVALID", DEBUG);
        rtps           := DEFAULT_RTPS_WRITER_TEST;
        rtps.opcode    := GET_CACHE_CHANGE;
        rtps.cc.seq_nr := gen_sn(4);
        rtps.ret_code  := INVALID;
        ind <= 2;
        start_rtps;
        wait_on_sig(rtps_done);
        wait_on_idle;
        
        -- TEST: GET_CACHE_CHANGE [KNOWN SN, ALIGNED PAYLOAD]
        
        Log("W2: RTPS Operation GET_CACHE_CHANGE SN 1", INFO);
        rtps           := DEFAULT_RTPS_WRITER_TEST;
        rtps.opcode    := GET_CACHE_CHANGE;
        rtps.cc        := cc1;
        ind <= 2;
        start_rtps;
        wait_on_sig(rtps_done);
        wait_on_idle;
        
        -- TEST: GET_CACHE_CHANGE [KNOWN SN, UNALIGNED PAYLOAD, >1 SLOT]
        
        Log("W2: RTPS Operation GET_CACHE_CHANGE SN 2", INFO);
        rtps           := DEFAULT_RTPS_WRITER_TEST;
        rtps.opcode    := GET_CACHE_CHANGE;
        rtps.cc        := cc2;
        ind <= 2;
        start_rtps;
        wait_on_sig(rtps_done);
        wait_on_idle;
        
        -- TEST: GET_CACHE_CHANGE [KNOWN SN, UNALIGNED PAYLOAD, <1 SLOT]
        
        Log("W2: RTPS Operation GET_CACHE_CHANGE SN 3", INFO);
        rtps           := DEFAULT_RTPS_WRITER_TEST;
        rtps.opcode    := GET_CACHE_CHANGE;
        rtps.cc        := cc3;
        ind <= 2;
        start_rtps;
        wait_on_sig(rtps_done);
        wait_on_idle;
        
        cc                  := DEFAULT_CACHE_CHANGE;
        cc.serialized_key   := FALSE;
        cc.kind             := ALIVE;
        cc.instance         := kh2;
        cc.payload          := gen_payload(kh2,9);
        cc.seq_nr           := gen_sn(4);
        cc.src_timestamp    := gen_duration(4,0);
        
        -- TEST: WRITE ON DISPOSED INSTANCE
        -- TEST: ADD SAMPLE WITH HANDLE_NIL [KNOWN INSTANCE]
        
        Log("W2: DDS Operation WRITE [TS 4s, Instance 2, Aligned Payload]", INFO);
        Log("W2: ACCEPTED", DEBUG);
        dds            := DEFAULT_DDS_WRITER_TEST;
        dds.opcode     := WRITE;
        dds.cc         := cc;
        dds.cc.instance:= HANDLE_NIL;
        dds.ret_code   := RETCODE_OK;
        ind <= 2;
        start_dds;
        wait_on_sig(dds_done);
        wait_on_idle;
        cc4 := cc;
        AlertIf(empty_sample_head(2) /= 44, "Sample Memory Empty List Head incorrect", FAILURE);
        AlertIf(empty_payload_head(2) /= 54, "Payload Memory Empty List Head incorrect", FAILURE);
        AlertIf(empty_inst_head(2) /= 18, "Instance Memory Empty List Head incorrect", FAILURE);
        -- SAMPLE MEMORY:      0(I1S1),11(I1S2),22(I2S3),33(I2S4)/44
        -- PAYLOAD MEMORY:     0(I1S1),10(I1S2),20(I1S2),30(I2S3),40(I2S4)/-
        -- INSTANCE MEMORY:    9(I2),0(I1)/18
        
        cc                  := DEFAULT_CACHE_CHANGE;
        cc.serialized_key   := FALSE;
        cc.kind             := ALIVE;
        cc.instance         := kh3;
        cc.payload          := gen_payload(kh3,9);
        cc.seq_nr           := gen_sn(5);
        cc.src_timestamp    := gen_duration(5,0);
        
        -- TEST: WRITE ON PAYLOAD MEMORY FULL [WITHOUT ACKed SAMPLES]
        
        Log("W2: DDS Operation WRITE [TS 5s, Instance 3, HANDLE_NIL, Aligned Payload]", INFO);
        Log("W2: ACCEPTED", DEBUG);
        dds            := DEFAULT_DDS_WRITER_TEST;
        dds.opcode     := WRITE;
        dds.cc         := cc;
        dds.cc.instance:= HANDLE_NIL;
        dds.ret_code   := RETCODE_OK;
        ind <= 2;
        start_dds;
        wait_on_sig(dds_done);
        wait_on_idle;
        cc1 := cc;
        AlertIf(empty_sample_head(2) /= 0, "Sample Memory Empty List Head incorrect", FAILURE);
        AlertIf(empty_payload_head(2) /= 54, "Payload Memory Empty List Head incorrect", FAILURE);
        AlertIf(empty_inst_head(2) /= 26, "Instance Memory Empty List Head incorrect", FAILURE);
        -- SAMPLE MEMORY:      11(I1S2),22(I2S3),33(I2S4),44(I3S5)/0
        -- PAYLOAD MEMORY:     10(I1S2),20(I1S2),30(I2S3),40(I2S4),0(I3S5)/-
        -- INSTANCE MEMORY:    18(I3),9(I2),0(I1)/-
        
        -- TEST: NORMAL ACK_CACHE_CHANGE
        
        Log("W2: RTPS Operation ACK_CACHE_CHANGE SN 3", INFO);
        rtps            := DEFAULT_RTPS_WRITER_TEST;
        rtps.opcode     := ACK_CACHE_CHANGE;
        rtps.cc.seq_nr  := gen_sn(3);
        ind <= 2;
        start_rtps;
        wait_on_sig(rtps_done);
        wait_on_idle;
        
        cc                  := DEFAULT_CACHE_CHANGE;
        cc.serialized_key   := FALSE;
        cc.kind             := ALIVE;
        cc.instance         := kh3;
        cc.payload          := gen_payload(kh3,9);
        cc.seq_nr           := gen_sn(6);
        cc.src_timestamp    := gen_duration(6,0);
        
        -- TEST: WRITE ON PAYLOAD MEMORY FULL [WITH ACKed SAMPLES]
        
        Log("W2: DDS Operation WRITE [TS 6s, Instance 3, Aligned Payload]", INFO);
        Log("W2: ACCEPTED", DEBUG);
        dds            := DEFAULT_DDS_WRITER_TEST;
        dds.opcode     := WRITE;
        dds.cc         := cc;
        dds.ret_code   := RETCODE_OK;
        ind <= 2;
        start_dds;
        wait_on_sig(dds_done);
        wait_on_idle;
        cc3 := cc;
        AlertIf(empty_sample_head(2) /= 22, "Sample Memory Empty List Head incorrect", FAILURE);
        AlertIf(empty_payload_head(2) /= 54, "Payload Memory Empty List Head incorrect", FAILURE);
        AlertIf(empty_inst_head(2) /= 26, "Instance Memory Empty List Head incorrect", FAILURE);
        -- SAMPLE MEMORY:      11(I1S2),33(I2S4),44(I3S5),0(I3S6)/22
        -- PAYLOAD MEMORY:     10(I1S2),20(I1S2),40(I2S4),0(I3S5),30(I3S6)/-
        -- INSTANCE MEMORY:    18(I3),9(I2),0(I1)/-
        
        -- VALIDATE STATE
        
        Log("W2: RTPS Operation GET_MIN_SN", INFO);
        Log("W2: Expected SN 2", DEBUG);
        rtps           := DEFAULT_RTPS_WRITER_TEST;
        rtps.opcode    := GET_MIN_SN;
        rtps.cc.seq_nr := gen_sn(2);
        ind <= 2;
        start_rtps;
        wait_on_sig(rtps_done);
        wait_on_idle;
        
        Log("W2: RTPS Operation GET_MAX_SN", INFO);
        Log("W2: Expected SN 6", DEBUG);
        rtps           := DEFAULT_RTPS_WRITER_TEST;
        rtps.opcode    := GET_MAX_SN;
        rtps.cc.seq_nr := gen_sn(6);
        ind <= 2;
        start_rtps;
        wait_on_sig(rtps_done);
        wait_on_idle;
        
        Log("W2: RTPS Operation GET_CACHE_CHANGE SN 2", INFO);
        rtps           := DEFAULT_RTPS_WRITER_TEST;
        rtps.opcode    := GET_CACHE_CHANGE;
        rtps.cc        := cc2;
        ind <= 2;
        start_rtps;
        wait_on_sig(rtps_done);
        wait_on_idle;
        
        Log("W2: RTPS Operation GET_CACHE_CHANGE SN 4", INFO);
        rtps           := DEFAULT_RTPS_WRITER_TEST;
        rtps.opcode    := GET_CACHE_CHANGE;
        rtps.cc        := cc4;
        ind <= 2;
        start_rtps;
        wait_on_sig(rtps_done);
        wait_on_idle;
        
        Log("W2: RTPS Operation GET_CACHE_CHANGE SN 5", INFO);
        rtps           := DEFAULT_RTPS_WRITER_TEST;
        rtps.opcode    := GET_CACHE_CHANGE;
        rtps.cc        := cc1;
        ind <= 2;
        start_rtps;
        wait_on_sig(rtps_done);
        wait_on_idle;
        
        Log("W2: RTPS Operation GET_CACHE_CHANGE SN 6", INFO);
        rtps           := DEFAULT_RTPS_WRITER_TEST;
        rtps.opcode    := GET_CACHE_CHANGE;
        rtps.cc        := cc3;
        ind <= 2;
        start_rtps;
        wait_on_sig(rtps_done);
        wait_on_idle;
        
        cc                  := DEFAULT_CACHE_CHANGE;
        cc.serialized_key   := TRUE;
        cc.kind             := NOT_ALIVE_DISPOSED;
        cc.instance         := kh1;
        cc.payload          := gen_payload(kh1,5);
        cc.seq_nr           := gen_sn(7);
        cc.src_timestamp    := gen_duration(7,0);
        
        -- TEST: DISPOSE ON PAYLOAD MEMORY FULL [WITHOUT ACKed SAMPLES]
        
        Log("W2: DDS Operation DISPOSE [TS 7s, Instance 1]", INFO);
        Log("W2: ACCEPTED", DEBUG);
        dds            := DEFAULT_DDS_WRITER_TEST;
        dds.opcode     := DISPOSE;
        dds.cc         := cc;
        dds.ret_code   := RETCODE_OK;
        ind <= 2;
        start_dds;
        wait_on_sig(dds_done);
        wait_on_idle;
        cc2 := cc;
        AlertIf(empty_sample_head(2) /= 11, "Sample Memory Empty List Head incorrect", FAILURE);
        AlertIf(empty_payload_head(2) /= 20, "Payload Memory Empty List Head incorrect", FAILURE);
        AlertIf(empty_inst_head(2) /= 26, "Instance Memory Empty List Head incorrect", FAILURE);
        -- SAMPLE MEMORY:      33(I2S4),44(I3S5),0(I3S6),22(I1S7)/11
        -- PAYLOAD MEMORY:     40(I2S4),0(I3S5),30(I3S6),10(I1S7)/20
        -- INSTANCE MEMORY:    18(I3),9(I2),0(I1)/-
        
        Log("W2: RTPS Operation ACK_CACHE_CHANGE SN 5", INFO);
        rtps            := DEFAULT_RTPS_WRITER_TEST;
        rtps.opcode     := ACK_CACHE_CHANGE;
        rtps.cc.seq_nr  := gen_sn(5);
        ind <= 2;
        start_rtps;
        wait_on_sig(rtps_done);
        wait_on_idle;
        
        cc                  := DEFAULT_CACHE_CHANGE;
        cc.serialized_key   := FALSE;
        cc.kind             := ALIVE;
        cc.instance         := kh2;
        cc.payload          := gen_payload(kh2,18);
        cc.seq_nr           := gen_sn(8);
        cc.src_timestamp    := gen_duration(8,0);
        
        -- TEST: ADD SAMPLE BIGGER THAN AVAILABLE MEMORY SPACE [WITH ACKed SAMPLES]
        
        Log("W2: DDS Operation WRITE [TS 8s, Instance 2, Aligned Payload (2 Slots)]", INFO);
        Log("W2: REJECTED [Payload Memory Full]", DEBUG);
        dds            := DEFAULT_DDS_WRITER_TEST;
        dds.opcode     := WRITE;
        dds.cc         := cc;
        dds.ret_code   := RETCODE_OUT_OF_RESOURCES;
        ind <= 2;
        start_dds;
        wait_on_sig(dds_done);
        wait_on_idle;
        
        -- TEST: REMOVE_CACHE_CHANGE [UNKNOWN SN]
        
        Log("W2: RTPS Operation REMOVE_CACHE_CHANGE SN 3", INFO);
        Log("W2: INVALID", DEBUG);
        rtps           := DEFAULT_RTPS_WRITER_TEST;
        rtps.opcode    := REMOVE_CACHE_CHANGE;
        rtps.cc.seq_nr := gen_sn(3);
        rtps.ret_code  := INVALID;
        ind <= 2;
        start_rtps;
        wait_on_sig(rtps_done);
        wait_on_idle;
        
        -- TEST: REMOVE_CACHE_CHANGE [KNOWN SN]
        
        Log("W2: RTPS Operation REMOVE_CACHE_CHANGE SN 5", INFO);
        rtps            := DEFAULT_RTPS_WRITER_TEST;
        rtps.opcode     := REMOVE_CACHE_CHANGE;
        rtps.cc.seq_nr  := gen_sn(5);
        ind <= 2;
        start_rtps;
        wait_on_sig(rtps_done);
        wait_on_idle;
        AlertIf(empty_sample_head(2) /= 11, "Sample Memory Empty List Head incorrect", FAILURE);
        AlertIf(empty_payload_head(2) /= 0, "Payload Memory Empty List Head incorrect", FAILURE);
        AlertIf(empty_inst_head(2) /= 26, "Instance Memory Empty List Head incorrect", FAILURE);
        -- SAMPLE MEMORY:      33(I2S4),0(I3S6),22(I1S7)/11,44
        -- PAYLOAD MEMORY:     40(I2S4),30(I3S6),10(I1S7)/0,20
        -- INSTANCE MEMORY:    18(I3),9(I2),0(I1)/-
        
        Log("W2: DDS Operation WRITE [TS 8s, Instance 2, Aligned Payload (2 Slots)]", INFO);
        Log("W2: ACCEPTED", DEBUG);
        dds            := DEFAULT_DDS_WRITER_TEST;
        dds.opcode     := WRITE;
        dds.cc         := cc;
        dds.ret_code   := RETCODE_OK;
        ind <= 2;
        start_dds;
        wait_on_sig(dds_done);
        wait_on_idle;
        cc1 := cc;
        AlertIf(empty_sample_head(2) /= 44, "Sample Memory Empty List Head incorrect", FAILURE);
        AlertIf(empty_payload_head(2) /= 54, "Payload Memory Empty List Head incorrect", FAILURE);
        AlertIf(empty_inst_head(2) /= 26, "Instance Memory Empty List Head incorrect", FAILURE);
        -- SAMPLE MEMORY:      33(I2S4),0(I3S6),22(I1S7),11(I2S8)/44
        -- PAYLOAD MEMORY:     40(I2S4),30(I3S6),10(I1S7),0(I2S8),20(I2S8)/-
        -- INSTANCE MEMORY:    18(I3),9(I2),0(I1)/-
        
        Log("W2: RTPS Operation ACK_CACHE_CHANGE SN 7", INFO);
        rtps            := DEFAULT_RTPS_WRITER_TEST;
        rtps.opcode     := ACK_CACHE_CHANGE;
        rtps.cc.seq_nr  := gen_sn(7);
        ind <= 2;
        start_rtps;
        wait_on_sig(rtps_done);
        wait_on_idle;
        
        cc                  := DEFAULT_CACHE_CHANGE;
        cc.serialized_key   := TRUE;
        cc.kind             := NOT_ALIVE_DISPOSED;
        cc.instance         := kh3;
        cc.payload          := gen_payload(kh3,5);
        cc.seq_nr           := gen_sn(9);
        cc.src_timestamp    := gen_duration(9,0);
        
        -- TEST: DISPOSE ON PAYLOAD MEMORY FULL [WITH ACKed SAMPLES]
        
        Log("W2: DDS Operation DISPOSE [TS 9s, Instance 3]", INFO);
        Log("W2: ACCEPTED", DEBUG);
        dds            := DEFAULT_DDS_WRITER_TEST;
        dds.opcode     := DISPOSE;
        dds.cc         := cc;
        dds.ret_code   := RETCODE_OK;
        ind <= 2;
        start_dds;
        wait_on_sig(dds_done);
        wait_on_idle;
        cc2 := cc;
        AlertIf(empty_sample_head(2) /= 22, "Sample Memory Empty List Head incorrect", FAILURE);
        AlertIf(empty_payload_head(2) /= 54, "Payload Memory Empty List Head incorrect", FAILURE);
        AlertIf(empty_inst_head(2) /= 26, "Instance Memory Empty List Head incorrect", FAILURE);
        -- SAMPLE MEMORY:      33(I2S4),0(I3S6),11(I2S8),44(I3S9)/22
        -- PAYLOAD MEMORY:     40(I2S4),30(I3S6),0(I2S8),20(I2S8),10(I3S9)/-
        -- INSTANCE MEMORY:    18(I3),9(I2),0(I1)/-
        
        -- VALIDATE STATE
        
        Log("W2: RTPS Operation GET_MIN_SN", INFO);
        Log("W2: Expected SN 4", DEBUG);
        rtps           := DEFAULT_RTPS_WRITER_TEST;
        rtps.opcode    := GET_MIN_SN;
        rtps.cc.seq_nr := gen_sn(4);
        ind <= 2;
        start_rtps;
        wait_on_sig(rtps_done);
        wait_on_idle;
        
        Log("W2: RTPS Operation GET_MAX_SN", INFO);
        Log("W2: Expected SN 9", DEBUG);
        rtps           := DEFAULT_RTPS_WRITER_TEST;
        rtps.opcode    := GET_MAX_SN;
        rtps.cc.seq_nr := gen_sn(9);
        ind <= 2;
        start_rtps;
        wait_on_sig(rtps_done);
        wait_on_idle;
        
        Log("W2: RTPS Operation GET_CACHE_CHANGE SN 4", INFO);
        rtps           := DEFAULT_RTPS_WRITER_TEST;
        rtps.opcode    := GET_CACHE_CHANGE;
        rtps.cc        := cc4;
        ind <= 2;
        start_rtps;
        wait_on_sig(rtps_done);
        wait_on_idle;
        
        Log("W2: RTPS Operation GET_CACHE_CHANGE SN 6", INFO);
        rtps           := DEFAULT_RTPS_WRITER_TEST;
        rtps.opcode    := GET_CACHE_CHANGE;
        rtps.cc        := cc3;
        ind <= 2;
        start_rtps;
        wait_on_sig(rtps_done);
        wait_on_idle;
        
        Log("W2: RTPS Operation GET_CACHE_CHANGE SN 8", INFO);
        rtps           := DEFAULT_RTPS_WRITER_TEST;
        rtps.opcode    := GET_CACHE_CHANGE;
        rtps.cc        := cc1;
        ind <= 2;
        start_rtps;
        wait_on_sig(rtps_done);
        wait_on_idle;
        
        Log("W2: RTPS Operation GET_CACHE_CHANGE SN 9", INFO);
        rtps           := DEFAULT_RTPS_WRITER_TEST;
        rtps.opcode    := GET_CACHE_CHANGE;
        rtps.cc        := cc2;
        ind <= 2;
        start_rtps;
        wait_on_sig(rtps_done);
        wait_on_idle;
        
        cc                  := DEFAULT_CACHE_CHANGE;
        cc.serialized_key   := TRUE;
        cc.kind             := NOT_ALIVE_UNREGISTERED;
        cc.instance         := kh1;
        cc.payload          := gen_payload(kh1,5);
        cc.seq_nr           := gen_sn(10);
        cc.src_timestamp    := gen_duration(10,0);
        
        -- TEST: UNREGISTER ON DISPOSED INSTANCE
        -- TEST: UNREGISTER INSTANCE ON PAYLOAD MEMORY FULL [WITHOUT ACKed SAMPLES]
        
        Log("W2: DDS Operation UNREGISTER_INSTANCE [TS 10s, Instance 1]", INFO);
        Log("W2: ACCEPTED", DEBUG);
        dds            := DEFAULT_DDS_WRITER_TEST;
        dds.opcode     := UNREGISTER_INSTANCE;
        dds.cc         := cc;
        dds.ret_code   := RETCODE_OK;
        ind <= 2;
        start_dds;
        wait_on_sig(dds_done);
        wait_on_idle;
        cc4 := cc;
        AlertIf(empty_sample_head(2) /= 33, "Sample Memory Empty List Head incorrect", FAILURE);
        AlertIf(empty_payload_head(2) /= 54, "Payload Memory Empty List Head incorrect", FAILURE);
        AlertIf(empty_inst_head(2) /= 26, "Instance Memory Empty List Head incorrect", FAILURE);
        -- SAMPLE MEMORY:      0(I3S6),11(I2S8),44(I3S9),22(I1S10)/33
        -- PAYLOAD MEMORY:     30(I3S6),0(I2S8),20(I2S8),10(I3S9),40(I1S10)/-
        -- INSTANCE MEMORY:    18(I3),9(I2),0(I1)/-
        
        Log("W2: RTPS Operation ACK_CACHE_CHANGE SN 9", INFO);
        rtps            := DEFAULT_RTPS_WRITER_TEST;
        rtps.opcode     := ACK_CACHE_CHANGE;
        rtps.cc.seq_nr  := gen_sn(9);
        ind <= 2;
        start_rtps;
        wait_on_sig(rtps_done);
        wait_on_idle;
        
        cc                  := DEFAULT_CACHE_CHANGE;
        cc.serialized_key   := TRUE;
        cc.kind             := NOT_ALIVE_UNREGISTERED;
        cc.instance         := kh2;
        cc.payload          := gen_payload(kh2,5);
        cc.seq_nr           := gen_sn(11);
        cc.src_timestamp    := gen_duration(11,0);
        
        -- TEST: UNREGISTER INSTANCE ON PAYLOAD MEMORY FULL [WITH ACKed SAMPLES]
        
        Log("W2: DDS Operation UNREGISTER_INSTANCE [TS 11s, Instance 2]", INFO);
        Log("W2: ACCEPTED", DEBUG);
        dds            := DEFAULT_DDS_WRITER_TEST;
        dds.opcode     := UNREGISTER_INSTANCE;
        dds.cc         := cc;
        dds.ret_code   := RETCODE_OK;
        ind <= 2;
        start_dds;
        wait_on_sig(dds_done);
        wait_on_idle;
        cc2 := cc;
        AlertIf(empty_sample_head(2) /= 44, "Sample Memory Empty List Head incorrect", FAILURE);
        AlertIf(empty_payload_head(2) /= 54, "Payload Memory Empty List Head incorrect", FAILURE);
        AlertIf(empty_inst_head(2) /= 26, "Instance Memory Empty List Head incorrect", FAILURE);
        -- SAMPLE MEMORY:      0(I3S6),11(I2S8),22(I1S10),33(I2S11)/44
        -- PAYLOAD MEMORY:     30(I3S6),0(I2S8),20(I2S8),40(I1S10),10(I2S11)/-
        -- INSTANCE MEMORY:    18(I3),9(I2),0(I1)/-
        
        Log("W2: RTPS Operation ACK_CACHE_CHANGE SN 6", INFO);
        rtps            := DEFAULT_RTPS_WRITER_TEST;
        rtps.opcode     := ACK_CACHE_CHANGE;
        rtps.cc.seq_nr  := gen_sn(6);
        ind <= 2;
        start_rtps;
        wait_on_sig(rtps_done);
        wait_on_idle;
        
        Log("W2: RTPS Operation ACK_CACHE_CHANGE SN 8", INFO);
        rtps            := DEFAULT_RTPS_WRITER_TEST;
        rtps.opcode     := ACK_CACHE_CHANGE;
        rtps.cc.seq_nr  := gen_sn(8);
        ind <= 2;
        start_rtps;
        wait_on_sig(rtps_done);
        wait_on_idle;
        
        Log("W2: RTPS Operation ACK_CACHE_CHANGE SN 11", INFO);
        rtps            := DEFAULT_RTPS_WRITER_TEST;
        rtps.opcode     := ACK_CACHE_CHANGE;
        rtps.cc.seq_nr  := gen_sn(11);
        ind <= 2;
        start_rtps;
        wait_on_sig(rtps_done);
        wait_on_idle;
        
        cc                  := DEFAULT_CACHE_CHANGE;
        cc.serialized_key   := FALSE;
        cc.kind             := ALIVE;
        cc.instance         := kh4;
        cc.payload          := gen_payload(kh4,9);
        cc.seq_nr           := gen_sn(12);
        cc.src_timestamp    := gen_duration(12,0);
        
        -- TEST: ADD SAMPLE ON MAX_INSTANCES [UNKNOWN INSTANCE, WITH STALE INSTANCE]
        -- TEST: ADD SAMPLE ON PAYLOAD FULL & MAX_INSTANCES [UNKNOWN INSTANCE,WITH ACKed SAMPLES,WITH STALE INSTANCE (>= 1 SAMPLE)] (Induce Double Remove)
        -- TEST: REMOVE STALE INSTANCE WITH >1 SAMPLES
        
        Log("W2: DDS Operation WRITE [TS 12s, Instance 4, HANDLE_NIL, Aligned Payload]", INFO);
        Log("W2: ACCEPTED", DEBUG);
        dds            := DEFAULT_DDS_WRITER_TEST;
        dds.opcode     := WRITE;
        dds.cc         := cc;
        dds.cc.instance:= HANDLE_NIL;
        dds.ret_code   := RETCODE_OK;
        ind <= 2;
        start_dds;
        wait_on_sig(dds_done);
        wait_on_idle;
        cc1 := cc;
        AlertIf(empty_sample_head(2) /= 0, "Sample Memory Empty List Head incorrect", FAILURE);
        AlertIf(empty_payload_head(2) /= 10, "Payload Memory Empty List Head incorrect", FAILURE);
        AlertIf(empty_inst_head(2) /= 26, "Instance Memory Empty List Head incorrect", FAILURE);
        -- SAMPLE MEMORY:      22(I1S10),44(I4S12)/0,11,33
        -- PAYLOAD MEMORY:     40(I1S10),30(I4S12)/10,0,20
        -- INSTANCE MEMORY:    9(I4),18(I3),0(I1)/-
        
        -- VALIDATE STATE
        
        Log("W2: RTPS Operation GET_MIN_SN", INFO);
        Log("W2: Expected SN 10", DEBUG);
        rtps           := DEFAULT_RTPS_WRITER_TEST;
        rtps.opcode    := GET_MIN_SN;
        rtps.cc.seq_nr := gen_sn(10);
        ind <= 2;
        start_rtps;
        wait_on_sig(rtps_done);
        wait_on_idle;
        
        Log("W2: RTPS Operation GET_MAX_SN", INFO);
        Log("W2: Expected SN 12", DEBUG);
        rtps           := DEFAULT_RTPS_WRITER_TEST;
        rtps.opcode    := GET_MAX_SN;
        rtps.cc.seq_nr := gen_sn(12);
        ind <= 2;
        start_rtps;
        wait_on_sig(rtps_done);
        wait_on_idle;
        
        Log("W2: RTPS Operation GET_CACHE_CHANGE SN 10", INFO);
        rtps           := DEFAULT_RTPS_WRITER_TEST;
        rtps.opcode    := GET_CACHE_CHANGE;
        rtps.cc        := cc4;
        ind <= 2;
        start_rtps;
        wait_on_sig(rtps_done);
        wait_on_idle;
        
        Log("W2: RTPS Operation GET_CACHE_CHANGE SN 12", INFO);
        rtps           := DEFAULT_RTPS_WRITER_TEST;
        rtps.opcode    := GET_CACHE_CHANGE;
        rtps.cc        := cc1;
        ind <= 2;
        start_rtps;
        wait_on_sig(rtps_done);
        wait_on_idle;
        
        cc                  := DEFAULT_CACHE_CHANGE;
        cc.serialized_key   := FALSE;
        cc.kind             := ALIVE;
        cc.instance         := kh2;
        cc.payload          := gen_payload(kh2,9);
        cc.seq_nr           := gen_sn(13);
        cc.src_timestamp    := gen_duration(13,0);
        
        -- TEST: REGISTER INSTANCE ON MAX_INSTANCES [UNKNOWN INSTANCE, WITHOUT STALE INSTANCE]
        
        Log("W2: DDS Operation REGISTER_INSTANCE 2", INFO);
        Log("W2: REJECTED [MAX_INSTANCES exceeded]", DEBUG);
        dds            := DEFAULT_DDS_WRITER_TEST;
        dds.opcode     := REGISTER_INSTANCE;
        dds.cc         := cc;
        dds.cc.instance:= HANDLE_NIL;
        ind <= 2;
        start_dds;
        wait_on_sig(dds_done);
        wait_on_idle;
        
        Log("W2: RTPS Operation ACK_CACHE_CHANGE SN 10", INFO);
        rtps            := DEFAULT_RTPS_WRITER_TEST;
        rtps.opcode     := ACK_CACHE_CHANGE;
        rtps.cc.seq_nr  := gen_sn(10);
        ind <= 2;
        start_rtps;
        wait_on_sig(rtps_done);
        wait_on_idle;
        
        -- TEST: REGISTER INSTANCE ON MAX_INSTANCES [UNKNOWN INSTANCE, WITH STALE INSTANCE]
        -- TEST: REMOVE STALE INSTANCE WITH 1 SAMPLES
        
        Log("W2: DDS Operation REGISTER_INSTANCE 2", INFO);
        Log("W2: ACCEPTED", DEBUG);
        dds            := DEFAULT_DDS_WRITER_TEST;
        dds.opcode     := REGISTER_INSTANCE;
        dds.cc         := cc;
        dds.ret_code   := RETCODE_OK;
        ind <= 2;
        start_dds;
        wait_on_sig(dds_done);
        wait_on_idle;
        AlertIf(empty_sample_head(2) /= 0, "Sample Memory Empty List Head incorrect", FAILURE);
        AlertIf(empty_payload_head(2) /= 40, "Payload Memory Empty List Head incorrect", FAILURE);
        AlertIf(empty_inst_head(2) /= 26, "Instance Memory Empty List Head incorrect", FAILURE);
        -- SAMPLE MEMORY:      44(I4S12)/0,11,33,22
        -- PAYLOAD MEMORY:     30(I4S12)/40,10,0,20
        -- INSTANCE MEMORY:    0(I2),9(I4),18(I3)/-
        
        Log("W2: DDS Operation WRITE [TS 13s, Instance 2, Aligned Payload]", INFO);
        Log("W2: ACCEPTED", DEBUG);
        dds            := DEFAULT_DDS_WRITER_TEST;
        dds.opcode     := WRITE;
        dds.cc         := cc;
        dds.ret_code   := RETCODE_OK;
        ind <= 2;
        start_dds;
        wait_on_sig(dds_done);
        wait_on_idle;
        cc2 := cc;
        AlertIf(empty_sample_head(2) /= 11, "Sample Memory Empty List Head incorrect", FAILURE);
        AlertIf(empty_payload_head(2) /= 10, "Payload Memory Empty List Head incorrect", FAILURE);
        AlertIf(empty_inst_head(2) /= 26, "Instance Memory Empty List Head incorrect", FAILURE);
        -- SAMPLE MEMORY:      44(I4S12),0(I2S13)/11,33,22
        -- PAYLOAD MEMORY:     30(I4S12),40(I2S13)/10,0,20
        -- INSTANCE MEMORY:    0(I2),9(I4),18(I3)/-
        
        -- TEST: REGISTER INSTANCE [KNOWN INSTANCE]
        
        Log("W2: DDS Operation REGISTER_INSTANCE 2", INFO);
        Log("W2: ACCEPTED", DEBUG);
        dds            := DEFAULT_DDS_WRITER_TEST;
        dds.opcode     := REGISTER_INSTANCE;
        dds.cc         := cc;
        dds.ret_code   := RETCODE_OK;
        ind <= 2;
        start_dds;
        wait_on_sig(dds_done);
        wait_on_idle;
        
        cc                  := DEFAULT_CACHE_CHANGE;
        cc.serialized_key   := FALSE;
        cc.kind             := ALIVE;
        cc.instance         := kh2;
        cc.payload          := gen_payload(kh2,9);
        cc.seq_nr           := gen_sn(14);
        cc.src_timestamp    := gen_duration(14,0);
        
        Log("W2: DDS Operation WRITE [TS 14s, Instance 2, Aligned Payload]", INFO);
        Log("W2: ACCEPTED", DEBUG);
        dds            := DEFAULT_DDS_WRITER_TEST;
        dds.opcode     := WRITE;
        dds.cc         := cc;
        dds.ret_code   := RETCODE_OK;
        ind <= 2;
        start_dds;
        wait_on_sig(dds_done);
        wait_on_idle;
        cc3 := cc;
        AlertIf(empty_sample_head(2) /= 33, "Sample Memory Empty List Head incorrect", FAILURE);
        AlertIf(empty_payload_head(2) /= 0, "Payload Memory Empty List Head incorrect", FAILURE);
        AlertIf(empty_inst_head(2) /= 26, "Instance Memory Empty List Head incorrect", FAILURE);
        -- SAMPLE MEMORY:      44(I4S12),0(I2S13),11(I2S14)/33,22
        -- PAYLOAD MEMORY:     30(I4S12),40(I2S13),10(I2S14)/0,20
        -- INSTANCE MEMORY:    0(I2),9(I4),18(I3)/-
        
        cc                  := DEFAULT_CACHE_CHANGE;
        cc.serialized_key   := FALSE;
        cc.kind             := ALIVE;
        cc.instance         := kh2;
        cc.payload          := gen_payload(kh2,9);
        cc.seq_nr           := gen_sn(15);
        cc.src_timestamp    := gen_duration(15,0);
        
        -- TEST: ADD SAMPLE ON MAX_SAMPLES_PER_INSTANCE [KNOWN INSTANCE, WITHOUT ACKed SAMPLES]
        
        Log("W2: DDS Operation WRITE [TS 15s, Instance 2, Aligned Payload]", INFO);
        Log("W2: ACCEPTED", DEBUG);
        dds            := DEFAULT_DDS_WRITER_TEST;
        dds.opcode     := WRITE;
        dds.cc         := cc;
        dds.ret_code   := RETCODE_OK;
        ind <= 2;
        start_dds;
        wait_on_sig(dds_done);
        wait_on_idle;
        cc2 := cc;
        AlertIf(empty_sample_head(2) /= 22, "Sample Memory Empty List Head incorrect", FAILURE);
        AlertIf(empty_payload_head(2) /= 40, "Payload Memory Empty List Head incorrect", FAILURE);
        AlertIf(empty_inst_head(2) /= 26, "Instance Memory Empty List Head incorrect", FAILURE);
        -- SAMPLE MEMORY:      44(I4S12),11(I2S14),33(I2S15)/22,0
        -- PAYLOAD MEMORY:     30(I4S12),10(I2S14),0(I2S15)/40,20
        -- INSTANCE MEMORY:    0(I2),9(I4),18(I3)/-
        
        Log("W2: RTPS Operation ACK_CACHE_CHANGE SN 15", INFO);
        rtps            := DEFAULT_RTPS_WRITER_TEST;
        rtps.opcode     := ACK_CACHE_CHANGE;
        rtps.cc.seq_nr  := gen_sn(15);
        ind <= 2;
        start_rtps;
        wait_on_sig(rtps_done);
        wait_on_idle;
        
        cc                  := DEFAULT_CACHE_CHANGE;
        cc.serialized_key   := FALSE;
        cc.kind             := ALIVE;
        cc.instance         := kh2;
        cc.payload          := gen_payload(kh2,9);
        cc.seq_nr           := gen_sn(16);
        cc.src_timestamp    := gen_duration(16,0);
        
        -- TEST: ADD SAMPLE ON MAX_SAMPLES_PER_INSTANCE [KNOWN INSTANCE, WITH ACKed INSTANCE SAMPLE]
        
        Log("W2: DDS Operation WRITE [TS 16s, Instance 2, Aligned Payload]", INFO);
        Log("W2: ACCEPTED", DEBUG);
        dds            := DEFAULT_DDS_WRITER_TEST;
        dds.opcode     := WRITE;
        dds.cc         := cc;
        dds.ret_code   := RETCODE_OK;
        ind <= 2;
        start_dds;
        wait_on_sig(dds_done);
        wait_on_idle;
        cc2 := cc;
        AlertIf(empty_sample_head(2) /= 0, "Sample Memory Empty List Head incorrect", FAILURE);
        AlertIf(empty_payload_head(2) /= 0, "Payload Memory Empty List Head incorrect", FAILURE);
        AlertIf(empty_inst_head(2) /= 26, "Instance Memory Empty List Head incorrect", FAILURE);
        -- SAMPLE MEMORY:      44(I4S12),11(I2S14),22(I2S16)/0,33
        -- PAYLOAD MEMORY:     30(I4S12),10(I2S14),40(I2S16)/0,20
        -- INSTANCE MEMORY:    0(I2),9(I4),18(I3)/-
        
        Log("W2: RTPS Operation ACK_CACHE_CHANGE SN 12", INFO);
        rtps            := DEFAULT_RTPS_WRITER_TEST;
        rtps.opcode     := ACK_CACHE_CHANGE;
        rtps.cc.seq_nr  := gen_sn(12);
        ind <= 2;
        start_rtps;
        wait_on_sig(rtps_done);
        wait_on_idle;
        
        cc                  := DEFAULT_CACHE_CHANGE;
        cc.serialized_key   := TRUE;
        cc.kind             := NOT_ALIVE_UNREGISTERED;
        cc.instance         := kh2;
        cc.payload          := gen_payload(kh2,5);
        cc.seq_nr           := gen_sn(17);
        cc.src_timestamp    := gen_duration(17,0);
        
        -- TEST: NORMAL UNREGISTER
        -- TEST: ADD SAMPLE ON MAX_SAMPLES_PER_INSTANCE [KNOWN INSTANCE, WITH ACKed SAMPLES, WITHOUT ACKed INSTANCE SAMPLES]
        
        Log("W2: DDS Operation UNREGISTER_INSTANCE [TS 17s, Instance 2]", INFO);
        Log("W2: ACCEPTED", DEBUG);
        dds            := DEFAULT_DDS_WRITER_TEST;
        dds.opcode     := UNREGISTER_INSTANCE;
        dds.cc         := cc;
        dds.ret_code   := RETCODE_OK;
        ind <= 2;
        start_dds;
        wait_on_sig(dds_done);
        wait_on_idle;
        cc3 := cc;
        AlertIf(empty_sample_head(2) /= 33, "Sample Memory Empty List Head incorrect", FAILURE);
        AlertIf(empty_payload_head(2) /= 10, "Payload Memory Empty List Head incorrect", FAILURE);
        AlertIf(empty_inst_head(2) /= 26, "Instance Memory Empty List Head incorrect", FAILURE);
        -- SAMPLE MEMORY:      44(I4S12),22(I2S16),0(I2S17)/33,11
        -- PAYLOAD MEMORY:     30(I4S12),40(I2S16),0(I2S17)/10,20
        -- INSTANCE MEMORY:    0(I2),9(I4),18(I3)/-
        
        -- VALIDATE STATE
        
        Log("W2: RTPS Operation GET_MIN_SN", INFO);
        Log("W2: Expected SN 12", DEBUG);
        rtps           := DEFAULT_RTPS_WRITER_TEST;
        rtps.opcode    := GET_MIN_SN;
        rtps.cc.seq_nr := gen_sn(12);
        ind <= 2;
        start_rtps;
        wait_on_sig(rtps_done);
        wait_on_idle;
        
        Log("W2: RTPS Operation GET_MAX_SN", INFO);
        Log("W2: Expected SN 17", DEBUG);
        rtps           := DEFAULT_RTPS_WRITER_TEST;
        rtps.opcode    := GET_MAX_SN;
        rtps.cc.seq_nr := gen_sn(17);
        ind <= 2;
        start_rtps;
        wait_on_sig(rtps_done);
        wait_on_idle;
        
        Log("W2: RTPS Operation GET_CACHE_CHANGE SN 12", INFO);
        rtps           := DEFAULT_RTPS_WRITER_TEST;
        rtps.opcode    := GET_CACHE_CHANGE;
        rtps.cc        := cc1;
        ind <= 2;
        start_rtps;
        wait_on_sig(rtps_done);
        wait_on_idle;
        
        Log("W2: RTPS Operation GET_CACHE_CHANGE SN 16", INFO);
        rtps           := DEFAULT_RTPS_WRITER_TEST;
        rtps.opcode    := GET_CACHE_CHANGE;
        rtps.cc        := cc2;
        ind <= 2;
        start_rtps;
        wait_on_sig(rtps_done);
        wait_on_idle;
        
        Log("W2: RTPS Operation GET_CACHE_CHANGE SN 17", INFO);
        rtps           := DEFAULT_RTPS_WRITER_TEST;
        rtps.opcode    := GET_CACHE_CHANGE;
        rtps.cc        := cc3;
        ind <= 2;
        start_rtps;
        wait_on_sig(rtps_done);
        wait_on_idle;
        
        cc                  := DEFAULT_CACHE_CHANGE;
        cc.serialized_key   := TRUE;
        cc.kind             := NOT_ALIVE_UNREGISTERED;
        cc.instance         := kh4;
        cc.payload          := gen_payload(kh4,5);
        cc.seq_nr           := gen_sn(18);
        cc.src_timestamp    := gen_duration(18,0);
        
        Log("W2: DDS Operation UNREGISTER_INSTANCE [TS 18s, Instance 4]", INFO);
        Log("W2: ACCEPTED", DEBUG);
        dds            := DEFAULT_DDS_WRITER_TEST;
        dds.opcode     := UNREGISTER_INSTANCE;
        dds.cc         := cc;
        dds.ret_code   := RETCODE_OK;
        ind <= 2;
        start_dds;
        wait_on_sig(dds_done);
        wait_on_idle;
        cc4 := cc;
        AlertIf(empty_sample_head(2) /= 11, "Sample Memory Empty List Head incorrect", FAILURE);
        AlertIf(empty_payload_head(2) /= 20, "Payload Memory Empty List Head incorrect", FAILURE);
        AlertIf(empty_inst_head(2) /= 26, "Instance Memory Empty List Head incorrect", FAILURE);
        -- SAMPLE MEMORY:      44(I4S12),22(I2S16),0(I2S17),33(I4S18)/11
        -- PAYLOAD MEMORY:     30(I4S12),40(I2S16),0(I2S17),10(I4S178)/20
        -- INSTANCE MEMORY:    0(I2),9(I4),18(I3)/-
        
        cc                  := DEFAULT_CACHE_CHANGE;
        cc.serialized_key   := TRUE;
        cc.kind             := NOT_ALIVE_UNREGISTERED;
        cc.instance         := kh3;
        cc.payload          := gen_payload(kh3,5);
        cc.seq_nr           := gen_sn(19);
        cc.src_timestamp    := gen_duration(19,0);
        
        -- TEST: NORMAL NACK_CACHE_CHANGE
        
        Log("W2: RTPS Operation NACK_CACHE_CHANGE SN 12", INFO);
        rtps            := DEFAULT_RTPS_WRITER_TEST;
        rtps.opcode     := NACK_CACHE_CHANGE;
        rtps.cc.seq_nr  := gen_sn(12);
        ind <= 2;
        start_rtps;
        wait_on_sig(rtps_done);
        wait_on_idle;
        
        Log("W2: RTPS Operation ACK_CACHE_CHANGE SN 18", INFO);
        rtps            := DEFAULT_RTPS_WRITER_TEST;
        rtps.opcode     := ACK_CACHE_CHANGE;
        rtps.cc.seq_nr  := gen_sn(18);
        ind <= 2;
        start_rtps;
        wait_on_sig(rtps_done);
        wait_on_idle;
        
        -- TEST: ADD SAMPLE ON MAX_SAMPLES [KNOWN INSTANCE,WITH ACKed SAMPLE]
        
        Log("W2: DDS Operation UNREGISTER_INSTANCE [TS 19s, Instance 3]", INFO);
        Log("W2: ACCEPTED", DEBUG);
        dds            := DEFAULT_DDS_WRITER_TEST;
        dds.opcode     := UNREGISTER_INSTANCE;
        dds.cc         := cc;
        dds.ret_code   := RETCODE_OK;
        ind <= 2;
        start_dds;
        wait_on_sig(dds_done);
        wait_on_idle;
        cc4 := cc;
        AlertIf(empty_sample_head(2) /= 33, "Sample Memory Empty List Head incorrect", FAILURE);
        AlertIf(empty_payload_head(2) /= 10, "Payload Memory Empty List Head incorrect", FAILURE);
        AlertIf(empty_inst_head(2) /= 26, "Instance Memory Empty List Head incorrect", FAILURE);
        -- SAMPLE MEMORY:      44(I4S12),22(I2S16),0(I2S17),11(I3S19)/33
        -- PAYLOAD MEMORY:     30(I4S12),40(I2S16),0(I2S17),20(I3S19)/10
        -- INSTANCE MEMORY:    0(I2),9(I4),18(I3)/-
        
        cc                  := DEFAULT_CACHE_CHANGE;
        cc.serialized_key   := FALSE;
        cc.kind             := ALIVE;
        cc.instance         := kh3;
        cc.payload          := gen_payload(kh3,9);
        cc.seq_nr           := gen_sn(20);
        cc.src_timestamp    := gen_duration(20,0);
        
        -- TEST: ADD SAMPLE ON MAX_SAMPLES [KNOWN INSTANCE,WITHOUT ACKed SAMPLES]
        -- TEST: WRITE ON UNREGISTERED INSTANCE
        
        Log("W2: DDS Operation WRITE [TS 20s, Instance 3, Aligned Payload]", INFO);
        Log("W2: ACCEPTED", DEBUG);
        dds            := DEFAULT_DDS_WRITER_TEST;
        dds.opcode     := WRITE;
        dds.cc         := cc;
        dds.ret_code   := RETCODE_OK;
        ind <= 2;
        start_dds;
        wait_on_sig(dds_done);
        wait_on_idle;
        cc1 := cc;
        AlertIf(empty_sample_head(2) /= 44, "Sample Memory Empty List Head incorrect", FAILURE);
        AlertIf(empty_payload_head(2) /= 30, "Payload Memory Empty List Head incorrect", FAILURE);
        AlertIf(empty_inst_head(2) /= 26, "Instance Memory Empty List Head incorrect", FAILURE);
        -- SAMPLE MEMORY:      22(I2S16),0(I2S17),11(I3S19),33(I3S20)/44
        -- PAYLOAD MEMORY:     40(I2S16),0(I2S17),20(I3S19),10(I3S20)/30
        -- INSTANCE MEMORY:    0(I2),9(I4),18(I3)/-
        
        cc                  := DEFAULT_CACHE_CHANGE;
        cc.serialized_key   := FALSE;
        cc.kind             := ALIVE;
        cc.instance         := kh3;
        cc.payload          := gen_payload(kh3,9);
        cc.seq_nr           := gen_sn(21);
        cc.src_timestamp    := gen_duration(21,0);
        
        -- TEST: ADD SAMPLE ON MAX_SAMPLES & MAX_SAMPLES_PER_INSTANCE [KNOWN INSTANCE,WITHOUT ACKed SAMPLES]
        
        Log("W2: DDS Operation WRITE [TS 21s, Instance 3, Aligned Payload]", INFO);
        Log("W2: ACCEPTED", DEBUG);
        dds            := DEFAULT_DDS_WRITER_TEST;
        dds.opcode     := WRITE;
        dds.cc         := cc;
        dds.ret_code   := RETCODE_OK;
        ind <= 2;
        start_dds;
        wait_on_sig(dds_done);
        wait_on_idle;
        cc4 := cc;
        AlertIf(empty_sample_head(2) /= 11, "Sample Memory Empty List Head incorrect", FAILURE);
        AlertIf(empty_payload_head(2) /= 20, "Payload Memory Empty List Head incorrect", FAILURE);
        AlertIf(empty_inst_head(2) /= 26, "Instance Memory Empty List Head incorrect", FAILURE);
        -- SAMPLE MEMORY:      22(I2S16),0(I2S17),33(I3S20),44(I3S21)/11
        -- PAYLOAD MEMORY:     40(I2S16),0(I2S17),10(I3S20),30(I3S21)/20
        -- INSTANCE MEMORY:    0(I2),9(I4),18(I3)/-
        
        Log("W2: RTPS Operation ACK_CACHE_CHANGE SN 16", INFO);
        rtps            := DEFAULT_RTPS_WRITER_TEST;
        rtps.opcode     := ACK_CACHE_CHANGE;
        rtps.cc.seq_nr  := gen_sn(16);
        ind <= 2;
        start_rtps;
        wait_on_sig(rtps_done);
        wait_on_idle;
        
        cc                  := DEFAULT_CACHE_CHANGE;
        cc.serialized_key   := FALSE;
        cc.kind             := ALIVE;
        cc.instance         := kh3;
        cc.payload          := gen_payload(kh3,9);
        cc.seq_nr           := gen_sn(22);
        cc.src_timestamp    := gen_duration(22,0);
        
        -- TEST: ADD SAMPLE ON MAX_SAMPLES & MAX_SAMPLES_PER_INSTANCE [KNOWN INSTANCE,WITH ACKed SAMPLES, WITHOUT ACKed INSTANCE SAMPLES]
        
        Log("W2: DDS Operation WRITE [TS 22s, Instance 3, Aligned Payload]", INFO);
        Log("W2: ACCEPTED", DEBUG);
        dds            := DEFAULT_DDS_WRITER_TEST;
        dds.opcode     := WRITE;
        dds.cc         := cc;
        dds.ret_code   := RETCODE_OK;
        ind <= 2;
        start_dds;
        wait_on_sig(dds_done);
        wait_on_idle;
        cc1 := cc;
        AlertIf(empty_sample_head(2) /= 33, "Sample Memory Empty List Head incorrect", FAILURE);
        AlertIf(empty_payload_head(2) /= 10, "Payload Memory Empty List Head incorrect", FAILURE);
        AlertIf(empty_inst_head(2) /= 26, "Instance Memory Empty List Head incorrect", FAILURE);
        -- SAMPLE MEMORY:      22(I2S16),0(I2S17),44(I3S21),11(I3S22)/33
        -- PAYLOAD MEMORY:     40(I2S16),0(I2S17),30(I3S21),20(I3S22)/10
        -- INSTANCE MEMORY:    0(I2),9(I4),18(I3)/-
        
        Log("W2: RTPS Operation ACK_CACHE_CHANGE SN 22", INFO);
        rtps            := DEFAULT_RTPS_WRITER_TEST;
        rtps.opcode     := ACK_CACHE_CHANGE;
        rtps.cc.seq_nr  := gen_sn(22);
        ind <= 2;
        start_rtps;
        wait_on_sig(rtps_done);
        wait_on_idle;
        
        cc                  := DEFAULT_CACHE_CHANGE;
        cc.serialized_key   := FALSE;
        cc.kind             := ALIVE;
        cc.instance         := kh3;
        cc.payload          := gen_payload(kh3,9);
        cc.seq_nr           := gen_sn(23);
        cc.src_timestamp    := gen_duration(23,0);
        
        -- TEST: ADD SAMPLE ON MAX_SAMPLES & MAX_SAMPLES_PER_INSTANCE [KNOWN INSTANCE,WITH ACKed INSTANCE SAMPLES]
        
        Log("W2: DDS Operation WRITE [TS 23s, Instance 3, Aligned Payload]", INFO);
        Log("W2: ACCEPTED", DEBUG);
        dds            := DEFAULT_DDS_WRITER_TEST;
        dds.opcode     := WRITE;
        dds.cc         := cc;
        dds.ret_code   := RETCODE_OK;
        ind <= 2;
        start_dds;
        wait_on_sig(dds_done);
        wait_on_idle;
        cc1 := cc;
        AlertIf(empty_sample_head(2) /= 11, "Sample Memory Empty List Head incorrect", FAILURE);
        AlertIf(empty_payload_head(2) /= 20, "Payload Memory Empty List Head incorrect", FAILURE);
        AlertIf(empty_inst_head(2) /= 26, "Instance Memory Empty List Head incorrect", FAILURE);
        -- SAMPLE MEMORY:      22(I2S16),0(I2S17),44(I3S21),33(I3S23)/11
        -- PAYLOAD MEMORY:     40(I2S16),0(I2S17),30(I3S21),10(I3S23)/20
        -- INSTANCE MEMORY:    0(I2),9(I4),18(I3)/-
        
        -- VALIDATE STATE
        
        Log("W2: RTPS Operation GET_MIN_SN", INFO);
        Log("W2: Expected SN 16", DEBUG);
        rtps           := DEFAULT_RTPS_WRITER_TEST;
        rtps.opcode    := GET_MIN_SN;
        rtps.cc.seq_nr := gen_sn(16);
        ind <= 2;
        start_rtps;
        wait_on_sig(rtps_done);
        wait_on_idle;
        
        Log("W2: RTPS Operation GET_MAX_SN", INFO);
        Log("W2: Expected SN 23", DEBUG);
        rtps           := DEFAULT_RTPS_WRITER_TEST;
        rtps.opcode    := GET_MAX_SN;
        rtps.cc.seq_nr := gen_sn(23);
        ind <= 2;
        start_rtps;
        wait_on_sig(rtps_done);
        wait_on_idle;
        
        Log("W2: RTPS Operation GET_CACHE_CHANGE SN 21", INFO);
        rtps           := DEFAULT_RTPS_WRITER_TEST;
        rtps.opcode    := GET_CACHE_CHANGE;
        rtps.cc        := cc4;
        ind <= 2;
        start_rtps;
        wait_on_sig(rtps_done);
        wait_on_idle;
        
        Log("W2: RTPS Operation GET_CACHE_CHANGE SN 22", INFO);
        rtps           := DEFAULT_RTPS_WRITER_TEST;
        rtps.opcode    := GET_CACHE_CHANGE;
        rtps.cc.seq_nr := gen_sn(22);
        rtps.ret_code  := INVALID;
        ind <= 2;
        start_rtps;
        wait_on_sig(rtps_done);
        wait_on_idle;
        
        Log("W2: RTPS Operation GET_CACHE_CHANGE SN 23", INFO);
        rtps           := DEFAULT_RTPS_WRITER_TEST;
        rtps.opcode    := GET_CACHE_CHANGE;
        rtps.cc        := cc1;
        ind <= 2;
        start_rtps;
        wait_on_sig(rtps_done);
        wait_on_idle;
        
        cc                  := DEFAULT_CACHE_CHANGE;
        cc.serialized_key   := TRUE;
        cc.kind             := NOT_ALIVE_UNREGISTERED;
        cc.instance         := kh1;
        cc.payload          := gen_payload(kh1,5);
        cc.seq_nr           := gen_sn(24);
        cc.src_timestamp    := gen_duration(24,0);
        
        -- TEST: UNREGISTER UNKNOWN INSTANCE
        
        Log("W2: DDS Operation UNREGISTER_INSTANCE [TS 24s, HANDLE_NIL, Instance 1]", INFO);
        Log("W2: IGNORED [Instance not Registered]", DEBUG);
        dds            := DEFAULT_DDS_WRITER_TEST;
        dds.opcode     := UNREGISTER_INSTANCE;
        dds.cc         := cc;
        dds.cc.instance:= HANDLE_NIL;
        dds.ret_code   := RETCODE_OK;
        ind <= 2;
        start_dds;
        wait_on_sig(dds_done);
        wait_on_idle;
        
        cc                  := DEFAULT_CACHE_CHANGE;
        cc.serialized_key   := FALSE;
        cc.kind             := ALIVE;
        cc.instance         := kh1;
        cc.payload          := gen_payload(kh1,9);
        cc.seq_nr           := gen_sn(24);
        cc.src_timestamp    := gen_duration(24,0);
        
        -- TEST: ADD SAMPLE ON MAX_SAMPLES & MAX_INSTANCES [UNKNOWN INSTANCE,WITH STALE INSTANCE, WITHOUT ACKed SAMPLE]
        -- TEST: REMOVE STALE INSTANCE WITH 0 SAMPLES
        
        Log("W2: DDS Operation WRITE [TS 24s, Instance 1, HANDLE_NIL, Aligned Payload]", INFO);
        Log("W2: ACCEPTED", DEBUG);
        dds            := DEFAULT_DDS_WRITER_TEST;
        dds.opcode     := WRITE;
        dds.cc         := cc;
        dds.cc.instance:= HANDLE_NIL;
        dds.ret_code   := RETCODE_OK;
        ind <= 2;
        start_dds;
        wait_on_sig(dds_done);
        wait_on_idle;
        cc2 := cc;
        AlertIf(empty_sample_head(2) /= 22, "Sample Memory Empty List Head incorrect", FAILURE);
        AlertIf(empty_payload_head(2) /= 40, "Payload Memory Empty List Head incorrect", FAILURE);
        AlertIf(empty_inst_head(2) /= 26, "Instance Memory Empty List Head incorrect", FAILURE);
        -- SAMPLE MEMORY:      0(I2S17),44(I3S21),33(I3S23),11(I1S24)/22
        -- PAYLOAD MEMORY:     0(I2S17),30(I3S21),10(I3S23),20(I1S24)/40
        -- INSTANCE MEMORY:    9(I1),0(I2),18(I3)/-
        
        cc                  := DEFAULT_CACHE_CHANGE;
        cc.serialized_key   := FALSE;
        cc.kind             := ALIVE;
        cc.instance         := kh4;
        cc.payload          := gen_payload(kh4,9);
        cc.seq_nr           := gen_sn(25);
        cc.src_timestamp    := gen_duration(25,0);
        
        -- TEST: ADD SAMPLE ON MAX_SAMPLES & MAX_INSTANCES [UNKNOWN INSTANCE,WITHOUT STALE INSTANCES,WITHOUT ACKed SAMPLES]
        
        Log("W2: DDS Operation WRITE [TS 25s, Instance 4, HANDLE_NIL Aligned Payload]", INFO);
        Log("W2: REJECTED [MAX_INSTANCES exceeded]", DEBUG);
        dds            := DEFAULT_DDS_WRITER_TEST;
        dds.opcode     := WRITE;
        dds.cc         := cc;
        dds.cc.instance:= HANDLE_NIL;
        dds.ret_code   := RETCODE_OUT_OF_RESOURCES;
        ind <= 2;
        start_dds;
        wait_on_sig(dds_done);
        wait_on_idle;
        
        Log("W2: RTPS Operation ACK_CACHE_CHANGE SN 21", INFO);
        rtps            := DEFAULT_RTPS_WRITER_TEST;
        rtps.opcode     := ACK_CACHE_CHANGE;
        rtps.cc.seq_nr  := gen_sn(21);
        ind <= 2;
        start_rtps;
        wait_on_sig(rtps_done);
        wait_on_idle;
        
        -- TEST: ADD SAMPLE ON MAX_SAMPLES & MAX_INSTANCES [UNKNOWN INSTANCE,WITHOUT STALE INSTANCE, WITH ACKed SAMPLE]
        
        Log("W2: DDS Operation WRITE [TS 25s, Instance 4, HANDLE_NIL, Aligned Payload]", INFO);
        Log("W2: REJECTED [MAX_INSTANCES exceeded]", DEBUG);
        dds            := DEFAULT_DDS_WRITER_TEST;
        dds.opcode     := WRITE;
        dds.cc         := cc;
        dds.cc.instance:= HANDLE_NIL;
        dds.ret_code   := RETCODE_OUT_OF_RESOURCES;
        ind <= 2;
        start_dds;
        wait_on_sig(dds_done);
        wait_on_idle;
        
        Log("W2: RTPS Operation ACK_CACHE_CHANGE SN 17", INFO);
        rtps            := DEFAULT_RTPS_WRITER_TEST;
        rtps.opcode     := ACK_CACHE_CHANGE;
        rtps.cc.seq_nr  := gen_sn(17);
        ind <= 2;
        start_rtps;
        wait_on_sig(rtps_done);
        wait_on_idle;
        
        -- TEST: ADD SAMPLE ON MAX_SAMPLES & MAX_INSTANCES [UNKNOWN INSTANCE,WITH STALE INSTANCE (>0 SAMPLES)]
        -- TEST: ADD SAMPLE ON MAX_SAMPLES & MAX_INSTANCES [UNKNOWN INSTANCE,WITH STALE INSTANCE, WITH ACKed SAMPLE]
        
        Log("W2: DDS Operation WRITE [TS 25s, Instance 4, HANDLE_NIL, Aligned Payload]", INFO);
        Log("W2: ACCEPTED", DEBUG);
        dds            := DEFAULT_DDS_WRITER_TEST;
        dds.opcode     := WRITE;
        dds.cc         := cc;
        dds.cc.instance:= HANDLE_NIL;
        dds.ret_code   := RETCODE_OK;
        ind <= 2;
        start_dds;
        wait_on_sig(dds_done);
        wait_on_idle;
         cc3 := cc;
        AlertIf(empty_sample_head(2) /= 0, "Sample Memory Empty List Head incorrect", FAILURE);
        AlertIf(empty_payload_head(2) /= 0, "Payload Memory Empty List Head incorrect", FAILURE);
        AlertIf(empty_inst_head(2) /= 26, "Instance Memory Empty List Head incorrect", FAILURE);
        -- SAMPLE MEMORY:      44(I3S21),33(I3S23),11(I1S24),22(I4S25)/0
        -- PAYLOAD MEMORY:     30(I3S21),10(I3S23),20(I1S24),40(I4S25)/0
        -- INSTANCE MEMORY:    0(I4),9(I1),18(I3)/-
        
        -- TEST: ACK_CACHE_CHANGE [ALREADY ACKed SN]
        
        Log("W2: RTPS Operation ACK_CACHE_CHANGE SN 21", INFO);
        rtps            := DEFAULT_RTPS_WRITER_TEST;
        rtps.opcode     := ACK_CACHE_CHANGE;
        rtps.cc.seq_nr  := gen_sn(21);
        ind <= 2;
        start_rtps;
        wait_on_sig(rtps_done);
        wait_on_idle;
        
        cc                  := DEFAULT_CACHE_CHANGE;
        cc.serialized_key   := FALSE;
        cc.kind             := ALIVE;
        cc.instance         := kh2;
        cc.payload          := gen_payload(kh2,9);
        cc.seq_nr           := gen_sn(26);
        cc.src_timestamp    := gen_duration(26,0);
        
        -- TEST: ADD SAMPLE ON MAX_INSTANCES [UNKNOWN INSTANCE, WITHOUT STALE INSTANCES]
        
        Log("W2: DDS Operation WRITE [TS 26s, Instance 2, HANDLE_NIL, Aligned Payload]", INFO);
        Log("W2: REJECTED [MAX_INSTANCES exceeded]", DEBUG);
        dds            := DEFAULT_DDS_WRITER_TEST;
        dds.opcode     := WRITE;
        dds.cc         := cc;
        dds.cc.instance:= HANDLE_NIL;
        dds.ret_code   := RETCODE_OUT_OF_RESOURCES;
        ind <= 2;
        start_dds;
        wait_on_sig(dds_done);
        wait_on_idle;
        
        Log("W2: RTPS Operation ACK_CACHE_CHANGE SN 24", INFO);
        rtps            := DEFAULT_RTPS_WRITER_TEST;
        rtps.opcode     := ACK_CACHE_CHANGE;
        rtps.cc.seq_nr  := gen_sn(24);
        ind <= 2;
        start_rtps;
        wait_on_sig(rtps_done);
        wait_on_idle;
        
        -- TEST: ADD SAMPLE ON MAX_INSTANCES [UNKNOWN INSTANCE, WITH FULLY ACKed INSTANCE, WITHOUT STALE INSTANCE]
        
        Log("W2: DDS Operation WRITE [TS 26s, Instance 2, HANDLE_NIL, Aligned Payload]", INFO);
        Log("W2: REJECTED [MAX_INSTANCES exceeded]", DEBUG);
        dds            := DEFAULT_DDS_WRITER_TEST;
        dds.opcode     := WRITE;
        dds.cc         := cc;
        dds.cc.instance:= HANDLE_NIL;
        dds.ret_code   := RETCODE_OUT_OF_RESOURCES;
        ind <= 2;
        start_dds;
        wait_on_sig(dds_done);
        wait_on_idle;
        
        cc                  := DEFAULT_CACHE_CHANGE;
        cc.serialized_key   := TRUE;
        cc.kind             := NOT_ALIVE_UNREGISTERED;
        cc.instance         := kh1;
        cc.payload          := gen_payload(kh1,5);
        cc.seq_nr           := gen_sn(26);
        cc.src_timestamp    := gen_duration(26,0);
        
        Log("W2: DDS Operation UNREGISTER_INSTANCE [TS 26s, Instance 1]", INFO);
        Log("W2: ACCEPTED", DEBUG);
        dds            := DEFAULT_DDS_WRITER_TEST;
        dds.opcode     := UNREGISTER_INSTANCE;
        dds.cc         := cc;
        dds.ret_code   := RETCODE_OK;
        ind <= 2;
        start_dds;
        wait_on_sig(dds_done);
        wait_on_idle;
        cc4 := cc;
        AlertIf(empty_sample_head(2) /= 44, "Sample Memory Empty List Head incorrect", FAILURE);
        AlertIf(empty_payload_head(2) /= 30, "Payload Memory Empty List Head incorrect", FAILURE);
        AlertIf(empty_inst_head(2) /= 26, "Instance Memory Empty List Head incorrect", FAILURE);
        -- SAMPLE MEMORY:      33(I3S23),11(I1S24),22(I4S25),0(I1S26)/44
        -- PAYLOAD MEMORY:     10(I3S23),20(I1S24),40(I4S25),0(I1S26)/30
        -- INSTANCE MEMORY:    0(I4),9(I1),18(I3)/-
        
        Log("W2: RTPS Operation ACK_CACHE_CHANGE SN 24", INFO);
        rtps            := DEFAULT_RTPS_WRITER_TEST;
        rtps.opcode     := ACK_CACHE_CHANGE;
        rtps.cc.seq_nr  := gen_sn(24);
        ind <= 2;
        start_rtps;
        wait_on_sig(rtps_done);
        wait_on_idle;
        
        -- TEST: REGISTER ON UNREGISTERED INSTANCE
        
        Log("W2: DDS Operation REGISTER_INSTANCE 1", INFO);
        Log("W2: ACCEPTED", DEBUG);
        dds            := DEFAULT_DDS_WRITER_TEST;
        dds.opcode     := REGISTER_INSTANCE;
        dds.cc         := cc;
        dds.ret_code   := RETCODE_OK;
        ind <= 2;
        start_dds;
        wait_on_sig(dds_done);
        wait_on_idle;
        
        cc                  := DEFAULT_CACHE_CHANGE;
        cc.serialized_key   := FALSE;
        cc.kind             := ALIVE;
        cc.instance         := kh2;
        cc.payload          := gen_payload(kh2,9);
        cc.seq_nr           := gen_sn(27);
        cc.src_timestamp    := gen_duration(27,0);
        
        Log("W2: DDS Operation WRITE [TS 27s, Instance 2, HANDLE_NIL, Aligned Payload]", INFO);
        Log("W2: REJECTED [MAX_INSTANCES exceeded]", DEBUG);
        dds            := DEFAULT_DDS_WRITER_TEST;
        dds.opcode     := WRITE;
        dds.cc         := cc;
        dds.cc.instance:= HANDLE_NIL;
        dds.ret_code   := RETCODE_OUT_OF_RESOURCES;
        ind <= 2;
        start_dds;
        wait_on_sig(dds_done);
        wait_on_idle;
        
        cc                  := DEFAULT_CACHE_CHANGE;
        cc.serialized_key   := TRUE;
        cc.kind             := NOT_ALIVE_UNREGISTERED;
        cc.instance         := kh3;
        cc.payload          := gen_payload(kh3,5);
        cc.seq_nr           := gen_sn(27);
        cc.src_timestamp    := gen_duration(27,0);
        
        Log("W2: DDS Operation UNREGISTER_INSTANCE [TS 27s, Instance 3]", INFO);
        Log("W2: ACCEPTED", DEBUG);
        dds            := DEFAULT_DDS_WRITER_TEST;
        dds.opcode     := UNREGISTER_INSTANCE;
        dds.cc         := cc;
        dds.ret_code   := RETCODE_OK;
        ind <= 2;
        start_dds;
        wait_on_sig(dds_done);
        wait_on_idle;
        cc2 := cc;
        AlertIf(empty_sample_head(2) /= 11, "Sample Memory Empty List Head incorrect", FAILURE);
        AlertIf(empty_payload_head(2) /= 20, "Payload Memory Empty List Head incorrect", FAILURE);
        AlertIf(empty_inst_head(2) /= 26, "Instance Memory Empty List Head incorrect", FAILURE);
        -- SAMPLE MEMORY:      33(I3S23),22(I4S25),0(I1S26),44(I3S27)/11
        -- PAYLOAD MEMORY:     10(I3S23),40(I4S25),0(I1S26),30(I3S27)/20
        -- INSTANCE MEMORY:    0(I4),9(I1),18(I3)/-
        
        cc                  := DEFAULT_CACHE_CHANGE;
        cc.serialized_key   := TRUE;
        cc.kind             := NOT_ALIVE_DISPOSED;
        cc.instance         := kh3;
        cc.payload          := gen_payload(kh3,5);
        cc.seq_nr           := gen_sn(28);
        cc.src_timestamp    := gen_duration(28,0);
        
        -- TEST: DISPOSE ON UNREGISTERED INSTANCE
        
        Log("W2: DDS Operation DISPOSE [TS 28s, Instance 3]", INFO);
        Log("W2: ACCEPTED", DEBUG);
        dds            := DEFAULT_DDS_WRITER_TEST;
        dds.opcode     := DISPOSE;
        dds.cc         := cc;
        dds.ret_code   := RETCODE_OK;
        ind <= 2;
        start_dds;
        wait_on_sig(dds_done);
        wait_on_idle;
        cc1 := cc;
        AlertIf(empty_sample_head(2) /= 33, "Sample Memory Empty List Head incorrect", FAILURE);
        AlertIf(empty_payload_head(2) /= 10, "Payload Memory Empty List Head incorrect", FAILURE);
        AlertIf(empty_inst_head(2) /= 26, "Instance Memory Empty List Head incorrect", FAILURE);
        -- SAMPLE MEMORY:      22(I4S25),0(I1S26),44(I3S27),11(I3S28)/33
        -- PAYLOAD MEMORY:     40(I4S25),0(I1S26),30(I3S27),20(I3S28)/10
        -- INSTANCE MEMORY:    0(I4),9(I1),18(I3)/-
        
        Log("W2: RTPS Operation ACK_CACHE_CHANGE SN 27", INFO);
        rtps            := DEFAULT_RTPS_WRITER_TEST;
        rtps.opcode     := ACK_CACHE_CHANGE;
        rtps.cc.seq_nr  := gen_sn(27);
        ind <= 2;
        start_rtps;
        wait_on_sig(rtps_done);
        wait_on_idle;
        
        Log("W2: RTPS Operation ACK_CACHE_CHANGE SN 28", INFO);
        rtps            := DEFAULT_RTPS_WRITER_TEST;
        rtps.opcode     := ACK_CACHE_CHANGE;
        rtps.cc.seq_nr  := gen_sn(28);
        ind <= 2;
        start_rtps;
        wait_on_sig(rtps_done);
        wait_on_idle;
        
        cc                  := DEFAULT_CACHE_CHANGE;
        cc.serialized_key   := FALSE;
        cc.kind             := ALIVE;
        cc.instance         := kh2;
        cc.payload          := gen_payload(kh2,9);
        cc.seq_nr           := gen_sn(29);
        cc.src_timestamp    := gen_duration(29,0);
        
        Log("W2: DDS Operation WRITE [TS 29s, Instance 2, HANDLE_NIL, Aligned Payload]", INFO);
        Log("W2: ACCEPTED", DEBUG);
        dds            := DEFAULT_DDS_WRITER_TEST;
        dds.opcode     := WRITE;
        dds.cc         := cc;
        dds.cc.instance:= HANDLE_NIL;
        dds.ret_code   := RETCODE_OK;
        ind <= 2;
        start_dds;
        wait_on_sig(dds_done);
        wait_on_idle;
        cc1 := cc;
        AlertIf(empty_sample_head(2) /= 44, "Sample Memory Empty List Head incorrect", FAILURE);
        AlertIf(empty_payload_head(2) /= 20, "Payload Memory Empty List Head incorrect", FAILURE);
        AlertIf(empty_inst_head(2) /= 26, "Instance Memory Empty List Head incorrect", FAILURE);
        -- SAMPLE MEMORY:      22(I4S25),0(I1S26),33(I2S29)/44,11
        -- PAYLOAD MEMORY:     40(I4S25),0(I1S26),10(I2S29)/20,30
        -- INSTANCE MEMORY:    18(I2),0(I4),9(I1)/-
        
        -- VALIDATE STATE
        
        Log("W2: RTPS Operation GET_MIN_SN", INFO);
        Log("W2: Expected SN 25", DEBUG);
        rtps           := DEFAULT_RTPS_WRITER_TEST;
        rtps.opcode    := GET_MIN_SN;
        rtps.cc.seq_nr := gen_sn(25);
        ind <= 2;
        start_rtps;
        wait_on_sig(rtps_done);
        wait_on_idle;
        
        Log("W2: RTPS Operation GET_MAX_SN", INFO);
        Log("W2: Expected SN 28", DEBUG);
        rtps           := DEFAULT_RTPS_WRITER_TEST;
        rtps.opcode    := GET_MAX_SN;
        rtps.cc.seq_nr := gen_sn(29);
        ind <= 2;
        start_rtps;
        wait_on_sig(rtps_done);
        wait_on_idle;
        
        Log("W2: RTPS Operation GET_CACHE_CHANGE SN 25", INFO);
        rtps           := DEFAULT_RTPS_WRITER_TEST;
        rtps.opcode    := GET_CACHE_CHANGE;
        rtps.cc        := cc3;
        ind <= 2;
        start_rtps;
        wait_on_sig(rtps_done);
        wait_on_idle;
        
        Log("W2: RTPS Operation GET_CACHE_CHANGE SN 26", INFO);
        rtps           := DEFAULT_RTPS_WRITER_TEST;
        rtps.opcode    := GET_CACHE_CHANGE;
        rtps.cc        := cc4;
        ind <= 2;
        start_rtps;
        wait_on_sig(rtps_done);
        wait_on_idle;
        
        Log("W2: RTPS Operation GET_CACHE_CHANGE SN 29", INFO);
        rtps           := DEFAULT_RTPS_WRITER_TEST;
        rtps.opcode    := GET_CACHE_CHANGE;
        rtps.cc        := cc1;
        ind <= 2;
        start_rtps;
        wait_on_sig(rtps_done);
        wait_on_idle;
        
        cc                  := DEFAULT_CACHE_CHANGE;
        cc.serialized_key   := FALSE;
        cc.kind             := ALIVE;
        cc.instance         := kh2;
        cc.payload          := gen_payload(kh2,9);
        cc.seq_nr           := gen_sn(30);
        cc.src_timestamp    := gen_duration(30,0);
        
        Log("W2: DDS Operation WRITE [TS 30s, Instance 2, Aligned Payload]", INFO);
        Log("W2: ACCEPTED", DEBUG);
        dds            := DEFAULT_DDS_WRITER_TEST;
        dds.opcode     := WRITE;
        dds.cc         := cc;
        dds.ret_code   := RETCODE_OK;
        ind <= 2;
        start_dds;
        wait_on_sig(dds_done);
        wait_on_idle;
        cc2 := cc;
        AlertIf(empty_sample_head(2) /= 11, "Sample Memory Empty List Head incorrect", FAILURE);
        AlertIf(empty_payload_head(2) /= 30, "Payload Memory Empty List Head incorrect", FAILURE);
        AlertIf(empty_inst_head(2) /= 26, "Instance Memory Empty List Head incorrect", FAILURE);
        -- SAMPLE MEMORY:      22(I4S25),0(I1S26),33(I2S29),44(I2S30)/11
        -- PAYLOAD MEMORY:     40(I4S25),0(I1S26),10(I2S29),20(I2S30)/30
        -- INSTANCE MEMORY:    18(I2),0(I4),9(I1)/-
        
        Log("W2: RTPS Operation ACK_CACHE_CHANGE SN 25", INFO);
        rtps            := DEFAULT_RTPS_WRITER_TEST;
        rtps.opcode     := ACK_CACHE_CHANGE;
        rtps.cc.seq_nr  := gen_sn(25);
        ind <= 2;
        start_rtps;
        wait_on_sig(rtps_done);
        wait_on_idle;
        
        Log("W2: RTPS Operation ACK_CACHE_CHANGE SN 26", INFO);
        rtps            := DEFAULT_RTPS_WRITER_TEST;
        rtps.opcode     := ACK_CACHE_CHANGE;
        rtps.cc.seq_nr  := gen_sn(26);
        ind <= 2;
        start_rtps;
        wait_on_sig(rtps_done);
        wait_on_idle;
        
        cc                  := DEFAULT_CACHE_CHANGE;
        cc.serialized_key   := FALSE;
        cc.kind             := ALIVE;
        cc.instance         := kh4;
        cc.payload          := gen_payload(kh4,9);
        cc.seq_nr           := gen_sn(31);
        cc.src_timestamp    := gen_duration(31,0);
        
        -- TEST: ADD SAMPLE ON MAX_SAMPLES [KNOWN INSTANCE,WITH ACKed SAMPLES (>1)]
        
        Log("W2: DDS Operation WRITE [TS 31s, Instance 4, Aligned Payload]", INFO);
        Log("W2: ACCEPTED", DEBUG);
        dds            := DEFAULT_DDS_WRITER_TEST;
        dds.opcode     := WRITE;
        dds.cc         := cc;
        dds.ret_code   := RETCODE_OK;
        ind <= 2;
        start_dds;
        wait_on_sig(dds_done);
        wait_on_idle;
        cc3 := cc;
        AlertIf(empty_sample_head(2) /= 22, "Sample Memory Empty List Head incorrect", FAILURE);
        AlertIf(empty_payload_head(2) /= 40, "Payload Memory Empty List Head incorrect", FAILURE);
        AlertIf(empty_inst_head(2) /= 26, "Instance Memory Empty List Head incorrect", FAILURE);
        -- SAMPLE MEMORY:      0(I1S26),33(I2S29),44(I2S30),11(I4S31)/22
        -- PAYLOAD MEMORY:     0(I1S26),10(I2S29),20(I2S30),30(I4S31)/40
        -- INSTANCE MEMORY:    18(I2),0(I4),9(I1)/-
        
        Log("W2: RTPS Operation REMOVE_CACHE_CHANGE SN 31", INFO);
        rtps            := DEFAULT_RTPS_WRITER_TEST;
        rtps.opcode     := REMOVE_CACHE_CHANGE;
        rtps.cc.seq_nr  := gen_sn(31);
        ind <= 2;
        start_rtps;
        wait_on_sig(rtps_done);
        wait_on_idle;
        AlertIf(empty_sample_head(2) /= 22, "Sample Memory Empty List Head incorrect", FAILURE);
        AlertIf(empty_payload_head(2) /= 30, "Payload Memory Empty List Head incorrect", FAILURE);
        AlertIf(empty_inst_head(2) /= 26, "Instance Memory Empty List Head incorrect", FAILURE);
        -- SAMPLE MEMORY:      0(I1S26),33(I2S29),44(I2S30)/22,11
        -- PAYLOAD MEMORY:     0(I1S26),10(I2S29),20(I2S30)/30,40
        -- INSTANCE MEMORY:    18(I2),0(I4),9(I1)/-
        
        Log("W2: RTPS Operation ACK_CACHE_CHANGE SN 29", INFO);
        rtps            := DEFAULT_RTPS_WRITER_TEST;
        rtps.opcode     := ACK_CACHE_CHANGE;
        rtps.cc.seq_nr  := gen_sn(29);
        ind <= 2;
        start_rtps;
        wait_on_sig(rtps_done);
        wait_on_idle;
        
        Log("W2: RTPS Operation ACK_CACHE_CHANGE SN 30", INFO);
        rtps            := DEFAULT_RTPS_WRITER_TEST;
        rtps.opcode     := ACK_CACHE_CHANGE;
        rtps.cc.seq_nr  := gen_sn(30);
        ind <= 2;
        start_rtps;
        wait_on_sig(rtps_done);
        wait_on_idle;
        
        cc                  := DEFAULT_CACHE_CHANGE;
        cc.serialized_key   := FALSE;
        cc.kind             := ALIVE;
        cc.instance         := kh2;
        cc.payload          := gen_payload(kh2,9);
        cc.seq_nr           := gen_sn(32);
        cc.src_timestamp    := gen_duration(32,0);
        
        -- TEST: ADD SAMPLE ON MAX_SAMPLES_PER_INSTANCE [KNOWN INSTANCE, WITH ACKed INSTANCE SAMPLES(>1)]
        
        Log("W2: DDS Operation WRITE [TS 32s, Instance 2, Aligned Payload]", INFO);
        Log("W2: ACCEPTED", DEBUG);
        dds            := DEFAULT_DDS_WRITER_TEST;
        dds.opcode     := WRITE;
        dds.cc         := cc;
        dds.ret_code   := RETCODE_OK;
        ind <= 2;
        start_dds;
        wait_on_sig(dds_done);
        wait_on_idle;
        cc1 := cc;
        AlertIf(empty_sample_head(2) /= 11, "Sample Memory Empty List Head incorrect", FAILURE);
        AlertIf(empty_payload_head(2) /= 10, "Payload Memory Empty List Head incorrect", FAILURE);
        AlertIf(empty_inst_head(2) /= 26, "Instance Memory Empty List Head incorrect", FAILURE);
        -- SAMPLE MEMORY:      0(I1S26),44(I2S30),22(I2S32)/11,33
        -- PAYLOAD MEMORY:     0(I1S26),20(I2S30),30(I2S32)/10,40
        -- INSTANCE MEMORY:    18(I2),0(I4),9(I1)/-
        
        -- VALIDATE STATE
        
        Log("W2: RTPS Operation GET_MIN_SN", INFO);
        Log("W2: Expected SN 26", DEBUG);
        rtps           := DEFAULT_RTPS_WRITER_TEST;
        rtps.opcode    := GET_MIN_SN;
        rtps.cc.seq_nr := gen_sn(26);
        ind <= 2;
        start_rtps;
        wait_on_sig(rtps_done);
        wait_on_idle;
        
        Log("W2: RTPS Operation GET_MAX_SN", INFO);
        Log("W2: Expected SN 32", DEBUG);
        rtps           := DEFAULT_RTPS_WRITER_TEST;
        rtps.opcode    := GET_MAX_SN;
        rtps.cc.seq_nr := gen_sn(32);
        ind <= 2;
        start_rtps;
        wait_on_sig(rtps_done);
        wait_on_idle;
        
        Log("W2: RTPS Operation GET_CACHE_CHANGE SN 26", INFO);
        rtps           := DEFAULT_RTPS_WRITER_TEST;
        rtps.opcode    := GET_CACHE_CHANGE;
        rtps.cc        := cc4;
        ind <= 2;
        start_rtps;
        wait_on_sig(rtps_done);
        wait_on_idle;
        
        Log("W2: RTPS Operation GET_CACHE_CHANGE SN 30", INFO);
        rtps           := DEFAULT_RTPS_WRITER_TEST;
        rtps.opcode    := GET_CACHE_CHANGE;
        rtps.cc        := cc2;
        ind <= 2;
        start_rtps;
        wait_on_sig(rtps_done);
        wait_on_idle;
        
        Log("W2: RTPS Operation GET_CACHE_CHANGE SN 32", INFO);
        rtps           := DEFAULT_RTPS_WRITER_TEST;
        rtps.opcode    := GET_CACHE_CHANGE;
        rtps.cc        := cc1;
        ind <= 2;
        start_rtps;
        wait_on_sig(rtps_done);
        wait_on_idle;
        
        -- TEST: INSTANCE LOOKUP [KNOWN INSTANCE]
        
        Log("W2: DDS Operation LOOKUP_INSTANCE [Instance 2]", INFO);
        dds            := DEFAULT_DDS_WRITER_TEST;
        dds.opcode     := LOOKUP_INSTANCE;
        dds.cc         := cc;
        ind <= 2;
        start_dds;
        wait_on_sig(dds_done);
        wait_on_idle;
        
        cc                  := DEFAULT_CACHE_CHANGE;
        cc.serialized_key   := FALSE;
        cc.kind             := ALIVE;
        cc.instance         := kh3;
        cc.payload          := gen_payload(kh3,9);
        
        -- TEST: INSTANCE LOOKUP [UNKNOWN INSTANCE]
        
        Log("W2: DDS Operation LOOKUP_INSTANCE [Unknown Instance]", INFO);
        dds            := DEFAULT_DDS_WRITER_TEST;
        dds.opcode     := LOOKUP_INSTANCE;
        dds.cc         := cc;
        dds.cc.instance:= HANDLE_NIL;
        ind <= 2;
        start_dds;
        wait_on_sig(dds_done);
        wait_on_idle;
        
        wait_on_completion;
        TranscriptOpen(RESULTS_FILE, APPEND_MODE);
        SetTranscriptMirror;
        ReportAlerts;
        TranscriptClose;
        std.env.stop;
        wait;
    end process;
    
    clock_prc : process
    begin
        clk <= '0';
        wait for 25 ns;
        clk <= '1';
        wait for 25 ns;
    end process;
    
    dds_prc : process(all)
    begin
        if rising_edge(clk) then
            dds_done   <= '0';
            case (dds_stage) is
                when IDLE =>
                    if (dds_start = '1') then
                        dds_stage  <= START;
                    else
                        dds_done   <= '1';
                    end if;
                when START =>
                    if (ack_dds(ind) = '1') then
                        dds_stage  <= PUSH;
                        dds_cnt    <= 0;
                    end if;
                when PUSH =>
                    if (ready_in_dds(ind) = '1') then
                        dds_cnt    <= dds_cnt + 1;
                        if (dds_cnt = dds.cc.payload.length-1) then
                            -- DEFAULT
                            dds_stage  <= DONE;
                        end if;
                    end if;
                when DONE =>
                    if (done_dds(ind) = '1') then
                        if (dds.opcode = REGISTER_INSTANCE or dds.opcode = LOOKUP_INSTANCE) then
                            AffirmIfEqual(ih_id, to_unsigned(instance_handle_out_dds(ind)), to_unsigned(dds.cc.instance));
                        else
                            AffirmIfEqual(ret_id, return_code_dds(ind), dds.ret_code);
                        end if;
                        dds_stage  <= IDLE;
                    end if;
            end case;
        end if;
        
        -- DEFAULT
        start_dds               <= (others => '0');
        opcode_dds              <= (others => NOP);
        valid_in_dds            <= (others => '0');
        last_word_in_dds        <= (others => '0');
        data_in_dds             <= (others => (others => '0'));
        instance_handle_in_dds  <= (others => HANDLE_NIL);
        source_ts_dds           <= (others => TIME_INVALID);
        ready_out_dds           <= (others => '0');
        
        case (dds_stage) is
            when START =>
                start_dds(ind)              <= '1';
                opcode_dds(ind)             <= dds.opcode;
                instance_handle_in_dds(ind) <= dds.cc.instance;
                source_ts_dds(ind)          <= dds.cc.src_timestamp;
            when PUSH =>
                valid_in_dds(ind)       <= '1';
                data_in_dds(ind)        <= dds.cc.payload.data(dds_cnt);
                last_word_in_dds(ind)   <= dds.cc.payload.last(dds_cnt);
            when others =>
                null;
        end case;
    end process;
    
    rtps_prc : process(all)
    begin
        if rising_edge(clk) then
            rtps_done    <= '0';
            case (rtps_stage) is
                when IDLE =>
                    if (rtps_start = '1') then
                        rtps_stage   <= START;
                    else
                        rtps_done    <= '1';
                    end if;
                when START =>
                    if (ack_rtps(ind) = '1') then
                        rtps_stage   <= DONE;
                    end if;
                when DONE =>
                    if (done_rtps(ind) = '1') then
                        -- DEFAULT
                        rtps_stage   <= IDLE;
                        
                        AffirmIfEqual(ret_id, HISTORY_CACHE_RESPONSE_TYPE'pos(ret_rtps(ind)), HISTORY_CACHE_RESPONSE_TYPE'pos(rtps.ret_code));
                        case (rtps.opcode) is
                            when GET_CACHE_CHANGE =>
                                if (rtps.ret_code = OK) then
                                    AffirmIfEqual(inst_id, to_unsigned(cc_instance_handle(ind)), to_unsigned(rtps.cc.instance));
                                    AffirmIfEqual(kind_id, CACHE_CHANGE_KIND_TYPE'pos(cc_kind(ind)), CACHE_CHANGE_KIND_TYPE'pos(rtps.cc.kind));
                                    AffirmIfEqual(sn_id, to_unsigned(cc_seq_nr(ind)), to_unsigned(rtps.cc.seq_nr));
                                    AffirmIfEqual(ts_id, to_unsigned(cc_source_timestamp(ind)), to_unsigned(rtps.cc.src_timestamp));
                                    rtps_stage   <= CHECK;
                                    rtps_cnt     <= 0;
                                end if;
                            when GET_MIN_SN =>
                                AffirmIfEqual(sn_id, to_unsigned(cc_seq_nr(ind)), to_unsigned(rtps.cc.seq_nr));
                            when GET_MAX_SN =>
                                AffirmIfEqual(sn_id, to_unsigned(cc_seq_nr(ind)), to_unsigned(rtps.cc.seq_nr));
                            when others =>
                                null;
                        end case;
                    end if;
                when CHECK =>
                    if (valid_out_rtps(ind) = '1') then
                        AffirmIfEqual(data_id, last_word_out_rtps(ind) & data_out_rtps(ind), rtps.cc.payload.last(rtps_cnt) & rtps.cc.payload.data(rtps_cnt));
                        rtps_cnt <= rtps_cnt + 1;
                        if (rtps_cnt = rtps.cc.payload.length-1) then
                            rtps_stage   <= IDLE;
                        end if;
                    end if;
            end case;
        end if;
        
        -- DEFAULT
        start_rtps      <= (others => '0');
        opcode_rtps     <= (others => NOP);
        seq_nr_rtps     <= (others => SEQUENCENUMBER_UNKNOWN);
        get_data_rtps   <= (others => '0');
        ready_out_rtps  <= (others => '0');
        
        case (rtps_stage) is
            when START =>
                start_rtps(ind)     <= '1';
                opcode_rtps(ind)    <= rtps.opcode;
                seq_nr_rtps(ind)    <= rtps.cc.seq_nr;
            when DONE =>
                if (done_rtps(ind) = '1') then
                    case (rtps.opcode) is
                        when GET_CACHE_CHANGE =>
                            get_data_rtps(ind)  <= '1';
                        when others =>
                            null;
                    end case;
                end if;
            when CHECK =>
                ready_out_rtps(ind) <= '1';
            when others =>
                null;
        end case;
    end process;
    
    watchdog : process
    begin
        wait for 2 ms;
        Alert("Test timeout", FAILURE);
        std.env.stop;
    end process;
    
end architecture;