Add test 3 of the DDS Reader

Test the DDS READ, TAKE, READ_NEXT_SAMPLE, TAKE_NEXT_SAMPLE,
READ_INSTANCE, TAKE_INSTANCE, READ_NEXT_INSTANCE, TAKE_NEXT_INSTANCE
Operations.
Backport fixes to previous testbenches.
Change handling of DISPOSE Samples of unknown Instances.
This commit is contained in:
Greek 2021-04-23 19:56:51 +02:00
parent 5a0eeef1e6
commit 0beafe13b3
31 changed files with 10978 additions and 484 deletions

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@ -18,17 +18,20 @@ radix define DDS_RETCODE {
radix define SAMPLE_STATE { radix define SAMPLE_STATE {
"16#00000001#" "READ_SAMPLE_STATE", "16#00000001#" "READ_SAMPLE_STATE",
"16#00000002#" "NOT_READ_SAMPLE_STATE", "16#00000002#" "NOT_READ_SAMPLE_STATE",
"16#FFFFFFFF#" "ANY_SAMPLE_STATE",
-default binary -default binary
} }
radix define VIEW_STATE { radix define VIEW_STATE {
"16#00000001#" "NEW_VIEW_STATE", "16#00000001#" "NEW_VIEW_STATE",
"16#00000002#" "NOT_NEW_VIEW_STATE", "16#00000002#" "NOT_NEW_VIEW_STATE",
"16#FFFFFFFF#" "ANY_VIEW_STATE",
-default binary -default binary
} }
radix define INSTANCE_STATE { radix define INSTANCE_STATE {
"16#00000001#" "ALIVE_INSTANCE_STATE", "16#00000001#" "ALIVE_INSTANCE_STATE",
"16#00000002#" "NOT_ALIVE_DISPOSED_INSTANCE_STATE", "16#00000002#" "NOT_ALIVE_DISPOSED_INSTANCE_STATE",
"16#00000004#" "NOT_ALIVE_NO_WRITERS_INSTANCE_STATE", "16#00000004#" "NOT_ALIVE_NO_WRITERS_INSTANCE_STATE",
"16#FFFFFFFF#" "ANY_INSTANCE_STATE",
-default binary -default binary
} }
quietly WaveActivateNextPane {} 0 quietly WaveActivateNextPane {} 0

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@ -18,17 +18,20 @@ radix define DDS_RETCODE {
radix define SAMPLE_STATE { radix define SAMPLE_STATE {
"16#00000001#" "READ_SAMPLE_STATE", "16#00000001#" "READ_SAMPLE_STATE",
"16#00000002#" "NOT_READ_SAMPLE_STATE", "16#00000002#" "NOT_READ_SAMPLE_STATE",
"16#FFFFFFFF#" "ANY_SAMPLE_STATE",
-default binary -default binary
} }
radix define VIEW_STATE { radix define VIEW_STATE {
"16#00000001#" "NEW_VIEW_STATE", "16#00000001#" "NEW_VIEW_STATE",
"16#00000002#" "NOT_NEW_VIEW_STATE", "16#00000002#" "NOT_NEW_VIEW_STATE",
"16#FFFFFFFF#" "ANY_VIEW_STATE",
-default binary -default binary
} }
radix define INSTANCE_STATE { radix define INSTANCE_STATE {
"16#00000001#" "ALIVE_INSTANCE_STATE", "16#00000001#" "ALIVE_INSTANCE_STATE",
"16#00000002#" "NOT_ALIVE_DISPOSED_INSTANCE_STATE", "16#00000002#" "NOT_ALIVE_DISPOSED_INSTANCE_STATE",
"16#00000004#" "NOT_ALIVE_NO_WRITERS_INSTANCE_STATE", "16#00000004#" "NOT_ALIVE_NO_WRITERS_INSTANCE_STATE",
"16#FFFFFFFF#" "ANY_INSTANCE_STATE",
-default binary -default binary
} }
quietly WaveActivateNextPane {} 0 quietly WaveActivateNextPane {} 0

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@ -18,17 +18,20 @@ radix define DDS_RETCODE {
radix define SAMPLE_STATE { radix define SAMPLE_STATE {
"16#00000001#" "READ_SAMPLE_STATE", "16#00000001#" "READ_SAMPLE_STATE",
"16#00000002#" "NOT_READ_SAMPLE_STATE", "16#00000002#" "NOT_READ_SAMPLE_STATE",
"16#FFFFFFFF#" "ANY_SAMPLE_STATE",
-default binary -default binary
} }
radix define VIEW_STATE { radix define VIEW_STATE {
"16#00000001#" "NEW_VIEW_STATE", "16#00000001#" "NEW_VIEW_STATE",
"16#00000002#" "NOT_NEW_VIEW_STATE", "16#00000002#" "NOT_NEW_VIEW_STATE",
"16#FFFFFFFF#" "ANY_VIEW_STATE",
-default binary -default binary
} }
radix define INSTANCE_STATE { radix define INSTANCE_STATE {
"16#00000001#" "ALIVE_INSTANCE_STATE", "16#00000001#" "ALIVE_INSTANCE_STATE",
"16#00000002#" "NOT_ALIVE_DISPOSED_INSTANCE_STATE", "16#00000002#" "NOT_ALIVE_DISPOSED_INSTANCE_STATE",
"16#00000004#" "NOT_ALIVE_NO_WRITERS_INSTANCE_STATE", "16#00000004#" "NOT_ALIVE_NO_WRITERS_INSTANCE_STATE",
"16#FFFFFFFF#" "ANY_INSTANCE_STATE",
-default binary -default binary
} }
quietly WaveActivateNextPane {} 0 quietly WaveActivateNextPane {} 0

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@ -18,17 +18,20 @@ radix define DDS_RETCODE {
radix define SAMPLE_STATE { radix define SAMPLE_STATE {
"16#00000001#" "READ_SAMPLE_STATE", "16#00000001#" "READ_SAMPLE_STATE",
"16#00000002#" "NOT_READ_SAMPLE_STATE", "16#00000002#" "NOT_READ_SAMPLE_STATE",
"16#FFFFFFFF#" "ANY_SAMPLE_STATE",
-default binary -default binary
} }
radix define VIEW_STATE { radix define VIEW_STATE {
"16#00000001#" "NEW_VIEW_STATE", "16#00000001#" "NEW_VIEW_STATE",
"16#00000002#" "NOT_NEW_VIEW_STATE", "16#00000002#" "NOT_NEW_VIEW_STATE",
"16#FFFFFFFF#" "ANY_VIEW_STATE",
-default binary -default binary
} }
radix define INSTANCE_STATE { radix define INSTANCE_STATE {
"16#00000001#" "ALIVE_INSTANCE_STATE", "16#00000001#" "ALIVE_INSTANCE_STATE",
"16#00000002#" "NOT_ALIVE_DISPOSED_INSTANCE_STATE", "16#00000002#" "NOT_ALIVE_DISPOSED_INSTANCE_STATE",
"16#00000004#" "NOT_ALIVE_NO_WRITERS_INSTANCE_STATE", "16#00000004#" "NOT_ALIVE_NO_WRITERS_INSTANCE_STATE",
"16#FFFFFFFF#" "ANY_INSTANCE_STATE",
-default binary -default binary
} }
quietly WaveActivateNextPane {} 0 quietly WaveActivateNextPane {} 0

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@ -18,17 +18,20 @@ radix define DDS_RETCODE {
radix define SAMPLE_STATE { radix define SAMPLE_STATE {
"16#00000001#" "READ_SAMPLE_STATE", "16#00000001#" "READ_SAMPLE_STATE",
"16#00000002#" "NOT_READ_SAMPLE_STATE", "16#00000002#" "NOT_READ_SAMPLE_STATE",
"16#FFFFFFFF#" "ANY_SAMPLE_STATE",
-default binary -default binary
} }
radix define VIEW_STATE { radix define VIEW_STATE {
"16#00000001#" "NEW_VIEW_STATE", "16#00000001#" "NEW_VIEW_STATE",
"16#00000002#" "NOT_NEW_VIEW_STATE", "16#00000002#" "NOT_NEW_VIEW_STATE",
"16#FFFFFFFF#" "ANY_VIEW_STATE",
-default binary -default binary
} }
radix define INSTANCE_STATE { radix define INSTANCE_STATE {
"16#00000001#" "ALIVE_INSTANCE_STATE", "16#00000001#" "ALIVE_INSTANCE_STATE",
"16#00000002#" "NOT_ALIVE_DISPOSED_INSTANCE_STATE", "16#00000002#" "NOT_ALIVE_DISPOSED_INSTANCE_STATE",
"16#00000004#" "NOT_ALIVE_NO_WRITERS_INSTANCE_STATE", "16#00000004#" "NOT_ALIVE_NO_WRITERS_INSTANCE_STATE",
"16#FFFFFFFF#" "ANY_INSTANCE_STATE",
-default binary -default binary
} }
quietly WaveActivateNextPane {} 0 quietly WaveActivateNextPane {} 0

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@ -18,17 +18,20 @@ radix define DDS_RETCODE {
radix define SAMPLE_STATE { radix define SAMPLE_STATE {
"16#00000001#" "READ_SAMPLE_STATE", "16#00000001#" "READ_SAMPLE_STATE",
"16#00000002#" "NOT_READ_SAMPLE_STATE", "16#00000002#" "NOT_READ_SAMPLE_STATE",
"16#FFFFFFFF#" "ANY_SAMPLE_STATE",
-default binary -default binary
} }
radix define VIEW_STATE { radix define VIEW_STATE {
"16#00000001#" "NEW_VIEW_STATE", "16#00000001#" "NEW_VIEW_STATE",
"16#00000002#" "NOT_NEW_VIEW_STATE", "16#00000002#" "NOT_NEW_VIEW_STATE",
"16#FFFFFFFF#" "ANY_VIEW_STATE",
-default binary -default binary
} }
radix define INSTANCE_STATE { radix define INSTANCE_STATE {
"16#00000001#" "ALIVE_INSTANCE_STATE", "16#00000001#" "ALIVE_INSTANCE_STATE",
"16#00000002#" "NOT_ALIVE_DISPOSED_INSTANCE_STATE", "16#00000002#" "NOT_ALIVE_DISPOSED_INSTANCE_STATE",
"16#00000004#" "NOT_ALIVE_NO_WRITERS_INSTANCE_STATE", "16#00000004#" "NOT_ALIVE_NO_WRITERS_INSTANCE_STATE",
"16#FFFFFFFF#" "ANY_INSTANCE_STATE",
-default binary -default binary
} }
quietly WaveActivateNextPane {} 0 quietly WaveActivateNextPane {} 0

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@ -18,17 +18,20 @@ radix define DDS_RETCODE {
radix define SAMPLE_STATE { radix define SAMPLE_STATE {
"16#00000001#" "READ_SAMPLE_STATE", "16#00000001#" "READ_SAMPLE_STATE",
"16#00000002#" "NOT_READ_SAMPLE_STATE", "16#00000002#" "NOT_READ_SAMPLE_STATE",
"16#FFFFFFFF#" "ANY_SAMPLE_STATE",
-default binary -default binary
} }
radix define VIEW_STATE { radix define VIEW_STATE {
"16#00000001#" "NEW_VIEW_STATE", "16#00000001#" "NEW_VIEW_STATE",
"16#00000002#" "NOT_NEW_VIEW_STATE", "16#00000002#" "NOT_NEW_VIEW_STATE",
"16#FFFFFFFF#" "ANY_VIEW_STATE",
-default binary -default binary
} }
radix define INSTANCE_STATE { radix define INSTANCE_STATE {
"16#00000001#" "ALIVE_INSTANCE_STATE", "16#00000001#" "ALIVE_INSTANCE_STATE",
"16#00000002#" "NOT_ALIVE_DISPOSED_INSTANCE_STATE", "16#00000002#" "NOT_ALIVE_DISPOSED_INSTANCE_STATE",
"16#00000004#" "NOT_ALIVE_NO_WRITERS_INSTANCE_STATE", "16#00000004#" "NOT_ALIVE_NO_WRITERS_INSTANCE_STATE",
"16#FFFFFFFF#" "ANY_INSTANCE_STATE",
-default binary -default binary
} }
quietly WaveActivateNextPane {} 0 quietly WaveActivateNextPane {} 0

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@ -345,9 +345,8 @@ DESIGN DECISIONS
that it now has a live writer again. On the other hand there is no transition from NOT_ALIVE_DISPOSED that it now has a live writer again. On the other hand there is no transition from NOT_ALIVE_DISPOSED
to NOT_ALIVE_NO_WRITERS. to NOT_ALIVE_NO_WRITERS.
* Unregister/Dispose/Filtered Samples of unknown Instances are droped. Note that if a previous ALIVE * Unregister/Filtered Samples of unknown Instances are droped. On the other hand, Dispose Samples of
instance went to an NOT_ALIVE_NO_WRITERS state and was subsequently pushed out of the memory will unknown Instances are accepted (Implicitly adding the new Instance).
miss the transition to NOT_ALIVE_DISPOSED if a writer than decides to sent a Dispose Sample.
* The DDS Specification is not entirely clear on what happens in the DDS Reader on reception of * The DDS Specification is not entirely clear on what happens in the DDS Reader on reception of
Meta Samples (Unregister/Dispose Samples). One simple solution would be to make Data-less Samples for Meta Samples (Unregister/Dispose Samples). One simple solution would be to make Data-less Samples for
@ -355,14 +354,22 @@ DESIGN DECISIONS
visible from the Sample info (e.g. Unregister on Instance with still alive Writers or Dispose from visible from the Sample info (e.g. Unregister on Instance with still alive Writers or Dispose from
another Writer on already disposed Instance), it does not seem practical. (In effect only the source another Writer on already disposed Instance), it does not seem practical. (In effect only the source
timestamp and publication handle of the Sample Info could be different). timestamp and publication handle of the Sample Info could be different).
Taking this into consideration, thsi DDS Reader implementation only generates data-less samples if Taking this into consideration, this DDS Reader implementation only generates data-less samples if
an Instance State is triggered. Filtered Cache Changes also do not produce any Samples visible to the an Instance State is triggered. Filtered Cache Changes also do not produce any Samples visible to the
user (But affect internal state, like DEADLINE and LIVELINESS state). user (But affect internal state, like DEADLINE and LIVELINESS state).
* In BY_SOURCE_TIMESTAMP DESTINATION_ORDER_QOS we only allow NOT_ALIVE Samples (Unregister/Dispose) to
be added to the memory, if no newer sample of the same Instance exists. This decision was made,
because otherwise we would have to rewrite the entire Instance History and recalculate State and
Generation Counters. By dropping NOT_ALIVE samples that are in the past the Instance State is always
valid and does not have to be recalculated.
This is the only case in which a Dispose Sample can be missed/dropped, and may lead to different
Data Readers having different Generation Counters (depending on their reception order).
PROTOCOL UNCOMPLIANCE PROTOCOL UNCOMPLIANCE
===================== =====================
* Partition QoS * Partition QoS Not Supported
* Coherent Sets * Coherent Sets Not Supported
* Built-in Endpoint is NOT the same as a normal Endpoint * Built-in Endpoint is NOT the same as a normal Endpoint
-> No User access to Data -> No User access to Data
* Known but unused Submessage IDs are treated as uknown * Known but unused Submessage IDs are treated as uknown
@ -370,7 +377,8 @@ PROTOCOL UNCOMPLIANCE
* Inline QoS validated in Endpoint * Inline QoS validated in Endpoint
-> Cannot invalidate Rest of Message/Packet -> Cannot invalidate Rest of Message/Packet
* RESOURCE_LIMITS applies also to "empty" samples (Samples with no valid data). * RESOURCE_LIMITS applies also to "empty" samples (Samples with no valid data).
* Write/Dispose/Untergister Operation do not return (TIMEOUT). I.e. the MAX_BLOCKING_TIME is not used. * Write/Dispose/Untergister Operations do not return (TIMEOUT). I.e. the MAX_BLOCKING_TIME is not used.
RTPS ENDPOINT RTPS ENDPOINT

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@ -629,24 +629,6 @@ begin
start_rtps; start_rtps;
wait_on_rtps; wait_on_rtps;
cc := DEFAULT_CACHE_CHANGE;
cc.serialized_key := TRUE;
cc.kind := NOT_ALIVE_DISPOSED;
cc.instance := kh1;
cc.payload := gen_payload(kh1,5);
cc.src_timestamp := gen_duration(8,0);
-- TEST: DISPOSE SAMPLE [UNKNOWN INSTANCE]
Log("RTPS Operation ADD_CACHE_CHANGE [DISPOSE, Instance 1, Writer 0] (IGNORED)", INFO);
rtps := DEFAULT_RTPS_READER_TEST;
rtps.opcode := ADD_CACHE_CHANGE;
rtps.cc := cc;
rtps.writer_pos := 0;
rtps.ret_code := OK;
start_rtps;
wait_on_rtps;
cc := DEFAULT_CACHE_CHANGE; cc := DEFAULT_CACHE_CHANGE;
cc.serialized_key := FALSE; cc.serialized_key := FALSE;
cc.kind := ALIVE; cc.kind := ALIVE;
@ -1148,14 +1130,73 @@ begin
-- ISTATE: I1:ALIVE, I2:ALIVE, I3:ALIVE -- ISTATE: I1:ALIVE, I2:ALIVE, I3:ALIVE
-- WRITER: W0:I2, W2:I1,I3 -- WRITER: W0:I2, W2:I1,I3
cc := DEFAULT_CACHE_CHANGE;
cc.serialized_key := TRUE;
cc.kind := NOT_ALIVE_UNREGISTERED;
cc.instance := kh2;
cc.payload := gen_payload(kh2,5);
cc.src_timestamp := gen_duration(27,0);
Log("RTPS Operation ADD_CACHE_CHANGE [UNREGISTER, Instance 2, Writer 0] (ACCEPTED)", INFO);
rtps := DEFAULT_RTPS_READER_TEST;
rtps.opcode := ADD_CACHE_CHANGE;
rtps.cc := cc;
rtps.writer_pos := 0;
s := to_sample(cc,NOT_ALIVE_NO_WRITERS_INSTANCE_STATE);
add_sample(s,mem, BY_RECEPTION_TIMESTAMP_DESTINATION_ORDER_QOS);
rtps.ret_code := OK;
start_rtps;
wait_on_rtps;
-- MEM: I1S4-, I1S5-, I3S3, I2S2-
-- ISTATE: I1:ALIVE, I2:NO_WRITERS, I3: ALIVE
-- WRITER: W2:I1,I3
-- VALIDATE STATE
Log("DDS Operation TAKE [MAX_SAMPLES 4, ANY_SAMPLE_STATE, ANY_INSTANCE_STATE, ANY_VIEW_STATE]", INFO);
dds := DEFAULT_DDS_READER_TEST;
dds.opcode := TAKE;
dds.max_samples := 4;
dds.sstate := ANY_SAMPLE_STATE;
dds.istate := ANY_INSTANCE_STATE;
dds.vstate := ANY_VIEW_STATE;
start_dds;
wait_on_dds;
-- MEM: 0, 0, 0, 0
-- ISTATE: I1:ALIVE, I2:NO_WRITERS, I3: ALIVE
-- WRITER: W2:I1,I3
cc := DEFAULT_CACHE_CHANGE;
cc.serialized_key := TRUE;
cc.kind := NOT_ALIVE_DISPOSED;
cc.instance := kh4;
cc.payload := gen_payload(kh4,5);
cc.src_timestamp := gen_duration(28,0);
-- TEST: DISPOSE SAMPLE [UNKNOWN INSTANCE]
Log("RTPS Operation ADD_CACHE_CHANGE [DISPOSE, Instance 4, Writer 1] (ACCPETED)", INFO);
rtps := DEFAULT_RTPS_READER_TEST;
rtps.opcode := ADD_CACHE_CHANGE;
rtps.cc := cc;
rtps.writer_pos := 1;
s := to_sample(cc,NOT_ALIVE_DISPOSED_INSTANCE_STATE);
add_sample(s,mem, BY_RECEPTION_TIMESTAMP_DESTINATION_ORDER_QOS);
rtps.ret_code := OK;
start_rtps;
wait_on_rtps;
-- MEM: I4S1-, 0, 0, 0
-- ISTATE: I1:ALIVE, I3: ALIVE, I4:DISPOSED
-- WRITER: W1:I4, W2:I1,I3
-- VALIDATE STATE -- VALIDATE STATE
Log("DDS Operation READ [MAX_SAMPLES 4, ANY_SAMPLE_STATE, ANY_INSTANCE_STATE, ANY_VIEW_STATE]", INFO); Log("DDS Operation READ [MAX_SAMPLES 4, ANY_SAMPLE_STATE, ANY_INSTANCE_STATE, ANY_VIEW_STATE]", INFO);
dds := DEFAULT_DDS_READER_TEST; dds := DEFAULT_DDS_READER_TEST;
dds.opcode := READ; dds.opcode := TAKE;
dds.max_samples := 4; dds.max_samples := 4;
dds.sstate := ANY_SAMPLE_STATE; dds.sstate := ANY_SAMPLE_STATE;
dds.istate := ANY_INSTANCE_STATE; dds.istate := NOT_ALIVE_DISPOSED_INSTANCE_STATE;
dds.vstate := ANY_VIEW_STATE; dds.vstate := ANY_VIEW_STATE;
start_dds; start_dds;
wait_on_dds; wait_on_dds;

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@ -636,24 +636,6 @@ begin
start_rtps; start_rtps;
wait_on_rtps; wait_on_rtps;
cc := DEFAULT_CACHE_CHANGE;
cc.serialized_key := TRUE;
cc.kind := NOT_ALIVE_DISPOSED;
cc.instance := kh1;
cc.payload := gen_payload(kh1,5);
cc.src_timestamp := gen_duration(8,0);
-- TEST: DISPOSE SAMPLE [UNKNOWN INSTANCE]
Log("RTPS Operation ADD_CACHE_CHANGE [DISPOSE, Instance 1, Writer 0] (IGNORED)", INFO);
rtps := DEFAULT_RTPS_READER_TEST;
rtps.opcode := ADD_CACHE_CHANGE;
rtps.cc := cc;
rtps.writer_pos := 0;
rtps.ret_code := OK;
start_rtps;
wait_on_rtps;
cc := DEFAULT_CACHE_CHANGE; cc := DEFAULT_CACHE_CHANGE;
cc.serialized_key := FALSE; cc.serialized_key := FALSE;
cc.kind := ALIVE; cc.kind := ALIVE;
@ -1157,14 +1139,73 @@ begin
-- ISTATE: I1:ALIVE, I2:ALIVE, I3: ALIVE -- ISTATE: I1:ALIVE, I2:ALIVE, I3: ALIVE
-- WRITER: W0:I2, W2:I1,I3 -- WRITER: W0:I2, W2:I1,I3
cc := DEFAULT_CACHE_CHANGE;
cc.serialized_key := TRUE;
cc.kind := NOT_ALIVE_UNREGISTERED;
cc.instance := kh2;
cc.payload := gen_payload(kh2,5);
cc.src_timestamp := gen_duration(21,0);
Log("RTPS Operation ADD_CACHE_CHANGE [UNREGISTER, Instance 2, Writer 0] (ACCEPTED)", INFO);
rtps := DEFAULT_RTPS_READER_TEST;
rtps.opcode := ADD_CACHE_CHANGE;
rtps.cc := cc;
rtps.writer_pos := 0;
s := to_sample(cc,NOT_ALIVE_NO_WRITERS_INSTANCE_STATE);
add_sample(s,mem, BY_RECEPTION_TIMESTAMP_DESTINATION_ORDER_QOS);
rtps.ret_code := OK;
start_rtps;
wait_on_rtps;
-- MEM: I1S4-, I1S5-, I3S3, I2S2-
-- ISTATE: I1:ALIVE, I2:NO_WRITERS, I3: ALIVE
-- WRITER: W2:I1,I3
-- VALIDATE STATE
Log("DDS Operation TAKE [MAX_SAMPLES 4, ANY_SAMPLE_STATE, ANY_INSTANCE_STATE, ANY_VIEW_STATE]", INFO);
dds := DEFAULT_DDS_READER_TEST;
dds.opcode := TAKE;
dds.max_samples := 4;
dds.sstate := ANY_SAMPLE_STATE;
dds.istate := ANY_INSTANCE_STATE;
dds.vstate := ANY_VIEW_STATE;
start_dds;
wait_on_dds;
-- MEM: 0, 0, 0, 0
-- ISTATE: I1:ALIVE, I2:NO_WRITERS, I3: ALIVE
-- WRITER: W2:I1,I3
cc := DEFAULT_CACHE_CHANGE;
cc.serialized_key := TRUE;
cc.kind := NOT_ALIVE_DISPOSED;
cc.instance := kh4;
cc.payload := gen_payload(kh4,5);
cc.src_timestamp := gen_duration(22,0);
-- TEST: DISPOSE SAMPLE [UNKNOWN INSTANCE]
Log("RTPS Operation ADD_CACHE_CHANGE [DISPOSE, Instance 4, Writer 1] (ACCPETED)", INFO);
rtps := DEFAULT_RTPS_READER_TEST;
rtps.opcode := ADD_CACHE_CHANGE;
rtps.cc := cc;
rtps.writer_pos := 1;
s := to_sample(cc,NOT_ALIVE_DISPOSED_INSTANCE_STATE);
add_sample(s,mem, BY_RECEPTION_TIMESTAMP_DESTINATION_ORDER_QOS);
rtps.ret_code := OK;
start_rtps;
wait_on_rtps;
-- MEM: I4S1-, 0, 0, 0
-- ISTATE: I1:ALIVE, I3: ALIVE, I4:DISPOSED
-- WRITER: W1:I4, W2:I1,I3
-- VALIDATE STATE -- VALIDATE STATE
Log("DDS Operation READ [MAX_SAMPLES 4, ANY_SAMPLE_STATE, ANY_INSTANCE_STATE, ANY_VIEW_STATE]", INFO); Log("DDS Operation READ [MAX_SAMPLES 4, ANY_SAMPLE_STATE, ANY_INSTANCE_STATE, ANY_VIEW_STATE]", INFO);
dds := DEFAULT_DDS_READER_TEST; dds := DEFAULT_DDS_READER_TEST;
dds.opcode := READ; dds.opcode := TAKE;
dds.max_samples := 4; dds.max_samples := 4;
dds.sstate := ANY_SAMPLE_STATE; dds.sstate := ANY_SAMPLE_STATE;
dds.istate := ANY_INSTANCE_STATE; dds.istate := NOT_ALIVE_DISPOSED_INSTANCE_STATE;
dds.vstate := ANY_VIEW_STATE; dds.vstate := ANY_VIEW_STATE;
start_dds; start_dds;
wait_on_dds; wait_on_dds;

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@ -636,24 +636,6 @@ begin
start_rtps; start_rtps;
wait_on_rtps; wait_on_rtps;
cc := DEFAULT_CACHE_CHANGE;
cc.serialized_key := TRUE;
cc.kind := NOT_ALIVE_DISPOSED;
cc.instance := kh1;
cc.payload := gen_payload(kh1,5);
cc.src_timestamp := gen_duration(8,0);
-- TEST: DISPOSE SAMPLE [UNKNOWN INSTANCE]
Log("RTPS Operation ADD_CACHE_CHANGE [DISPOSE, Instance 1, Writer 0] (IGNORED)", INFO);
rtps := DEFAULT_RTPS_READER_TEST;
rtps.opcode := ADD_CACHE_CHANGE;
rtps.cc := cc;
rtps.writer_pos := 0;
rtps.ret_code := OK;
start_rtps;
wait_on_rtps;
cc := DEFAULT_CACHE_CHANGE; cc := DEFAULT_CACHE_CHANGE;
cc.serialized_key := FALSE; cc.serialized_key := FALSE;
cc.kind := ALIVE; cc.kind := ALIVE;
@ -1152,14 +1134,73 @@ begin
start_rtps; start_rtps;
wait_on_rtps; wait_on_rtps;
cc := DEFAULT_CACHE_CHANGE;
cc.serialized_key := TRUE;
cc.kind := NOT_ALIVE_UNREGISTERED;
cc.instance := kh2;
cc.payload := gen_payload(kh2,5);
cc.src_timestamp := gen_duration(21,0);
Log("RTPS Operation ADD_CACHE_CHANGE [UNREGISTER, Instance 2, Writer 0] (ACCEPTED)", INFO);
rtps := DEFAULT_RTPS_READER_TEST;
rtps.opcode := ADD_CACHE_CHANGE;
rtps.cc := cc;
rtps.writer_pos := 0;
s := to_sample(cc,NOT_ALIVE_NO_WRITERS_INSTANCE_STATE);
add_sample(s,mem, BY_RECEPTION_TIMESTAMP_DESTINATION_ORDER_QOS);
rtps.ret_code := OK;
start_rtps;
wait_on_rtps;
-- MEM: I1S4-, I1S5-, I2S2-, 0
-- ISTATE: I1:ALIVE, I2:NO_WRITERS, I3: ALIVE
-- WRITER: W2:I1,I3
-- VALIDATE STATE
Log("DDS Operation TAKE [MAX_SAMPLES 4, ANY_SAMPLE_STATE, ANY_INSTANCE_STATE, ANY_VIEW_STATE]", INFO);
dds := DEFAULT_DDS_READER_TEST;
dds.opcode := TAKE;
dds.max_samples := 4;
dds.sstate := ANY_SAMPLE_STATE;
dds.istate := ANY_INSTANCE_STATE;
dds.vstate := ANY_VIEW_STATE;
start_dds;
wait_on_dds;
-- MEM: 0, 0, 0, 0
-- ISTATE: I1:ALIVE, I2:NO_WRITERS, I3: ALIVE
-- WRITER: W2:I1,I3
cc := DEFAULT_CACHE_CHANGE;
cc.serialized_key := TRUE;
cc.kind := NOT_ALIVE_DISPOSED;
cc.instance := kh4;
cc.payload := gen_payload(kh4,5);
cc.src_timestamp := gen_duration(22,0);
-- TEST: DISPOSE SAMPLE [UNKNOWN INSTANCE]
Log("RTPS Operation ADD_CACHE_CHANGE [DISPOSE, Instance 4, Writer 1] (ACCPETED)", INFO);
rtps := DEFAULT_RTPS_READER_TEST;
rtps.opcode := ADD_CACHE_CHANGE;
rtps.cc := cc;
rtps.writer_pos := 1;
s := to_sample(cc,NOT_ALIVE_DISPOSED_INSTANCE_STATE);
add_sample(s,mem, BY_RECEPTION_TIMESTAMP_DESTINATION_ORDER_QOS);
rtps.ret_code := OK;
start_rtps;
wait_on_rtps;
-- MEM: I4S1-, 0, 0, 0
-- ISTATE: I1:ALIVE, I3: ALIVE, I4:DISPOSED
-- WRITER: W1:I4, W2:I1,I3
-- VALIDATE STATE -- VALIDATE STATE
Log("DDS Operation READ [MAX_SAMPLES 4, ANY_SAMPLE_STATE, ANY_INSTANCE_STATE, ANY_VIEW_STATE]", INFO); Log("DDS Operation READ [MAX_SAMPLES 4, ANY_SAMPLE_STATE, ANY_INSTANCE_STATE, ANY_VIEW_STATE]", INFO);
dds := DEFAULT_DDS_READER_TEST; dds := DEFAULT_DDS_READER_TEST;
dds.opcode := READ; dds.opcode := TAKE;
dds.max_samples := 4; dds.max_samples := 4;
dds.sstate := ANY_SAMPLE_STATE; dds.sstate := ANY_SAMPLE_STATE;
dds.istate := ANY_INSTANCE_STATE; dds.istate := NOT_ALIVE_DISPOSED_INSTANCE_STATE;
dds.vstate := ANY_VIEW_STATE; dds.vstate := ANY_VIEW_STATE;
start_dds; start_dds;
wait_on_dds; wait_on_dds;

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@ -13,6 +13,27 @@ use work.rtps_test_package.all;
-- This testbench tests the RTPS handling of the DDS Reader. It tests the correctness of the RTPS ADD_CACHE_CHANGE, and REMOVE_WRITER Operations. -- This testbench tests the RTPS handling of the DDS Reader. It tests the correctness of the RTPS ADD_CACHE_CHANGE, and REMOVE_WRITER Operations.
-- Implicitly some DDS Operations are also tested, since they are used for state checking. -- Implicitly some DDS Operations are also tested, since they are used for state checking.
-- More specifically the testbench covers following tests: -- More specifically the testbench covers following tests:
-- TEST: NORMAL ADD_CACHE_CHANGE
-- TEST: ADD_CACHE_CHANGE ON PAYLOAD MEMORY FULL
-- TEST: REMOVE_WRITER [UNKNOWN WRITER]
-- TEST: REMOVE_WRITER [KNOWN WRITER]
-- TEST: SAMPLE WITH ALIGNED PAYLOAD
-- TEST: SAMPLE WITH UNALIGNED PAYLOAD [<1 SLOT]
-- TEST: SAMPLE WITH UNALIGNED PAYLOAD [>1 SLOT]
-- TEST: NORMAL SAMPLE
-- TEST: UNREGISTER SAMPLE [UNKNOWN WRITER]
-- TEST: UNREGISTER SAMPLE [KNOWN WRITER]
-- TEST: UNREGISTER SAMPLE [NOT_ALIVE_NO_WRITERS INSTANCE]
-- TEST: UNREGISTER SAMPLE [NOT_ALIVE_DISPOSED INSTANCE]
-- TEST: DISPOSE SAMPLE
-- TEST: DISPOSE SAMPLE [NOT_ALIVE_NO_WRITERS INSTANCE]
-- TEST: DISPOSE SAMPLE [NOT_ALIVE_DISPOSED INSTANCE]
-- TEST: FILTER SAMPLE
-- TEST: FILTER SAMPLE [NOT_ALIVE_DISPOSED INSTANCE]
-- TEST: FILTER SAMPLE [NOT_ALIVE_NO_WRITERS INSTANCE]
-- TEST: SAMPLE WITH EARLY TIMESTAMP [TIMESTAMP EARLIER THAN LAST READ]
-- TEST: ADD SAMPLE ON MAX_SAMPLES
-- TEST: ADD SAMPLE BIGGER THAN AVAILABLE MEMORY SPACE
entity L0_dds_reader_test1_arznriu is entity L0_dds_reader_test1_arznriu is
end entity; end entity;

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@ -628,24 +628,6 @@ begin
start_rtps; start_rtps;
wait_on_rtps; wait_on_rtps;
cc := DEFAULT_CACHE_CHANGE;
cc.serialized_key := TRUE;
cc.kind := NOT_ALIVE_DISPOSED;
cc.instance := kh1;
cc.payload := gen_payload(kh1,5);
cc.src_timestamp := gen_duration(8,0);
-- TEST: DISPOSE SAMPLE [UNKNOWN INSTANCE]
Log("RTPS Operation ADD_CACHE_CHANGE [DISPOSE, Instance 1, Writer 0] (IGNORED)", INFO);
rtps := DEFAULT_RTPS_READER_TEST;
rtps.opcode := ADD_CACHE_CHANGE;
rtps.cc := cc;
rtps.writer_pos := 0;
rtps.ret_code := OK;
start_rtps;
wait_on_rtps;
cc := DEFAULT_CACHE_CHANGE; cc := DEFAULT_CACHE_CHANGE;
cc.serialized_key := FALSE; cc.serialized_key := FALSE;
cc.kind := ALIVE; cc.kind := ALIVE;
@ -1147,14 +1129,73 @@ begin
-- ISTATE: I1:ALIVE, I2:ALIVE, I3:ALIVE -- ISTATE: I1:ALIVE, I2:ALIVE, I3:ALIVE
-- WRITER: W0:I2, W2:I1,I3 -- WRITER: W0:I2, W2:I1,I3
cc := DEFAULT_CACHE_CHANGE;
cc.serialized_key := TRUE;
cc.kind := NOT_ALIVE_UNREGISTERED;
cc.instance := kh2;
cc.payload := gen_payload(kh2,5);
cc.src_timestamp := gen_duration(27,0);
Log("RTPS Operation ADD_CACHE_CHANGE [UNREGISTER, Instance 2, Writer 0] (ACCEPTED)", INFO);
rtps := DEFAULT_RTPS_READER_TEST;
rtps.opcode := ADD_CACHE_CHANGE;
rtps.cc := cc;
rtps.writer_pos := 0;
s := to_sample(cc,NOT_ALIVE_NO_WRITERS_INSTANCE_STATE);
add_sample(s,mem, BY_RECEPTION_TIMESTAMP_DESTINATION_ORDER_QOS);
rtps.ret_code := OK;
start_rtps;
wait_on_rtps;
-- MEM: I1S4-, I1S5-, I3S3, I2S2-
-- ISTATE: I1:ALIVE, I2:NO_WRITERS, I3: ALIVE
-- WRITER: W2:I1,I3
-- VALIDATE STATE
Log("DDS Operation TAKE [MAX_SAMPLES 4, ANY_SAMPLE_STATE, ANY_INSTANCE_STATE, ANY_VIEW_STATE]", INFO);
dds := DEFAULT_DDS_READER_TEST;
dds.opcode := TAKE;
dds.max_samples := 4;
dds.sstate := ANY_SAMPLE_STATE;
dds.istate := ANY_INSTANCE_STATE;
dds.vstate := ANY_VIEW_STATE;
start_dds;
wait_on_dds;
-- MEM: 0, 0, 0, 0
-- ISTATE: I1:ALIVE, I2:NO_WRITERS, I3: ALIVE
-- WRITER: W2:I1,I3
cc := DEFAULT_CACHE_CHANGE;
cc.serialized_key := TRUE;
cc.kind := NOT_ALIVE_DISPOSED;
cc.instance := kh4;
cc.payload := gen_payload(kh4,5);
cc.src_timestamp := gen_duration(28,0);
-- TEST: DISPOSE SAMPLE [UNKNOWN INSTANCE]
Log("RTPS Operation ADD_CACHE_CHANGE [DISPOSE, Instance 4, Writer 1] (ACCPETED)", INFO);
rtps := DEFAULT_RTPS_READER_TEST;
rtps.opcode := ADD_CACHE_CHANGE;
rtps.cc := cc;
rtps.writer_pos := 1;
s := to_sample(cc,NOT_ALIVE_DISPOSED_INSTANCE_STATE);
add_sample(s,mem, BY_RECEPTION_TIMESTAMP_DESTINATION_ORDER_QOS);
rtps.ret_code := OK;
start_rtps;
wait_on_rtps;
-- MEM: I4S1-, 0, 0, 0
-- ISTATE: I1:ALIVE, I3: ALIVE, I4:DISPOSED
-- WRITER: W1:I4, W2:I1,I3
-- VALIDATE STATE -- VALIDATE STATE
Log("DDS Operation READ [MAX_SAMPLES 4, ANY_SAMPLE_STATE, ANY_INSTANCE_STATE, ANY_VIEW_STATE]", INFO); Log("DDS Operation READ [MAX_SAMPLES 4, ANY_SAMPLE_STATE, ANY_INSTANCE_STATE, ANY_VIEW_STATE]", INFO);
dds := DEFAULT_DDS_READER_TEST; dds := DEFAULT_DDS_READER_TEST;
dds.opcode := READ; dds.opcode := TAKE;
dds.max_samples := 4; dds.max_samples := 4;
dds.sstate := ANY_SAMPLE_STATE; dds.sstate := ANY_SAMPLE_STATE;
dds.istate := ANY_INSTANCE_STATE; dds.istate := NOT_ALIVE_DISPOSED_INSTANCE_STATE;
dds.vstate := ANY_VIEW_STATE; dds.vstate := ANY_VIEW_STATE;
start_dds; start_dds;
wait_on_dds; wait_on_dds;

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@ -629,24 +629,6 @@ begin
start_rtps; start_rtps;
wait_on_rtps; wait_on_rtps;
cc := DEFAULT_CACHE_CHANGE;
cc.serialized_key := TRUE;
cc.kind := NOT_ALIVE_DISPOSED;
cc.instance := kh1;
cc.payload := gen_payload(kh1,5);
cc.src_timestamp := gen_duration(8,0);
-- TEST: DISPOSE SAMPLE [UNKNOWN INSTANCE]
Log("RTPS Operation ADD_CACHE_CHANGE [DISPOSE, Instance 1, Writer 0] (IGNORED)", INFO);
rtps := DEFAULT_RTPS_READER_TEST;
rtps.opcode := ADD_CACHE_CHANGE;
rtps.cc := cc;
rtps.writer_pos := 0;
rtps.ret_code := OK;
start_rtps;
wait_on_rtps;
cc := DEFAULT_CACHE_CHANGE; cc := DEFAULT_CACHE_CHANGE;
cc.serialized_key := FALSE; cc.serialized_key := FALSE;
cc.kind := ALIVE; cc.kind := ALIVE;
@ -1148,14 +1130,73 @@ begin
-- ISTATE: I1:ALIVE, I2:ALIVE, I3:ALIVE -- ISTATE: I1:ALIVE, I2:ALIVE, I3:ALIVE
-- WRITER: W0:I2, W2:I1,I3 -- WRITER: W0:I2, W2:I1,I3
cc := DEFAULT_CACHE_CHANGE;
cc.serialized_key := TRUE;
cc.kind := NOT_ALIVE_UNREGISTERED;
cc.instance := kh2;
cc.payload := gen_payload(kh2,5);
cc.src_timestamp := gen_duration(27,0);
Log("RTPS Operation ADD_CACHE_CHANGE [UNREGISTER, Instance 2, Writer 0] (ACCEPTED)", INFO);
rtps := DEFAULT_RTPS_READER_TEST;
rtps.opcode := ADD_CACHE_CHANGE;
rtps.cc := cc;
rtps.writer_pos := 0;
s := to_sample(cc,NOT_ALIVE_NO_WRITERS_INSTANCE_STATE);
add_sample(s,mem, BY_RECEPTION_TIMESTAMP_DESTINATION_ORDER_QOS);
rtps.ret_code := OK;
start_rtps;
wait_on_rtps;
-- MEM: I1S4-, I1S5-, I3S3, I2S2-
-- ISTATE: I1:ALIVE, I2:NO_WRITERS, I3: ALIVE
-- WRITER: W2:I1,I3
-- VALIDATE STATE
Log("DDS Operation TAKE [MAX_SAMPLES 4, ANY_SAMPLE_STATE, ANY_INSTANCE_STATE, ANY_VIEW_STATE]", INFO);
dds := DEFAULT_DDS_READER_TEST;
dds.opcode := TAKE;
dds.max_samples := 4;
dds.sstate := ANY_SAMPLE_STATE;
dds.istate := ANY_INSTANCE_STATE;
dds.vstate := ANY_VIEW_STATE;
start_dds;
wait_on_dds;
-- MEM: 0, 0, 0, 0
-- ISTATE: I1:ALIVE, I2:NO_WRITERS, I3: ALIVE
-- WRITER: W2:I1,I3
cc := DEFAULT_CACHE_CHANGE;
cc.serialized_key := TRUE;
cc.kind := NOT_ALIVE_DISPOSED;
cc.instance := kh4;
cc.payload := gen_payload(kh4,5);
cc.src_timestamp := gen_duration(28,0);
-- TEST: DISPOSE SAMPLE [UNKNOWN INSTANCE]
Log("RTPS Operation ADD_CACHE_CHANGE [DISPOSE, Instance 4, Writer 1] (ACCPETED)", INFO);
rtps := DEFAULT_RTPS_READER_TEST;
rtps.opcode := ADD_CACHE_CHANGE;
rtps.cc := cc;
rtps.writer_pos := 1;
s := to_sample(cc,NOT_ALIVE_DISPOSED_INSTANCE_STATE);
add_sample(s,mem, BY_RECEPTION_TIMESTAMP_DESTINATION_ORDER_QOS);
rtps.ret_code := OK;
start_rtps;
wait_on_rtps;
-- MEM: I4S1-, 0, 0, 0
-- ISTATE: I1:ALIVE, I3: ALIVE, I4:DISPOSED
-- WRITER: W1:I4, W2:I1,I3
-- VALIDATE STATE -- VALIDATE STATE
Log("DDS Operation READ [MAX_SAMPLES 4, ANY_SAMPLE_STATE, ANY_INSTANCE_STATE, ANY_VIEW_STATE]", INFO); Log("DDS Operation READ [MAX_SAMPLES 4, ANY_SAMPLE_STATE, ANY_INSTANCE_STATE, ANY_VIEW_STATE]", INFO);
dds := DEFAULT_DDS_READER_TEST; dds := DEFAULT_DDS_READER_TEST;
dds.opcode := READ; dds.opcode := TAKE;
dds.max_samples := 4; dds.max_samples := 4;
dds.sstate := ANY_SAMPLE_STATE; dds.sstate := ANY_SAMPLE_STATE;
dds.istate := ANY_INSTANCE_STATE; dds.istate := NOT_ALIVE_DISPOSED_INSTANCE_STATE;
dds.vstate := ANY_VIEW_STATE; dds.vstate := ANY_VIEW_STATE;
start_dds; start_dds;
wait_on_dds; wait_on_dds;

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@ -10,6 +10,7 @@ use work.user_config.all;
use work.rtps_config_package.all; use work.rtps_config_package.all;
use work.rtps_test_package.all; use work.rtps_test_package.all;
-- This testbench tests the handling of the TIME_BASED_FILTER QoS.
entity L0_dds_reader_test2_arpkriu is entity L0_dds_reader_test2_arpkriu is
end entity; end entity;

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@ -0,0 +1,923 @@
library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;
library osvvm; -- Utility Library
context osvvm.OsvvmContext;
use work.rtps_package.all;
use work.user_config.all;
use work.rtps_config_package.all;
use work.rtps_test_package.all;
-- This testbench tests the DDS handling of the DDS Reader. It tests the correctness of the DDS READ, TAKE, READ_NEXT_SAMPLE, TAKE_NEXT_SAMPLE,
-- READ_INSTANCE, TAKE_INSTANCE, READ_NEXT_INSTANCE, TAKE_NEXT_INSTANCE Operations.
-- More specifically the testbench covers following tests:
-- TEST: READ [MAX_SAMPLES < SAMPLES]
-- TEST: READ [MAX_SAMPLES > SAMPLES]
-- TEST: READ [NO COMPATIBLE SAMPLES]
-- TEST: READ [NO SAMPLES]
-- TEST: TAKE
-- TEST: TAKE [NO SAMPLES]
-- TEST: TAKE_NEXT_SAMPLE
-- TEST: TAKE_NEXT_SAMPLE [NO SAMPLE]
-- TEST: READ_NEXT_SAMPLE [WITH UNREAD SAMPLE]
-- TEST: READ_NEXT_SAMPLE [WITHOUT UNREAD SAMPLE]
-- TEST: READ_NEXT_SAMPLE [NO SAMPLE]
-- TEST: READ_INSTANCE
-- TEST: TAKE_INSTANCE
-- TEST: READ_NEXT_INSTANCE
-- TEST: TAKE_NEXT_INSTANCE
-- TEST: READ MARKS SAMPLES AS READ
-- TEST: TAKE REMOVES SAMPLE
-- TEST: READ MODIFIES VIEW STATE [READ CURRENT GENERATION]
-- TEST: READ MODIFIES VIEW STATE [READ PREVIOUS GENERATION]
entity L0_dds_reader_test3_arznriu is
end entity;
architecture testbench of L0_dds_reader_test3_arznriu is
-- *CONSTANT DECLARATION*
constant MAX_REMOTE_ENDPOINTS : natural := 3;
-- *TYPE DECLARATION*
type DDS_STAGE_TYPE is (IDLE, START, DONE, CHECK_SI, CHECK_DATA, WAIT_EOC);
type RTPS_STAGE_TYPE is (IDLE, START, PUSH, DONE);
type KH_STAGE_TYPE is (IDLE, READ_DATA, PUSH_KEY_HASH);
-- *SIGNAL DECLARATION*
signal clk : std_logic := '0';
signal reset : std_logic := '1';
signal check_time : TIME_TYPE := TIME_ZERO;
signal start_rtps, start_dds, start_kh, ack_rtps, ack_dds, ack_kh, done_rtps, done_dds : std_logic := '0';
signal opcode_rtps : HISTORY_CACHE_OPCODE_TYPE := NOP;
signal opcode_dds : DDS_READER_OPCODE_TYPE := NOP;
signal opcode_kh : KEY_HOLDER_OPCODE_TYPE := NOP;
signal ret_rtps : HISTORY_CACHE_RESPONSE_TYPE := ERROR;
signal ready_in_rtps, valid_in_rtps, last_word_in_rtps : std_logic := '0';
signal ready_out_dds, valid_out_dds, last_word_out_dds : std_logic := '0';
signal ready_in_kh, ready_out_kh, valid_in_kh, valid_out_kh, last_word_in_kh, last_word_out_kh : std_logic := '0';
signal data_in_rtps, data_out_dds, data_in_kh, data_out_kh : std_logic_vector(WORD_WIDTH-1 downto 0) := (others => '0');
signal get_data_dds, si_valid_data, si_valid, eoc, abort_kh : std_logic := '0';
signal return_code_dds : std_logic_vector(RETURN_CODE_WIDTH-1 downto 0) := (others => '0');
signal status : std_logic_vector(STATUS_KIND_WIDTH-1 downto 0) := (others => '0');
signal instance_state_dds, si_instance_state : std_logic_vector(INSTANCE_STATE_KIND_WIDTH-1 downto 0) := ANY_INSTANCE_STATE;
signal view_state_dds, si_view_state : std_logic_vector(VIEW_STATE_KIND_WIDTH-1 downto 0) := ANY_VIEW_STATE;
signal sample_state_dds, si_sample_state : std_logic_vector(SAMPLE_STATE_KIND_WIDTH-1 downto 0) := ANY_SAMPLE_STATE;
signal instance_handle_dds, si_instance_handle : INSTANCE_HANDLE_TYPE := HANDLE_NIL;
signal max_samples_dds : std_logic_vector(MAX_SAMPLES_WIDTH-1 downto 0) := (others => '0');
signal si_source_timestamp : TIME_TYPE := TIME_INVALID;
signal si_publication_handle : PUBLICATION_HANDLE_TYPE := (others => (others => '0'));
signal si_disposed_generation_count : std_logic_vector(DISPOSED_GENERATION_COUNT_WIDTH-1 downto 0) := (others => '0');
signal si_no_writers_generation_count : std_logic_vector(NO_WRITERS_GENERATION_COUNT_WIDTH-1 downto 0) := (others => '0');
signal si_sample_rank : std_logic_vector(SAMPLE_RANK_WIDTH-1 downto 0) := (others => '0');
signal si_generation_rank : std_logic_vector(GENERATION_RANK_WIDTH-1 downto 0) := (others => '0');
signal si_absolute_generation_rank: std_logic_vector(ABSOLUTE_GENERATION_COUNT_WIDTH-1 downto 0) := (others => '0');
signal dds_start , dds_done , rtps_start, rtps_done : std_logic := '0';
signal dds_cnt, dds_cnt2, rtps_cnt, kh_cnt : natural := 0;
signal dds_stage : DDS_STAGE_TYPE := IDLE;
signal rtps_stage : RTPS_STAGE_TYPE := IDLE;
signal kh_stage : KH_STAGE_TYPE := IDLE;
signal kh_data : TEST_PACKET_TYPE := EMPTY_TEST_PACKET;
shared variable dds : DDS_READER_TEST_TYPE := DEFAULT_DDS_READER_TEST;
shared variable rtps : RTPS_READER_TEST_TYPE := DEFAULT_RTPS_READER_TEST;
shared variable mem : DDS_READER_MEM_TYPE := DEFAULT_DDS_READER_MEM;
signal data_id, ret_id, sstate_id, vstate_id, istate_id, inst_id, ts_id, pub_id, dis_gen_cnt_id, no_w_gen_cnt_id, srank_id, grank_id, agrank_id, eoc_id, valid_id : AlertLogIDType;
-- *FUNCTION DECLARATION*
function extract_key_hash (payload : TEST_PACKET_TYPE) return INSTANCE_HANDLE_TYPE is
variable ret : INSTANCE_HANDLE_TYPE := HANDLE_NIL;
begin
for i in 0 to 3 loop
ret(i) := not payload.data(i);
end loop;
return ret;
end function;
function gen_sn(input : natural) return SEQUENCENUMBER_TYPE is
variable ret : SEQUENCENUMBER_TYPE;
begin
ret(0) := (others => '0');
ret(1) := unsigned(int(input, WORD_WIDTH));
return ret;
end function;
begin
-- Unit Under Test
uut : entity work.dds_reader(arch)
generic map (
TIME_BASED_FILTER_QOS => DURATION_ZERO,
DEADLINE_QOS => DURATION_INFINITE,
MAX_SAMPLES => std_logic_vector(to_unsigned(15,CDR_LONG_WIDTH)),
MAX_INSTANCES => std_logic_vector(to_unsigned(4,CDR_LONG_WIDTH)),
MAX_SAMPLES_PER_INSTANCE => std_logic_vector(to_unsigned(15,CDR_LONG_WIDTH)),
HISTORY_QOS => KEEP_ALL_HISTORY_QOS,
RELIABILITY_QOS => RELIABLE_RELIABILITY_QOS,
PRESENTATION_QOS => INSTANCE_PRESENTATION_QOS,
DESTINATION_ORDER_QOS => BY_RECEPTION_TIMESTAMP_DESTINATION_ORDER_QOS,
COHERENT_ACCESS => FALSE,
ORDERED_ACCESS => FALSE,
WITH_KEY => FALSE,
PAYLOAD_FRAME_SIZE => 11,
MAX_REMOTE_ENDPOINTS => MAX_REMOTE_ENDPOINTS
)
port map (
clk => clk,
reset => reset,
time => check_time,
start_rtps => start_rtps,
opcode_rtps => opcode_rtps,
ack_rtps => ack_rtps,
done_rtps => done_rtps,
ret_rtps => ret_rtps,
data_in_rtps => data_in_rtps,
valid_in_rtps => valid_in_rtps,
ready_in_rtps => ready_in_rtps,
last_word_in_rtps => last_word_in_rtps,
start_kh => start_kh,
opcode_kh => opcode_kh,
ack_kh => ack_kh,
data_in_kh => data_in_kh,
valid_in_kh => valid_in_kh,
ready_in_kh => ready_in_kh,
last_word_in_kh => last_word_in_kh,
data_out_kh => data_out_kh,
valid_out_kh => valid_out_kh,
ready_out_kh => ready_out_kh,
last_word_out_kh => last_word_out_kh,
abort_kh => abort_kh,
start_dds => start_dds,
ack_dds => ack_dds,
opcode_dds => opcode_dds,
instance_state_dds => instance_state_dds,
view_state_dds => view_state_dds,
sample_state_dds => sample_state_dds,
instance_handle_dds => instance_handle_dds,
max_samples_dds => max_samples_dds,
get_data_dds => get_data_dds,
done_dds => done_dds,
return_code_dds => return_code_dds,
ready_out_dds => ready_out_dds,
valid_out_dds => valid_out_dds,
data_out_dds => data_out_dds,
last_word_out_dds => last_word_out_dds,
si_sample_state => si_sample_state,
si_view_state => si_view_state,
si_instance_state => si_instance_state,
si_source_timestamp => si_source_timestamp,
si_instance_handle => si_instance_handle,
si_publication_handle => si_publication_handle,
si_disposed_generation_count => si_disposed_generation_count,
si_no_writers_generation_count => si_no_writers_generation_count,
si_sample_rank => si_sample_rank,
si_generation_rank => si_generation_rank,
si_absolute_generation_rank => si_absolute_generation_rank,
si_valid_data => si_valid_data,
si_valid => si_valid,
eoc => eoc,
status => status
);
stimulus_prc : process
variable RV : RandomPType;
variable kh1, kh2, kh3, kh4, kh5 : INSTANCE_HANDLE_TYPE := HANDLE_NIL;
variable cc : CACHE_CHANGE_TYPE := DEFAULT_CACHE_CHANGE;
variable s : SAMPLE_TYPE := DEFAULT_SAMPLE;
alias idle_sig is <<signal uut.idle_sig : std_logic>>;
impure function gen_payload(key_hash : INSTANCE_HANDLE_TYPE; len : natural) return TEST_PACKET_TYPE is
variable ret : TEST_PACKET_TYPE := EMPTY_TEST_PACKET;
begin
assert (len >= 4) report "Payload length has to be at least 16 Bytes long" severity FAILURE;
for i in 0 to len-1 loop
if (i < 4) then
-- NOTE: Beginning of payload is negated key to allow deterministic Key Hash generation from the kh_prc
ret.data(ret.length) := not key_hash(i);
else
ret.data(ret.length) := RV.RandSlv(WORD_WIDTH);
end if;
ret.length := ret.length + 1;
end loop;
ret.last(ret.length-1) := '1';
return ret;
end function;
impure function gen_key_hash return KEY_HASH_TYPE is
variable ret : KEY_HASH_TYPE := (others => (others => '0'));
begin
for i in 0 to KEY_HASH_TYPE'length-1 loop
ret(i) := RV.RandSlv(WORD_WIDTH);
end loop;
return ret;
end function;
procedure start_dds is
begin
dds_start <= '1';
wait until rising_edge(clk);
dds_start <= '0';
wait until rising_edge(clk);
end procedure;
procedure start_rtps is
begin
rtps_start <= '1';
wait until rising_edge(clk);
rtps_start <= '0';
wait until rising_edge(clk);
end procedure;
procedure wait_on_dds is
begin
if (dds_done /= '1') then
wait until dds_done = '1';
end if;
end procedure;
procedure wait_on_rtps is
begin
if (rtps_done /= '1') then
wait until rtps_done = '1';
end if;
end procedure;
procedure wait_on_completion is
begin
if (rtps_done /= '1' or dds_done /= '1') then
wait until rtps_done = '1' and dds_done = '1';
end if;
end procedure;
-- NOTE: This procedure waits until the idle_sig is high for at least
-- two consecutive clock cycles.
procedure wait_on_idle is
begin
loop
if (idle_sig /= '1') then
wait until idle_sig = '1';
else
exit;
end if;
wait until rising_edge(clk);
wait until rising_edge(clk);
end loop;
end procedure;
begin
SetAlertLogName("dds_reader - (KEEP ALL, Reliable, Zero TIME_BASED_FILTER, Keyless, BY_RECEPTION_TIMESTAMP_DESTINATION_ORDER, ACCESS SCOPE Instance, Unordered) - Level 0 - DDS Handling");
SetAlertEnable(FAILURE, TRUE);
SetAlertEnable(ERROR, TRUE);
SetAlertEnable(WARNING, TRUE);
SetLogEnable(DEBUG, TRUE);
SetLogEnable(PASSED, FALSE);
SetLogEnable(INFO, TRUE);
RV.InitSeed(RV'instance_name);
sstate_id <= GetAlertLogID("Sample State", ALERTLOG_BASE_ID);
vstate_id <= GetAlertLogID("View State", ALERTLOG_BASE_ID);
istate_id <= GetAlertLogID("Instance State", ALERTLOG_BASE_ID);
ts_id <= GetAlertLogID("Source Timestamp", ALERTLOG_BASE_ID);
inst_id <= GetAlertLogID("Instance Handle", ALERTLOG_BASE_ID);
pub_id <= GetAlertLogID("Publication Hanlde", ALERTLOG_BASE_ID);
dis_gen_cnt_id <= GetAlertLogID("Disposed Generation Count", ALERTLOG_BASE_ID);
no_w_gen_cnt_id <= GetAlertLogID("No Writers Generation Count", ALERTLOG_BASE_ID);
srank_id <= GetAlertLogID("Sample Rank", ALERTLOG_BASE_ID);
grank_id <= GetAlertLogID("Generation Rank", ALERTLOG_BASE_ID);
agrank_id <= GetAlertLogID("Absolute Generation Rank", ALERTLOG_BASE_ID);
eoc_id <= GetAlertLogID("End Of Collection", ALERTLOG_BASE_ID);
valid_id <= GetAlertLogID("Valid Data", ALERTLOG_BASE_ID);
data_id <= GetAlertLogID("Data Out", ALERTLOG_BASE_ID);
ret_id <= GetAlertLogID("Return Code", ALERTLOG_BASE_ID);
-- Key Hashes
kh1 := (x"F12C31DA", x"E3FE0F3F", x"01F36685", x"446518CA");
kh2 := (x"BC070AC4", x"0BAB5811", x"14EA8D61", x"F669189B");
kh3 := (x"0CEAB0C6", x"FA04B9AD", x"A96EB495", x"4E0EB999");
kh4 := (x"A7EB605C", x"FF4BEF3A", x"3C5E8724", x"CCA0CA67");
kh5 := gen_key_hash;
Log("Initiating Test", INFO);
Log("Current Time: 0s", INFO);
check_time <= TIME_ZERO;
reset <= '1';
wait until rising_edge(clk);
wait until rising_edge(clk);
reset <= '0';
-- MEM: -
-- ISTATE: -
-- VIEW: -
-- WRITER: -
cc := DEFAULT_CACHE_CHANGE;
cc.serialized_key := FALSE;
cc.kind := ALIVE;
cc.payload := gen_payload(HANDLE_NIL,10);
cc.src_timestamp := gen_duration(0,0);
Log("RTPS Operation ADD_CACHE_CHANGE [Writer 0, Aligned Payload] (ACCEPTED)", INFO);
rtps := DEFAULT_RTPS_READER_TEST;
rtps.opcode := ADD_CACHE_CHANGE;
rtps.cc := cc;
rtps.writer_pos := 0;
rtps.ret_code := OK;
s := to_sample(cc,ALIVE_INSTANCE_STATE);
add_sample(s,mem, BY_RECEPTION_TIMESTAMP_DESTINATION_ORDER_QOS);
start_rtps;
wait_on_rtps;
wait_on_idle;
-- MEM: S0
-- ISTATE: ALIVE
-- VIEW: NEW
-- WRITER: 0
Log("Current Time: 1s", INFO);
check_time <= gen_duration(1,0);
wait until rising_edge(clk);
wait until rising_edge(clk);
wait_on_idle;
cc := DEFAULT_CACHE_CHANGE;
cc.serialized_key := FALSE;
cc.kind := NOT_ALIVE_DISPOSED;
cc.src_timestamp := gen_duration(1,0);
Log("RTPS Operation ADD_CACHE_CHANGE [DISPOSE, Writer 0, Aligned Payload] (ACCEPTED)", INFO);
rtps := DEFAULT_RTPS_READER_TEST;
rtps.opcode := ADD_CACHE_CHANGE;
rtps.cc := cc;
rtps.writer_pos := 0;
rtps.ret_code := OK;
s := to_sample(cc,NOT_ALIVE_DISPOSED_INSTANCE_STATE);
add_sample(s,mem, BY_RECEPTION_TIMESTAMP_DESTINATION_ORDER_QOS);
start_rtps;
wait_on_rtps;
wait_on_idle;
-- MEM: S0, S1-
-- ISTATE: DISPOSED
-- VIEW: NEW
-- WRITER: 0
-- TEST: READ [MAX_SAMPLES < SAMPLES]
Log("DDS Operation READ [MAX_SAMPLES 1, ANY_SAMPLE_STATE, ANY_INSTANCE_STATE, ANY_VIEW_STATE] (Expected ID0)", INFO);
dds := DEFAULT_DDS_READER_TEST;
dds.opcode := READ;
dds.max_samples := 1;
dds.sstate := ANY_SAMPLE_STATE;
dds.istate := ANY_INSTANCE_STATE;
dds.vstate := ANY_VIEW_STATE;
start_dds;
wait_on_dds;
-- MEM: S0, S1-
-- ISTATE: DISPOSED
-- VIEW: NOT_NEW
-- WRITER: 0
-- TEST: READ [NO COMPATIBLE SAMPLES]
-- TEST: READ MODIFIES VIEW STATE [READ CURRENT GENERATION]
Log("DDS Operation READ [MAX_SAMPLES 20, ANY_SAMPLE_STATE, ANY_INSTANCE_STATE, NEW_VIEW_STATE] (No Data)", INFO);
dds := DEFAULT_DDS_READER_TEST;
dds.opcode := READ;
dds.max_samples := 20;
dds.sstate := ANY_SAMPLE_STATE;
dds.istate := ANY_INSTANCE_STATE;
dds.vstate := NEW_VIEW_STATE;
dds.ret_code := RETCODE_NO_DATA;
start_dds;
wait_on_dds;
-- MEM: S0, S1-
-- ISTATE: DISPOSED
-- VIEW: NOT_NEW
-- WRITER: 0
Log("Current Time: 2s", INFO);
check_time <= gen_duration(2,0);
wait until rising_edge(clk);
wait until rising_edge(clk);
wait_on_idle;
cc := DEFAULT_CACHE_CHANGE;
cc.serialized_key := FALSE;
cc.kind := ALIVE;
cc.payload := gen_payload(HANDLE_NIL,10);
cc.src_timestamp := gen_duration(2,0);
Log("RTPS Operation ADD_CACHE_CHANGE [Writer 0, Aligned Payload] (ACCEPTED)", INFO);
rtps := DEFAULT_RTPS_READER_TEST;
rtps.opcode := ADD_CACHE_CHANGE;
rtps.cc := cc;
rtps.writer_pos := 0;
rtps.ret_code := OK;
s := to_sample(cc,ALIVE_INSTANCE_STATE);
add_sample(s,mem, BY_RECEPTION_TIMESTAMP_DESTINATION_ORDER_QOS);
start_rtps;
wait_on_rtps;
wait_on_idle;
-- MEM: S0, S1-, S2
-- ISTATE: ALIVE
-- VIEW: NEW
-- WRITER: 0
-- TEST: READ_NEXT_SAMPLE [WITH UNREAD SAMPLE]
Log("DDS Operation READ_NEXT_SAMPLE (Expected ID1)", INFO);
dds := DEFAULT_DDS_READER_TEST;
dds.opcode := READ_NEXT_SAMPLE;
start_dds;
wait_on_dds;
-- MEM: S0, S1-, S2
-- ISTATE: ALIVE
-- VIEW: NEW
-- WRITER: 0
-- TEST: READ MARKS SAMPLES AS READ
-- TEST: READ MODIFIES VIEW STATE [READ PREVIOUS GENERATION]
-- TEST: READ [MAX_SAMPLES > SAMPLES]
Log("DDS Operation READ [MAX_SAMPLES 20, READ_SAMPLE_STATE, ALIVE_INSTANCE_STATE, NEW_VIEW_STATE] (Expected ID0,ID1)", INFO);
dds := DEFAULT_DDS_READER_TEST;
dds.opcode := READ;
dds.max_samples := 20;
dds.sstate := READ_SAMPLE_STATE;
dds.istate := ALIVE_INSTANCE_STATE;
dds.vstate := NEW_VIEW_STATE;
start_dds;
wait_on_dds;
-- MEM: S0, S1-, S2
-- ISTATE: ALIVE
-- VIEW: NEW
-- WRITER: 0
-- TEST: TAKE
Log("DDS Operation TAKE [MAX_SAMPLES 1, READ_SAMPLE_STATE, ALIVE_INSTANCE_STATE, NEW_VIEW_STATE] (Expected ID0)", INFO);
dds := DEFAULT_DDS_READER_TEST;
dds.opcode := TAKE;
dds.max_samples := 1;
dds.sstate := READ_SAMPLE_STATE;
dds.istate := ALIVE_INSTANCE_STATE;
dds.vstate := NEW_VIEW_STATE;
start_dds;
wait_on_dds;
-- MEM: S1-, S2
-- ISTATE: ALIVE
-- VIEW: NEW
-- WRITER: 0
-- TEST: TAKE_NEXT_SAMPLE
Log("DDS Operation TAKE_NEXT_SAMPLE (Expected ID2)", INFO);
dds := DEFAULT_DDS_READER_TEST;
dds.opcode := TAKE_NEXT_SAMPLE;
start_dds;
wait_on_dds;
-- MEM: S1-
-- ISTATE: ALIVE
-- VIEW: NOT_NEW
-- WRITER: 0
-- TEST: READ_NEXT_SAMPLE [WITHOUT UNREAD SAMPLE]
Log("DDS Operation READ_NEXT_SAMPLE (No Data)", INFO);
dds := DEFAULT_DDS_READER_TEST;
dds.opcode := READ_NEXT_SAMPLE;
dds.ret_code := RETCODE_NO_DATA;
start_dds;
wait_on_dds;
-- MEM: S1-
-- ISTATE: ALIVE
-- VIEW: NOT_NEW
-- WRITER: 0
Log("DDS Operation TAKE [MAX_SAMPLES 20, ANY_SAMPLE_STATE, ANY_INSTANCE_STATE, ANY_VIEW_STATE] (Expected ID1)", INFO);
dds := DEFAULT_DDS_READER_TEST;
dds.opcode := TAKE;
dds.max_samples := 20;
dds.sstate := ANY_SAMPLE_STATE;
dds.istate := ANY_INSTANCE_STATE;
dds.vstate := ANY_VIEW_STATE;
start_dds;
wait_on_dds;
-- MEM: -
-- ISTATE: ALIVE
-- VIEW: NOT_NEW
-- WRITER: 0
-- TEST: TAKE REMOVES SAMPLE
-- TEST: TAKE [NO SAMPLES]
Log("DDS Operation TAKE [MAX_SAMPLES 20, ANY_SAMPLE_STATE, ANY_INSTANCE_STATE, ANY_VIEW_STATE] (No Data)", INFO);
dds := DEFAULT_DDS_READER_TEST;
dds.opcode := TAKE;
dds.max_samples := 20;
dds.sstate := ANY_SAMPLE_STATE;
dds.istate := ANY_INSTANCE_STATE;
dds.vstate := ANY_VIEW_STATE;
dds.ret_code := RETCODE_NO_DATA;
start_dds;
wait_on_dds;
-- MEM: -
-- ISTATE: ALIVE
-- VIEW: NOT_NEW
-- WRITER: 0
-- TEST: READ [NO SAMPLES]
Log("DDS Operation READ [MAX_SAMPLES 20, ANY_SAMPLE_STATE, ANY_INSTANCE_STATE, ANY_VIEW_STATE] (No Data)", INFO);
dds := DEFAULT_DDS_READER_TEST;
dds.opcode := READ;
dds.max_samples := 20;
dds.sstate := ANY_SAMPLE_STATE;
dds.istate := ANY_INSTANCE_STATE;
dds.vstate := ANY_VIEW_STATE;
dds.ret_code := RETCODE_NO_DATA;
start_dds;
wait_on_dds;
-- MEM: -
-- ISTATE: ALIVE
-- VIEW: NOT_NEW
-- WRITER: 0
-- TEST: READ_NEXT_SAMPLE [NO SAMPLE]
Log("DDS Operation READ_NEXT_SAMPLE (No Data)", INFO);
dds := DEFAULT_DDS_READER_TEST;
dds.opcode := READ_NEXT_SAMPLE;
dds.ret_code := RETCODE_NO_DATA;
start_dds;
wait_on_dds;
-- MEM: -
-- ISTATE: ALIVE
-- VIEW: NOT_NEW
-- WRITER: 0
-- TEST: TAKE_NEXT_SAMPLE [NO SAMPLE]
Log("DDS Operation TAKE_NEXT_SAMPLE (No Data)", INFO);
dds := DEFAULT_DDS_READER_TEST;
dds.opcode := TAKE_NEXT_SAMPLE;
dds.ret_code := RETCODE_NO_DATA;
start_dds;
wait_on_dds;
-- MEM: -
-- ISTATE: ALIVE
-- VIEW: NOT_NEW
-- WRITER: 0
-- TEST: READ_INSTANCE
Log("DDS Operation READ_INSTANCE [MAX_SAMPLES 20, ANY_SAMPLE_STATE, ANY_INSTANCE_STATE, ANY_VIEW_STATE, Instance 1] (Illegal Operation)", INFO);
dds := DEFAULT_DDS_READER_TEST;
dds.opcode := READ_INSTANCE;
dds.max_samples := 20;
dds.sstate := ANY_SAMPLE_STATE;
dds.istate := ANY_INSTANCE_STATE;
dds.vstate := ANY_VIEW_STATE;
dds.inst := kh1;
dds.ret_code := RETCODE_ILLEGAL_OPERATION;
start_dds;
wait_on_dds;
-- MEM: -
-- ISTATE: ALIVE
-- VIEW: NOT_NEW
-- WRITER: 0
-- TEST: TAKE_INSTANCE
Log("DDS Operation TAKE_INSTANCE [MAX_SAMPLES 20, ANY_SAMPLE_STATE, ANY_INSTANCE_STATE, ANY_VIEW_STATE, Instance 1] (Illegal Operation)", INFO);
dds := DEFAULT_DDS_READER_TEST;
dds.opcode := TAKE_INSTANCE;
dds.max_samples := 20;
dds.sstate := ANY_SAMPLE_STATE;
dds.istate := ANY_INSTANCE_STATE;
dds.vstate := ANY_VIEW_STATE;
dds.inst := kh1;
dds.ret_code := RETCODE_ILLEGAL_OPERATION;
start_dds;
wait_on_dds;
-- MEM: -
-- ISTATE: ALIVE
-- VIEW: NOT_NEW
-- WRITER: 0
-- TEST: READ_NEXT_INSTANCE
Log("DDS Operation READ_NEXT_INSTANCE [MAX_SAMPLES 20, ANY_SAMPLE_STATE, ANY_INSTANCE_STATE, ANY_VIEW_STATE, Instance 1] (Illegal Operation)", INFO);
dds := DEFAULT_DDS_READER_TEST;
dds.opcode := READ_NEXT_INSTANCE;
dds.max_samples := 20;
dds.sstate := ANY_SAMPLE_STATE;
dds.istate := ANY_INSTANCE_STATE;
dds.vstate := ANY_VIEW_STATE;
dds.inst := kh1;
dds.ret_code := RETCODE_ILLEGAL_OPERATION;
start_dds;
wait_on_dds;
-- MEM: -
-- ISTATE: ALIVE
-- VIEW: NOT_NEW
-- WRITER: 0
-- TEST: TAKE_NEXT_INSTANCE
Log("DDS Operation TAKE_NEXT_INSTANCE [MAX_SAMPLES 20, ANY_SAMPLE_STATE, ANY_INSTANCE_STATE, ANY_VIEW_STATE, Instance 1] (Illegal Operation)", INFO);
dds := DEFAULT_DDS_READER_TEST;
dds.opcode := TAKE_NEXT_INSTANCE;
dds.max_samples := 20;
dds.sstate := ANY_SAMPLE_STATE;
dds.istate := ANY_INSTANCE_STATE;
dds.vstate := ANY_VIEW_STATE;
dds.inst := kh1;
dds.ret_code := RETCODE_ILLEGAL_OPERATION;
start_dds;
wait_on_dds;
-- MEM: -
-- ISTATE: ALIVE
-- VIEW: NOT_NEW
-- WRITER: 0
wait_on_completion;
TranscriptOpen(RESULTS_FILE, APPEND_MODE);
SetTranscriptMirror;
ReportAlerts;
TranscriptClose;
std.env.stop;
wait;
end process;
clock_prc : process
begin
clk <= '0';
wait for 25 ns;
clk <= '1';
wait for 25 ns;
end process;
alert_prc : process(all)
begin
if rising_edge(clk) then
-- TODO
end if;
end process;
dds_prc : process(all)
variable col : COLLECTION_TYPE := DEFAULT_COLLECTION;
begin
if rising_edge(clk) then
dds_done <= '0';
case (dds_stage ) is
when IDLE =>
if (dds_start = '1') then
dds_stage <= START;
else
dds_done <= '1';
end if;
when START =>
if (ack_dds = '1') then
dds_stage <= DONE;
dds_cnt <= 0;
end if;
when DONE =>
if (done_dds = '1') then
AffirmIfEqual(ret_id, return_code_dds, dds.ret_code);
case (dds.ret_code) is
when RETCODE_OK =>
gen_collection(mem, col, dds, INSTANCE_PRESENTATION_QOS, FALSE);
dds_stage <= CHECK_SI;
dds_cnt <= 0;
when others =>
dds_stage <= IDLE;
end case;
end if;
when CHECK_SI =>
if (si_valid = '1') then
Log("Read Sample ID" & to_string(to_integer(si_source_timestamp(0))), DEBUG);
AffirmIfEqual(sstate_id, si_sample_state, col.s(dds_cnt).sstate);
AffirmIfEqual(vstate_id, si_view_state, col.s(dds_cnt).vstate);
AffirmIfEqual(istate_id, si_instance_state, col.s(dds_cnt).istate);
AffirmIfEqual(ts_id, convert_from_double_word(si_source_timestamp), convert_from_double_word(col.s(dds_cnt).ts));
AffirmIfEqual(inst_id, to_unsigned(si_instance_handle), to_unsigned(col.s(dds_cnt).inst));
AffirmIfEqual(pub_id, to_unsigned(si_publication_handle), to_unsigned(HANDLE_NIL));
AffirmIfEqual(dis_gen_cnt_id, si_disposed_generation_count, std_logic_vector(to_unsigned(col.s(dds_cnt).dis_gen_cnt,WORD_WIDTH)));
AffirmIfEqual(no_w_gen_cnt_id, si_no_writers_generation_count, std_logic_vector(to_unsigned(col.s(dds_cnt).no_w_gen_cnt,WORD_WIDTH)));
AffirmIfEqual(srank_id, si_sample_rank, std_logic_vector(to_unsigned(col.s(dds_cnt).srank,WORD_WIDTH)));
AffirmIfEqual(grank_id, si_generation_rank, std_logic_vector(to_unsigned(col.s(dds_cnt).grank,WORD_WIDTH)));
AffirmIfEqual(agrank_id, si_absolute_generation_rank, std_logic_vector(to_unsigned(col.s(dds_cnt).agrank,WORD_WIDTH)));
if (si_valid_data = '1') then
AffirmIf(valid_id, col.s(dds_cnt).data /= EMPTY_TEST_PACKET, "Sample with Data not expected");
dds_stage <= CHECK_DATA;
dds_cnt2 <= 0;
else
AffirmIf(valid_id, col.s(dds_cnt).data = EMPTY_TEST_PACKET, "Sample with Data expected");
if (dds_cnt = col.len-1) then
-- DONE
dds_stage <= WAIT_EOC;
else
dds_cnt <= dds_cnt + 1;
end if;
end if;
end if;
AffirmIf(eoc_id, eoc = '0', "EOC pulled high");
when CHECK_DATA =>
if (valid_out_dds = '1') then
AffirmIfEqual(data_id, data_out_dds, col.s(dds_cnt).data.data(dds_cnt2));
dds_cnt2 <= dds_cnt2 + 1;
if (dds_cnt2 = col.s(dds_cnt).data.length-1) then
AlertIf(data_id, last_word_out_dds /= '1', "Last Word Signal not pulled High", ERROR);
if (dds_cnt = col.len-1) then
-- DONE
dds_stage <= WAIT_EOC;
else
dds_stage <= CHECK_SI;
dds_cnt <= dds_cnt + 1;
end if;
end if;
end if;
when WAIT_EOC =>
if (eoc = '1') then
dds_stage <= IDLE;
end if;
end case;
end if;
-- DEFAULT
start_dds <= '0';
opcode_dds <= NOP;
instance_state_dds <= ANY_INSTANCE_STATE;
view_state_dds <= ANY_VIEW_STATE;
sample_state_dds <= ANY_SAMPLE_STATE;
instance_handle_dds <= HANDLE_NIL;
max_samples_dds <= (others => '0');
get_data_dds <= '0';
ready_out_dds <= '0';
case (dds_stage ) is
when START =>
start_dds <= '1';
opcode_dds <= dds.opcode;
instance_state_dds <= dds.istate;
view_state_dds <= dds.vstate;
sample_state_dds <= dds.sstate;
instance_handle_dds <= dds.inst;
max_samples_dds <= std_logic_vector(to_unsigned(dds.max_samples, WORD_WIDTH));
when CHECK_SI =>
if (si_valid = '1' and si_valid_data = '1') then
get_data_dds <= '1';
end if;
when CHECK_DATA =>
ready_out_dds <= '1';
when others =>
null;
end case;
end process;
rtps_prc : process(all)
variable stimulus : TEST_PACKET_TYPE := EMPTY_TEST_PACKET;
begin
if rising_edge(clk) then
rtps_done <= '0';
case (rtps_stage) is
when IDLE =>
if (rtps_start = '1') then
rtps_stage <= START;
else
rtps_done <= '1';
end if;
when START =>
if (ack_rtps = '1') then
case (rtps.opcode) is
when ADD_CACHE_CHANGE =>
gen_add_cache_change_dds(rtps.cc, rtps.lifespan, rtps.writer_pos, stimulus);
rtps_stage <= PUSH;
when others =>
rtps_stage <= DONE;
end case;
end if;
when PUSH =>
if (ready_in_rtps = '1') then
rtps_cnt <= rtps_cnt + 1;
if (rtps_cnt = stimulus.length-1) then
rtps_stage <= DONE;
end if;
end if;
when DONE =>
if (done_rtps = '1') then
AffirmIfEqual(ret_id, HISTORY_CACHE_RESPONSE_TYPE'pos(ret_rtps), HISTORY_CACHE_RESPONSE_TYPE'pos(rtps.ret_code));
rtps_stage <= IDLE;
end if;
end case;
end if;
-- DEFAULT
start_rtps <= '0';
opcode_rtps <= NOP;
valid_in_rtps <= '0';
last_word_in_rtps <= '0';
data_in_rtps <= (others => '0');
case (rtps_stage) is
when START =>
start_rtps <= '1';
opcode_rtps <= rtps.opcode;
case (rtps.opcode) is
when REMOVE_WRITER =>
data_in_rtps <= std_logic_vector(to_unsigned(rtps.writer_pos,WORD_WIDTH));
when others =>
null;
end case;
when PUSH =>
valid_in_rtps <= '1';
data_in_rtps <= stimulus.data(rtps_cnt);
last_word_in_rtps <= stimulus.last(rtps_cnt);
when others =>
null;
end case;
end process;
kh_prc : process (all)
variable tmp_key_hash : INSTANCE_HANDLE_TYPE := HANDLE_NIL;
begin
if rising_edge(clk) then
case (kh_stage) is
when IDLE =>
if (start_kh = '1') then
case (opcode_kh) is
when PUSH_DATA =>
kh_stage <= READ_DATA;
kh_cnt <= 0;
kh_data <= EMPTY_TEST_PACKET;
when PUSH_SERIALIZED_KEY =>
kh_stage <= READ_DATA;
kh_cnt <= 0;
kh_data <= EMPTY_TEST_PACKET;
when READ_KEY_HASH =>
kh_stage <= PUSH_KEY_HASH;
kh_cnt <= 0;
when others =>
Alert("Unexpected Key Holder Operation", FAILURE);
end case;
end if;
when READ_DATA =>
if (valid_out_kh = '1') then
kh_data.data(kh_cnt) <= data_out_kh;
kh_data.last(kh_cnt) <= last_word_out_kh;
kh_data.length <= kh_data.length + 1;
kh_cnt <= kh_cnt + 1;
if (last_word_out_kh = '1') then
kh_stage <= IDLE;
end if;
end if;
when PUSH_KEY_HASH =>
if (ready_in_kh = '1') then
kh_cnt <= kh_cnt + 1;
if (kh_cnt = INSTANCE_HANDLE_TYPE'length-1) then
kh_stage <= IDLE;
end if;
end if;
end case;
end if;
-- DEFAULT
ack_kh <= '0';
ready_out_kh <= '0';
valid_in_kh <= '0';
data_in_kh <= (others => '0');
last_word_in_kh <= '0';
case (kh_stage) is
when IDLE =>
if (start_kh = '1') then
ack_kh <= '1';
end if;
when READ_DATA =>
ready_out_kh <= '1';
when PUSH_KEY_HASH =>
valid_in_kh <= '1';
tmp_key_hash := extract_key_hash(kh_data);
data_in_kh <= tmp_key_hash(kh_cnt);
if (kh_cnt = INSTANCE_HANDLE_TYPE'length-1) then
last_word_in_kh <= '1';
end if;
end case;
end process;
watchdog : process
begin
wait for 1 ms;
Alert("Test timeout", FAILURE);
std.env.stop;
end process;
end architecture;

View File

@ -55,3 +55,55 @@
-- TEST: ADD SAMPLE BIGGER THAN AVAILABLE MEMORY SPACE -- TEST: ADD SAMPLE BIGGER THAN AVAILABLE MEMORY SPACE
-- TEST: ADD SAMPLE ON PAYLOAD MEMORY FULL & MAX_SAMPLES_PER_INSTANCE (Induce Double Remove) -- TEST: ADD SAMPLE ON PAYLOAD MEMORY FULL & MAX_SAMPLES_PER_INSTANCE (Induce Double Remove)
-----------------------------------------------------------------------
-- TEST: READ [NO COMPATIBLE SAMPLES]
-- TEST: READ [NO SAMPLES]
-- TEST: READ [MAX_SAMPLES < SAMPLES]
-- TEST: READ [MAX_SAMPLES > SAMPLES]
-- TEST: TAKE [NO SAMPLES]
-- TEST: TAKE
-- TEST: READ [ANY SSTATE, ANY ISTATE, ANY VIEW]
-- TEST: READ [ANY SSTATE, ANY ISTATE, SPECIFIED VIEW]
-- TEST: READ [ANY SSTATE, SPECIFIED ISTATE, ANY VIEW]
-- TEST: READ [ANY SSTATE, SPECIFIED ISTATE, SPECIFIED VIEW]
-- TEST: READ [SPECIFIED SSTATE, ANY ISTATE, ANY VIEW]
-- TEST: READ [SPECIFIED SSTATE, ANY ISTATE, SPECIFIED VIEW]
-- TEST: READ [SPECIFIED SSTATE, SPECIFIED ISTATE, ANY VIEW]
-- TEST: READ [SPECIFIED SSTATE, SPECIFIED ISTATE, SPECIFIED VIEW]
-- TEST: READ_NEXT_SAMPLE [WITH UNREAD SAMPLE]
-- TEST: READ_NEXT_SAMPLE [WITHOUT UNREAD SAMPLE]
-- TEST: READ_NEXT_SAMPLE [NO SAMPLE]
-- TEST: TAKE_NEXT_SAMPLE [NO SAMPLE]
-- TEST: TAKE_NEXT_SAMPLE
-- TEST: READ_INSTANCE [UNKNOWN INSTANCE]
-- TEST: READ_INSTANCE [KNOWN INSTANCE, UNCOMPATIBLE SAMPLES]
-- TEST: READ_INSTANCE [KNOWN INSTANCE, COMPATIBLE SAMPLES]
-- TEST: READ_INSTANCE [NO SAMPLES]
-- TEST: TAKE_INSTANCE [NO SAMPLES]
-- TEST: TAKE_INSTANCE
-- TEST: READ_NEXT_INSTANCE [WITH SAMPLES, WITHOUT NEXT INSTANCE]
-- TEST: READ_NEXT_INSTANCE [WITH NEXT INSTANCE, UNCOMPATIBLE SAMPLES]
-- TEST: READ_NEXT_INSTANCE [WITH NEXT INSTANCE, COMPATIBLE SAMPLES]
-- TEST: READ_NEXT_INSTANCE [HANDLE_NIL]
-- TEST: READ_NEXT_INSTANCE [WITH NEXT INSTANCE, WITH COMPATIBLE SAMPLE, NOT DIRECT NEXT INSTANCE]
-- TEST: READ_NEXT_INSTANCE [NO SAMPLE]
-- TEST: TAKE_NEXT_INSTANCE [NO SAMPLE]
-- TEST: TAKE_NEXT_INSTANCE
-- TEST: GET ALL DATA WITH READ_NEXT_INSTANCE
-- TEST: READ MARKS SAMPLES AS READ
-- TEST: TAKE REMOVES SAMPLE
-- TEST: READ MODIFIES VIEW STATE [READ PREVIOUS GENERATION]
-- TEST: READ MODIFIES VIEW STATE [READ CURRENT GENERATION]
-- TEST: OUT OF ORDER SAMPLE AFTER DISPOSE

View File

@ -20,58 +20,63 @@ analyze ../rtps_reader.vhd
analyze ../rtps_writer.vhd analyze ../rtps_writer.vhd
analyze ../dds_writer.vhd analyze ../dds_writer.vhd
analyze ../dds_reader.vhd analyze ../dds_reader.vhd
analyze Level_0/L0_rtps_handler_test1.vhd #analyze Level_0/L0_rtps_handler_test1.vhd
analyze Level_0/L0_rtps_handler_test2.vhd #analyze Level_0/L0_rtps_handler_test2.vhd
analyze Level_0/L0_rtps_builtin_endpoint_test1.vhd #analyze Level_0/L0_rtps_builtin_endpoint_test1.vhd
analyze Level_0/L0_rtps_builtin_endpoint_test2.vhd #analyze Level_0/L0_rtps_builtin_endpoint_test2.vhd
analyze Level_0/L0_rtps_builtin_endpoint_test3.vhd #analyze Level_0/L0_rtps_builtin_endpoint_test3.vhd
analyze Level_0/L0_rtps_builtin_endpoint_test4.vhd #analyze Level_0/L0_rtps_builtin_endpoint_test4.vhd
analyze Level_0/L0_rtps_builtin_endpoint_test5.vhd #analyze Level_0/L0_rtps_builtin_endpoint_test5.vhd
analyze Level_0/L0_rtps_builtin_endpoint_test6.vhd #analyze Level_0/L0_rtps_builtin_endpoint_test6.vhd
analyze Level_0/L0_rtps_builtin_endpoint_test7.vhd #analyze Level_0/L0_rtps_builtin_endpoint_test7.vhd
analyze Level_0/L0_rtps_out_test1.vhd #analyze Level_0/L0_rtps_out_test1.vhd
analyze Level_1/L1_rtps_builtin_endpoint_test1.vhd #analyze Level_1/L1_rtps_builtin_endpoint_test1.vhd
analyze Level_0/L0_mem_ctrl_test1.vhd #analyze Level_0/L0_mem_ctrl_test1.vhd
analyze Level_0/L0_rtps_reader_test1_vrk.vhd #analyze Level_0/L0_rtps_reader_test1_vrk.vhd
analyze Level_0/L0_rtps_reader_test1_vbk.vhd #analyze Level_0/L0_rtps_reader_test1_vbk.vhd
analyze Level_0/L0_rtps_reader_test2_vrk.vhd #analyze Level_0/L0_rtps_reader_test2_vrk.vhd
analyze Level_0/L0_rtps_reader_test2_trk.vhd #analyze Level_0/L0_rtps_reader_test2_trk.vhd
analyze Level_0/L0_rtps_reader_test2_vbk.vhd #analyze Level_0/L0_rtps_reader_test2_vbk.vhd
analyze Level_0/L0_rtps_reader_test2_tbk.vhd #analyze Level_0/L0_rtps_reader_test2_tbk.vhd
analyze Level_0/L0_rtps_reader_test2_vrn.vhd #analyze Level_0/L0_rtps_reader_test2_vrn.vhd
analyze Level_0/L0_rtps_reader_test3_a.vhd #analyze Level_0/L0_rtps_reader_test3_a.vhd
analyze Level_0/L0_rtps_reader_test3_m.vhd #analyze Level_0/L0_rtps_reader_test3_m.vhd
analyze Level_1/L1_rtps_reader_test1_vrk.vhd #analyze Level_1/L1_rtps_reader_test1_vrk.vhd
analyze Level_1/L1_rtps_reader_test1_trk.vhd #analyze Level_1/L1_rtps_reader_test1_trk.vhd
analyze Level_0/L0_rtps_writer_test1_vrkdp.vhd #analyze Level_0/L0_rtps_writer_test1_vrkdp.vhd
analyze Level_0/L0_rtps_writer_test1_vbkdp.vhd #analyze Level_0/L0_rtps_writer_test1_vbkdp.vhd
analyze Level_1/L1_rtps_writer_test1_vrkdp.vhd #analyze Level_1/L1_rtps_writer_test1_vrkdp.vhd
analyze Level_1/L1_rtps_writer_test1_trkdp.vhd #analyze Level_1/L1_rtps_writer_test1_trkdp.vhd
analyze Level_1/L1_rtps_writer_test1_tbkdp.vhd #analyze Level_1/L1_rtps_writer_test1_tbkdp.vhd
analyze Level_1/L1_rtps_writer_test1_vbkdp.vhd #analyze Level_1/L1_rtps_writer_test1_vbkdp.vhd
analyze Level_1/L1_rtps_writer_test1_vrndp.vhd #analyze Level_1/L1_rtps_writer_test1_vrndp.vhd
analyze Level_1/L1_rtps_writer_test1_vrksp.vhd #analyze Level_1/L1_rtps_writer_test1_vrksp.vhd
analyze Level_1/L1_rtps_writer_test1_vrkdn.vhd #analyze Level_1/L1_rtps_writer_test1_vrkdn.vhd
analyze Level_1/L1_rtps_writer_test1_trkdn.vhd #analyze Level_1/L1_rtps_writer_test1_trkdn.vhd
analyze Level_1/L1_rtps_writer_test2_vrkdn.vhd #analyze Level_1/L1_rtps_writer_test2_vrkdn.vhd
analyze Level_0/L0_rtps_writer_test2_vrkdp.vhd #analyze Level_0/L0_rtps_writer_test2_vrkdp.vhd
analyze Level_0/L0_dds_writer_test1_aik.vhd #analyze Level_0/L0_dds_writer_test1_aik.vhd
analyze Level_0/L0_dds_writer_test1_ain.vhd #analyze Level_0/L0_dds_writer_test1_ain.vhd
analyze Level_0/L0_dds_writer_test1_lik.vhd #analyze Level_0/L0_dds_writer_test1_lik.vhd
analyze Level_0/L0_dds_writer_test1_afk.vhd #analyze Level_0/L0_dds_writer_test1_afk.vhd
analyze Level_0/L0_dds_writer_test2_aik.vhd #analyze Level_0/L0_dds_writer_test2_aik.vhd
analyze Level_0/L0_dds_writer_test3_aik.vhd #analyze Level_0/L0_dds_writer_test3_aik.vhd
analyze Level_0/L0_dds_writer_test3_ain.vhd #analyze Level_0/L0_dds_writer_test3_ain.vhd
analyze Level_0/L0_dds_writer_test4_aik.vhd #analyze Level_0/L0_dds_writer_test4_aik.vhd
analyze Level_0/L0_dds_writer_test5_afk.vhd #analyze Level_0/L0_dds_writer_test5_afk.vhd
analyze Level_0/L0_dds_reader_test1_arzkriu.vhd #analyze Level_0/L0_dds_reader_test1_arzkriu.vhd
analyze Level_0/L0_dds_reader_test1_lrzkriu.vhd #analyze Level_0/L0_dds_reader_test1_lrzkriu.vhd
analyze Level_0/L0_dds_reader_test1_lbzkriu.vhd #analyze Level_0/L0_dds_reader_test1_lbzkriu.vhd
analyze Level_0/L0_dds_reader_test1_abzkriu.vhd #analyze Level_0/L0_dds_reader_test1_abzkriu.vhd
analyze Level_0/L0_dds_reader_test1_arznriu.vhd #analyze Level_0/L0_dds_reader_test1_arznriu.vhd
analyze Level_0/L0_dds_reader_test1_arzksiu.vhd #analyze Level_0/L0_dds_reader_test1_arzksiu.vhd
analyze Level_0/L0_dds_reader_test2_arpkriu.vhd #analyze Level_0/L0_dds_reader_test2_arpkriu.vhd
analyze Level_0/L0_dds_reader_test3_arzkriu.vhd
analyze Level_0/L0_dds_reader_test3_arzkrio.vhd
analyze Level_0/L0_dds_reader_test3_arzkrtu.vhd
analyze Level_0/L0_dds_reader_test3_arzkrto.vhd
analyze Level_0/L0_dds_reader_test3_arznriu.vhd
analyze Level_0/L0_dds_reader_test3_arzksto.vhd
#simulate L0_rtps_handler_test1 #simulate L0_rtps_handler_test1
#simulate L0_rtps_handler_test2 #simulate L0_rtps_handler_test2
@ -123,4 +128,10 @@ analyze Level_0/L0_dds_reader_test2_arpkriu.vhd
#simulate L0_dds_reader_test1_abzkriu #simulate L0_dds_reader_test1_abzkriu
#simulate L0_dds_reader_test1_arznriu #simulate L0_dds_reader_test1_arznriu
#simulate L0_dds_reader_test1_arzksiu #simulate L0_dds_reader_test1_arzksiu
simulate L0_dds_reader_test2_arpkriu #simulate L0_dds_reader_test2_arpkriu
simulate L0_dds_reader_test3_arzkriu
#simulate L0_dds_reader_test3_arzkrio
#simulate L0_dds_reader_test3_arzkrtu
#simulate L0_dds_reader_test3_arzkrto
#simulate L0_dds_reader_test3_arznriu
#simulate L0_dds_reader_test3_arzksto

View File

@ -403,12 +403,9 @@ architecture arch of dds_reader is
signal cur_generation_rank, cur_generation_rank_next : unsigned(GENERATION_RANK_WIDTH-1 downto 0) := (others => '0'); signal cur_generation_rank, cur_generation_rank_next : unsigned(GENERATION_RANK_WIDTH-1 downto 0) := (others => '0');
-- Denotes if a TAKE operation is in progress -- Denotes if a TAKE operation is in progress
signal is_take, is_take_next : std_logic := '0'; signal is_take, is_take_next : std_logic := '0';
-- NOTE: We use this signal to prevent the costly Instance Marking in the case that we only need to ouptput samples of one Instance.
-- Denotes if the READ/TAKE operation applies to a single Instance -- Denotes if the READ/TAKE operation applies to a single Instance
signal single_instance, single_instance_next : std_logic := '0'; signal single_instance, single_instance_next : std_logic := '0';
-- NOTE: We use this signal to prevent the costly Instance Marking in the case that we only need to ouptput next sample.
-- I.e. make READ_NEXT/TAKE_NEXT the fastest commands.
-- Denotes if the READ/TAKE operation applies only to a single sample
signal single_sample, single_sample_next : std_logic := '0';
-- Denotes if the marks on Instances should be reset -- Denotes if the marks on Instances should be reset
signal unmark_instances_flag, unmark_instances_flag_next : std_logic := '0'; signal unmark_instances_flag, unmark_instances_flag_next : std_logic := '0';
-- Denotes if the READ/TAKE operation does not apply to a specific Instance -- Denotes if the READ/TAKE operation does not apply to a specific Instance
@ -417,6 +414,16 @@ architecture arch of dds_reader is
signal stale_inst_cnt, stale_inst_cnt_next : natural range 0 to to_integer(unsigned(MAX_INSTANCES))-1 := 0; signal stale_inst_cnt, stale_inst_cnt_next : natural range 0 to to_integer(unsigned(MAX_INSTANCES))-1 := 0;
-- Test signal used for testbench synchronisation -- Test signal used for testbench synchronisation
signal idle_sig : std_logic := '0'; signal idle_sig : std_logic := '0';
-- Signal denoting if the PRE_CALCULATE stage was run for the current instance
signal pre_calculated, pre_calculated_next : std_logic := '0';
-- Disposed Generation Count Latch
signal dis_gen_cnt_latch, dis_gen_cnt_latch_next : unsigned(WORD_WIDTH-1 downto 0) := (others => '0');
-- No Writers Generation Count Latch
signal no_w_gen_cnt_latch, no_w_gen_cnt_latch_next : unsigned(WORD_WIDTH-1 downto 0) := (others => '0');
-- Denotes if a newer sample of the same Instance exists
signal newer_inst_sample, newer_inst_sample_next : std_logic := '0';
-- Denotes if a new Instance is added
signal new_inst, new_inst_next : std_logic := '0';
-- *COMMUNICATION STATUS* -- *COMMUNICATION STATUS*
signal status_sig, status_sig_next : std_logic_vector(STATUS_KIND_WIDTH-1 downto 0) := (others => '0'); signal status_sig, status_sig_next : std_logic_vector(STATUS_KIND_WIDTH-1 downto 0) := (others => '0');
@ -693,7 +700,6 @@ begin
cur_generation_rank_next <= cur_generation_rank; cur_generation_rank_next <= cur_generation_rank;
is_take_next <= is_take; is_take_next <= is_take;
single_instance_next <= single_instance; single_instance_next <= single_instance;
single_sample_next <= single_sample;
unmark_instances_flag_next <= unmark_instances_flag; unmark_instances_flag_next <= unmark_instances_flag;
dynamic_next_instance_next <= dynamic_next_instance; dynamic_next_instance_next <= dynamic_next_instance;
last_read_ts_next <= last_read_ts; last_read_ts_next <= last_read_ts;
@ -717,6 +723,11 @@ begin
oldest_sample_next <= oldest_sample; oldest_sample_next <= oldest_sample;
rtps_return_code_latch_next <= rtps_return_code_latch; rtps_return_code_latch_next <= rtps_return_code_latch;
dds_return_code_latch_next <= dds_return_code_latch; dds_return_code_latch_next <= dds_return_code_latch;
pre_calculated_next <= pre_calculated;
dis_gen_cnt_latch_next <= dis_gen_cnt_latch;
no_w_gen_cnt_latch_next <= no_w_gen_cnt_latch;
newer_inst_sample_next <= newer_inst_sample;
new_inst_next <= new_inst;
-- DEFAULT Unregistered -- DEFAULT Unregistered
inst_opcode <= NOP; inst_opcode <= NOP;
opcode_kh <= NOP; opcode_kh <= NOP;
@ -759,6 +770,8 @@ begin
when IDLE => when IDLE =>
idle_sig <= '1'; idle_sig <= '1';
-- Reset -- Reset
new_inst_next <= '0';
newer_inst_sample_next <= '0';
remove_oldest_inst_sample_next <= '0'; remove_oldest_inst_sample_next <= '0';
remove_oldest_sample_next <= '0'; remove_oldest_sample_next <= '0';
is_take_next <= '0'; is_take_next <= '0';
@ -874,15 +887,16 @@ begin
-- Latch Input Signals -- Latch Input Signals
sample_state_next <= sample_state_dds; sample_state_next <= sample_state_dds;
view_state_next <= view_state_dds; view_state_next <= view_state_dds;
instance_state_next <= instance_state; instance_state_next <= instance_state_dds;
max_samples_latch_next <= unsigned(max_samples_dds); max_samples_latch_next <= unsigned(max_samples_dds);
-- Reset -- Reset
sel_sample_next <= SAMPLE_MEMORY_MAX_ADDRESS; sel_sample_next <= SAMPLE_MEMORY_MAX_ADDRESS;
sample_p1_next <= SAMPLE_MEMORY_MAX_ADDRESS; sample_p1_next <= SAMPLE_MEMORY_MAX_ADDRESS;
sample_p2_next <= SAMPLE_MEMORY_MAX_ADDRESS; sample_p2_next <= SAMPLE_MEMORY_MAX_ADDRESS;
single_sample_next <= '0'; pre_calculated_next <= '0';
single_instance_next <= '0' when WITH_KEY else '1'; single_instance_next <= '0' when WITH_KEY else '1';
dynamic_next_instance_next <= '0';
collection_cnt_next <= (others => '0'); collection_cnt_next <= (others => '0');
collection_cnt_max_next <= (others => '0'); collection_cnt_max_next <= (others => '0');
si_sample_state_sig_next <= (others => '0'); si_sample_state_sig_next <= (others => '0');
@ -902,88 +916,138 @@ begin
case (opcode_dds) is case (opcode_dds) is
when READ => when READ =>
ack_dds <= '1'; ack_dds <= '1';
-- No Samples Available
if (oldest_sample = SAMPLE_MEMORY_MAX_ADDRESS) then
stage_next <= RETURN_DDS;
dds_return_code_latch_next <= RETCODE_NO_DATA;
else
cur_sample_next <= oldest_sample; cur_sample_next <= oldest_sample;
cur_inst_next <= INSTANCE_MEMORY_MAX_ADDRESS; cur_inst_next <= INSTANCE_MEMORY_MAX_ADDRESS;
stage_next <= GET_NEXT_SAMPLE; stage_next <= GET_NEXT_SAMPLE;
cnt_next <= 0; cnt_next <= 0;
if (unsigned(max_samples_dds) = 1) then
single_instance_next <= '1';
end if;
end if;
when TAKE => when TAKE =>
is_take_next <= '1';
ack_dds <= '1'; ack_dds <= '1';
-- No Samples Available
if (oldest_sample = SAMPLE_MEMORY_MAX_ADDRESS) then
stage_next <= RETURN_DDS;
dds_return_code_latch_next <= RETCODE_NO_DATA;
else
is_take_next <= '1';
cur_sample_next <= oldest_sample; cur_sample_next <= oldest_sample;
cur_inst_next <= INSTANCE_MEMORY_MAX_ADDRESS; cur_inst_next <= INSTANCE_MEMORY_MAX_ADDRESS;
stage_next <= GET_NEXT_SAMPLE; stage_next <= GET_NEXT_SAMPLE;
cnt_next <= 0; cnt_next <= 0;
if (unsigned(max_samples_dds) = 1) then
single_instance_next <= '1';
end if;
end if;
when READ_NEXT_SAMPLE => when READ_NEXT_SAMPLE =>
ack_dds <= '1'; ack_dds <= '1';
single_sample_next <= '1'; -- No Samples Available
if (oldest_sample = SAMPLE_MEMORY_MAX_ADDRESS) then
stage_next <= RETURN_DDS;
dds_return_code_latch_next <= RETCODE_NO_DATA;
else
single_instance_next <= '1';
cur_sample_next <= oldest_sample; cur_sample_next <= oldest_sample;
cur_inst_next <= INSTANCE_MEMORY_MAX_ADDRESS; cur_inst_next <= INSTANCE_MEMORY_MAX_ADDRESS;
sample_state_next <= NOT_READ_SAMPLE_STATE; sample_state_next <= NOT_READ_SAMPLE_STATE;
view_state_next <= ANY_VIEW_STATE; view_state_next <= ANY_VIEW_STATE;
instance_state_next <= ALIVE_INSTANCE_STATE; instance_state_next <= ANY_INSTANCE_STATE;
max_samples_latch_next <= to_unsigned(1, max_samples_latch'length); max_samples_latch_next <= to_unsigned(1, max_samples_latch'length);
stage_next <= GET_NEXT_SAMPLE; stage_next <= GET_NEXT_SAMPLE;
cnt_next <= 0; cnt_next <= 0;
end if;
when TAKE_NEXT_SAMPLE => when TAKE_NEXT_SAMPLE =>
ack_dds <= '1'; ack_dds <= '1';
-- No Samples Available
if (oldest_sample = SAMPLE_MEMORY_MAX_ADDRESS) then
stage_next <= RETURN_DDS;
dds_return_code_latch_next <= RETCODE_NO_DATA;
else
is_take_next <= '1'; is_take_next <= '1';
single_sample_next <= '1'; single_instance_next <= '1';
cur_sample_next <= oldest_sample; cur_sample_next <= oldest_sample;
cur_inst_next <= INSTANCE_MEMORY_MAX_ADDRESS; cur_inst_next <= INSTANCE_MEMORY_MAX_ADDRESS;
sample_state_next <= NOT_READ_SAMPLE_STATE; sample_state_next <= NOT_READ_SAMPLE_STATE;
view_state_next <= ANY_VIEW_STATE; view_state_next <= ANY_VIEW_STATE;
instance_state_next <= ALIVE_INSTANCE_STATE; instance_state_next <= ANY_INSTANCE_STATE;
max_samples_latch_next <= to_unsigned(1, max_samples_latch'length); max_samples_latch_next <= to_unsigned(1, max_samples_latch'length);
stage_next <= GET_NEXT_SAMPLE; stage_next <= GET_NEXT_SAMPLE;
cnt_next <= 0; cnt_next <= 0;
end if;
when READ_INSTANCE => when READ_INSTANCE =>
ack_dds <= '1';
-- Synthesis Guard -- Synthesis Guard
if (WITH_KEY) then if (WITH_KEY) then
ack_dds <= '1'; -- No Samples Available
if (oldest_sample = SAMPLE_MEMORY_MAX_ADDRESS) then
stage_next <= RETURN_DDS;
dds_return_code_latch_next <= RETCODE_NO_DATA;
else
single_instance_next <= '1'; single_instance_next <= '1';
cur_sample_next <= oldest_sample; cur_sample_next <= oldest_sample;
key_hash_next <= instance_handle_dds; key_hash_next <= instance_handle_dds;
stage_next <= CHECK_INSTANCE; stage_next <= CHECK_INSTANCE;
cnt_next <= 0; cnt_next <= 0;
end if;
else else
ack_dds <= '1';
stage_next <= RETURN_DDS; stage_next <= RETURN_DDS;
dds_return_code_latch_next <= RETCODE_ILLEGAL_OPERATION; dds_return_code_latch_next <= RETCODE_ILLEGAL_OPERATION;
end if; end if;
when TAKE_INSTANCE => when TAKE_INSTANCE =>
ack_dds <= '1';
-- Synthesis Guard -- Synthesis Guard
if (WITH_KEY) then if (WITH_KEY) then
ack_dds <= '1'; -- No Samples Available
if (oldest_sample = SAMPLE_MEMORY_MAX_ADDRESS) then
stage_next <= RETURN_DDS;
dds_return_code_latch_next <= RETCODE_NO_DATA;
else
is_take_next <= '1'; is_take_next <= '1';
single_instance_next <= '1'; single_instance_next <= '1';
cur_sample_next <= oldest_sample; cur_sample_next <= oldest_sample;
key_hash_next <= instance_handle_dds; key_hash_next <= instance_handle_dds;
stage_next <= CHECK_INSTANCE; stage_next <= CHECK_INSTANCE;
cnt_next <= 0; cnt_next <= 0;
end if;
else else
ack_dds <= '1';
stage_next <= RETURN_DDS; stage_next <= RETURN_DDS;
dds_return_code_latch_next <= RETCODE_ILLEGAL_OPERATION; dds_return_code_latch_next <= RETCODE_ILLEGAL_OPERATION;
end if; end if;
when READ_NEXT_INSTANCE => when READ_NEXT_INSTANCE =>
ack_dds <= '1';
-- Synthesis Guard -- Synthesis Guard
if (WITH_KEY) then if (WITH_KEY) then
ack_dds <= '1'; -- No Samples Available
if (oldest_sample = SAMPLE_MEMORY_MAX_ADDRESS) then
stage_next <= RETURN_DDS;
dds_return_code_latch_next <= RETCODE_NO_DATA;
else
single_instance_next <= '1'; single_instance_next <= '1';
dynamic_next_instance_next <= '1'; dynamic_next_instance_next <= '1';
cur_sample_next <= oldest_sample; cur_sample_next <= oldest_sample;
key_hash_next <= instance_handle_dds; key_hash_next <= instance_handle_dds;
stage_next <= FIND_NEXT_INSTANCE; stage_next <= FIND_NEXT_INSTANCE;
cnt_next <= 0; cnt_next <= 0;
end if;
else else
ack_dds <= '1';
stage_next <= RETURN_DDS; stage_next <= RETURN_DDS;
dds_return_code_latch_next <= RETCODE_ILLEGAL_OPERATION; dds_return_code_latch_next <= RETCODE_ILLEGAL_OPERATION;
end if; end if;
when TAKE_NEXT_INSTANCE => when TAKE_NEXT_INSTANCE =>
ack_dds <= '1';
-- Synthesis Guard -- Synthesis Guard
if (WITH_KEY) then if (WITH_KEY) then
ack_dds <= '1'; -- No Samples Available
if (oldest_sample = SAMPLE_MEMORY_MAX_ADDRESS) then
stage_next <= RETURN_DDS;
dds_return_code_latch_next <= RETCODE_NO_DATA;
else
is_take_next <= '1'; is_take_next <= '1';
single_instance_next <= '1'; single_instance_next <= '1';
dynamic_next_instance_next <= '1'; dynamic_next_instance_next <= '1';
@ -991,8 +1055,8 @@ begin
key_hash_next <= instance_handle_dds; key_hash_next <= instance_handle_dds;
stage_next <= FIND_NEXT_INSTANCE; stage_next <= FIND_NEXT_INSTANCE;
cnt_next <= 0; cnt_next <= 0;
end if;
else else
ack_dds <= '1';
stage_next <= RETURN_DDS; stage_next <= RETURN_DDS;
dds_return_code_latch_next <= RETCODE_ILLEGAL_OPERATION; dds_return_code_latch_next <= RETCODE_ILLEGAL_OPERATION;
end if; end if;
@ -1466,7 +1530,7 @@ begin
end if; end if;
end if; end if;
when FILTER_STAGE => when FILTER_STAGE =>
-- Precondition: cur_sample set, inst_data set (IMF_IGNORE_DEADLINE_FLAG, IMF_SAMPLE_CNT_FLAG) -- Precondition: cur_sample set, inst_data set (IMF_IGNORE_DEADLINE_FLAG, IMF_SAMPLE_CNT_FLAG, IMF_DISPOSED_CNT_FLAG, IMF_NO_WRITERS_CNT_FLAG)
-- Wait for Instance Search to finish -- Wait for Instance Search to finish
if (not WITH_KEY or inst_op_done = '1') then if (not WITH_KEY or inst_op_done = '1') then
@ -1475,6 +1539,9 @@ begin
if (not WITH_KEY or inst_addr_base /= INSTANCE_MEMORY_MAX_ADDRESS) then if (not WITH_KEY or inst_addr_base /= INSTANCE_MEMORY_MAX_ADDRESS) then
-- Latch Instance Pointer -- Latch Instance Pointer
cur_inst_next <= inst_addr_base; cur_inst_next <= inst_addr_base;
-- Latch Instance Generation Counters
dis_gen_cnt_latch_next <= inst_data.disposed_gen_cnt;
no_w_gen_cnt_latch_next <= inst_data.no_writers_gen_cnt;
-- TIME_BASED_FILTER QOS -- TIME_BASED_FILTER QOS
if (TIME_BASED_FILTER_QOS /= DURATION_ZERO and time < inst_data.ignore_deadline) then if (TIME_BASED_FILTER_QOS /= DURATION_ZERO and time < inst_data.ignore_deadline) then
@ -1500,8 +1567,16 @@ begin
remove_oldest_inst_sample_next <= '1'; remove_oldest_inst_sample_next <= '1';
done_rtps <= '1'; done_rtps <= '1';
ret_rtps <= OK; ret_rtps <= OK;
if (DESTINATION_ORDER_QOS = BY_SOURCE_TIMESTAMP_DESTINATION_ORDER_QOS and newest_sample /= SAMPLE_MEMORY_MAX_ADDRESS) then
stage_next <= FIND_POS;
next_sample_next <= SAMPLE_MEMORY_MAX_ADDRESS;
prev_sample_next <= newest_sample;
cur_sample_next <= newest_sample;
cnt_next <= 0;
else
stage_next <= UPDATE_INSTANCE; stage_next <= UPDATE_INSTANCE;
end if; end if;
end if;
-- RESOURCE_LIMITS_QOS (MAX_SAMPLES) -- RESOURCE_LIMITS_QOS (MAX_SAMPLES)
elsif (empty_sample_list_head = empty_sample_list_tail) then elsif (empty_sample_list_head = empty_sample_list_tail) then
if (HISTORY_QOS = KEEP_ALL_HISTORY_QOS and RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS) then if (HISTORY_QOS = KEEP_ALL_HISTORY_QOS and RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS) then
@ -1520,21 +1595,37 @@ begin
remove_oldest_sample_next <= '1'; remove_oldest_sample_next <= '1';
done_rtps <= '1'; done_rtps <= '1';
ret_rtps <= OK; ret_rtps <= OK;
if (DESTINATION_ORDER_QOS = BY_SOURCE_TIMESTAMP_DESTINATION_ORDER_QOS and newest_sample /= SAMPLE_MEMORY_MAX_ADDRESS) then
stage_next <= FIND_POS;
next_sample_next <= SAMPLE_MEMORY_MAX_ADDRESS;
prev_sample_next <= newest_sample;
cur_sample_next <= newest_sample;
cnt_next <= 0;
else
stage_next <= UPDATE_INSTANCE; stage_next <= UPDATE_INSTANCE;
end if; end if;
end if;
else else
-- Accept Change -- Accept Change
done_rtps <= '1'; done_rtps <= '1';
ret_rtps <= OK; ret_rtps <= OK;
if (DESTINATION_ORDER_QOS = BY_SOURCE_TIMESTAMP_DESTINATION_ORDER_QOS and newest_sample /= SAMPLE_MEMORY_MAX_ADDRESS) then
stage_next <= FIND_POS;
next_sample_next <= SAMPLE_MEMORY_MAX_ADDRESS;
prev_sample_next <= newest_sample;
cur_sample_next <= newest_sample;
cnt_next <= 0;
else
stage_next <= UPDATE_INSTANCE; stage_next <= UPDATE_INSTANCE;
end if; end if;
end if;
else -- (only WITH_KEY) else -- (only WITH_KEY)
new_inst_next <= '1';
-- Latch Instance Pointer -- Latch Instance Pointer
cur_inst_next <= inst_empty_head; cur_inst_next <= inst_empty_head;
-- Only Insert Sample/Instance if Instance is ALIVE -- Ignore UNREGISTER/FILTERED Samples on Unknown Instances
if (sample_status_info(SSI_DISPOSED_FLAG) = '1' or sample_status_info(SSI_UNREGISTERED_FLAG) = '1' or sample_status_info(SSI_FILTERED_FLAG) = '1') then if (sample_status_info(SSI_UNREGISTERED_FLAG) = '1' or sample_status_info(SSI_FILTERED_FLAG) = '1') then
-- NOTE: Ignore Sample if Sample unregisters/disposes an instance that we do not know
-- Drop Change -- Drop Change
done_rtps <= '1'; done_rtps <= '1';
ret_rtps <= OK; ret_rtps <= OK;
@ -1591,13 +1682,20 @@ begin
-- Insert New Instance -- Insert New Instance
inst_op_start <= '1'; inst_op_start <= '1';
inst_opcode <= INSERT_INSTANCE; inst_opcode <= INSERT_INSTANCE;
status_info_update <= (ISI_LIVELINESS_FLAG => '1', others => '0'); status_info_update <= (ISI_LIVELINESS_FLAG => '1', ISI_NOT_ALIVE_DISPOSED_FLAG => sample_status_info(SSI_DISPOSED_FLAG), others => '0');
sample_cnt <= to_unsigned(1, WORD_WIDTH); sample_cnt <= to_unsigned(1, WORD_WIDTH);
deadline <= (time + TIME_BASED_FILTER_QOS) when (TIME_BASED_FILTER_QOS /= DURATION_ZERO) else TIME_INVALID; deadline <= (time + TIME_BASED_FILTER_QOS) when (TIME_BASED_FILTER_QOS /= DURATION_ZERO) else TIME_INVALID;
tmp_bitmap := (others => '0'); tmp_bitmap := (others => '0');
tmp_bitmap(writer_pos) := '1'; tmp_bitmap(writer_pos) := '1';
writer_bitmap <= to_writer_bitmap_array(tmp_bitmap); writer_bitmap <= to_writer_bitmap_array(tmp_bitmap);
if (DESTINATION_ORDER_QOS = BY_SOURCE_TIMESTAMP_DESTINATION_ORDER_QOS and newest_sample /= SAMPLE_MEMORY_MAX_ADDRESS) then
stage_next <= FIND_POS;
next_sample_next <= SAMPLE_MEMORY_MAX_ADDRESS;
prev_sample_next <= newest_sample;
cur_sample_next <= newest_sample;
cnt_next <= 0;
else
if (has_data = '1') then if (has_data = '1') then
stage_next <= FINALIZE_PAYLOAD; stage_next <= FINALIZE_PAYLOAD;
cnt_next <= 0; cnt_next <= 0;
@ -1607,6 +1705,7 @@ begin
end if; end if;
end if; end if;
end if; end if;
end if;
else else
-- RESOURCE_LIMITS_QOS (MAX_INSTANCES) (Instance Memory Full) -- RESOURCE_LIMITS_QOS (MAX_INSTANCES) (Instance Memory Full)
if (inst_empty_head = INSTANCE_MEMORY_MAX_ADDRESS) then if (inst_empty_head = INSTANCE_MEMORY_MAX_ADDRESS) then
@ -1642,13 +1741,20 @@ begin
-- Insert New Instance -- Insert New Instance
inst_op_start <= '1'; inst_op_start <= '1';
inst_opcode <= INSERT_INSTANCE; inst_opcode <= INSERT_INSTANCE;
status_info_update <= (ISI_LIVELINESS_FLAG => '1', others => '0'); status_info_update <= (ISI_LIVELINESS_FLAG => '1', ISI_NOT_ALIVE_DISPOSED_FLAG => sample_status_info(SSI_DISPOSED_FLAG), others => '0');
sample_cnt <= to_unsigned(1, WORD_WIDTH); sample_cnt <= to_unsigned(1, WORD_WIDTH);
deadline <= (time + TIME_BASED_FILTER_QOS) when (TIME_BASED_FILTER_QOS /= DURATION_ZERO) else TIME_INVALID; deadline <= (time + TIME_BASED_FILTER_QOS) when (TIME_BASED_FILTER_QOS /= DURATION_ZERO) else TIME_INVALID;
tmp_bitmap := (others => '0'); tmp_bitmap := (others => '0');
tmp_bitmap(writer_pos) := '1'; tmp_bitmap(writer_pos) := '1';
writer_bitmap <= to_writer_bitmap_array(tmp_bitmap); writer_bitmap <= to_writer_bitmap_array(tmp_bitmap);
if (DESTINATION_ORDER_QOS = BY_SOURCE_TIMESTAMP_DESTINATION_ORDER_QOS and newest_sample /= SAMPLE_MEMORY_MAX_ADDRESS) then
stage_next <= FIND_POS;
next_sample_next <= SAMPLE_MEMORY_MAX_ADDRESS;
prev_sample_next <= newest_sample;
cur_sample_next <= newest_sample;
cnt_next <= 0;
else
if (has_data = '1') then if (has_data = '1') then
stage_next <= FINALIZE_PAYLOAD; stage_next <= FINALIZE_PAYLOAD;
cnt_next <= 0; cnt_next <= 0;
@ -1660,6 +1766,194 @@ begin
end if; end if;
end if; end if;
end if; end if;
end if;
when FIND_POS =>
-- Synthesis Guard
if (DESTINATION_ORDER_QOS = BY_SOURCE_TIMESTAMP_DESTINATION_ORDER_QOS) then
-- Precondition: cur_sample set
case (cnt) is
-- GET Timestamp 1/2
when 0 =>
sample_valid_in <= '1';
sample_addr <= cur_sample + SMF_TIMESTAMP_OFFSET;
sample_read <= '1';
-- Memory Flow Control Guard
if (sample_ready_in = '1') then
cnt_next <= cnt + 1;
end if;
-- GET Timestamp 2/2
when 1 =>
sample_valid_in <= '1';
sample_addr <= cur_sample + SMF_TIMESTAMP_OFFSET + 1;
sample_read <= '1';
-- Memory Flow Control Guard
if (sample_ready_in = '1') then
cnt_next <= cnt + 1;
end if;
-- GET Previous Sample
when 2 =>
sample_valid_in <= '1';
sample_addr <= cur_sample + SMF_PREV_ADDR_OFFSET;
sample_read <= '1';
-- Memory Flow Control Guard
if (sample_ready_in = '1') then
cnt_next <= cnt + 1;
end if;
-- GET Instance Pointer
when 3 =>
sample_valid_in <= '1';
sample_addr <= cur_sample + SMF_INSTANCE_ADDR_OFFSET;
sample_read <= '1';
-- Memory Flow Control Guard
if (sample_ready_in = '1') then
cnt_next <= cnt + 1;
end if;
-- READ Timestamp 1/2
when 4 =>
sample_ready_out <= '1';
-- Memory Flow Control Guard
if (sample_valid_out = '1') then
long_latch_next <= sample_read_data;
cnt_next <= cnt + 1;
end if;
-- READ Timestamp 2/2
when 5 =>
sample_ready_out <= '1';
-- Memory Flow Control Guard
if (sample_valid_out = '1') then
tmp_dw := (0 => unsigned(long_latch), 1 => unsigned(sample_read_data));
-- Found position (After current slot)
if (ts_latch >= tmp_dw) then
sample_abort_read <= '1';
prev_sample_next <= cur_sample;
cur_sample_next <= empty_sample_list_head;
if (new_inst = '1') then
if (has_data = '1') then
stage_next <= FINALIZE_PAYLOAD;
cnt_next <= 0;
else
stage_next <= PRE_SAMPLE_FINALIZE;
cnt_next <= 0;
end if;
else
stage_next <= UPDATE_INSTANCE;
end if;
else
cnt_next <= cnt + 1;
end if;
end if;
-- READ Previous Sample Pointer
when 6 =>
sample_ready_out <= '1';
-- Memory Flow Control Guard
if (sample_valid_out = '1') then
prev_sample_next <= resize(unsigned(sample_read_data),SAMPLE_MEMORY_ADDR_WIDTH);
cnt_next <= cnt + 1;
end if;
-- READ Instance Poiner
when 7 =>
sample_ready_out <= '1';
-- Memory Flow Control Guard
if (sample_valid_out = '1') then
-- Sample has Same Instance
if (resize(unsigned(sample_read_data),INSTANCE_MEMORY_ADDR_WIDTH) = cur_inst) then
-- Newer Sample of same Instance found
newer_inst_sample_next <= '1';
-- NOT_ALIVE Sample
if (sample_status_info(SSI_DISPOSED_FLAG) = '1' or sample_status_info(SSI_UNREGISTERED_FLAG) = '1') then
-- NOTE: We drop Dispose and Unregister Samples if a newer Sample of the same Instance exists, because else
-- the Instance State and Generation Counters would have to be recalculated (by crawling through all the Instance Samples)
-- Drop Sample
stage_next <= IDLE;
else
cnt_next <= cnt + 1;
end if;
else
-- No previous Slot (Oldest Sample)
if (prev_sample = PAYLOAD_MEMORY_MAX_ADDRESS) then
assert (cur_sample = oldest_sample) severity FAILURE;
-- NOTE: Sample is added to HEAD of List
next_sample_next <= cur_sample;
cur_sample_next <= empty_sample_list_head;
if (new_inst = '1') then
if (has_data = '1') then
stage_next <= FINALIZE_PAYLOAD;
cnt_next <= 0;
else
stage_next <= PRE_SAMPLE_FINALIZE;
cnt_next <= 0;
end if;
else
stage_next <= UPDATE_INSTANCE;
end if;
else
-- Continue Search
cur_sample_next <= prev_sample;
next_sample_next <= cur_sample;
cnt_next <= 0;
end if;
end if;
end if;
-- GET Disposed Generation Count
when 8 =>
sample_valid_in <= '1';
sample_addr <= cur_sample + SMF_DISPOSED_GEN_CNT_OFFSET;
sample_read <= '1';
-- Memory Flow Control Guard
if (sample_ready_in = '1') then
cnt_next <= cnt + 1;
end if;
-- GET No Writers Generation Count
when 9 =>
sample_valid_in <= '1';
sample_addr <= cur_sample + SMF_NO_WRITERS_GEN_CNT_OFFSET;
sample_read <= '1';
-- Memory Flow Control Guard
if (sample_ready_in = '1') then
cnt_next <= cnt + 1;
end if;
-- READ Disposed Generation Count
when 10 =>
sample_ready_out <= '1';
-- Memory Flow Control Guard
if (sample_valid_out = '1') then
-- Latch Generation Counter
dis_gen_cnt_latch_next <= unsigned(sample_read_data);
cnt_next <= cnt + 1;
end if;
-- READ No Writers Generation Count
when 11 =>
sample_ready_out <= '1';
-- Memory Flow Control Guard
if (sample_valid_out = '1') then
-- Latch Generation Counter
no_w_gen_cnt_latch_next <= unsigned(sample_read_data);
-- Continue Search
cur_sample_next <= prev_sample;
next_sample_next <= cur_sample;
cnt_next <= 0;
end if;
when others =>
null;
end case;
end if;
when UPDATE_INSTANCE => when UPDATE_INSTANCE =>
-- Precondition inst_data set (IMF_STATUS_FLAG, IMF_WRITER_BITMAP_FLAG, IMF_DISPOSED_CNT_FLAG, IMF_NO_WRITERS_CNT_FLAG, IMF_SAMPLE_CNT_FLAG, IMF_IGNORE_DEADLINE_FLAG) -- Precondition inst_data set (IMF_STATUS_FLAG, IMF_WRITER_BITMAP_FLAG, IMF_DISPOSED_CNT_FLAG, IMF_NO_WRITERS_CNT_FLAG, IMF_SAMPLE_CNT_FLAG, IMF_IGNORE_DEADLINE_FLAG)
@ -1712,6 +2006,8 @@ begin
end if; end if;
-- *GENERATION COUNTERS / VIEW STATE* -- *GENERATION COUNTERS / VIEW STATE*
-- Only Update Instance State if Sample if newest
if (newer_inst_sample = '0') then
-- NOT_ALIVE_DISPOSED -> ALIVE Transition -- NOT_ALIVE_DISPOSED -> ALIVE Transition
if (sample_status_info(SSI_DISPOSED_FLAG) = '0' and sample_status_info(SSI_UNREGISTERED_FLAG) = '0' and inst_data.status_info(ISI_NOT_ALIVE_DISPOSED_FLAG) = '1') then if (sample_status_info(SSI_DISPOSED_FLAG) = '0' and sample_status_info(SSI_UNREGISTERED_FLAG) = '0' and inst_data.status_info(ISI_NOT_ALIVE_DISPOSED_FLAG) = '1') then
-- Synthesis Guard -- Synthesis Guard
@ -1735,6 +2031,7 @@ begin
inst_data_next2.status_info(ISI_VIEW_FLAG) <= '0'; inst_data_next2.status_info(ISI_VIEW_FLAG) <= '0';
end if; end if;
end if; end if;
end if;
-- *STATUS INFO* -- *STATUS INFO*
-- * -> NOT_ALIVE_DISPOSED Transition -- * -> NOT_ALIVE_DISPOSED Transition
@ -1742,7 +2039,8 @@ begin
-- NOT_ALIVE_DISPOSED -> NOT_ALIVE_DISPOSED -- NOT_ALIVE_DISPOSED -> NOT_ALIVE_DISPOSED
if (inst_data.status_info(ISI_NOT_ALIVE_DISPOSED_FLAG) = '1') then if (inst_data.status_info(ISI_NOT_ALIVE_DISPOSED_FLAG) = '1') then
tmp_bool := FALSE; tmp_bool := FALSE;
else -- Only Update Instance State if Sample if newest
elsif (newer_inst_sample = '0') then
-- Synthesis Guard -- Synthesis Guard
if (WITH_KEY) then if (WITH_KEY) then
status_info_update(ISI_NOT_ALIVE_DISPOSED_FLAG) <= '1'; status_info_update(ISI_NOT_ALIVE_DISPOSED_FLAG) <= '1';
@ -1757,7 +2055,8 @@ begin
-- NOT_ALIVE -> NOT_ALIVE_NO_WRITERS -- NOT_ALIVE -> NOT_ALIVE_NO_WRITERS
if (inst_data.status_info(ISI_NOT_ALIVE_DISPOSED_FLAG) = '1' or inst_data.status_info(ISI_NOT_ALIVE_NO_WRITERS_FLAG) = '1') then if (inst_data.status_info(ISI_NOT_ALIVE_DISPOSED_FLAG) = '1' or inst_data.status_info(ISI_NOT_ALIVE_NO_WRITERS_FLAG) = '1') then
tmp_bool := FALSE; tmp_bool := FALSE;
else -- Only Update Instance State if Sample if newest
elsif (newer_inst_sample = '0') then
-- Synthesis Guard -- Synthesis Guard
if (WITH_KEY) then if (WITH_KEY) then
status_info_update(ISI_NOT_ALIVE_DISPOSED_FLAG) <= '0'; status_info_update(ISI_NOT_ALIVE_DISPOSED_FLAG) <= '0';
@ -1777,7 +2076,8 @@ begin
else else
assert (has_data = '1') severity FAILURE; assert (has_data = '1') severity FAILURE;
end if; end if;
else -- Only Update Instance State if Sample if newest
elsif (newer_inst_sample = '0') then
-- Synthesis Guard -- Synthesis Guard
if (WITH_KEY) then if (WITH_KEY) then
status_info_update(ISI_NOT_ALIVE_DISPOSED_FLAG) <= '0'; status_info_update(ISI_NOT_ALIVE_DISPOSED_FLAG) <= '0';
@ -1906,7 +2206,11 @@ begin
sample_valid_in <= '1'; sample_valid_in <= '1';
sample_addr <= cur_sample + SMF_DISPOSED_GEN_CNT_OFFSET; sample_addr <= cur_sample + SMF_DISPOSED_GEN_CNT_OFFSET;
if (newer_inst_sample = '1') then
sample_write_data <= std_logic_vector(dis_gen_cnt_latch);
else
sample_write_data <= std_logic_vector(inst_data.disposed_gen_cnt); sample_write_data <= std_logic_vector(inst_data.disposed_gen_cnt);
end if;
-- Memory Flow Control Guard -- Memory Flow Control Guard
if (sample_ready_in = '1') then if (sample_ready_in = '1') then
@ -1917,117 +2221,31 @@ begin
sample_valid_in <= '1'; sample_valid_in <= '1';
sample_addr <= cur_sample + SMF_NO_WRITERS_GEN_CNT_OFFSET; sample_addr <= cur_sample + SMF_NO_WRITERS_GEN_CNT_OFFSET;
if (newer_inst_sample = '1') then
sample_write_data <= std_logic_vector(no_w_gen_cnt_latch);
else
sample_write_data <= std_logic_vector(inst_data.no_writers_gen_cnt); sample_write_data <= std_logic_vector(inst_data.no_writers_gen_cnt);
end if;
-- Memory Flow Control Guard -- Memory Flow Control Guard
if (sample_ready_in = '1') then if (sample_ready_in = '1') then
-- First Sample -- First Sample
if (newest_sample = SAMPLE_MEMORY_MAX_ADDRESS) then if (newest_sample = SAMPLE_MEMORY_MAX_ADDRESS) then
stage_next <= FINALIZE_SAMPLE; stage_next <= FINALIZE_SAMPLE;
cur_sample_next <= empty_sample_list_head;
next_sample_next <= SAMPLE_MEMORY_MAX_ADDRESS; next_sample_next <= SAMPLE_MEMORY_MAX_ADDRESS;
prev_sample_next <= SAMPLE_MEMORY_MAX_ADDRESS; prev_sample_next <= SAMPLE_MEMORY_MAX_ADDRESS;
cnt_next <= 0; cnt_next <= 0;
elsif (DESTINATION_ORDER_QOS = BY_RECEPTION_TIMESTAMP_DESTINATION_ORDER_QOS) then elsif (DESTINATION_ORDER_QOS = BY_SOURCE_TIMESTAMP_DESTINATION_ORDER_QOS) then
stage_next <= FIX_POINTERS;
next_sample_next <= SAMPLE_MEMORY_MAX_ADDRESS;
prev_sample_next <= newest_sample;
cur_sample_next <= newest_sample;
cnt_next <= 0;
else
stage_next <= FIND_POS;
next_sample_next <= SAMPLE_MEMORY_MAX_ADDRESS;
prev_sample_next <= newest_sample;
cur_sample_next <= newest_sample;
cnt_next <= 0;
end if;
end if;
when others =>
null;
end case;
end if;
when FIND_POS =>
-- Synthesis Guard
if (DESTINATION_ORDER_QOS /= BY_RECEPTION_TIMESTAMP_DESTINATION_ORDER_QOS) then
-- Precondition: cur_sample set
cnt_next <= cnt + 1;
case (cnt) is
-- GET Timestamp 1/2
when 0 =>
sample_valid_in <= '1';
sample_addr <= cur_sample + SMF_TIMESTAMP_OFFSET;
sample_read <= '1';
-- Memory Flow Control Guard
if (sample_ready_in = '1') then
cnt_next <= cnt + 1;
end if;
-- GET Timestamp 2/2
when 1 =>
sample_valid_in <= '1';
sample_addr <= cur_sample + SMF_TIMESTAMP_OFFSET + 1;
sample_read <= '1';
-- Memory Flow Control Guard
if (sample_ready_in = '1') then
cnt_next <= cnt + 1;
end if;
-- GET Previous Sample
when 2 =>
sample_valid_in <= '1';
sample_addr <= cur_sample + SMF_PREV_ADDR_OFFSET;
sample_read <= '1';
-- Memory Flow Control Guard
if (sample_ready_in = '1') then
cnt_next <= cnt + 1;
end if;
-- READ Timestamp 1/2
when 3 =>
sample_ready_out <= '1';
-- Memory Flow Control Guard
if (sample_valid_out = '1') then
long_latch_next <= sample_read_data;
cnt_next <= cnt + 1;
end if;
-- READ Timestamp 2/2
when 4 =>
sample_ready_out <= '1';
-- Memory Flow Control Guard
if (sample_valid_out = '1') then
tmp_dw := (0 => unsigned(long_latch), 1 => unsigned(sample_read_data));
-- Found position (After current slot)
if (ts_latch >= tmp_dw) then
prev_sample_next <= cur_sample;
stage_next <= FIX_POINTERS;
cnt_next <= 0;
sample_abort_read <= '1';
end if;
end if;
-- READ Previous Sample
when 5 =>
sample_ready_out <= '1';
if (sample_valid_out = '1') then
-- No previous Slot (Oldest Sample)
if (resize(unsigned(sample_read_data),PAYLOAD_MEMORY_ADDR_WIDTH) = PAYLOAD_MEMORY_MAX_ADDRESS) then
assert (prev_sample = oldest_sample) report "Previous Sample is MAX_ADDR, but sample is not OLDEST (HEAD)" severity FAILURE;
-- NOTE: Sample is added to HEAD of List
prev_sample_next <= SAMPLE_MEMORY_MAX_ADDRESS;
next_sample_next <= cur_sample;
stage_next <= FIX_POINTERS; stage_next <= FIX_POINTERS;
if (prev_sample = SAMPLE_MEMORY_MAX_ADDRESS) then
cnt_next <= 1; -- Skip to Previous Pointer Fix cnt_next <= 1; -- Skip to Previous Pointer Fix
else else
-- Continue Search cnt_next <= 0;
cur_sample_next <= resize(unsigned(sample_read_data),SAMPLE_MEMORY_ADDR_WIDTH); end if;
next_sample_next <= cur_sample; else
stage_next <= FIX_POINTERS;
next_sample_next <= SAMPLE_MEMORY_MAX_ADDRESS;
prev_sample_next <= newest_sample;
cnt_next <= 0; cnt_next <= 0;
end if; end if;
end if; end if;
@ -2076,7 +2294,7 @@ begin
null; null;
end case; end case;
when FINALIZE_SAMPLE => when FINALIZE_SAMPLE =>
-- Precondition: prev_sample set, next_sample set, cur_sample -- Precondition: prev_sample set, next_sample set, cur_sample set
case (cnt) is case (cnt) is
-- GET Next (Empty) Sample -- GET Next (Empty) Sample
@ -2143,9 +2361,11 @@ begin
-- If newest Sample is now previous, select current sample as new newest -- If newest Sample is now previous, select current sample as new newest
if (newest_sample = prev_sample) then if (newest_sample = prev_sample) then
newest_sample_next <= cur_sample; newest_sample_next <= cur_sample;
if (oldest_sample = SAMPLE_MEMORY_MAX_ADDRESS) then
oldest_sample_next <= cur_sample;
end if; end if;
-- If current Sample as no predecessor, it is the oldest
if (prev_sample = SAMPLE_MEMORY_MAX_ADDRESS) then
oldest_sample_next <= cur_sample;
end if; end if;
-- Signal Data Available -- Signal Data Available
@ -2512,6 +2732,7 @@ begin
end if; end if;
cur_inst_next <= INSTANCE_MEMORY_MAX_ADDRESS; cur_inst_next <= INSTANCE_MEMORY_MAX_ADDRESS;
sample_p2_next <= SAMPLE_MEMORY_MAX_ADDRESS; sample_p2_next <= SAMPLE_MEMORY_MAX_ADDRESS;
pre_calculated_next <= '0';
else else
cur_sample_next <= sample_p1; cur_sample_next <= sample_p1;
end if; end if;
@ -2655,7 +2876,7 @@ begin
when 1 => when 1 =>
inst_op_start <= '1'; inst_op_start <= '1';
inst_opcode <= INSERT_INSTANCE; inst_opcode <= INSERT_INSTANCE;
status_info_update <= (ISI_LIVELINESS_FLAG => '1', others => '0'); status_info_update <= (ISI_LIVELINESS_FLAG => '1', ISI_NOT_ALIVE_DISPOSED_FLAG => sample_status_info(SSI_DISPOSED_FLAG), others => '0');
sample_cnt <= to_unsigned(1, WORD_WIDTH); sample_cnt <= to_unsigned(1, WORD_WIDTH);
deadline <= (time + TIME_BASED_FILTER_QOS) when (TIME_BASED_FILTER_QOS /= DURATION_ZERO) else TIME_INVALID; deadline <= (time + TIME_BASED_FILTER_QOS) when (TIME_BASED_FILTER_QOS /= DURATION_ZERO) else TIME_INVALID;
tmp_bitmap := (others => '0'); tmp_bitmap := (others => '0');
@ -2665,6 +2886,13 @@ begin
-- Latch Instance Pointer -- Latch Instance Pointer
cur_inst_next <= inst_empty_head; cur_inst_next <= inst_empty_head;
if (DESTINATION_ORDER_QOS = BY_SOURCE_TIMESTAMP_DESTINATION_ORDER_QOS and newest_sample /= SAMPLE_MEMORY_MAX_ADDRESS) then
stage_next <= FIND_POS;
next_sample_next <= SAMPLE_MEMORY_MAX_ADDRESS;
prev_sample_next <= newest_sample;
cur_sample_next <= newest_sample;
cnt_next <= 0;
else
if (has_data = '1') then if (has_data = '1') then
stage_next <= FINALIZE_PAYLOAD; stage_next <= FINALIZE_PAYLOAD;
cnt_next <= 0; cnt_next <= 0;
@ -2672,6 +2900,7 @@ begin
stage_next <= PRE_SAMPLE_FINALIZE; stage_next <= PRE_SAMPLE_FINALIZE;
cnt_next <= 0; cnt_next <= 0;
end if; end if;
end if;
when others => when others =>
null; null;
end case; end case;
@ -2800,7 +3029,7 @@ begin
-- Sample has different Instance -- Sample has different Instance
if (cur_inst /= resize(unsigned(sample_read_data),INSTANCE_MEMORY_ADDR_WIDTH)) then if (cur_inst /= resize(unsigned(sample_read_data),INSTANCE_MEMORY_ADDR_WIDTH)) then
-- Consecutive Instance Sample Order -- Consecutive Instance Sample Order
if (not ORDERED_ACCESS or PRESENTATION_QOS = INSTANCE_PRESENTATION_QOS) then if (not ORDERED_ACCESS or PRESENTATION_QOS = INSTANCE_PRESENTATION_QOS or single_instance = '1') then
-- Skip Sample -- Skip Sample
cnt_next <= 18; cnt_next <= 18;
sample_abort_read <= '1'; sample_abort_read <= '1';
@ -2850,7 +3079,6 @@ begin
inst_opcode <= GET_INSTANCE; inst_opcode <= GET_INSTANCE;
inst_mem_fields <= IMF_STATUS_FLAG; inst_mem_fields <= IMF_STATUS_FLAG;
inst_addr_update <= next_inst; inst_addr_update <= next_inst;
cur_inst_next <= next_inst;
cnt_next <= cnt + 1; cnt_next <= cnt + 1;
end if; end if;
end if; end if;
@ -2858,6 +3086,8 @@ begin
when 7 => when 7 =>
-- Wait for Instance Data -- Wait for Instance Data
if (not WITH_KEY or inst_op_done = '1') then if (not WITH_KEY or inst_op_done = '1') then
assert (next_inst = inst_addr_base) severity FAILURE;
-- DEFAULT -- DEFAULT
tmp_bool := TRUE; tmp_bool := TRUE;
@ -2918,6 +3148,8 @@ begin
-- Latch Next Sample (For resume purposes) -- Latch Next Sample (For resume purposes)
sample_p1_next <= next_sample; sample_p1_next <= next_sample;
cnt_next <= cnt + 1; cnt_next <= cnt + 1;
-- Reset
pre_calculated_next <= '0';
else else
if (WITH_KEY) then if (WITH_KEY) then
-- Skip Sample -- Skip Sample
@ -3026,7 +3258,7 @@ begin
if (sample_valid_out = '1') then if (sample_valid_out = '1') then
si_no_writers_generation_count_sig_next <= sample_read_data; si_no_writers_generation_count_sig_next <= sample_read_data;
cur_generation_rank_next <= unsigned(si_disposed_generation_count_sig) + unsigned(sample_read_data); cur_generation_rank_next <= unsigned(si_disposed_generation_count_sig) + unsigned(sample_read_data);
if (si_sample_rank_sig = 0) then if (pre_calculated = '0') then
-- Reset -- Reset
collection_generation_rank_next <= unsigned(si_disposed_generation_count_sig) + unsigned(sample_read_data); collection_generation_rank_next <= unsigned(si_disposed_generation_count_sig) + unsigned(sample_read_data);
end if; end if;
@ -3046,7 +3278,7 @@ begin
-- Memory Control Flow Guard -- Memory Control Flow Guard
if (sample_ready_in = '1') then if (sample_ready_in = '1') then
-- Pre-Calculation already done for selected Instance (Or not necessary) -- Pre-Calculation already done for selected Instance (Or not necessary)
if (si_sample_rank_sig /= 0 or collection_cnt_max = max_samples_latch or next_sample = SAMPLE_MEMORY_MAX_ADDRESS) then if (pre_calculated = '1' or collection_cnt_max = max_samples_latch or next_sample = SAMPLE_MEMORY_MAX_ADDRESS) then
stage_next <= FINALIZE_SAMPLE_INFO; stage_next <= FINALIZE_SAMPLE_INFO;
cnt_next <= 0; cnt_next <= 0;
else else
@ -3058,7 +3290,7 @@ begin
end if; end if;
else else
-- Pre-Calculation already done for selected Instance (Or not necessary) -- Pre-Calculation already done for selected Instance (Or not necessary)
if (si_sample_rank_sig /= 0 or collection_cnt_max = max_samples_latch or next_sample = SAMPLE_MEMORY_MAX_ADDRESS) then if (pre_calculated = '1' or collection_cnt_max = max_samples_latch or next_sample = SAMPLE_MEMORY_MAX_ADDRESS) then
stage_next <= FINALIZE_SAMPLE_INFO; stage_next <= FINALIZE_SAMPLE_INFO;
cnt_next <= 0; cnt_next <= 0;
else else
@ -3095,7 +3327,7 @@ begin
eoc <= '1'; eoc <= '1';
stage_next <= IDLE; stage_next <= IDLE;
-- Consecutive Instance Sample Order of multiple Instances -- Consecutive Instance Sample Order of multiple Instances
if ((not ORDERED_ACCESS or PRESENTATION_QOS = INSTANCE_PRESENTATION_QOS) and single_instance = '0' and single_sample = '0') then if ((not ORDERED_ACCESS or PRESENTATION_QOS = INSTANCE_PRESENTATION_QOS) and single_instance = '0') then
-- Unmark Instances -- Unmark Instances
unmark_instances_flag_next <= '1'; unmark_instances_flag_next <= '1';
end if; end if;
@ -3112,8 +3344,6 @@ begin
when PRE_CALCULATE => when PRE_CALCULATE =>
-- Precondition: cur_sample set, cur_inst set -- Precondition: cur_sample set, cur_inst set
cnt_next <= cnt + 1;
case (cnt) is case (cnt) is
-- GET Next Sample -- GET Next Sample
when 0 => when 0 =>
@ -3293,6 +3523,8 @@ begin
if (WITH_KEY) then if (WITH_KEY) then
-- Wait for Instance Data -- Wait for Instance Data
if (inst_op_done = '1') then if (inst_op_done = '1') then
assert (next_inst = inst_addr_base) severity FAILURE;
-- DEFAULT -- DEFAULT
tmp_bool := TRUE; tmp_bool := TRUE;
@ -3356,6 +3588,7 @@ begin
if (next_sample = SAMPLE_MEMORY_MAX_ADDRESS or collection_cnt_max = max_samples_latch) then if (next_sample = SAMPLE_MEMORY_MAX_ADDRESS or collection_cnt_max = max_samples_latch) then
stage_next <= FINALIZE_SAMPLE_INFO; stage_next <= FINALIZE_SAMPLE_INFO;
cnt_next <= 0; cnt_next <= 0;
pre_calculated_next <= '1';
else else
-- Continue with next Sample -- Continue with next Sample
cur_sample_next <= next_sample; cur_sample_next <= next_sample;
@ -3457,7 +3690,7 @@ begin
status_info_update <= inst_data.status_info; status_info_update <= inst_data.status_info;
-- Consecutive Instance Sample Order of multiple Instances -- Consecutive Instance Sample Order of multiple Instances
if ((not ORDERED_ACCESS or PRESENTATION_QOS = INSTANCE_PRESENTATION_QOS) and single_instance = '0' and single_sample = '0') then if ((not ORDERED_ACCESS or PRESENTATION_QOS = INSTANCE_PRESENTATION_QOS) and single_instance = '0') then
-- Mark Instance -- Mark Instance
status_info_update(ISI_MARK_FLAG) <= '1'; status_info_update(ISI_MARK_FLAG) <= '1';
end if; end if;
@ -3481,7 +3714,7 @@ begin
-- Mark End of Collection -- Mark End of Collection
eoc <= '1'; eoc <= '1';
-- Consecutive Instance Sample Order of multiple Instances -- Consecutive Instance Sample Order of multiple Instances
if ((not ORDERED_ACCESS or PRESENTATION_QOS = INSTANCE_PRESENTATION_QOS) and single_instance = '0' and single_sample = '0') then if ((not ORDERED_ACCESS or PRESENTATION_QOS = INSTANCE_PRESENTATION_QOS) and single_instance = '0') then
-- Unmark Instances -- Unmark Instances
unmark_instances_flag_next <= '1'; unmark_instances_flag_next <= '1';
end if; end if;
@ -3512,6 +3745,7 @@ begin
end if; end if;
cur_inst_next <= INSTANCE_MEMORY_MAX_ADDRESS; cur_inst_next <= INSTANCE_MEMORY_MAX_ADDRESS;
sample_p2_next <= SAMPLE_MEMORY_MAX_ADDRESS; sample_p2_next <= SAMPLE_MEMORY_MAX_ADDRESS;
pre_calculated_next <= '0';
else else
cur_sample_next <= sample_p1; cur_sample_next <= sample_p1;
end if; end if;
@ -3672,7 +3906,7 @@ begin
cnt_next <= 2; cnt_next <= 2;
when 2 => when 2 =>
-- Instance Found -- Instance Found
if (inst_addr_base /= SAMPLE_MEMORY_MAX_ADDRESS) then if (inst_addr_base /= INSTANCE_MEMORY_MAX_ADDRESS) then
-- DEFAULT -- DEFAULT
tmp_bool := TRUE; tmp_bool := TRUE;
@ -3762,7 +3996,7 @@ begin
cnt_next <= cnt + 1; cnt_next <= cnt + 1;
when 1 => when 1 =>
-- Instance Found -- Instance Found
if (inst_addr_base /= SAMPLE_MEMORY_MAX_ADDRESS) then if (inst_addr_base /= INSTANCE_MEMORY_MAX_ADDRESS) then
-- DEFAULT -- DEFAULT
tmp_bool := TRUE; tmp_bool := TRUE;
@ -5911,9 +6145,13 @@ begin
si_valid_sig <= '0'; si_valid_sig <= '0';
is_take <= '0'; is_take <= '0';
single_instance <= '0'; single_instance <= '0';
single_sample <= '0';
unmark_instances_flag <= '0'; unmark_instances_flag <= '0';
dynamic_next_instance <= '0'; dynamic_next_instance <= '0';
pre_calculated <= '0';
newer_inst_sample <= '0';
new_inst <= '0';
dis_gen_cnt_latch <= (others => '0');
no_w_gen_cnt_latch <= (others => '0');
current_imf <= (others => '0'); current_imf <= (others => '0');
sample_addr_latch_1 <= (others => '0'); sample_addr_latch_1 <= (others => '0');
sample_addr_latch_2 <= (others => '0'); sample_addr_latch_2 <= (others => '0');
@ -5992,9 +6230,13 @@ begin
si_valid_sig <= si_valid_sig_next; si_valid_sig <= si_valid_sig_next;
is_take <= is_take_next; is_take <= is_take_next;
single_instance <= single_instance_next; single_instance <= single_instance_next;
single_sample <= single_sample_next;
unmark_instances_flag <= unmark_instances_flag_next; unmark_instances_flag <= unmark_instances_flag_next;
dynamic_next_instance <= dynamic_next_instance_next; dynamic_next_instance <= dynamic_next_instance_next;
pre_calculated <= pre_calculated_next;
newer_inst_sample <= newer_inst_sample_next;
new_inst <= new_inst_next;
dis_gen_cnt_latch <= dis_gen_cnt_latch_next;
no_w_gen_cnt_latch <= no_w_gen_cnt_latch_next;
current_imf <= current_imf_next; current_imf <= current_imf_next;
sample_addr_latch_1 <= sample_addr_latch_1_next; sample_addr_latch_1 <= sample_addr_latch_1_next;
sample_addr_latch_2 <= sample_addr_latch_2_next; sample_addr_latch_2 <= sample_addr_latch_2_next;

View File

@ -245,7 +245,7 @@ package rtps_test_package is
constant DEFAULT_SAMPLE : SAMPLE_TYPE; -- Deferred to Package Body constant DEFAULT_SAMPLE : SAMPLE_TYPE; -- Deferred to Package Body
type SAMPLE_ARRAY_TYPE is array (0 to 10) of SAMPLE_TYPE; type SAMPLE_ARRAY_TYPE is array (0 to 15) of SAMPLE_TYPE;
type COLLECTION_TYPE is record type COLLECTION_TYPE is record
s : SAMPLE_ARRAY_TYPE; s : SAMPLE_ARRAY_TYPE;
@ -264,7 +264,7 @@ package rtps_test_package is
constant DEFAULT_INSTANCE_CACHE_TYPE : INSTANCE_CACHE_TYPE; -- Deferred to Package Body constant DEFAULT_INSTANCE_CACHE_TYPE : INSTANCE_CACHE_TYPE; -- Deferred to Package Body
type INSTANCE_CACHE_ARRAY_TYPE is array (0 to 10) of INSTANCE_CACHE_TYPE; type INSTANCE_CACHE_ARRAY_TYPE is array (0 to 15) of INSTANCE_CACHE_TYPE;
type DDS_READER_MEM_TYPE is record type DDS_READER_MEM_TYPE is record
s : SAMPLE_ARRAY_TYPE; s : SAMPLE_ARRAY_TYPE;
@ -364,7 +364,7 @@ package rtps_test_package is
function int(n : integer; width : natural) return std_logic_vector; function int(n : integer; width : natural) return std_logic_vector;
function to_string1 (input : std_logic_vector) return string; function to_string1 (input : std_logic_vector) return string;
--procedure add_instance(inst : inout INSTANCE_HANDLE_TYPE; mem : inout DDS_READER_MEM_TYPE); --procedure add_instance(inst : inout INSTANCE_HANDLE_TYPE; istate : in std_logic_vector(INSTANCE_STATE_KIND_WIDTH-1 downto 0); mem : inout DDS_READER_MEM_TYPE);
function to_sample(cc : CACHE_CHANGE_TYPE; istate : std_logic_vector(INSTANCE_STATE_KIND_WIDTH-1 downto 0)) return SAMPLE_TYPE; function to_sample(cc : CACHE_CHANGE_TYPE; istate : std_logic_vector(INSTANCE_STATE_KIND_WIDTH-1 downto 0)) return SAMPLE_TYPE;
procedure change_istate(inst : INSTANCE_HANDLE_TYPE; istate : in std_logic_vector(INSTANCE_STATE_KIND_WIDTH-1 downto 0); mem : inout DDS_READER_MEM_TYPE); procedure change_istate(inst : INSTANCE_HANDLE_TYPE; istate : in std_logic_vector(INSTANCE_STATE_KIND_WIDTH-1 downto 0); mem : inout DDS_READER_MEM_TYPE);
procedure add_sample(sample : inout SAMPLE_TYPE; mem : inout DDS_READER_MEM_TYPE; DESTINATION_ORDER_QOS : in std_logic_vector(CDR_ENUMERATION_WIDTH-1 downto 0)); procedure add_sample(sample : inout SAMPLE_TYPE; mem : inout DDS_READER_MEM_TYPE; DESTINATION_ORDER_QOS : in std_logic_vector(CDR_ENUMERATION_WIDTH-1 downto 0));
@ -2786,7 +2786,7 @@ package body rtps_test_package is
return "wr: " & to_string(input(0 to NUM_ENDPOINTS-1)) & ", last_word: " & to_string(input(NUM_ENDPOINTS)) & ", data: " & to_hstring(input(NUM_ENDPOINTS+1 to input'length-1)); return "wr: " & to_string(input(0 to NUM_ENDPOINTS-1)) & ", last_word: " & to_string(input(NUM_ENDPOINTS)) & ", data: " & to_hstring(input(NUM_ENDPOINTS+1 to input'length-1));
end function; end function;
procedure add_instance(inst : in INSTANCE_HANDLE_TYPE; mem : inout DDS_READER_MEM_TYPE) is procedure add_instance(inst : in INSTANCE_HANDLE_TYPE; istate : in std_logic_vector(INSTANCE_STATE_KIND_WIDTH-1 downto 0); mem : inout DDS_READER_MEM_TYPE) is
variable ind : natural := 0; variable ind : natural := 0;
begin begin
-- Find Position -- Find Position
@ -2805,6 +2805,7 @@ package body rtps_test_package is
-- Insert at desired index -- Insert at desired index
mem.inst(ind) := DEFAULT_INSTANCE_CACHE_TYPE; mem.inst(ind) := DEFAULT_INSTANCE_CACHE_TYPE;
mem.inst(ind).inst := inst; mem.inst(ind).inst := inst;
mem.inst(ind).istate := istate;
mem.ilen := mem.ilen + 1; mem.ilen := mem.ilen + 1;
end procedure; end procedure;
@ -2822,8 +2823,9 @@ package body rtps_test_package is
procedure change_istate(inst : in INSTANCE_HANDLE_TYPE; istate : in std_logic_vector(INSTANCE_STATE_KIND_WIDTH-1 downto 0); mem : inout DDS_READER_MEM_TYPE) is procedure change_istate(inst : in INSTANCE_HANDLE_TYPE; istate : in std_logic_vector(INSTANCE_STATE_KIND_WIDTH-1 downto 0); mem : inout DDS_READER_MEM_TYPE) is
begin begin
-- Check Instance State -- Check Instance State
for i in 0 to mem.ilen-1 loop for i in 0 to max(mem.ilen-1,0) loop
-- Instance Found -- Instance Found
if (inst = mem.inst(i).inst) then if (inst = mem.inst(i).inst) then
case (istate) is case (istate) is
@ -2878,10 +2880,12 @@ package body rtps_test_package is
sample.agrank := 0; sample.agrank := 0;
sample.sstate := NOT_READ_SAMPLE_STATE; sample.sstate := NOT_READ_SAMPLE_STATE;
-- NOTE: We change the Instance State here, because we need the new Sample needs the updated Generation Counters/View State
change_istate(sample.inst, sample.istate, mem); change_istate(sample.inst, sample.istate, mem);
-- NOTE: We always check at least the first index for keyless cases (instance = HANDLE_NIL)
-- Check Instance State -- Check Instance State
for i in 0 to mem.ilen-1 loop for i in 0 to max(mem.ilen-1,0) loop
-- Instance Found -- Instance Found
if (sample.inst = mem.inst(i).inst) then if (sample.inst = mem.inst(i).inst) then
found := TRUE; found := TRUE;
@ -2894,7 +2898,7 @@ package body rtps_test_package is
-- New Instance -- New Instance
if (not found) then if (not found) then
add_instance(sample.inst, mem); add_instance(sample.inst, sample.istate, mem);
end if; end if;
-- Add Sample -- Add Sample
@ -2905,11 +2909,11 @@ package body rtps_test_package is
mem.s(ind) := sample; mem.s(ind) := sample;
when BY_SOURCE_TIMESTAMP_DESTINATION_ORDER_QOS => when BY_SOURCE_TIMESTAMP_DESTINATION_ORDER_QOS =>
-- Find Position -- Find Position
for i in 0 to mem.slen-1 loop for i in mem.slen-1 downto 0 loop
if (sample.ts > mem.s(i).ts) then if (sample.ts >= mem.s(i).ts) then
ind := i;
exit; exit;
end if; end if;
ind := i;
end loop; end loop;
-- Move elements to make Space -- Move elements to make Space
@ -2929,10 +2933,10 @@ package body rtps_test_package is
assert (ind < mem.slen) report "Index is out of Bounds" severity FAILURE; assert (ind < mem.slen) report "Index is out of Bounds" severity FAILURE;
assert (mem.slen /= 0) report "Remove on empty array" severity FAILURE; assert (mem.slen /= 0) report "Remove on empty array" severity FAILURE;
-- NOTE: Assumes i+1 is in bounds for i in ind to mem.slen-2 loop
for i in ind to mem.slen-1 loop
mem.s(i) := mem.s(i+1); mem.s(i) := mem.s(i+1);
end loop; end loop;
mem.s(mem.slen-1) := DEFAULT_SAMPLE;
mem.slen := mem.slen - 1; mem.slen := mem.slen - 1;
end procedure; end procedure;
@ -2951,17 +2955,18 @@ package body rtps_test_package is
end loop; end loop;
if (ind /= mem.ilen) then if (ind /= mem.ilen) then
-- NOTE: Assumes i+1 is in bounds for i in ind to mem.ilen-2 loop
for i in ind to mem.ilen-1 loop
mem.inst(i) := mem.inst(i+1); mem.inst(i) := mem.inst(i+1);
end loop; end loop;
mem.inst(mem.ilen-1) := DEFAULT_INSTANCE_CACHE_TYPE;
mem.ilen := mem.ilen - 1; mem.ilen := mem.ilen - 1;
end if; end if;
end procedure; end procedure;
function check_instance(istate : std_logic_vector(INSTANCE_STATE_KIND_WIDTH-1 downto 0); vstate : std_logic_vector(VIEW_STATE_KIND_WIDTH-1 downto 0); mem : DDS_READER_MEM_TYPE; inst : INSTANCE_HANDLE_TYPE) return boolean is function check_instance(istate : std_logic_vector(INSTANCE_STATE_KIND_WIDTH-1 downto 0); vstate : std_logic_vector(VIEW_STATE_KIND_WIDTH-1 downto 0); mem : DDS_READER_MEM_TYPE; inst : INSTANCE_HANDLE_TYPE) return boolean is
begin begin
for i in 0 to mem.ilen-1 loop -- NOTE: We always check at least the first index for keyless cases (instance = HANDLE_NIL)
for i in 0 to max(mem.ilen-1,0) loop
-- Instance Found -- Instance Found
if (inst = mem.inst(i).inst) then if (inst = mem.inst(i).inst) then
if (((mem.inst(i).istate and istate) /= (istate'range => '0')) and ((mem.inst(i).vstate and vstate) /= (vstate'range => '0'))) then if (((mem.inst(i).istate and istate) /= (istate'range => '0')) and ((mem.inst(i).vstate and vstate) /= (vstate'range => '0'))) then
@ -2974,7 +2979,8 @@ package body rtps_test_package is
function find_instance(mem : DDS_READER_MEM_TYPE; inst : INSTANCE_HANDLE_TYPE) return natural is function find_instance(mem : DDS_READER_MEM_TYPE; inst : INSTANCE_HANDLE_TYPE) return natural is
begin begin
for i in 0 to mem.ilen-1 loop -- NOTE: We always check at least the first index for keyless cases (instance = HANDLE_NIL)
for i in 0 to max(mem.ilen-1,0) loop
-- Instance Found -- Instance Found
if (inst = mem.inst(i).inst) then if (inst = mem.inst(i).inst) then
return i; return i;
@ -2986,86 +2992,77 @@ package body rtps_test_package is
procedure gen_collection (mem : inout DDS_READER_MEM_TYPE; col : inout COLLECTION_TYPE; inst : INSTANCE_HANDLE_TYPE; sstate : in std_logic_vector(SAMPLE_STATE_KIND_WIDTH-1 downto 0); istate : in std_logic_vector(INSTANCE_STATE_KIND_WIDTH-1 downto 0); vstate : in std_logic_vector(VIEW_STATE_KIND_WIDTH-1 downto 0); max_samples : in natural; remove : in boolean; sort : in boolean) is procedure gen_collection (mem : inout DDS_READER_MEM_TYPE; col : inout COLLECTION_TYPE; inst : INSTANCE_HANDLE_TYPE; sstate : in std_logic_vector(SAMPLE_STATE_KIND_WIDTH-1 downto 0); istate : in std_logic_vector(INSTANCE_STATE_KIND_WIDTH-1 downto 0); vstate : in std_logic_vector(VIEW_STATE_KIND_WIDTH-1 downto 0); max_samples : in natural; remove : in boolean; sort : in boolean) is
variable i,j : natural := 0; variable i,j : natural := 0;
variable tmp_inst : INSTANCE_HANDLE_TYPE := HANDLE_NIL; variable tmp_inst : INSTANCE_HANDLE_TYPE := HANDLE_NIL;
variable tmp_col : COLLECTION_TYPE := DEFAULT_COLLECTION;
variable rank, mrsic_gen, mrs_gen : natural := 0; variable rank, mrsic_gen, mrs_gen : natural := 0;
variable done : std_logic_vector(0 to max_samples-1) := (others => '0'); variable done : std_logic_vector(0 to max_samples-1) := (others => '0');
variable no_inst : boolean := FALSE; variable sel : std_logic_vector(0 to mem.slen-1) := (others => '0');
variable no_inst : boolean := TRUE;
begin begin
col := DEFAULT_COLLECTION; col := DEFAULT_COLLECTION;
i := 0; i := 0;
loop loop
-- Sample is in Collection if (no_inst) then
if (((mem.s(i).sstate and sstate) /= (sstate'range => '0')) and check_instance(istate, vstate, mem, mem.s(i).inst) and ((inst /= HANDLE_NIL and inst = mem.s(i).inst) or inst = HANDLE_NIL)) then -- Sample and Instance Compatible
if (((mem.s(i).sstate and sstate) /= (sstate'range => '0')) and check_instance(istate, vstate, mem, mem.s(i).inst) and ((inst /= HANDLE_NIL and inst = mem.s(i).inst) or inst = HANDLE_NIL) and (sel(i) /= '1')) then
col.s(col.len) := mem.s(i); col.s(col.len) := mem.s(i);
col.s(col.len).istate := mem.inst(find_instance(mem,mem.s(i).inst)).istate; col.s(col.len).istate := mem.inst(find_instance(mem,mem.s(i).inst)).istate;
col.s(col.len).vstate := mem.inst(find_instance(mem,mem.s(i).inst)).vstate; col.s(col.len).vstate := mem.inst(find_instance(mem,mem.s(i).inst)).vstate;
col.len := col.len + 1; col.len := col.len + 1;
-- Change READ STATE -- Change READ STATE
mem.s(i).sstate := READ_SAMPLE_STATE; mem.s(i).sstate := READ_SAMPLE_STATE;
-- Mark as Selected
-- Remove Sample sel(i) := '1';
if (remove) then tmp_inst := mem.s(i).inst;
remove_sample(i, mem); -- NOTE: If we sort by Instance, we need to first get all compatible Samples from one Instance, before moving to the next compatible Instance.
-- NOTE: We do not increment the loop invariant -- This is achieved by toggling no_inst.
else if (sort) then
i := i + 1; no_inst := FALSE;
end if; end if;
else
i := i + 1;
end if; end if;
-- Sample Compatible (and belonging to specified Instance)
elsif (((mem.s(i).sstate and sstate) /= (sstate'range => '0')) and (mem.s(i).inst = tmp_inst) and (sel(i) /= '1')) then
col.s(col.len) := mem.s(i);
col.s(col.len).istate := mem.inst(find_instance(mem,mem.s(i).inst)).istate;
col.s(col.len).vstate := mem.inst(find_instance(mem,mem.s(i).inst)).vstate;
col.len := col.len + 1;
-- Change READ STATE
mem.s(i).sstate := READ_SAMPLE_STATE;
-- Mark as Selected
sel(i) := '1';
tmp_inst := mem.s(i).inst;
end if;
i := i + 1;
-- Loop Exit Condition -- Loop Exit Condition
if (i >= mem.slen or col.len >= max_samples) then if (col.len >= max_samples) then
exit; exit;
elsif (i >= mem.slen) then
-- No more compatible Samples
if (no_inst) then
exit;
-- Check next instance
else
i := 0;
no_inst := TRUE;
tmp_inst := HANDLE_NIL;
end if;
end if; end if;
end loop; end loop;
-- Remove Selected Samples
if (remove) then
for i in mem.slen-1 downto 0 loop
if (sel(i) = '1') then
remove_sample(i,mem);
end if;
end loop;
end if;
if (col.len = 0) then if (col.len = 0) then
report "Empty Collection" severity NOTE; report "Empty Collection" severity NOTE;
return; return;
end if; end if;
-- No Instances (WITH_KEY=FALSE testing)
if (col.s(0).inst = HANDLE_NIL) then
no_inst := TRUE;
end if;
-- Sort
if (sort and not no_inst) then
i := 1;
j := 1;
tmp_inst := col.s(0).inst;
tmp_col := DEFAULT_COLLECTION;
tmp_col.len := col.len;
tmp_col.s(0):= col.s(0);
col.s(0) := DEFAULT_SAMPLE;
loop
-- Select Next Instance
if (tmp_inst = HANDLE_NIL) then
if (col.s(i).inst /= HANDLE_NIL) then
tmp_inst := col.s(i).inst;
i := 0; --Reset
end if;
elsif (col.s(i).inst = tmp_inst) then
tmp_col.s(j) := col.s(i);
col.s(i) := DEFAULT_SAMPLE;
j := j + 1;
end if;
i := i + 1;
-- DONE
if (j >= col.len) then
col := tmp_col;
exit;
-- Reset Index
elsif (i >= col.len) then
i := 0;
tmp_inst := HANDLE_NIL;
end if;
end loop;
end if;
-- Calculate Ranks -- Calculate Ranks
i := col.len-1; i := col.len-1;
tmp_inst := col.s(i).inst; tmp_inst := col.s(i).inst;
@ -3079,6 +3076,7 @@ package body rtps_test_package is
mem.inst(j).vstate := NOT_NEW_VIEW_STATE; mem.inst(j).vstate := NOT_NEW_VIEW_STATE;
end if; end if;
done(col.len-1 to done'length-1) := (others => '1'); done(col.len-1 to done'length-1) := (others => '1');
no_inst := FALSE;
-- Single Sample -- Single Sample
if (col.len-1 = 0) then if (col.len-1 = 0) then
return; return;
@ -3086,10 +3084,11 @@ package body rtps_test_package is
loop loop
i := i - 1; i := i - 1;
-- Select Next Instance -- Select Next Instance
if (not no_inst and tmp_inst = HANDLE_NIL) then if (no_inst) then
if (done(i) = '0') then if (done(i) = '0') then
tmp_inst := col.s(i).inst; tmp_inst := col.s(i).inst;
j := find_instance(mem, tmp_inst); j := find_instance(mem, tmp_inst);
no_inst := FALSE;
-- Reset -- Reset
rank := 1; rank := 1;
mrs_gen := mem.inst(j).dis_gen_cnt + mem.inst(j).no_w_gen_cnt; mrs_gen := mem.inst(j).dis_gen_cnt + mem.inst(j).no_w_gen_cnt;
@ -3114,6 +3113,7 @@ package body rtps_test_package is
-- Reset -- Reset
elsif (i = 0) then elsif (i = 0) then
tmp_inst := HANDLE_NIL; tmp_inst := HANDLE_NIL;
no_inst := TRUE;
i := col.len-1; i := col.len-1;
end if; end if;
end loop; end loop;
@ -3142,12 +3142,12 @@ package body rtps_test_package is
when TAKE_INSTANCE => when TAKE_INSTANCE =>
gen_collection(mem, col, opcode.inst, opcode.sstate, opcode.istate, opcode.vstate, opcode.max_samples, TRUE, sort); gen_collection(mem, col, opcode.inst, opcode.sstate, opcode.istate, opcode.vstate, opcode.max_samples, TRUE, sort);
when READ_NEXT_INSTANCE => when READ_NEXT_INSTANCE =>
tmp_inst := mem.inst(find_instance(mem,opcode.inst)+1).inst; tmp_inst := mem.inst(find_instance(mem,opcode.inst)+1).inst when (opcode.inst /= HANDLE_NIL) else mem.inst(0).inst;
if (tmp_inst /= HANDLE_NIL) then if (tmp_inst /= HANDLE_NIL) then
gen_collection(mem, col, tmp_inst, opcode.sstate, opcode.istate, opcode.vstate, opcode.max_samples, FALSE, sort); gen_collection(mem, col, tmp_inst, opcode.sstate, opcode.istate, opcode.vstate, opcode.max_samples, FALSE, sort);
end if; end if;
when TAKE_NEXT_INSTANCE => when TAKE_NEXT_INSTANCE =>
tmp_inst := mem.inst(find_instance(mem,opcode.inst)+1).inst; tmp_inst := mem.inst(find_instance(mem,opcode.inst)+1).inst when (opcode.inst /= HANDLE_NIL) else mem.inst(0).inst;
if (tmp_inst /= HANDLE_NIL) then if (tmp_inst /= HANDLE_NIL) then
gen_collection(mem, col, tmp_inst, opcode.sstate, opcode.istate, opcode.vstate, opcode.max_samples, TRUE, sort); gen_collection(mem, col, tmp_inst, opcode.sstate, opcode.istate, opcode.vstate, opcode.max_samples, TRUE, sort);
end if; end if;