diff --git a/src/dds_reader.vhd b/src/dds_reader.vhd index a57ba1b..94a2888 100644 --- a/src/dds_reader.vhd +++ b/src/dds_reader.vhd @@ -992,28 +992,37 @@ begin --*****COMPONENT INSTANTIATION***** key_holder_gen : for i in 0 to NUM_READERS-1 generate - key_holder_inst : key_holder - port map ( - -- SYSTEM - clk => clk, - reset => reset, - -- CONTROL - start => start_kh(i), - opcode => opcode_kh(i), - ack => ack_kh(i), - decode_error => decode_error_kh(i), - abort => abort_kh(i), - -- INPUT - ready_in => ready_out_kh(i), - valid_in => valid_out_kh(i), - data_in => data_out_kh(i), - last_word_in => last_word_out_kh(i), - -- OUTPUT - ready_out => ready_in_kh(i), - valid_out => valid_in_kh(i), - data_out => data_in_kh(i), - last_word_out => last_word_in_kh(i) - ); + key_holder_if_gen : if CONFIG_ARRAY_T(i).WITH_KEY generate + key_holder_inst : key_holder + port map ( + -- SYSTEM + clk => clk, + reset => reset, + -- CONTROL + start => start_kh(i), + opcode => opcode_kh(i), + ack => ack_kh(i), + decode_error => decode_error_kh(i), + abort => abort_kh(i), + -- INPUT + ready_in => ready_out_kh(i), + valid_in => valid_out_kh(i), + data_in => data_out_kh(i), + last_word_in => last_word_out_kh(i), + -- OUTPUT + ready_out => ready_in_kh(i), + valid_out => valid_in_kh(i), + data_out => data_in_kh(i), + last_word_out => last_word_in_kh(i) + ); + else generate + ack_kh(i) <= '0'; + decode_error_kh(i) <= '0'; + ready_in_kh(i) <= '0'; + valid_out_kh(i) <= '0'; + last_word_out_kh(i) <= '0'; + data_out_kh(i) <= (others => '0'); + end generate; end generate; sample_mem_ctrl_gen : for i in 0 to NUM_READERS-1 generate diff --git a/src/dds_writer.vhd b/src/dds_writer.vhd index 531b2b0..daf5e07 100644 --- a/src/dds_writer.vhd +++ b/src/dds_writer.vhd @@ -825,28 +825,37 @@ begin --*****COMPONENT INSTANTIATION***** key_holder_gen : for i in 0 to NUM_WRITERS-1 generate - key_holder_inst : key_holder - port map ( - -- SYSTEM - clk => clk, - reset => reset, - -- CONTROL - start => start_kh(i), - opcode => opcode_kh(i), - ack => ack_kh(i), - decode_error => decode_error_kh(i), - abort => abort_kh(i), - -- INPUT - ready_in => ready_out_kh(i), - valid_in => valid_out_kh(i), - data_in => data_out_kh(i), - last_word_in => last_word_out_kh(i), - -- OUTPUT - ready_out => ready_in_kh(i), - valid_out => valid_in_kh(i), - data_out => data_in_kh(i), - last_word_out => last_word_in_kh(i) - ); + key_holder_if_gen : if CONFIG_ARRAY_T(i).WITH_KEY generate + key_holder_inst : key_holder + port map ( + -- SYSTEM + clk => clk, + reset => reset, + -- CONTROL + start => start_kh(i), + opcode => opcode_kh(i), + ack => ack_kh(i), + decode_error => decode_error_kh(i), + abort => abort_kh(i), + -- INPUT + ready_in => ready_out_kh(i), + valid_in => valid_out_kh(i), + data_in => data_out_kh(i), + last_word_in => last_word_out_kh(i), + -- OUTPUT + ready_out => ready_in_kh(i), + valid_out => valid_in_kh(i), + data_out => data_in_kh(i), + last_word_out => last_word_in_kh(i) + ); + else generate + ack_kh(i) <= '0'; + decode_error_kh(i) <= '0'; + ready_in_kh(i) <= '0'; + valid_out_kh(i) <= '0'; + last_word_out_kh(i) <= '0'; + data_out_kh(i) <= (others => '0'); + end generate; end generate; sample_mem_ctrl_gen : for i in 0 to NUM_WRITERS-1 generate