Add Test1 of RTPS Reader
Test metatraffic behaviour of RTPS Reader. Compiling and Passing.
This commit is contained in:
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64
sim/L0_rtps_reader_test1.do
Normal file
64
sim/L0_rtps_reader_test1.do
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@ -0,0 +1,64 @@
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onerror {resume}
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quietly WaveActivateNextPane {} 0
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add wave -noupdate -divider SYSTEM
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add wave -noupdate /l0_rtps_reader_test1/uut/clk
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add wave -noupdate /l0_rtps_reader_test1/uut/reset
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add wave -noupdate -divider INPUT
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add wave -noupdate /l0_rtps_reader_test1/uut/empty_meta
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add wave -noupdate /l0_rtps_reader_test1/uut/rd_meta
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add wave -noupdate /l0_rtps_reader_test1/uut/last_word_in_meta
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add wave -noupdate -radix hexadecimal /l0_rtps_reader_test1/uut/data_in_meta
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add wave -noupdate -divider OUTPUT
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add wave -noupdate /l0_rtps_reader_test1/uut/start_hc
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add wave -noupdate /l0_rtps_reader_test1/uut/opcode_hc
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add wave -noupdate /l0_rtps_reader_test1/uut/ack_hc
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add wave -noupdate /l0_rtps_reader_test1/uut/done_hc
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add wave -noupdate -radix hexadecimal /l0_rtps_reader_test1/uut/data_out_hc
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add wave -noupdate -divider {MAIN FSM}
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add wave -noupdate /l0_rtps_reader_test1/uut/stage
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add wave -noupdate /l0_rtps_reader_test1/uut/stage_next
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add wave -noupdate /l0_rtps_reader_test1/uut/cnt
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add wave -noupdate -divider {MEMORY FSM}
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add wave -noupdate /l0_rtps_reader_test1/uut/mem_op_done
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add wave -noupdate /l0_rtps_reader_test1/uut/mem_op_start
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add wave -noupdate /l0_rtps_reader_test1/uut/mem_opcode
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add wave -noupdate /l0_rtps_reader_test1/uut/mem_stage
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add wave -noupdate /l0_rtps_reader_test1/uut/mem_stage_next
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add wave -noupdate /l0_rtps_reader_test1/uut/mem_cnt
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add wave -noupdate /l0_rtps_reader_test1/uut/mem_pos
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add wave -noupdate -radix unsigned /l0_rtps_reader_test1/uut/mem_addr_base
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add wave -noupdate -expand -group MEM_CTRL -radix unsigned /l0_rtps_reader_test1/uut/mem_addr
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add wave -noupdate -expand -group MEM_CTRL /l0_rtps_reader_test1/uut/mem_valid_in
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add wave -noupdate -expand -group MEM_CTRL /l0_rtps_reader_test1/uut/mem_ready_in
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add wave -noupdate -expand -group MEM_CTRL /l0_rtps_reader_test1/uut/mem_read
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add wave -noupdate -expand -group MEM_CTRL -radix hexadecimal /l0_rtps_reader_test1/uut/mem_write_data
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add wave -noupdate -expand -group MEM_CTRL /l0_rtps_reader_test1/uut/abort_read
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add wave -noupdate -expand -group MEM_CTRL /l0_rtps_reader_test1/uut/mem_valid_out
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add wave -noupdate -expand -group MEM_CTRL /l0_rtps_reader_test1/uut/mem_ready_out
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add wave -noupdate -expand -group MEM_CTRL -radix hexadecimal /l0_rtps_reader_test1/uut/mem_read_data
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add wave -noupdate -divider TESTBENCH
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add wave -noupdate -group TESTBENCH /l0_rtps_reader_test1/start
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add wave -noupdate -group TESTBENCH /l0_rtps_reader_test1/cnt_stim
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add wave -noupdate -group TESTBENCH /l0_rtps_reader_test1/packet_sent
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add wave -noupdate -group TESTBENCH /l0_rtps_reader_test1/mem_check_done
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add wave -noupdate -group TESTBENCH /l0_rtps_reader_test1/stim_done
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add wave -noupdate -group TESTBENCH /l0_rtps_reader_test1/test_done
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add wave -noupdate -group TESTBENCH /l0_rtps_reader_test1/uut/idle_sig
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TreeUpdate [SetDefaultTree]
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WaveRestoreCursors {Begin {8325000 ps} 1} {Error {9725000 ps} 1} {Cursor {9175000 ps} 0}
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quietly wave cursor active 3
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configure wave -namecolwidth 150
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configure wave -valuecolwidth 100
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configure wave -justifyvalue left
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configure wave -signalnamewidth 1
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configure wave -snapdistance 10
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configure wave -datasetprefix 0
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configure wave -rowmargin 4
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configure wave -childrowmargin 2
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configure wave -gridoffset 0
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configure wave -gridperiod 1
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configure wave -griddelta 40
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configure wave -timeline 0
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configure wave -timelineunits ns
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update
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WaveRestoreZoom {8888200 ps} {9912200 ps}
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483
src/Tests/Level_0/L0_rtps_reader_test1.vhd
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483
src/Tests/Level_0/L0_rtps_reader_test1.vhd
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@ -0,0 +1,483 @@
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library ieee;
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use ieee.std_logic_1164.all;
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use ieee.numeric_std.all;
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library osvvm; -- Utility Library
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context osvvm.OsvvmContext;
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use work.rtps_package.all;
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use work.user_config.all;
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use work.rtps_config_package.all;
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use work.rtps_test_package.all;
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-- This testbench tests the metatraffic operation behaviour of the RTPS Reader. (Remote Endpoint matching and memory behaviour)
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-- This testbench is using external names to access the memory of the rtps_reader directly and check the contents at the supposed locations.
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-- This testbench covers following:
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-- * Mathing Endpoint
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-- * Memory Full Behaviour
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-- * Unmatching Endpoint
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-- * Unmatching Participant
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-- * Updating previously matched Endpoint
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-- * Unknown Metatraffic Operation
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entity L0_rtps_reader_test1 is
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end entity;
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architecture testbench of L0_rtps_reader_test1 is
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-- *CONSTANT DECLARATION*
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constant MAX_REMOTE_ENDPOINTS : natural := 3;
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-- *TYPE DECLARATION*
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type TEST_STAGE_TYPE is (IDLE, BUSY);
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type TEST_RAM_TYPE is array (0 to (MAX_REMOTE_ENDPOINTS*WRITER_ENDPOINT_FRAME_SIZE_A)-1) of std_logic_vector(WORD_WIDTH-1 downto 0);
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-- *SIGNAL DECLARATION*
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signal clk, empty_user, empty_meta, rd_meta, last_word_in_meta : std_logic := '0';
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signal reset : std_logic := '1';
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signal data_in_meta, data_out_hc : std_logic_vector(WORD_WIDTH-1 downto 0) := (others => '0');
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signal start_hc, ack_hc, done_hc, done_hc_delay : std_logic := '0';
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signal opcode_hc : HISTORY_CACHE_OPCODE_TYPE := NOP;
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signal ret_hc : HISTORY_CACHE_RESPONSE_TYPE := OK;
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signal stim_stage : TEST_STAGE_TYPE := IDLE;
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shared variable stimulus, reference : TEST_PACKET_TYPE := EMPTY_TEST_PACKET;
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signal packet_sent : std_logic := '0';
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signal cnt_stim : natural := 0;
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signal start : std_logic := '0';
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shared variable SB_out : osvvm.ScoreBoardPkg_slv.ScoreBoardPType;
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shared variable SB_mem : work.ScoreBoardPkg_MemoryTest.ScoreBoardPType;
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signal stim_done, mem_check_done, out_check_done, test_done : std_logic := '0';
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-- *FUNCTION DECLARATION*
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procedure wait_on_sent is
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begin
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wait until rising_edge(packet_sent);
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end procedure;
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procedure wait_on_mem_check is
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begin
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if (mem_check_done /= '1') then
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wait until mem_check_done = '1';
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end if;
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end procedure;
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procedure wait_on_completion is
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begin
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if (test_done /= '1') then
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wait until test_done = '1';
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end if;
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end procedure;
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begin
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-- Unit Under Test
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uut : entity work.rtps_reader(arch)
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generic map (
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ENTITYID => DEFAULT_READER_ENTITYID,
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RELIABILTY_QOS => RELIABLE_RELIABILITY_QOS,
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LIVELINESS_QOS => AUTOMATIC_LIVELINESS_QOS,
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DURABILITY_QOS => VOLATILE_DURABILITY_QOS,
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HEARTBEAT_RESPONSE_DELAY => DURATION_ZERO,
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HEARTBEAT_SUPPRESSION_DELAY => DURATION_ZERO,
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LEASE_DURATION => DURATION_INFINITE,
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WITH_KEY => FALSE,
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MAX_REMOTE_ENDPOINTS => MAX_REMOTE_ENDPOINTS
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)
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port map (
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-- SYSTEM
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clk => clk,
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reset => reset,
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time => TIME_ZERO,
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empty_user => '1',
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rd_user => open,
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data_in_user => (others => '0'),
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last_word_in_user => '0',
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empty_meta => empty_meta or packet_sent,
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rd_meta => rd_meta,
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data_in_meta => data_in_meta,
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last_word_in_meta => last_word_in_meta,
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wr_rtps => open,
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full_rtps => '0',
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last_word_out_rtps => open,
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data_out_rtps => open,
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start_hc => start_hc,
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opcode_hc => opcode_hc,
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ack_hc => ack_hc,
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done_hc => done_hc,
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ret_hc => ret_hc,
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data_out_hc => data_out_hc,
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valid_out_hc => open,
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ready_out_hc => '0',
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last_word_out_hc => open
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);
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stimulus_prc : process
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variable RV : RandomPType;
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variable p0, p1, participant : PARTICIPANT_DATA_TYPE := DEFAULT_PARTICIPANT_DATA;
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variable e0, e1, e2, e3, endpoint : ENDPOINT_DATA_TYPE := DEFAULT_ENDPOINT_DATA;
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-- Wrapper to use procedure as function
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impure function gen_rand_loc_2 return LOCATOR_TYPE is
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variable ret : LOCATOR_TYPE := EMPTY_LOCATOR;
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begin
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gen_rand_loc(RV, ret);
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return ret;
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end function;
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impure function gen_rand_guid_prefix return GUIDPREFIX_TYPE is
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variable ret : GUIDPREFIX_TYPE;
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begin
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ret := (0 => RV.RandSlv(WORD_WIDTH), 1 => RV.RandSlv(WORD_WIDTH), 2 => RV.RandSlv(WORD_WIDTH));
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return ret;
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end function;
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procedure start_test is
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begin
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start <= '1';
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wait until rising_edge(clk);
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start <= '0';
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wait until rising_edge(clk);
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end procedure;
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begin
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SetAlertLogName("rtps_reader - Level 0 - Memory Handling");
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SetAlertEnable(FAILURE, TRUE);
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SetAlertEnable(ERROR, TRUE);
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SetAlertEnable(WARNING, TRUE);
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SetLogEnable(DEBUG, FALSE);
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SetLogEnable(PASSED, FALSE);
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SetLogEnable(INFO, TRUE);
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RV.InitSeed(RV'instance_name);
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p0.guidPrefix := gen_rand_guid_prefix;
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p1.guidPrefix := gen_rand_guid_prefix;
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-- Endpoint 1
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e0 := DEFAULT_ENDPOINT_DATA;
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e0.participant := p0;
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e0.entityid := RV.RandSlv(ENTITYID_WIDTH);
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e0.unicastLocatorList := (numLocators => int(1,CDR_LONG_WIDTH), locator => (0 => gen_rand_loc_2, others => EMPTY_LOCATOR));
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-- Endpoint 2
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e1 := DEFAULT_ENDPOINT_DATA;
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e1.participant := p0;
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e1.entityid := RV.RandSlv(ENTITYID_WIDTH);
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e1.unicastLocatorList := (numLocators => int(1,CDR_LONG_WIDTH), locator => (0 => gen_rand_loc_2, others => EMPTY_LOCATOR));
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-- Endpoint 3
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e2 := DEFAULT_ENDPOINT_DATA;
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e2.participant := p1;
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e2.entityid := RV.RandSlv(ENTITYID_WIDTH);
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e2.unicastLocatorList := (numLocators => int(1,CDR_LONG_WIDTH), locator => (0 => gen_rand_loc_2, others => EMPTY_LOCATOR));
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-- Endpoint 4
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e3 := DEFAULT_ENDPOINT_DATA;
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e3.participant := p1;
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e3.entityid := RV.RandSlv(ENTITYID_WIDTH);
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e3.unicastLocatorList := (numLocators => int(1,CDR_LONG_WIDTH), locator => (0 => gen_rand_loc_2, others => EMPTY_LOCATOR));
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Log("Initiating Test", INFO);
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stim_done <= '0';
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start <= '0';
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reset <= '1';
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wait until rising_edge(clk);
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wait until rising_edge(clk);
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reset <= '0';
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Log("Insert Endpoint 0 Participant 0", INFO);
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endpoint := e0;
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endpoint.nr := 0;
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endpoint.match := MATCH;
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gen_endpoint_match_frame(endpoint, stimulus);
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SB_mem.Push(gen_writer_endpoint_mem_frame_a(endpoint));
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start_test;
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wait_on_sent;
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stimulus := EMPTY_TEST_PACKET;
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wait_on_mem_check;
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-- MEMORY STATE [p0e0,0,0]
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Log("Insert Endpoint 1 Participant 0", INFO);
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endpoint := e1;
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endpoint.nr := 1;
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endpoint.match := MATCH;
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gen_endpoint_match_frame(endpoint, stimulus);
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SB_mem.Push(gen_writer_endpoint_mem_frame_a(endpoint));
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start_test;
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wait_on_sent;
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stimulus := EMPTY_TEST_PACKET;
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wait_on_mem_check;
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-- MEMORY STATE [p0e0,p0e1,0]
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Log("Insert Endpoint 2 Participant 1", INFO);
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endpoint := e2;
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endpoint.nr := 2;
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endpoint.match := MATCH;
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gen_endpoint_match_frame(endpoint, stimulus);
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SB_mem.Push(gen_writer_endpoint_mem_frame_a(endpoint));
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start_test;
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wait_on_sent;
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stimulus := EMPTY_TEST_PACKET;
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wait_on_mem_check;
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-- MEMORY STATE [p0e0,p0e1,p1e2]
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Log("Ignore Endpoint 3 Participant 1 [Memory Full]", INFO);
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endpoint := e3;
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endpoint.match := MATCH;
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gen_endpoint_match_frame(endpoint, stimulus);
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-- Re-check Mem-State
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endpoint := e0;
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endpoint.nr := 0;
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endpoint.match := MATCH;
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SB_mem.Push(gen_writer_endpoint_mem_frame_a(endpoint));
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endpoint := e1;
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endpoint.nr := 1;
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endpoint.match := MATCH;
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SB_mem.Push(gen_writer_endpoint_mem_frame_a(endpoint));
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endpoint := e2;
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endpoint.nr := 2;
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endpoint.match := MATCH;
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SB_mem.Push(gen_writer_endpoint_mem_frame_a(endpoint));
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start_test;
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wait_on_sent;
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stimulus := EMPTY_TEST_PACKET;
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wait_on_mem_check;
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-- MEMORY STATE [p0e0,p0e1,p1e3]
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Log("Remove Endpoint 2 Participant 1", INFO);
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endpoint := e2;
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endpoint.nr := 2;
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endpoint.match := UNMATCH;
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gen_endpoint_match_frame(endpoint, stimulus);
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SB_mem.Push(gen_writer_endpoint_mem_frame_a(endpoint));
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SB_out.Push(std_logic_vector(to_unsigned(endpoint.nr, WORD_WIDTH)));
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start_test;
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wait_on_sent;
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stimulus := EMPTY_TEST_PACKET;
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wait_on_mem_check;
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-- MEMORY STATE [p0e0,p0e1,0]
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Log("Insert Endpoint 3 Participant 1", INFO);
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endpoint := e3;
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endpoint.nr := 2;
|
||||||
|
endpoint.match := MATCH;
|
||||||
|
gen_endpoint_match_frame(endpoint, stimulus);
|
||||||
|
SB_mem.Push(gen_writer_endpoint_mem_frame_a(endpoint));
|
||||||
|
start_test;
|
||||||
|
wait_on_sent;
|
||||||
|
stimulus := EMPTY_TEST_PACKET;
|
||||||
|
wait_on_mem_check;
|
||||||
|
-- MEMORY STATE [p0e0,p0e1,p1e3]
|
||||||
|
|
||||||
|
Log("Remove Participant 0", INFO);
|
||||||
|
participant := p0;
|
||||||
|
participant.match := UNMATCH;
|
||||||
|
gen_participant_match_frame(participant, stimulus);
|
||||||
|
-- Remove Endpoint 0
|
||||||
|
endpoint := e0;
|
||||||
|
endpoint.nr := 0;
|
||||||
|
endpoint.match := UNMATCH;
|
||||||
|
SB_mem.Push(gen_writer_endpoint_mem_frame_a(endpoint));
|
||||||
|
SB_out.Push(std_logic_vector(to_unsigned(endpoint.nr, WORD_WIDTH)));
|
||||||
|
-- Remove Endpoint 1
|
||||||
|
endpoint := e1;
|
||||||
|
endpoint.nr := 1;
|
||||||
|
endpoint.match := UNMATCH;
|
||||||
|
SB_mem.Push(gen_writer_endpoint_mem_frame_a(endpoint));
|
||||||
|
SB_out.Push(std_logic_vector(to_unsigned(endpoint.nr, WORD_WIDTH)));
|
||||||
|
start_test;
|
||||||
|
wait_on_sent;
|
||||||
|
stimulus := EMPTY_TEST_PACKET;
|
||||||
|
wait_on_mem_check;
|
||||||
|
-- MEMORY STATE [0,0,p1e3]
|
||||||
|
|
||||||
|
Log("Insert Endpoint 2 Participant 1", INFO);
|
||||||
|
endpoint := e2;
|
||||||
|
endpoint.nr := 0;
|
||||||
|
endpoint.match := MATCH;
|
||||||
|
gen_endpoint_match_frame(endpoint, stimulus);
|
||||||
|
SB_mem.Push(gen_writer_endpoint_mem_frame_a(endpoint));
|
||||||
|
start_test;
|
||||||
|
wait_on_sent;
|
||||||
|
stimulus := EMPTY_TEST_PACKET;
|
||||||
|
wait_on_mem_check;
|
||||||
|
-- MEMORY STATE [p1e2,0,p1e3]
|
||||||
|
|
||||||
|
Log("Unknown Metatraffic Operation followed by insertion of Enpoint 0 Participant 0", INFO);
|
||||||
|
for i in 0 to 9 loop
|
||||||
|
stimulus.data(i) := RV.RandSlv(WORD_WIDTH);
|
||||||
|
end loop;
|
||||||
|
stimulus.last(9) := '1';
|
||||||
|
stimulus.length := 10;
|
||||||
|
endpoint := e0;
|
||||||
|
endpoint.nr := 1;
|
||||||
|
endpoint.match := MATCH;
|
||||||
|
gen_endpoint_match_frame(endpoint, stimulus);
|
||||||
|
-- Re-check Mem-State
|
||||||
|
endpoint := e2;
|
||||||
|
endpoint.nr := 0;
|
||||||
|
endpoint.match := MATCH;
|
||||||
|
SB_mem.Push(gen_writer_endpoint_mem_frame_a(endpoint));
|
||||||
|
endpoint := e0;
|
||||||
|
endpoint.nr := 1;
|
||||||
|
endpoint.match := MATCH;
|
||||||
|
SB_mem.Push(gen_writer_endpoint_mem_frame_a(endpoint));
|
||||||
|
endpoint := e3;
|
||||||
|
endpoint.nr := 2;
|
||||||
|
endpoint.match := MATCH;
|
||||||
|
SB_mem.Push(gen_writer_endpoint_mem_frame_a(endpoint));
|
||||||
|
start_test;
|
||||||
|
wait_on_sent;
|
||||||
|
stimulus := EMPTY_TEST_PACKET;
|
||||||
|
wait_on_mem_check;
|
||||||
|
-- MEMORY STATE [p1e2,p0e0,p1e3]
|
||||||
|
|
||||||
|
Log("Update Endpoint 2 Participant 1", INFO);
|
||||||
|
endpoint := e2;
|
||||||
|
endpoint.nr := 0;
|
||||||
|
endpoint.match := MATCH;
|
||||||
|
endpoint.unicastLocatorList := (numLocators => int(1,CDR_LONG_WIDTH), locator => (0 => gen_rand_loc_2, others => EMPTY_LOCATOR));
|
||||||
|
gen_endpoint_match_frame(endpoint, stimulus);
|
||||||
|
SB_mem.Push(gen_writer_endpoint_mem_frame_a(endpoint));
|
||||||
|
start_test;
|
||||||
|
wait_on_sent;
|
||||||
|
stimulus := EMPTY_TEST_PACKET;
|
||||||
|
wait_on_mem_check;
|
||||||
|
-- MEMORY STATE [p1e2,p0e0,p1e3]
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
stim_done <= '1';
|
||||||
|
wait_on_completion;
|
||||||
|
TranscriptOpen(RESULTS_FILE, APPEND_MODE);
|
||||||
|
SetTranscriptMirror;
|
||||||
|
ReportAlerts;
|
||||||
|
TranscriptClose;
|
||||||
|
std.env.stop;
|
||||||
|
wait;
|
||||||
|
end process;
|
||||||
|
|
||||||
|
clock_prc : process
|
||||||
|
begin
|
||||||
|
clk <= '0';
|
||||||
|
wait for 25 ns;
|
||||||
|
clk <= '1';
|
||||||
|
wait for 25 ns;
|
||||||
|
end process;
|
||||||
|
|
||||||
|
in_empty_prc : process
|
||||||
|
begin
|
||||||
|
empty_meta <= '0';
|
||||||
|
wait until rd_meta = '1';
|
||||||
|
wait until rising_edge(clk);
|
||||||
|
empty_meta <= '1';
|
||||||
|
wait until rising_edge(clk);
|
||||||
|
end process;
|
||||||
|
|
||||||
|
alert_prc : process(all)
|
||||||
|
begin
|
||||||
|
if rising_edge(clk) then
|
||||||
|
alertif(empty_meta = '1' and rd_meta = '1', "Input FIFO read signal high while empty signal high", ERROR);
|
||||||
|
end if;
|
||||||
|
end process;
|
||||||
|
|
||||||
|
input_prc : process(all)
|
||||||
|
begin
|
||||||
|
data_in_meta <= stimulus.data(cnt_stim);
|
||||||
|
last_word_in_meta <= stimulus.last(cnt_stim);
|
||||||
|
|
||||||
|
if rising_edge(clk) then
|
||||||
|
if (reset = '1') then
|
||||||
|
cnt_stim <= 0;
|
||||||
|
stim_stage <= IDLE;
|
||||||
|
packet_sent <= '1';
|
||||||
|
else
|
||||||
|
case (stim_stage) is
|
||||||
|
when IDLE =>
|
||||||
|
if (start = '1' and stimulus.length /= 0) then
|
||||||
|
stim_stage <= BUSY;
|
||||||
|
cnt_stim <= 0;
|
||||||
|
packet_sent <= '0';
|
||||||
|
end if;
|
||||||
|
when BUSY =>
|
||||||
|
if (rd_meta = '1') then
|
||||||
|
if (cnt_stim = stimulus.length-1) then
|
||||||
|
stim_stage <= IDLE;
|
||||||
|
packet_sent <= '1';
|
||||||
|
else
|
||||||
|
cnt_stim <= cnt_stim + 1;
|
||||||
|
end if;
|
||||||
|
end if;
|
||||||
|
end case;
|
||||||
|
end if;
|
||||||
|
end if;
|
||||||
|
end process;
|
||||||
|
|
||||||
|
done_proc : process(clk)
|
||||||
|
begin
|
||||||
|
if rising_edge(clk) then
|
||||||
|
if (stim_done = '1' and SB_out.empty and SB_mem.empty) then
|
||||||
|
test_done <= '1';
|
||||||
|
else
|
||||||
|
test_done <= '0';
|
||||||
|
end if;
|
||||||
|
end if;
|
||||||
|
end process;
|
||||||
|
|
||||||
|
out_check_prc : process(all)
|
||||||
|
begin
|
||||||
|
if rising_edge(clk) then
|
||||||
|
done_hc <= done_hc_delay;
|
||||||
|
if (start_hc = '1') then
|
||||||
|
ack_hc <= '1';
|
||||||
|
done_hc_delay <= '1';
|
||||||
|
case (opcode_hc) is
|
||||||
|
when REMOVE_WRITER =>
|
||||||
|
SB_out.check(data_out_hc);
|
||||||
|
when others =>
|
||||||
|
Alert("Uknown HC Opcode", ERROR);
|
||||||
|
end case;
|
||||||
|
else
|
||||||
|
ack_hc <= '0';
|
||||||
|
done_hc_delay <= '0';
|
||||||
|
end if;
|
||||||
|
end if;
|
||||||
|
end process;
|
||||||
|
|
||||||
|
mem_check_prc : process
|
||||||
|
alias mem is <<signal uut.mem_ctrl_inst.ram_inst.mem : TEST_RAM_TYPE>>;
|
||||||
|
alias mem_op_done is <<signal uut.mem_op_done : std_logic>>;
|
||||||
|
alias idle_sig is <<signal uut.idle_sig : std_logic>>;
|
||||||
|
variable reference : TEST_WRITER_ENDPOINT_MEMORY_FRAME_TYPE_A;
|
||||||
|
begin
|
||||||
|
mem_check_done <= '0';
|
||||||
|
-- SAFEGUARD: (Prevent Fall-through Behavior)
|
||||||
|
if (reset /= '0') then
|
||||||
|
wait until reset = '0';
|
||||||
|
end if;
|
||||||
|
-- Wait for Packet to be sent
|
||||||
|
wait until rising_edge(packet_sent);
|
||||||
|
-- Wait for UUT IDLE state
|
||||||
|
if (idle_sig /= '1') then
|
||||||
|
wait until idle_sig = '1';
|
||||||
|
end if;
|
||||||
|
-- Wait for ongoing memory operation
|
||||||
|
if (mem_op_done /= '1') then
|
||||||
|
wait until mem_op_done = '1';
|
||||||
|
end if;
|
||||||
|
while (not SB_mem.empty) loop
|
||||||
|
SB_mem.Pop(reference);
|
||||||
|
for i in 0 to reference'length-1 loop
|
||||||
|
AffirmIf(?? (mem(reference(i).addr) ?= reference(i).data), "Address: " & integer'image(reference(i).addr) & " Received: " & to_hstring(mem(reference(i).addr)) & " Expected: " & to_hstring(reference(i).data));
|
||||||
|
end loop;
|
||||||
|
end loop;
|
||||||
|
-- Toggle High for one clock cycle
|
||||||
|
mem_check_done <= '1';
|
||||||
|
wait until rising_edge(clk);
|
||||||
|
end process;
|
||||||
|
|
||||||
|
watchdog : process
|
||||||
|
begin
|
||||||
|
wait for 1 ms;
|
||||||
|
Alert("Test timeout", FAILURE);
|
||||||
|
std.env.stop;
|
||||||
|
end process;
|
||||||
|
|
||||||
|
end architecture;
|
||||||
@ -16,6 +16,7 @@ analyze ScoreBoard_builtin_endpoint.vhd
|
|||||||
analyze ../rtps_handler.vhd
|
analyze ../rtps_handler.vhd
|
||||||
analyze ../rtps_builtin_endpoint.vhd
|
analyze ../rtps_builtin_endpoint.vhd
|
||||||
analyze ../rtps_out.vhd
|
analyze ../rtps_out.vhd
|
||||||
|
analyze ../rtps_reader.vhd
|
||||||
analyze Level_0/L0_rtps_handler_test1.vhd
|
analyze Level_0/L0_rtps_handler_test1.vhd
|
||||||
analyze Level_0/L0_rtps_handler_test2.vhd
|
analyze Level_0/L0_rtps_handler_test2.vhd
|
||||||
analyze Level_0/L0_rtps_builtin_endpoint_test1.vhd
|
analyze Level_0/L0_rtps_builtin_endpoint_test1.vhd
|
||||||
@ -27,7 +28,8 @@ analyze Level_0/L0_rtps_builtin_endpoint_test6.vhd
|
|||||||
analyze Level_0/L0_rtps_builtin_endpoint_test7.vhd
|
analyze Level_0/L0_rtps_builtin_endpoint_test7.vhd
|
||||||
analyze Level_0/L0_rtps_out_test1.vhd
|
analyze Level_0/L0_rtps_out_test1.vhd
|
||||||
analyze Level_1/L1_rtps_builtin_endpoint_test1.vhd
|
analyze Level_1/L1_rtps_builtin_endpoint_test1.vhd
|
||||||
#analyze Level_0/L0_mem_ctrl_test1.vhd
|
analyze Level_0/L0_mem_ctrl_test1.vhd
|
||||||
|
analyze Level_0/L0_rtps_reader_test1.vhd
|
||||||
|
|
||||||
simulate L0_rtps_handler_test1
|
simulate L0_rtps_handler_test1
|
||||||
simulate L0_rtps_handler_test2
|
simulate L0_rtps_handler_test2
|
||||||
@ -40,4 +42,5 @@ simulate L0_rtps_builtin_endpoint_test6
|
|||||||
simulate L0_rtps_builtin_endpoint_test7
|
simulate L0_rtps_builtin_endpoint_test7
|
||||||
simulate L0_rtps_out_test1
|
simulate L0_rtps_out_test1
|
||||||
simulate L1_rtps_builtin_endpoint_test1
|
simulate L1_rtps_builtin_endpoint_test1
|
||||||
#simulate L0_mem_ctrl_test1
|
simulate L0_mem_ctrl_test1
|
||||||
|
simulate L0_rtps_reader_test1
|
||||||
@ -41,7 +41,7 @@ package rtps_config_package is
|
|||||||
constant OPCODE_PARTICIPANT_UNMATCH : std_logic_vector(ENDPOINT_MATCH_OPCODE_WIDTH-1 downto 0) := x"55000002";
|
constant OPCODE_PARTICIPANT_UNMATCH : std_logic_vector(ENDPOINT_MATCH_OPCODE_WIDTH-1 downto 0) := x"55000002";
|
||||||
constant OPCODE_LIVELINESS_UPDATE : std_logic_vector(ENDPOINT_MATCH_OPCODE_WIDTH-1 downto 0) := x"55000003";
|
constant OPCODE_LIVELINESS_UPDATE : std_logic_vector(ENDPOINT_MATCH_OPCODE_WIDTH-1 downto 0) := x"55000003";
|
||||||
|
|
||||||
type HISTORY_CACHE_OPCODE_TYPE is (NOP, ADD_CACHE_CHANGE, GET_CACHE_CHANGE, ACK_CACHE_CHANGE, NACK_CACHE_CHANGE);
|
type HISTORY_CACHE_OPCODE_TYPE is (NOP, ADD_CACHE_CHANGE, GET_CACHE_CHANGE, ACK_CACHE_CHANGE, NACK_CACHE_CHANGE, REMOVE_WRITER);
|
||||||
type KEY_GENERATOR_OPCODE_TYPE is (NOP, WRITE_PAYLOAD, READ_KEY, READ_SIZE);
|
type KEY_GENERATOR_OPCODE_TYPE is (NOP, WRITE_PAYLOAD, READ_KEY, READ_SIZE);
|
||||||
type HISTORY_CACHE_RESPONSE_TYPE is (OK, REJECTED, INVALID, ERROR);
|
type HISTORY_CACHE_RESPONSE_TYPE is (OK, REJECTED, INVALID, ERROR);
|
||||||
|
|
||||||
|
|||||||
@ -246,6 +246,8 @@ architecture arch of rtps_reader is
|
|||||||
signal lease_deadline : TIME_TYPE := TIME_INVALID;
|
signal lease_deadline : TIME_TYPE := TIME_INVALID;
|
||||||
-- Signal used to pass Response Deadlines from main to memory process
|
-- Signal used to pass Response Deadlines from main to memory process
|
||||||
signal res_time : TIME_TYPE := TIME_INVALID;
|
signal res_time : TIME_TYPE := TIME_INVALID;
|
||||||
|
-- Test signal used for testbench synchronisation
|
||||||
|
signal idle_sig : std_logic := '0';
|
||||||
|
|
||||||
-- *MEMORY PROCESS*
|
-- *MEMORY PROCESS*
|
||||||
-- Memory FSM state
|
-- Memory FSM state
|
||||||
@ -423,6 +425,7 @@ begin
|
|||||||
last_word_out_hc <= '0';
|
last_word_out_hc <= '0';
|
||||||
wr_rtps <= '0';
|
wr_rtps <= '0';
|
||||||
last_word_out_rtps <= '0';
|
last_word_out_rtps <= '0';
|
||||||
|
idle_sig <= '0';
|
||||||
rd_guard := '0';
|
rd_guard := '0';
|
||||||
mem_field_flags <= (others => '0');
|
mem_field_flags <= (others => '0');
|
||||||
data_out_hc <= (others => '0');
|
data_out_hc <= (others => '0');
|
||||||
@ -437,6 +440,7 @@ begin
|
|||||||
|
|
||||||
case (stage) is
|
case (stage) is
|
||||||
when IDLE =>
|
when IDLE =>
|
||||||
|
idle_sig <= '1';
|
||||||
-- RESET
|
-- RESET
|
||||||
lifespan_next <= TIME_INVALID;
|
lifespan_next <= TIME_INVALID;
|
||||||
addr_next <= (others => '0');
|
addr_next <= (others => '0');
|
||||||
@ -540,7 +544,7 @@ begin
|
|||||||
end if;
|
end if;
|
||||||
|
|
||||||
if (is_meta = '1' and (meta_opcode = OPCODE_PARTICIPANT_UNMATCH or (LIVELINESS_QOS /= MANUAL_BY_TOPIC_LIVELINESS_QOS and meta_opcode = OPCODE_LIVELINESS_UPDATE))) then
|
if (is_meta = '1' and (meta_opcode = OPCODE_PARTICIPANT_UNMATCH or (LIVELINESS_QOS /= MANUAL_BY_TOPIC_LIVELINESS_QOS and meta_opcode = OPCODE_LIVELINESS_UPDATE))) then
|
||||||
assert (last_word_in_meta = '1') report "last_word_in_meta not set" severity FAILURE;
|
--assert (last_word_in_meta = '1') report "last_word_in_meta not set" severity FAILURE;
|
||||||
-- DONE Parsing
|
-- DONE Parsing
|
||||||
stage_next <= INITIATE_ENDPOINT_SEARCH;
|
stage_next <= INITIATE_ENDPOINT_SEARCH;
|
||||||
else
|
else
|
||||||
@ -554,7 +558,7 @@ begin
|
|||||||
-- Input FIFO Guard
|
-- Input FIFO Guard
|
||||||
if ((is_meta = '1' and empty_meta = '0') or (is_meta = '0' and empty_user = '0')) then
|
if ((is_meta = '1' and empty_meta = '0') or (is_meta = '0' and empty_user = '0')) then
|
||||||
if (is_meta = '1') then
|
if (is_meta = '1') then
|
||||||
assert (meta_opcode /= OPCODE_ENDPOINT_UNMATCH or (meta_opcode = OPCODE_ENDPOINT_UNMATCH and last_word_in_meta = '1')) report "last_word_in_meta not set" severity FAILURE;
|
--assert (meta_opcode /= OPCODE_ENDPOINT_UNMATCH or (meta_opcode = OPCODE_ENDPOINT_UNMATCH and last_word_in_meta = '1')) report "last_word_in_meta not set" severity FAILURE;
|
||||||
rd_meta <= '1';
|
rd_meta <= '1';
|
||||||
guid_next(3) <= data_in_meta;
|
guid_next(3) <= data_in_meta;
|
||||||
-- Memory Operation Guard
|
-- Memory Operation Guard
|
||||||
@ -641,7 +645,7 @@ begin
|
|||||||
addr_next <= data_in_meta;
|
addr_next <= data_in_meta;
|
||||||
-- UDP Port
|
-- UDP Port
|
||||||
when 1 =>
|
when 1 =>
|
||||||
assert (last_word_in_meta = '1') report "last_word_in_meta not set" severity FAILURE;
|
--assert (last_word_in_meta = '1') report "last_word_in_meta not set" severity FAILURE;
|
||||||
|
|
||||||
portn_next <= data_in_meta(WORD_WIDTH-1 downto WORD_WIDTH-UDP_PORT_WIDTH);
|
portn_next <= data_in_meta(WORD_WIDTH-1 downto WORD_WIDTH-UDP_PORT_WIDTH);
|
||||||
|
|
||||||
@ -698,6 +702,7 @@ begin
|
|||||||
data_out_hc <= std_logic_vector(to_unsigned(mem_pos, WORD_WIDTH));
|
data_out_hc <= std_logic_vector(to_unsigned(mem_pos, WORD_WIDTH));
|
||||||
-- Wait for Operation Acknowledgement
|
-- Wait for Operation Acknowledgement
|
||||||
if (ack_hc = '1') then
|
if (ack_hc = '1') then
|
||||||
|
start_hc <= '0';
|
||||||
-- Remove Unmatched Remote Endpoint
|
-- Remove Unmatched Remote Endpoint
|
||||||
mem_op_start <= '1';
|
mem_op_start <= '1';
|
||||||
mem_opcode <= REMOVE_ENDPOINT;
|
mem_opcode <= REMOVE_ENDPOINT;
|
||||||
@ -721,17 +726,21 @@ begin
|
|||||||
data_out_hc <= std_logic_vector(to_unsigned(mem_pos, WORD_WIDTH));
|
data_out_hc <= std_logic_vector(to_unsigned(mem_pos, WORD_WIDTH));
|
||||||
-- Wait for Operation Acknowledgement
|
-- Wait for Operation Acknowledgement
|
||||||
if (ack_hc = '1') then
|
if (ack_hc = '1') then
|
||||||
|
start_hc <= '0';
|
||||||
-- Remove Unmatched Remote Endpoint
|
-- Remove Unmatched Remote Endpoint
|
||||||
mem_op_start <= '1';
|
mem_op_start <= '1';
|
||||||
mem_opcode <= REMOVE_ENDPOINT;
|
mem_opcode <= REMOVE_ENDPOINT;
|
||||||
|
cnt_next <= cnt + 1;
|
||||||
end if;
|
end if;
|
||||||
|
else
|
||||||
|
cnt_next <= cnt + 1;
|
||||||
end if;
|
end if;
|
||||||
cnt_next <= 1;
|
|
||||||
end if;
|
end if;
|
||||||
when 1 =>
|
when 1 =>
|
||||||
-- Continue Search
|
-- Continue Search
|
||||||
mem_op_start <= '1';
|
mem_op_start <= '1';
|
||||||
mem_opcode <= GET_NEXT_ENDPOINT;
|
mem_opcode <= GET_NEXT_ENDPOINT;
|
||||||
|
mem_field_flags <= EMF_GUIDPREFIX_FLAG;
|
||||||
cnt_next <= 0;
|
cnt_next <= 0;
|
||||||
when others =>
|
when others =>
|
||||||
null;
|
null;
|
||||||
@ -1199,6 +1208,7 @@ begin
|
|||||||
opcode_hc <= ADD_CACHE_CHANGE;
|
opcode_hc <= ADD_CACHE_CHANGE;
|
||||||
-- Wait until History Cache acknowledges request
|
-- Wait until History Cache acknowledges request
|
||||||
if (ack_hc = '1') then
|
if (ack_hc = '1') then
|
||||||
|
start_hc <= '0';
|
||||||
stage_next <= ADD_CACHE_CHANGE;
|
stage_next <= ADD_CACHE_CHANGE;
|
||||||
cnt_next <= 0;
|
cnt_next <= 0;
|
||||||
end if;
|
end if;
|
||||||
@ -1591,6 +1601,8 @@ begin
|
|||||||
rd_guard := '1';
|
rd_guard := '1';
|
||||||
end if;
|
end if;
|
||||||
when SKIP_META_OPERATION =>
|
when SKIP_META_OPERATION =>
|
||||||
|
-- Input Guard
|
||||||
|
if (empty_meta = '0') then
|
||||||
-- Skip-Read
|
-- Skip-Read
|
||||||
rd_meta <= '1';
|
rd_meta <= '1';
|
||||||
|
|
||||||
@ -1598,6 +1610,7 @@ begin
|
|||||||
if (last_word_in_meta = '1') then
|
if (last_word_in_meta = '1') then
|
||||||
stage_next <= IDLE;
|
stage_next <= IDLE;
|
||||||
end if;
|
end if;
|
||||||
|
end if;
|
||||||
when others =>
|
when others =>
|
||||||
null;
|
null;
|
||||||
end case;
|
end case;
|
||||||
@ -1696,15 +1709,15 @@ begin
|
|||||||
mem_cnt_next <= 0;
|
mem_cnt_next <= 0;
|
||||||
when UPDATE_ENDPOINT =>
|
when UPDATE_ENDPOINT =>
|
||||||
mem_stage_next <= UPDATE_ENDPOINT;
|
mem_stage_next <= UPDATE_ENDPOINT;
|
||||||
if (RELIABILTY_QOS /= RELIABLE_RELIABILITY_QOS and check_mask(mem_field_flags,EMF_IPV4_ADDR_FLAG)) then
|
if (RELIABILTY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_field_flags,EMF_IPV4_ADDR_FLAG)) then
|
||||||
mem_cnt_next <= 0;
|
mem_cnt_next <= 0;
|
||||||
elsif (RELIABILTY_QOS /= RELIABLE_RELIABILITY_QOS and check_mask(mem_field_flags,EMF_UDP_PORT_FLAG)) then
|
elsif (RELIABILTY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_field_flags,EMF_UDP_PORT_FLAG)) then
|
||||||
mem_cnt_next <= 1;
|
mem_cnt_next <= 1;
|
||||||
elsif check_mask(mem_field_flags,EMF_NEXT_SEQ_NR_FLAG) then
|
elsif check_mask(mem_field_flags,EMF_NEXT_SEQ_NR_FLAG) then
|
||||||
mem_cnt_next <= 2;
|
mem_cnt_next <= 2;
|
||||||
elsif check_mask(mem_field_flags,EMF_LEASE_DEADLINE_FLAG) then
|
elsif check_mask(mem_field_flags,EMF_LEASE_DEADLINE_FLAG) then
|
||||||
mem_cnt_next <= 4;
|
mem_cnt_next <= 4;
|
||||||
elsif (RELIABILTY_QOS /= RELIABLE_RELIABILITY_QOS and check_mask(mem_field_flags,EMF_RES_TIME_FLAG)) then
|
elsif (RELIABILTY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_field_flags,EMF_RES_TIME_FLAG)) then
|
||||||
mem_cnt_next <= 6;
|
mem_cnt_next <= 6;
|
||||||
else
|
else
|
||||||
-- DONE
|
-- DONE
|
||||||
@ -1737,15 +1750,15 @@ begin
|
|||||||
mem_cnt_next <= 0;
|
mem_cnt_next <= 0;
|
||||||
elsif check_mask(mem_field_flags,EMF_GUIDPREFIX_FLAG) then
|
elsif check_mask(mem_field_flags,EMF_GUIDPREFIX_FLAG) then
|
||||||
mem_cnt_next <= 1;
|
mem_cnt_next <= 1;
|
||||||
elsif (RELIABILTY_QOS /= RELIABLE_RELIABILITY_QOS and check_mask(mem_field_flags,EMF_IPV4_ADDR_FLAG)) then
|
elsif (RELIABILTY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_field_flags,EMF_IPV4_ADDR_FLAG)) then
|
||||||
mem_cnt_next <= 4;
|
mem_cnt_next <= 4;
|
||||||
elsif (RELIABILTY_QOS /= RELIABLE_RELIABILITY_QOS and check_mask(mem_field_flags,EMF_UDP_PORT_FLAG)) then
|
elsif (RELIABILTY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_field_flags,EMF_UDP_PORT_FLAG)) then
|
||||||
mem_cnt_next <= 5;
|
mem_cnt_next <= 5;
|
||||||
elsif check_mask(mem_field_flags,EMF_NEXT_SEQ_NR_FLAG) then
|
elsif check_mask(mem_field_flags,EMF_NEXT_SEQ_NR_FLAG) then
|
||||||
mem_cnt_next <= 6;
|
mem_cnt_next <= 6;
|
||||||
elsif check_mask(mem_field_flags,EMF_LEASE_DEADLINE_FLAG) then
|
elsif check_mask(mem_field_flags,EMF_LEASE_DEADLINE_FLAG) then
|
||||||
mem_cnt_next <= 8;
|
mem_cnt_next <= 8;
|
||||||
elsif (RELIABILTY_QOS /= RELIABLE_RELIABILITY_QOS and check_mask(mem_field_flags,EMF_RES_TIME_FLAG)) then
|
elsif (RELIABILTY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_field_flags,EMF_RES_TIME_FLAG)) then
|
||||||
mem_cnt_next <= 10;
|
mem_cnt_next <= 10;
|
||||||
else
|
else
|
||||||
-- DONE
|
-- DONE
|
||||||
@ -1800,6 +1813,7 @@ begin
|
|||||||
if (mem_valid_out = '1') then
|
if (mem_valid_out = '1') then
|
||||||
-- No Match
|
-- No Match
|
||||||
if (mem_read_data /= mem_endpoint_latch_data.guid(3)) then
|
if (mem_read_data /= mem_endpoint_latch_data.guid(3)) then
|
||||||
|
abort_read <= '1';
|
||||||
-- Reached End of Memory, No Match
|
-- Reached End of Memory, No Match
|
||||||
if (mem_addr_base = max_endpoint_addr) then
|
if (mem_addr_base = max_endpoint_addr) then
|
||||||
mem_addr_base_next <= ENDPOINT_MEMORY_MAX_ADDRESS; --No match
|
mem_addr_base_next <= ENDPOINT_MEMORY_MAX_ADDRESS; --No match
|
||||||
@ -1810,7 +1824,6 @@ begin
|
|||||||
mem_addr_base_next <= mem_addr_base + ENDPOINT_FRAME_SIZE;
|
mem_addr_base_next <= mem_addr_base + ENDPOINT_FRAME_SIZE;
|
||||||
mem_pos_next <= mem_pos + 1;
|
mem_pos_next <= mem_pos + 1;
|
||||||
mem_cnt_next <= 0;
|
mem_cnt_next <= 0;
|
||||||
abort_read <= '1';
|
|
||||||
end if;
|
end if;
|
||||||
else
|
else
|
||||||
mem_cnt_next <= mem_cnt + 1;
|
mem_cnt_next <= mem_cnt + 1;
|
||||||
@ -1823,6 +1836,7 @@ begin
|
|||||||
if (mem_valid_out = '1') then
|
if (mem_valid_out = '1') then
|
||||||
-- No Match
|
-- No Match
|
||||||
if (mem_read_data /= mem_endpoint_latch_data.guid(0)) then
|
if (mem_read_data /= mem_endpoint_latch_data.guid(0)) then
|
||||||
|
abort_read <= '1';
|
||||||
-- Reached End of Memory, No Match
|
-- Reached End of Memory, No Match
|
||||||
if (mem_addr_base = max_endpoint_addr) then
|
if (mem_addr_base = max_endpoint_addr) then
|
||||||
mem_addr_base_next <= ENDPOINT_MEMORY_MAX_ADDRESS; --No match
|
mem_addr_base_next <= ENDPOINT_MEMORY_MAX_ADDRESS; --No match
|
||||||
@ -1833,7 +1847,6 @@ begin
|
|||||||
mem_addr_base_next <= mem_addr_base + ENDPOINT_FRAME_SIZE;
|
mem_addr_base_next <= mem_addr_base + ENDPOINT_FRAME_SIZE;
|
||||||
mem_pos_next <= mem_pos + 1;
|
mem_pos_next <= mem_pos + 1;
|
||||||
mem_cnt_next <= 0;
|
mem_cnt_next <= 0;
|
||||||
abort_read <= '1';
|
|
||||||
end if;
|
end if;
|
||||||
else
|
else
|
||||||
mem_cnt_next <= mem_cnt + 1;
|
mem_cnt_next <= mem_cnt + 1;
|
||||||
@ -1846,6 +1859,7 @@ begin
|
|||||||
if (mem_valid_out = '1') then
|
if (mem_valid_out = '1') then
|
||||||
-- No Match
|
-- No Match
|
||||||
if (mem_read_data /= mem_endpoint_latch_data.guid(1)) then
|
if (mem_read_data /= mem_endpoint_latch_data.guid(1)) then
|
||||||
|
abort_read <= '1';
|
||||||
-- Reached End of Memory, No Match
|
-- Reached End of Memory, No Match
|
||||||
if (mem_addr_base = max_endpoint_addr) then
|
if (mem_addr_base = max_endpoint_addr) then
|
||||||
mem_addr_base_next <= ENDPOINT_MEMORY_MAX_ADDRESS; --No match
|
mem_addr_base_next <= ENDPOINT_MEMORY_MAX_ADDRESS; --No match
|
||||||
@ -1856,7 +1870,6 @@ begin
|
|||||||
mem_addr_base_next <= mem_addr_base + ENDPOINT_FRAME_SIZE;
|
mem_addr_base_next <= mem_addr_base + ENDPOINT_FRAME_SIZE;
|
||||||
mem_pos_next <= mem_pos + 1;
|
mem_pos_next <= mem_pos + 1;
|
||||||
mem_cnt_next <= 0;
|
mem_cnt_next <= 0;
|
||||||
abort_read <= '1';
|
|
||||||
end if;
|
end if;
|
||||||
else
|
else
|
||||||
mem_cnt_next <= mem_cnt + 1;
|
mem_cnt_next <= mem_cnt + 1;
|
||||||
@ -1869,6 +1882,7 @@ begin
|
|||||||
if (mem_valid_out = '1') then
|
if (mem_valid_out = '1') then
|
||||||
-- No Match
|
-- No Match
|
||||||
if (mem_read_data /= mem_endpoint_latch_data.guid(2)) then
|
if (mem_read_data /= mem_endpoint_latch_data.guid(2)) then
|
||||||
|
abort_read <= '1';
|
||||||
-- Reached End of Memory, No Match
|
-- Reached End of Memory, No Match
|
||||||
if (mem_addr_base = max_endpoint_addr) then
|
if (mem_addr_base = max_endpoint_addr) then
|
||||||
mem_addr_base_next <= ENDPOINT_MEMORY_MAX_ADDRESS; --No match
|
mem_addr_base_next <= ENDPOINT_MEMORY_MAX_ADDRESS; --No match
|
||||||
@ -1879,11 +1893,9 @@ begin
|
|||||||
mem_addr_base_next <= mem_addr_base + ENDPOINT_FRAME_SIZE;
|
mem_addr_base_next <= mem_addr_base + ENDPOINT_FRAME_SIZE;
|
||||||
mem_pos_next <= mem_pos + 1;
|
mem_pos_next <= mem_pos + 1;
|
||||||
mem_cnt_next <= 0;
|
mem_cnt_next <= 0;
|
||||||
abort_read <= '1';
|
|
||||||
end if;
|
end if;
|
||||||
-- Match
|
-- Match
|
||||||
else
|
else
|
||||||
mem_addr_base_next <= mem_addr_base;
|
|
||||||
-- Fetch Endpoint Data
|
-- Fetch Endpoint Data
|
||||||
mem_stage_next <= GET_ENDPOINT_DATA;
|
mem_stage_next <= GET_ENDPOINT_DATA;
|
||||||
mem_endpoint_data_next <= ZERO_ENDPOINT_DATA;
|
mem_endpoint_data_next <= ZERO_ENDPOINT_DATA;
|
||||||
@ -1891,15 +1903,15 @@ begin
|
|||||||
mem_cnt_next <= 0;
|
mem_cnt_next <= 0;
|
||||||
elsif check_mask(mem_endpoint_latch_data.field_flag,EMF_GUIDPREFIX_FLAG) then
|
elsif check_mask(mem_endpoint_latch_data.field_flag,EMF_GUIDPREFIX_FLAG) then
|
||||||
mem_cnt_next <= 1;
|
mem_cnt_next <= 1;
|
||||||
elsif (RELIABILTY_QOS /= RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_IPV4_ADDR_FLAG)) then
|
elsif (RELIABILTY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_IPV4_ADDR_FLAG)) then
|
||||||
mem_cnt_next <= 4;
|
mem_cnt_next <= 4;
|
||||||
elsif (RELIABILTY_QOS /= RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_UDP_PORT_FLAG)) then
|
elsif (RELIABILTY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_UDP_PORT_FLAG)) then
|
||||||
mem_cnt_next <= 5;
|
mem_cnt_next <= 5;
|
||||||
elsif check_mask(mem_endpoint_latch_data.field_flag,EMF_NEXT_SEQ_NR_FLAG) then
|
elsif check_mask(mem_endpoint_latch_data.field_flag,EMF_NEXT_SEQ_NR_FLAG) then
|
||||||
mem_cnt_next <= 6;
|
mem_cnt_next <= 6;
|
||||||
elsif check_mask(mem_endpoint_latch_data.field_flag,EMF_LEASE_DEADLINE_FLAG) then
|
elsif check_mask(mem_endpoint_latch_data.field_flag,EMF_LEASE_DEADLINE_FLAG) then
|
||||||
mem_cnt_next <= 8;
|
mem_cnt_next <= 8;
|
||||||
elsif (RELIABILTY_QOS /= RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_RES_TIME_FLAG)) then
|
elsif (RELIABILTY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_RES_TIME_FLAG)) then
|
||||||
mem_cnt_next <= 10;
|
mem_cnt_next <= 10;
|
||||||
else
|
else
|
||||||
-- DONE
|
-- DONE
|
||||||
@ -1922,15 +1934,15 @@ begin
|
|||||||
if (mem_ready_in = '1') then
|
if (mem_ready_in = '1') then
|
||||||
if check_mask(mem_endpoint_latch_data.field_flag,EMF_GUIDPREFIX_FLAG) then
|
if check_mask(mem_endpoint_latch_data.field_flag,EMF_GUIDPREFIX_FLAG) then
|
||||||
mem_cnt_next <= 1;
|
mem_cnt_next <= 1;
|
||||||
elsif (RELIABILTY_QOS /= RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_IPV4_ADDR_FLAG)) then
|
elsif (RELIABILTY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_IPV4_ADDR_FLAG)) then
|
||||||
mem_cnt_next <= 4;
|
mem_cnt_next <= 4;
|
||||||
elsif (RELIABILTY_QOS /= RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_UDP_PORT_FLAG)) then
|
elsif (RELIABILTY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_UDP_PORT_FLAG)) then
|
||||||
mem_cnt_next <= 5;
|
mem_cnt_next <= 5;
|
||||||
elsif check_mask(mem_endpoint_latch_data.field_flag,EMF_NEXT_SEQ_NR_FLAG) then
|
elsif check_mask(mem_endpoint_latch_data.field_flag,EMF_NEXT_SEQ_NR_FLAG) then
|
||||||
mem_cnt_next <= 6;
|
mem_cnt_next <= 6;
|
||||||
elsif check_mask(mem_endpoint_latch_data.field_flag,EMF_LEASE_DEADLINE_FLAG) then
|
elsif check_mask(mem_endpoint_latch_data.field_flag,EMF_LEASE_DEADLINE_FLAG) then
|
||||||
mem_cnt_next <= 8;
|
mem_cnt_next <= 8;
|
||||||
elsif (RELIABILTY_QOS /= RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_RES_TIME_FLAG)) then
|
elsif (RELIABILTY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_RES_TIME_FLAG)) then
|
||||||
mem_cnt_next <= 10;
|
mem_cnt_next <= 10;
|
||||||
else
|
else
|
||||||
mem_cnt_next <= 12;
|
mem_cnt_next <= 12;
|
||||||
@ -1961,15 +1973,15 @@ begin
|
|||||||
mem_read <= '1';
|
mem_read <= '1';
|
||||||
-- Memory Flow Control Guard
|
-- Memory Flow Control Guard
|
||||||
if (mem_ready_in = '1') then
|
if (mem_ready_in = '1') then
|
||||||
if (RELIABILTY_QOS /= RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_IPV4_ADDR_FLAG)) then
|
if (RELIABILTY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_IPV4_ADDR_FLAG)) then
|
||||||
mem_cnt_next <= 4;
|
mem_cnt_next <= 4;
|
||||||
elsif (RELIABILTY_QOS /= RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_UDP_PORT_FLAG)) then
|
elsif (RELIABILTY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_UDP_PORT_FLAG)) then
|
||||||
mem_cnt_next <= 5;
|
mem_cnt_next <= 5;
|
||||||
elsif check_mask(mem_endpoint_latch_data.field_flag,EMF_NEXT_SEQ_NR_FLAG) then
|
elsif check_mask(mem_endpoint_latch_data.field_flag,EMF_NEXT_SEQ_NR_FLAG) then
|
||||||
mem_cnt_next <= 6;
|
mem_cnt_next <= 6;
|
||||||
elsif check_mask(mem_endpoint_latch_data.field_flag,EMF_LEASE_DEADLINE_FLAG) then
|
elsif check_mask(mem_endpoint_latch_data.field_flag,EMF_LEASE_DEADLINE_FLAG) then
|
||||||
mem_cnt_next <= 8;
|
mem_cnt_next <= 8;
|
||||||
elsif (RELIABILTY_QOS /= RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_RES_TIME_FLAG)) then
|
elsif (RELIABILTY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_RES_TIME_FLAG)) then
|
||||||
mem_cnt_next <= 10;
|
mem_cnt_next <= 10;
|
||||||
else
|
else
|
||||||
if check_mask(mem_endpoint_latch_data.field_flag,EMF_ENTITYID_FLAG) then
|
if check_mask(mem_endpoint_latch_data.field_flag,EMF_ENTITYID_FLAG) then
|
||||||
@ -1988,13 +2000,13 @@ begin
|
|||||||
mem_read <= '1';
|
mem_read <= '1';
|
||||||
-- Memory Flow Control Guard
|
-- Memory Flow Control Guard
|
||||||
if (mem_ready_in = '1') then
|
if (mem_ready_in = '1') then
|
||||||
if (RELIABILTY_QOS /= RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_UDP_PORT_FLAG)) then
|
if (RELIABILTY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_UDP_PORT_FLAG)) then
|
||||||
mem_cnt_next <= 5;
|
mem_cnt_next <= 5;
|
||||||
elsif check_mask(mem_endpoint_latch_data.field_flag,EMF_NEXT_SEQ_NR_FLAG) then
|
elsif check_mask(mem_endpoint_latch_data.field_flag,EMF_NEXT_SEQ_NR_FLAG) then
|
||||||
mem_cnt_next <= 6;
|
mem_cnt_next <= 6;
|
||||||
elsif check_mask(mem_endpoint_latch_data.field_flag,EMF_LEASE_DEADLINE_FLAG) then
|
elsif check_mask(mem_endpoint_latch_data.field_flag,EMF_LEASE_DEADLINE_FLAG) then
|
||||||
mem_cnt_next <= 8;
|
mem_cnt_next <= 8;
|
||||||
elsif ((RELIABILTY_QOS /= RELIABLE_RELIABILITY_QOS) and check_mask(mem_endpoint_latch_data.field_flag,EMF_RES_TIME_FLAG)) then
|
elsif ((RELIABILTY_QOS = RELIABLE_RELIABILITY_QOS) and check_mask(mem_endpoint_latch_data.field_flag,EMF_RES_TIME_FLAG)) then
|
||||||
mem_cnt_next <= 10;
|
mem_cnt_next <= 10;
|
||||||
else
|
else
|
||||||
if check_mask(mem_endpoint_latch_data.field_flag,EMF_ENTITYID_FLAG) then
|
if check_mask(mem_endpoint_latch_data.field_flag,EMF_ENTITYID_FLAG) then
|
||||||
@ -2020,14 +2032,14 @@ begin
|
|||||||
mem_cnt_next <= 6;
|
mem_cnt_next <= 6;
|
||||||
elsif check_mask(mem_endpoint_latch_data.field_flag,EMF_LEASE_DEADLINE_FLAG) then
|
elsif check_mask(mem_endpoint_latch_data.field_flag,EMF_LEASE_DEADLINE_FLAG) then
|
||||||
mem_cnt_next <= 8;
|
mem_cnt_next <= 8;
|
||||||
elsif (RELIABILTY_QOS /= RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_RES_TIME_FLAG)) then
|
elsif (RELIABILTY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_RES_TIME_FLAG)) then
|
||||||
mem_cnt_next <= 10;
|
mem_cnt_next <= 10;
|
||||||
else
|
else
|
||||||
if check_mask(mem_endpoint_latch_data.field_flag,EMF_ENTITYID_FLAG) then
|
if check_mask(mem_endpoint_latch_data.field_flag,EMF_ENTITYID_FLAG) then
|
||||||
mem_cnt_next <= 12;
|
mem_cnt_next <= 12;
|
||||||
elsif check_mask(mem_endpoint_latch_data.field_flag,EMF_GUIDPREFIX_FLAG) then
|
elsif check_mask(mem_endpoint_latch_data.field_flag,EMF_GUIDPREFIX_FLAG) then
|
||||||
mem_cnt_next <= 13;
|
mem_cnt_next <= 13;
|
||||||
elsif (RELIABILTY_QOS /= RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_IPV4_ADDR_FLAG)) then
|
elsif (RELIABILTY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_IPV4_ADDR_FLAG)) then
|
||||||
mem_cnt_next <= 16;
|
mem_cnt_next <= 16;
|
||||||
else
|
else
|
||||||
mem_cnt_next <= 17;
|
mem_cnt_next <= 17;
|
||||||
@ -2053,16 +2065,16 @@ begin
|
|||||||
if (mem_ready_in = '1') then
|
if (mem_ready_in = '1') then
|
||||||
if check_mask(mem_endpoint_latch_data.field_flag,EMF_LEASE_DEADLINE_FLAG) then
|
if check_mask(mem_endpoint_latch_data.field_flag,EMF_LEASE_DEADLINE_FLAG) then
|
||||||
mem_cnt_next <= 8;
|
mem_cnt_next <= 8;
|
||||||
elsif (RELIABILTY_QOS /= RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_RES_TIME_FLAG)) then
|
elsif (RELIABILTY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_RES_TIME_FLAG)) then
|
||||||
mem_cnt_next <= 10;
|
mem_cnt_next <= 10;
|
||||||
else
|
else
|
||||||
if check_mask(mem_endpoint_latch_data.field_flag,EMF_ENTITYID_FLAG) then
|
if check_mask(mem_endpoint_latch_data.field_flag,EMF_ENTITYID_FLAG) then
|
||||||
mem_cnt_next <= 12;
|
mem_cnt_next <= 12;
|
||||||
elsif check_mask(mem_endpoint_latch_data.field_flag,EMF_GUIDPREFIX_FLAG) then
|
elsif check_mask(mem_endpoint_latch_data.field_flag,EMF_GUIDPREFIX_FLAG) then
|
||||||
mem_cnt_next <= 13;
|
mem_cnt_next <= 13;
|
||||||
elsif (RELIABILTY_QOS /= RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_IPV4_ADDR_FLAG)) then
|
elsif (RELIABILTY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_IPV4_ADDR_FLAG)) then
|
||||||
mem_cnt_next <= 16;
|
mem_cnt_next <= 16;
|
||||||
elsif (RELIABILTY_QOS /= RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_UDP_PORT_FLAG)) then
|
elsif (RELIABILTY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_UDP_PORT_FLAG)) then
|
||||||
mem_cnt_next <= 17;
|
mem_cnt_next <= 17;
|
||||||
else
|
else
|
||||||
mem_cnt_next <= 18;
|
mem_cnt_next <= 18;
|
||||||
@ -2085,16 +2097,16 @@ begin
|
|||||||
mem_read <= '1';
|
mem_read <= '1';
|
||||||
-- Memory Flow Control Guard
|
-- Memory Flow Control Guard
|
||||||
if (mem_ready_in = '1') then
|
if (mem_ready_in = '1') then
|
||||||
if (RELIABILTY_QOS /= RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_RES_TIME_FLAG)) then
|
if (RELIABILTY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_RES_TIME_FLAG)) then
|
||||||
mem_cnt_next <= 10;
|
mem_cnt_next <= 10;
|
||||||
else
|
else
|
||||||
if check_mask(mem_endpoint_latch_data.field_flag,EMF_ENTITYID_FLAG) then
|
if check_mask(mem_endpoint_latch_data.field_flag,EMF_ENTITYID_FLAG) then
|
||||||
mem_cnt_next <= 12;
|
mem_cnt_next <= 12;
|
||||||
elsif check_mask(mem_endpoint_latch_data.field_flag,EMF_GUIDPREFIX_FLAG) then
|
elsif check_mask(mem_endpoint_latch_data.field_flag,EMF_GUIDPREFIX_FLAG) then
|
||||||
mem_cnt_next <= 13;
|
mem_cnt_next <= 13;
|
||||||
elsif (RELIABILTY_QOS /= RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_IPV4_ADDR_FLAG)) then
|
elsif (RELIABILTY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_IPV4_ADDR_FLAG)) then
|
||||||
mem_cnt_next <= 16;
|
mem_cnt_next <= 16;
|
||||||
elsif (RELIABILTY_QOS /= RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_UDP_PORT_FLAG)) then
|
elsif (RELIABILTY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_UDP_PORT_FLAG)) then
|
||||||
mem_cnt_next <= 17;
|
mem_cnt_next <= 17;
|
||||||
elsif check_mask(mem_endpoint_latch_data.field_flag,EMF_NEXT_SEQ_NR_FLAG) then
|
elsif check_mask(mem_endpoint_latch_data.field_flag,EMF_NEXT_SEQ_NR_FLAG) then
|
||||||
mem_cnt_next <= 18;
|
mem_cnt_next <= 18;
|
||||||
@ -2128,9 +2140,9 @@ begin
|
|||||||
mem_cnt_next <= 12;
|
mem_cnt_next <= 12;
|
||||||
elsif check_mask(mem_endpoint_latch_data.field_flag,EMF_GUIDPREFIX_FLAG) then
|
elsif check_mask(mem_endpoint_latch_data.field_flag,EMF_GUIDPREFIX_FLAG) then
|
||||||
mem_cnt_next <= 13;
|
mem_cnt_next <= 13;
|
||||||
elsif (RELIABILTY_QOS /= RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_IPV4_ADDR_FLAG)) then
|
elsif (RELIABILTY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_IPV4_ADDR_FLAG)) then
|
||||||
mem_cnt_next <= 16;
|
mem_cnt_next <= 16;
|
||||||
elsif (RELIABILTY_QOS /= RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_UDP_PORT_FLAG)) then
|
elsif (RELIABILTY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_UDP_PORT_FLAG)) then
|
||||||
mem_cnt_next <= 17;
|
mem_cnt_next <= 17;
|
||||||
elsif check_mask(mem_endpoint_latch_data.field_flag,EMF_NEXT_SEQ_NR_FLAG) then
|
elsif check_mask(mem_endpoint_latch_data.field_flag,EMF_NEXT_SEQ_NR_FLAG) then
|
||||||
mem_cnt_next <= 18;
|
mem_cnt_next <= 18;
|
||||||
@ -2150,15 +2162,15 @@ begin
|
|||||||
|
|
||||||
if check_mask(mem_endpoint_latch_data.field_flag,EMF_GUIDPREFIX_FLAG) then
|
if check_mask(mem_endpoint_latch_data.field_flag,EMF_GUIDPREFIX_FLAG) then
|
||||||
mem_cnt_next <= 13;
|
mem_cnt_next <= 13;
|
||||||
elsif (RELIABILTY_QOS /= RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_IPV4_ADDR_FLAG)) then
|
elsif (RELIABILTY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_IPV4_ADDR_FLAG)) then
|
||||||
mem_cnt_next <= 16;
|
mem_cnt_next <= 16;
|
||||||
elsif (RELIABILTY_QOS /= RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_UDP_PORT_FLAG)) then
|
elsif (RELIABILTY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_UDP_PORT_FLAG)) then
|
||||||
mem_cnt_next <= 17;
|
mem_cnt_next <= 17;
|
||||||
elsif check_mask(mem_endpoint_latch_data.field_flag,EMF_NEXT_SEQ_NR_FLAG) then
|
elsif check_mask(mem_endpoint_latch_data.field_flag,EMF_NEXT_SEQ_NR_FLAG) then
|
||||||
mem_cnt_next <= 18;
|
mem_cnt_next <= 18;
|
||||||
elsif check_mask(mem_endpoint_latch_data.field_flag,EMF_LEASE_DEADLINE_FLAG) then
|
elsif check_mask(mem_endpoint_latch_data.field_flag,EMF_LEASE_DEADLINE_FLAG) then
|
||||||
mem_cnt_next <= 20;
|
mem_cnt_next <= 20;
|
||||||
elsif (RELIABILTY_QOS /= RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_RES_TIME_FLAG)) then
|
elsif (RELIABILTY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_RES_TIME_FLAG)) then
|
||||||
mem_cnt_next <= 22;
|
mem_cnt_next <= 22;
|
||||||
else
|
else
|
||||||
-- DONE
|
-- DONE
|
||||||
@ -2190,15 +2202,15 @@ begin
|
|||||||
if (mem_valid_out = '1') then
|
if (mem_valid_out = '1') then
|
||||||
mem_endpoint_data_next.guid(2) <= mem_read_data;
|
mem_endpoint_data_next.guid(2) <= mem_read_data;
|
||||||
|
|
||||||
if (RELIABILTY_QOS /= RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_IPV4_ADDR_FLAG)) then
|
if (RELIABILTY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_IPV4_ADDR_FLAG)) then
|
||||||
mem_cnt_next <= 16;
|
mem_cnt_next <= 16;
|
||||||
elsif (RELIABILTY_QOS /= RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_UDP_PORT_FLAG)) then
|
elsif (RELIABILTY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_UDP_PORT_FLAG)) then
|
||||||
mem_cnt_next <= 17;
|
mem_cnt_next <= 17;
|
||||||
elsif check_mask(mem_endpoint_latch_data.field_flag,EMF_NEXT_SEQ_NR_FLAG) then
|
elsif check_mask(mem_endpoint_latch_data.field_flag,EMF_NEXT_SEQ_NR_FLAG) then
|
||||||
mem_cnt_next <= 18;
|
mem_cnt_next <= 18;
|
||||||
elsif check_mask(mem_endpoint_latch_data.field_flag,EMF_LEASE_DEADLINE_FLAG) then
|
elsif check_mask(mem_endpoint_latch_data.field_flag,EMF_LEASE_DEADLINE_FLAG) then
|
||||||
mem_cnt_next <= 20;
|
mem_cnt_next <= 20;
|
||||||
elsif (RELIABILTY_QOS /= RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_RES_TIME_FLAG)) then
|
elsif (RELIABILTY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_RES_TIME_FLAG)) then
|
||||||
mem_cnt_next <= 22;
|
mem_cnt_next <= 22;
|
||||||
else
|
else
|
||||||
-- DONE
|
-- DONE
|
||||||
@ -2214,13 +2226,13 @@ begin
|
|||||||
if (mem_valid_out = '1') then
|
if (mem_valid_out = '1') then
|
||||||
mem_endpoint_data_next.addr <= mem_read_data;
|
mem_endpoint_data_next.addr <= mem_read_data;
|
||||||
|
|
||||||
if (RELIABILTY_QOS /= RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_UDP_PORT_FLAG)) then
|
if (RELIABILTY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_UDP_PORT_FLAG)) then
|
||||||
mem_cnt_next <= 17;
|
mem_cnt_next <= 17;
|
||||||
elsif check_mask(mem_endpoint_latch_data.field_flag,EMF_NEXT_SEQ_NR_FLAG) then
|
elsif check_mask(mem_endpoint_latch_data.field_flag,EMF_NEXT_SEQ_NR_FLAG) then
|
||||||
mem_cnt_next <= 18;
|
mem_cnt_next <= 18;
|
||||||
elsif check_mask(mem_endpoint_latch_data.field_flag,EMF_LEASE_DEADLINE_FLAG) then
|
elsif check_mask(mem_endpoint_latch_data.field_flag,EMF_LEASE_DEADLINE_FLAG) then
|
||||||
mem_cnt_next <= 20;
|
mem_cnt_next <= 20;
|
||||||
elsif (RELIABILTY_QOS /= RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_RES_TIME_FLAG)) then
|
elsif (RELIABILTY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_RES_TIME_FLAG)) then
|
||||||
mem_cnt_next <= 22;
|
mem_cnt_next <= 22;
|
||||||
else
|
else
|
||||||
-- DONE
|
-- DONE
|
||||||
@ -2241,7 +2253,7 @@ begin
|
|||||||
mem_cnt_next <= 18;
|
mem_cnt_next <= 18;
|
||||||
elsif check_mask(mem_endpoint_latch_data.field_flag,EMF_LEASE_DEADLINE_FLAG) then
|
elsif check_mask(mem_endpoint_latch_data.field_flag,EMF_LEASE_DEADLINE_FLAG) then
|
||||||
mem_cnt_next <= 20;
|
mem_cnt_next <= 20;
|
||||||
elsif (RELIABILTY_QOS /= RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_RES_TIME_FLAG)) then
|
elsif (RELIABILTY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_RES_TIME_FLAG)) then
|
||||||
mem_cnt_next <= 22;
|
mem_cnt_next <= 22;
|
||||||
else
|
else
|
||||||
-- DONE
|
-- DONE
|
||||||
@ -2267,7 +2279,7 @@ begin
|
|||||||
|
|
||||||
if check_mask(mem_endpoint_latch_data.field_flag,EMF_LEASE_DEADLINE_FLAG) then
|
if check_mask(mem_endpoint_latch_data.field_flag,EMF_LEASE_DEADLINE_FLAG) then
|
||||||
mem_cnt_next <= 20;
|
mem_cnt_next <= 20;
|
||||||
elsif (RELIABILTY_QOS /= RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_RES_TIME_FLAG)) then
|
elsif (RELIABILTY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_RES_TIME_FLAG)) then
|
||||||
mem_cnt_next <= 22;
|
mem_cnt_next <= 22;
|
||||||
else
|
else
|
||||||
-- DONE
|
-- DONE
|
||||||
@ -2290,7 +2302,7 @@ begin
|
|||||||
if (mem_valid_out = '1') then
|
if (mem_valid_out = '1') then
|
||||||
mem_endpoint_data_next.lease_deadline(1) <= unsigned(mem_read_data);
|
mem_endpoint_data_next.lease_deadline(1) <= unsigned(mem_read_data);
|
||||||
|
|
||||||
if (RELIABILTY_QOS /= RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_RES_TIME_FLAG)) then
|
if (RELIABILTY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_RES_TIME_FLAG)) then
|
||||||
mem_cnt_next <= 22;
|
mem_cnt_next <= 22;
|
||||||
else
|
else
|
||||||
-- DONE
|
-- DONE
|
||||||
@ -2456,13 +2468,13 @@ begin
|
|||||||
mem_endpoint_data.addr <= mem_endpoint_latch_data.addr;
|
mem_endpoint_data.addr <= mem_endpoint_latch_data.addr;
|
||||||
-- Memory Flow Control Guard
|
-- Memory Flow Control Guard
|
||||||
if (mem_ready_in = '1') then
|
if (mem_ready_in = '1') then
|
||||||
if (RELIABILTY_QOS /= RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_UDP_PORT_FLAG)) then
|
if (RELIABILTY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_UDP_PORT_FLAG)) then
|
||||||
mem_cnt_next <= 1;
|
mem_cnt_next <= 1;
|
||||||
elsif check_mask(mem_endpoint_latch_data.field_flag,EMF_NEXT_SEQ_NR_FLAG) then
|
elsif check_mask(mem_endpoint_latch_data.field_flag,EMF_NEXT_SEQ_NR_FLAG) then
|
||||||
mem_cnt_next <= 2;
|
mem_cnt_next <= 2;
|
||||||
elsif check_mask(mem_endpoint_latch_data.field_flag,EMF_LEASE_DEADLINE_FLAG) then
|
elsif check_mask(mem_endpoint_latch_data.field_flag,EMF_LEASE_DEADLINE_FLAG) then
|
||||||
mem_cnt_next <= 4;
|
mem_cnt_next <= 4;
|
||||||
elsif (RELIABILTY_QOS /= RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_RES_TIME_FLAG)) then
|
elsif (RELIABILTY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_RES_TIME_FLAG)) then
|
||||||
mem_cnt_next <= 6;
|
mem_cnt_next <= 6;
|
||||||
else
|
else
|
||||||
-- DONE
|
-- DONE
|
||||||
@ -2484,7 +2496,7 @@ begin
|
|||||||
mem_cnt_next <= 2;
|
mem_cnt_next <= 2;
|
||||||
elsif check_mask(mem_endpoint_latch_data.field_flag,EMF_LEASE_DEADLINE_FLAG) then
|
elsif check_mask(mem_endpoint_latch_data.field_flag,EMF_LEASE_DEADLINE_FLAG) then
|
||||||
mem_cnt_next <= 4;
|
mem_cnt_next <= 4;
|
||||||
elsif (RELIABILTY_QOS /= RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_RES_TIME_FLAG)) then
|
elsif (RELIABILTY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_RES_TIME_FLAG)) then
|
||||||
mem_cnt_next <= 6;
|
mem_cnt_next <= 6;
|
||||||
else
|
else
|
||||||
-- DONE
|
-- DONE
|
||||||
@ -2511,7 +2523,7 @@ begin
|
|||||||
if (mem_ready_in = '1') then
|
if (mem_ready_in = '1') then
|
||||||
if check_mask(mem_endpoint_latch_data.field_flag,EMF_LEASE_DEADLINE_FLAG) then
|
if check_mask(mem_endpoint_latch_data.field_flag,EMF_LEASE_DEADLINE_FLAG) then
|
||||||
mem_cnt_next <= 4;
|
mem_cnt_next <= 4;
|
||||||
elsif (RELIABILTY_QOS /= RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_RES_TIME_FLAG)) then
|
elsif (RELIABILTY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_RES_TIME_FLAG)) then
|
||||||
mem_cnt_next <= 6;
|
mem_cnt_next <= 6;
|
||||||
else
|
else
|
||||||
-- DONE
|
-- DONE
|
||||||
@ -2535,7 +2547,7 @@ begin
|
|||||||
mem_endpoint_data.lease_deadline <= mem_endpoint_latch_data.lease_deadline;
|
mem_endpoint_data.lease_deadline <= mem_endpoint_latch_data.lease_deadline;
|
||||||
-- Memory Flow Control Guard
|
-- Memory Flow Control Guard
|
||||||
if (mem_ready_in = '1') then
|
if (mem_ready_in = '1') then
|
||||||
if (RELIABILTY_QOS /= RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_RES_TIME_FLAG)) then
|
if (RELIABILTY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_RES_TIME_FLAG)) then
|
||||||
mem_cnt_next <= 6;
|
mem_cnt_next <= 6;
|
||||||
else
|
else
|
||||||
-- DONE
|
-- DONE
|
||||||
@ -2675,7 +2687,6 @@ begin
|
|||||||
last_addr_next <= mem_addr_base;
|
last_addr_next <= mem_addr_base;
|
||||||
-- Continue Search
|
-- Continue Search
|
||||||
mem_addr_base_next <= mem_addr_base + ENDPOINT_FRAME_SIZE;
|
mem_addr_base_next <= mem_addr_base + ENDPOINT_FRAME_SIZE;
|
||||||
mem_pos_next <= mem_pos + 1;
|
|
||||||
mem_cnt_next <= 0;
|
mem_cnt_next <= 0;
|
||||||
end if;
|
end if;
|
||||||
-- Slot Empty
|
-- Slot Empty
|
||||||
@ -2691,7 +2702,6 @@ begin
|
|||||||
else
|
else
|
||||||
-- Continue Search
|
-- Continue Search
|
||||||
mem_addr_base_next <= mem_addr_base + ENDPOINT_FRAME_SIZE;
|
mem_addr_base_next <= mem_addr_base + ENDPOINT_FRAME_SIZE;
|
||||||
mem_pos_next <= mem_pos + 1;
|
|
||||||
mem_cnt_next <= 0;
|
mem_cnt_next <= 0;
|
||||||
end if;
|
end if;
|
||||||
end if;
|
end if;
|
||||||
@ -2726,15 +2736,15 @@ begin
|
|||||||
mem_cnt_next <= 0;
|
mem_cnt_next <= 0;
|
||||||
elsif check_mask(mem_endpoint_latch_data.field_flag,EMF_GUIDPREFIX_FLAG) then
|
elsif check_mask(mem_endpoint_latch_data.field_flag,EMF_GUIDPREFIX_FLAG) then
|
||||||
mem_cnt_next <= 1;
|
mem_cnt_next <= 1;
|
||||||
elsif (RELIABILTY_QOS /= RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_IPV4_ADDR_FLAG)) then
|
elsif (RELIABILTY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_IPV4_ADDR_FLAG)) then
|
||||||
mem_cnt_next <= 4;
|
mem_cnt_next <= 4;
|
||||||
elsif (RELIABILTY_QOS /= RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_UDP_PORT_FLAG)) then
|
elsif (RELIABILTY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_UDP_PORT_FLAG)) then
|
||||||
mem_cnt_next <= 5;
|
mem_cnt_next <= 5;
|
||||||
elsif check_mask(mem_endpoint_latch_data.field_flag,EMF_NEXT_SEQ_NR_FLAG) then
|
elsif check_mask(mem_endpoint_latch_data.field_flag,EMF_NEXT_SEQ_NR_FLAG) then
|
||||||
mem_cnt_next <= 6;
|
mem_cnt_next <= 6;
|
||||||
elsif check_mask(mem_endpoint_latch_data.field_flag,EMF_LEASE_DEADLINE_FLAG) then
|
elsif check_mask(mem_endpoint_latch_data.field_flag,EMF_LEASE_DEADLINE_FLAG) then
|
||||||
mem_cnt_next <= 8;
|
mem_cnt_next <= 8;
|
||||||
elsif (RELIABILTY_QOS /= RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_RES_TIME_FLAG)) then
|
elsif (RELIABILTY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_RES_TIME_FLAG)) then
|
||||||
mem_cnt_next <= 10;
|
mem_cnt_next <= 10;
|
||||||
else
|
else
|
||||||
-- DONE
|
-- DONE
|
||||||
|
|||||||
@ -15,6 +15,8 @@ package rtps_test_package is
|
|||||||
constant RESULTS_FILE : string := "./Test_Results.txt";
|
constant RESULTS_FILE : string := "./Test_Results.txt";
|
||||||
|
|
||||||
constant PARTICIPANT_FRAME_SIZE : natural := 23;
|
constant PARTICIPANT_FRAME_SIZE : natural := 23;
|
||||||
|
constant WRITER_ENDPOINT_FRAME_SIZE_A : natural := 12;
|
||||||
|
constant WRITER_ENDPOINT_FRAME_SIZE_B : natural := 8;
|
||||||
|
|
||||||
constant DEFAULT_GUIDPREFIX : GUIDPREFIX_TYPE; -- Deferred to Package Body
|
constant DEFAULT_GUIDPREFIX : GUIDPREFIX_TYPE; -- Deferred to Package Body
|
||||||
constant DEFAULT_READER_ENTITYID : std_logic_vector(ENTITYID_WIDTH-1 downto 0); -- Deferred to Package Body
|
constant DEFAULT_READER_ENTITYID : std_logic_vector(ENTITYID_WIDTH-1 downto 0); -- Deferred to Package Body
|
||||||
@ -39,6 +41,8 @@ package rtps_test_package is
|
|||||||
type TEST_MEMORY_TYPE is array (natural range <>) of TEST_MEMORY_ELEMENT_TYPE;
|
type TEST_MEMORY_TYPE is array (natural range <>) of TEST_MEMORY_ELEMENT_TYPE;
|
||||||
|
|
||||||
subtype TEST_PARTICIPANT_MEMORY_FRAME_TYPE is TEST_MEMORY_TYPE(0 to PARTICIPANT_FRAME_SIZE-1);
|
subtype TEST_PARTICIPANT_MEMORY_FRAME_TYPE is TEST_MEMORY_TYPE(0 to PARTICIPANT_FRAME_SIZE-1);
|
||||||
|
subtype TEST_WRITER_ENDPOINT_MEMORY_FRAME_TYPE_A is TEST_MEMORY_TYPE(0 to WRITER_ENDPOINT_FRAME_SIZE_A-1);
|
||||||
|
subtype TEST_WRITER_ENDPOINT_MEMORY_FRAME_TYPE_B is TEST_MEMORY_TYPE(0 to WRITER_ENDPOINT_FRAME_SIZE_B-1);
|
||||||
|
|
||||||
constant LOCATOR_PORT_WIDTH : natural := CDR_LONG_WIDTH;
|
constant LOCATOR_PORT_WIDTH : natural := CDR_LONG_WIDTH;
|
||||||
constant LOCATOR_ADDR_WIDTH : natural := 4*CDR_LONG_WIDTH;
|
constant LOCATOR_ADDR_WIDTH : natural := 4*CDR_LONG_WIDTH;
|
||||||
@ -201,6 +205,7 @@ package rtps_test_package is
|
|||||||
multicastLocatorList : LOCATOR_LIST_TYPE;
|
multicastLocatorList : LOCATOR_LIST_TYPE;
|
||||||
max_size_serialized : std_logic_vector(CDR_LONG_WIDTH-1 downto 0);
|
max_size_serialized : std_logic_vector(CDR_LONG_WIDTH-1 downto 0);
|
||||||
match : MATCH_TYPE;
|
match : MATCH_TYPE;
|
||||||
|
nr : natural;
|
||||||
end record;
|
end record;
|
||||||
|
|
||||||
constant DEFAULT_ENDPOINT_DATA : ENDPOINT_DATA_TYPE; -- Deferred to Package Body
|
constant DEFAULT_ENDPOINT_DATA : ENDPOINT_DATA_TYPE; -- Deferred to Package Body
|
||||||
@ -222,6 +227,8 @@ package rtps_test_package is
|
|||||||
procedure gen_participant_data( ref : in PARTICIPANT_DATA_TYPE; output : inout TEST_PACKET_TYPE);
|
procedure gen_participant_data( ref : in PARTICIPANT_DATA_TYPE; output : inout TEST_PACKET_TYPE);
|
||||||
procedure gen_participant_data( ref : in PARTICIPANT_DATA_TYPE; output : inout TEST_PACKET_TYPE; pid : in std_logic_vector(PARAMETER_ID_WIDTH-1 downto 0); offset : in integer);
|
procedure gen_participant_data( ref : in PARTICIPANT_DATA_TYPE; output : inout TEST_PACKET_TYPE; pid : in std_logic_vector(PARAMETER_ID_WIDTH-1 downto 0); offset : in integer);
|
||||||
function gen_participant_mem_frame (ref : PARTICIPANT_DATA_TYPE) return TEST_PARTICIPANT_MEMORY_FRAME_TYPE;
|
function gen_participant_mem_frame (ref : PARTICIPANT_DATA_TYPE) return TEST_PARTICIPANT_MEMORY_FRAME_TYPE;
|
||||||
|
function gen_writer_endpoint_mem_frame_a (ref : ENDPOINT_DATA_TYPE) return TEST_WRITER_ENDPOINT_MEMORY_FRAME_TYPE_A;
|
||||||
|
function gen_writer_endpoint_mem_frame_b (ref : ENDPOINT_DATA_TYPE) return TEST_WRITER_ENDPOINT_MEMORY_FRAME_TYPE_B;
|
||||||
|
|
||||||
procedure gen_endpoint_data( ref : in ENDPOINT_DATA_TYPE; output : inout TEST_PACKET_TYPE);
|
procedure gen_endpoint_data( ref : in ENDPOINT_DATA_TYPE; output : inout TEST_PACKET_TYPE);
|
||||||
procedure gen_endpoint_data( ref : in ENDPOINT_DATA_TYPE; output : inout TEST_PACKET_TYPE; pid : in std_logic_vector(PARAMETER_ID_WIDTH-1 downto 0); offset : in integer);
|
procedure gen_endpoint_data( ref : in ENDPOINT_DATA_TYPE; output : inout TEST_PACKET_TYPE; pid : in std_logic_vector(PARAMETER_ID_WIDTH-1 downto 0); offset : in integer);
|
||||||
@ -474,7 +481,8 @@ package body rtps_test_package is
|
|||||||
unicastLocatorList => EMPTY_LOCATOR_LIST,
|
unicastLocatorList => EMPTY_LOCATOR_LIST,
|
||||||
multicastLocatorList => EMPTY_LOCATOR_LIST,
|
multicastLocatorList => EMPTY_LOCATOR_LIST,
|
||||||
max_size_serialized => (others => '0'),
|
max_size_serialized => (others => '0'),
|
||||||
match => MATCH
|
match => MATCH,
|
||||||
|
nr => 0
|
||||||
);
|
);
|
||||||
|
|
||||||
-- *PACKAGE INTERNAL HELPER FUNCTIONS*
|
-- *PACKAGE INTERNAL HELPER FUNCTIONS*
|
||||||
@ -1357,6 +1365,126 @@ package body rtps_test_package is
|
|||||||
return ret;
|
return ret;
|
||||||
end function;
|
end function;
|
||||||
|
|
||||||
|
function gen_writer_endpoint_mem_frame_a (ref : ENDPOINT_DATA_TYPE) return TEST_WRITER_ENDPOINT_MEMORY_FRAME_TYPE_A is
|
||||||
|
variable ret : TEST_WRITER_ENDPOINT_MEMORY_FRAME_TYPE_A;
|
||||||
|
variable start : natural;
|
||||||
|
variable user_loc : LOCATOR_TYPE;
|
||||||
|
begin
|
||||||
|
ret := (others => (addr => 0, data => (others => '0')));
|
||||||
|
|
||||||
|
-- Calculate Start Address
|
||||||
|
start := WRITER_ENDPOINT_FRAME_SIZE_A * ref.nr;
|
||||||
|
|
||||||
|
-- Fetch relevant Locators
|
||||||
|
user_loc := get_loc (ref);
|
||||||
|
|
||||||
|
for i in 0 to WRITER_ENDPOINT_FRAME_SIZE_A-1 loop
|
||||||
|
ret(i).addr := start + i;
|
||||||
|
case (i) is
|
||||||
|
-- Entity ID
|
||||||
|
when 0 =>
|
||||||
|
if (ref.match = MATCH) then
|
||||||
|
ret(i).data := ref.entityId;
|
||||||
|
else
|
||||||
|
ret(i).data := (others => '0');
|
||||||
|
end if;
|
||||||
|
-- GUID Prefix 1/3
|
||||||
|
when 1 =>
|
||||||
|
if (ref.match = MATCH) then
|
||||||
|
ret(i).data := ref.participant.guidPrefix(0);
|
||||||
|
else
|
||||||
|
ret(i).data := (others => '-');
|
||||||
|
end if;
|
||||||
|
-- GUID Prefix 2/3
|
||||||
|
when 2 =>
|
||||||
|
if (ref.match = MATCH) then
|
||||||
|
ret(i).data := ref.participant.guidPrefix(1);
|
||||||
|
else
|
||||||
|
ret(i).data := (others => '-');
|
||||||
|
end if;
|
||||||
|
-- GUID Prefix 3/3
|
||||||
|
when 3 =>
|
||||||
|
if (ref.match = MATCH) then
|
||||||
|
ret(i).data := ref.participant.guidPrefix(2);
|
||||||
|
else
|
||||||
|
ret(i).data := (others => '-');
|
||||||
|
end if;
|
||||||
|
-- IPv4 Address
|
||||||
|
when 4 =>
|
||||||
|
if (ref.match = MATCH) then
|
||||||
|
ret(i).data := user_loc.addr(IPv4_ADDRESS_WIDTH-1 downto 0);
|
||||||
|
else
|
||||||
|
ret(i).data := (others => '-');
|
||||||
|
end if;
|
||||||
|
-- UDP Port
|
||||||
|
when 5 =>
|
||||||
|
if (ref.match = MATCH) then
|
||||||
|
ret(i).data := user_loc.portn(UDP_PORT_WIDTH-1 downto 0) & (UDP_PORT_WIDTH-1 downto 0 => '0');
|
||||||
|
else
|
||||||
|
ret(i).data := (others => '-');
|
||||||
|
end if;
|
||||||
|
-- Other Fields Ignored
|
||||||
|
when others =>
|
||||||
|
ret(i).data := (others => '-');
|
||||||
|
end case;
|
||||||
|
end loop;
|
||||||
|
return ret;
|
||||||
|
end function;
|
||||||
|
|
||||||
|
|
||||||
|
function gen_writer_endpoint_mem_frame_b (ref : ENDPOINT_DATA_TYPE) return TEST_WRITER_ENDPOINT_MEMORY_FRAME_TYPE_B is
|
||||||
|
variable ret : TEST_WRITER_ENDPOINT_MEMORY_FRAME_TYPE_B;
|
||||||
|
variable start : natural;
|
||||||
|
variable user_loc : LOCATOR_TYPE;
|
||||||
|
begin
|
||||||
|
ret := (others => (addr => 0, data => (others => '0')));
|
||||||
|
|
||||||
|
-- Calculate Start Address
|
||||||
|
start := WRITER_ENDPOINT_FRAME_SIZE_B * ref.nr;
|
||||||
|
|
||||||
|
-- Fetch relevant Locators
|
||||||
|
user_loc := get_loc (ref);
|
||||||
|
|
||||||
|
for i in 0 to WRITER_ENDPOINT_FRAME_SIZE_B-1 loop
|
||||||
|
ret(i).addr := start + i;
|
||||||
|
case (i) is
|
||||||
|
-- Entity ID
|
||||||
|
when 0 =>
|
||||||
|
if (ref.match = MATCH) then
|
||||||
|
ret(i).data := ref.entityId;
|
||||||
|
else
|
||||||
|
ret(i).data := (others => '0');
|
||||||
|
end if;
|
||||||
|
-- GUID Prefix 1/3
|
||||||
|
when 1 =>
|
||||||
|
if (ref.match = MATCH) then
|
||||||
|
ret(i).data := ref.participant.guidPrefix(0);
|
||||||
|
else
|
||||||
|
ret(i).data := (others => '-');
|
||||||
|
end if;
|
||||||
|
-- GUID Prefix 2/3
|
||||||
|
when 2 =>
|
||||||
|
if (ref.match = MATCH) then
|
||||||
|
ret(i).data := ref.participant.guidPrefix(1);
|
||||||
|
else
|
||||||
|
ret(i).data := (others => '-');
|
||||||
|
end if;
|
||||||
|
-- GUID Prefix 3/3
|
||||||
|
when 3 =>
|
||||||
|
if (ref.match = MATCH) then
|
||||||
|
ret(i).data := ref.participant.guidPrefix(2);
|
||||||
|
else
|
||||||
|
ret(i).data := (others => '-');
|
||||||
|
end if;
|
||||||
|
-- Other Fields Ignored
|
||||||
|
when others =>
|
||||||
|
ret(i).data := (others => '-');
|
||||||
|
end case;
|
||||||
|
end loop;
|
||||||
|
return ret;
|
||||||
|
end function;
|
||||||
|
|
||||||
|
|
||||||
procedure gen_participant_match_frame( ref : in PARTICIPANT_DATA_TYPE; output : inout TEST_PACKET_TYPE) is
|
procedure gen_participant_match_frame( ref : in PARTICIPANT_DATA_TYPE; output : inout TEST_PACKET_TYPE) is
|
||||||
begin
|
begin
|
||||||
-- OPCODE
|
-- OPCODE
|
||||||
@ -1936,6 +2064,7 @@ package body rtps_test_package is
|
|||||||
ret_readers(i).expectsInlineQoS(0) := '1';
|
ret_readers(i).expectsInlineQoS(0) := '1';
|
||||||
ret_readers(i).participant := THIS_PARTICIPANT_DATA;
|
ret_readers(i).participant := THIS_PARTICIPANT_DATA;
|
||||||
ret_readers(i).entityId := ENTITYID(i);
|
ret_readers(i).entityId := ENTITYID(i);
|
||||||
|
ret_readers(i).nr := i;
|
||||||
end loop;
|
end loop;
|
||||||
return ret_readers;
|
return ret_readers;
|
||||||
else
|
else
|
||||||
@ -1967,6 +2096,7 @@ package body rtps_test_package is
|
|||||||
ret_writers(i-NUM_READERS).destination_order := ENDPOINT_DESTINATION_ORDER_QOS(i);
|
ret_writers(i-NUM_READERS).destination_order := ENDPOINT_DESTINATION_ORDER_QOS(i);
|
||||||
ret_writers(i-NUM_READERS).participant := THIS_PARTICIPANT_DATA;
|
ret_writers(i-NUM_READERS).participant := THIS_PARTICIPANT_DATA;
|
||||||
ret_writers(i-NUM_READERS).entityId := ENTITYID(i);
|
ret_writers(i-NUM_READERS).entityId := ENTITYID(i);
|
||||||
|
ret_readers(i-NUM_READERS).nr := i;
|
||||||
end loop;
|
end loop;
|
||||||
return ret_writers;
|
return ret_writers;
|
||||||
end if;
|
end if;
|
||||||
|
|||||||
Loading…
Reference in New Issue
Block a user