Add Test4 of RTPS Writer
Test remote Reader Liveliness handling of RTPS Writer. Backport fix to RTPS Reader. Compiling and Passing
This commit is contained in:
parent
09e74e9ddb
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69
sim/L0_rtps_writer_test2_vrkdp.do
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69
sim/L0_rtps_writer_test2_vrkdp.do
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@ -0,0 +1,69 @@
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onerror {resume}
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quietly WaveActivateNextPane {} 0
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add wave -noupdate -divider SYSTEM
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add wave -noupdate /l0_rtps_writer_test2_vrkdp/uut/clk
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add wave -noupdate /l0_rtps_writer_test2_vrkdp/uut/reset
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add wave -noupdate -radix unsigned /l0_rtps_writer_test2_vrkdp/uut/time
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add wave -noupdate -radix unsigned /l0_rtps_writer_test2_vrkdp/uut/check_time
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add wave -noupdate -divider INPUT
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add wave -noupdate -expand -group META /l0_rtps_writer_test2_vrkdp/uut/empty_meta
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add wave -noupdate -expand -group META /l0_rtps_writer_test2_vrkdp/uut/rd_meta
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add wave -noupdate -expand -group META /l0_rtps_writer_test2_vrkdp/uut/last_word_in_meta
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add wave -noupdate -expand -group META -radix hexadecimal /l0_rtps_writer_test2_vrkdp/uut/data_in_meta
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add wave -noupdate -group USER /l0_rtps_writer_test2_vrkdp/uut/empty_user
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add wave -noupdate -group USER /l0_rtps_writer_test2_vrkdp/uut/rd_user
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add wave -noupdate -group USER -radix hexadecimal /l0_rtps_writer_test2_vrkdp/uut/data_in_user
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add wave -noupdate -group USER /l0_rtps_writer_test2_vrkdp/uut/last_word_in_user
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add wave -noupdate -divider {MAIN FSM}
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add wave -noupdate /l0_rtps_writer_test2_vrkdp/uut/stage
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add wave -noupdate /l0_rtps_writer_test2_vrkdp/uut/stage_next
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add wave -noupdate /l0_rtps_writer_test2_vrkdp/uut/cnt
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add wave -noupdate -radix unsigned /l0_rtps_writer_test2_vrkdp/uut/last_seq_nr
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add wave -noupdate -radix unsigned /l0_rtps_writer_test2_vrkdp/uut/global_ack_seq_nr_base
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add wave -noupdate -radix unsigned /l0_rtps_writer_test2_vrkdp/uut/next_seq_nr
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add wave -noupdate -divider {MEMORY FSM}
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add wave -noupdate /l0_rtps_writer_test2_vrkdp/uut/mem_op_done
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add wave -noupdate /l0_rtps_writer_test2_vrkdp/uut/mem_op_start
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add wave -noupdate /l0_rtps_writer_test2_vrkdp/uut/mem_opcode
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add wave -noupdate /l0_rtps_writer_test2_vrkdp/uut/mem_stage
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add wave -noupdate /l0_rtps_writer_test2_vrkdp/uut/mem_stage_next
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add wave -noupdate /l0_rtps_writer_test2_vrkdp/uut/mem_cnt
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add wave -noupdate /l0_rtps_writer_test2_vrkdp/uut/mem_pos
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add wave -noupdate -radix unsigned -childformat {{/l0_rtps_writer_test2_vrkdp/uut/mem_addr_base(5) -radix unsigned} {/l0_rtps_writer_test2_vrkdp/uut/mem_addr_base(4) -radix unsigned} {/l0_rtps_writer_test2_vrkdp/uut/mem_addr_base(3) -radix unsigned} {/l0_rtps_writer_test2_vrkdp/uut/mem_addr_base(2) -radix unsigned} {/l0_rtps_writer_test2_vrkdp/uut/mem_addr_base(1) -radix unsigned} {/l0_rtps_writer_test2_vrkdp/uut/mem_addr_base(0) -radix unsigned}} -subitemconfig {/l0_rtps_writer_test2_vrkdp/uut/mem_addr_base(5) {-height 15 -radix unsigned} /l0_rtps_writer_test2_vrkdp/uut/mem_addr_base(4) {-height 15 -radix unsigned} /l0_rtps_writer_test2_vrkdp/uut/mem_addr_base(3) {-height 15 -radix unsigned} /l0_rtps_writer_test2_vrkdp/uut/mem_addr_base(2) {-height 15 -radix unsigned} /l0_rtps_writer_test2_vrkdp/uut/mem_addr_base(1) {-height 15 -radix unsigned} /l0_rtps_writer_test2_vrkdp/uut/mem_addr_base(0) {-height 15 -radix unsigned}} /l0_rtps_writer_test2_vrkdp/uut/mem_addr_base
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add wave -noupdate -childformat {{/l0_rtps_writer_test2_vrkdp/uut/mem_endpoint_data.guid -radix hexadecimal} {/l0_rtps_writer_test2_vrkdp/uut/mem_endpoint_data.addr -radix hexadecimal} {/l0_rtps_writer_test2_vrkdp/uut/mem_endpoint_data.portn -radix hexadecimal} {/l0_rtps_writer_test2_vrkdp/uut/mem_endpoint_data.lease_deadline -radix hexadecimal} {/l0_rtps_writer_test2_vrkdp/uut/mem_endpoint_data.res_time -radix unsigned} {/l0_rtps_writer_test2_vrkdp/uut/mem_endpoint_data.ack_seq_nr_base -radix unsigned} {/l0_rtps_writer_test2_vrkdp/uut/mem_endpoint_data.req_seq_nr_base -radix unsigned}} -expand -subitemconfig {/l0_rtps_writer_test2_vrkdp/uut/mem_endpoint_data.guid {-height 15 -radix hexadecimal} /l0_rtps_writer_test2_vrkdp/uut/mem_endpoint_data.addr {-height 15 -radix hexadecimal} /l0_rtps_writer_test2_vrkdp/uut/mem_endpoint_data.portn {-height 15 -radix hexadecimal} /l0_rtps_writer_test2_vrkdp/uut/mem_endpoint_data.lease_deadline {-height 15 -radix hexadecimal} /l0_rtps_writer_test2_vrkdp/uut/mem_endpoint_data.res_time {-height 15 -radix unsigned} /l0_rtps_writer_test2_vrkdp/uut/mem_endpoint_data.ack_seq_nr_base {-height 15 -radix unsigned} /l0_rtps_writer_test2_vrkdp/uut/mem_endpoint_data.req_seq_nr_base {-height 15 -radix unsigned}} /l0_rtps_writer_test2_vrkdp/uut/mem_endpoint_data
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add wave -noupdate -group MEM_CTRL -radix unsigned /l0_rtps_writer_test2_vrkdp/uut/mem_addr
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add wave -noupdate -group MEM_CTRL /l0_rtps_writer_test2_vrkdp/uut/mem_valid_in
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add wave -noupdate -group MEM_CTRL /l0_rtps_writer_test2_vrkdp/uut/mem_ready_in
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add wave -noupdate -group MEM_CTRL /l0_rtps_writer_test2_vrkdp/uut/mem_read
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add wave -noupdate -group MEM_CTRL -radix hexadecimal /l0_rtps_writer_test2_vrkdp/uut/mem_write_data
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add wave -noupdate -group MEM_CTRL /l0_rtps_writer_test2_vrkdp/uut/abort_read
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add wave -noupdate -group MEM_CTRL /l0_rtps_writer_test2_vrkdp/uut/mem_valid_out
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add wave -noupdate -group MEM_CTRL /l0_rtps_writer_test2_vrkdp/uut/mem_ready_out
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add wave -noupdate -group MEM_CTRL -radix hexadecimal /l0_rtps_writer_test2_vrkdp/uut/mem_read_data
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add wave -noupdate -divider TESTBENCH
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add wave -noupdate -expand -group TESTBENCH /l0_rtps_writer_test2_vrkdp/start_meta
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add wave -noupdate -expand -group TESTBENCH /l0_rtps_writer_test2_vrkdp/packet_sent_meta
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add wave -noupdate -expand -group TESTBENCH /l0_rtps_writer_test2_vrkdp/start_user
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add wave -noupdate -expand -group TESTBENCH /l0_rtps_writer_test2_vrkdp/packet_sent_user
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add wave -noupdate -expand -group TESTBENCH /l0_rtps_writer_test2_vrkdp/check_trigger
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add wave -noupdate -expand -group TESTBENCH /l0_rtps_writer_test2_vrkdp/mem_check_done
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add wave -noupdate -expand -group TESTBENCH /l0_rtps_writer_test2_vrkdp/stim_done
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add wave -noupdate -expand -group TESTBENCH /l0_rtps_writer_test2_vrkdp/test_done
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TreeUpdate [SetDefaultTree]
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WaveRestoreCursors {Begin {49575000 ps} 1} {Error {7325000 ps} 1} {Cursor {9573934 ps} 0}
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quietly wave cursor active 3
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configure wave -namecolwidth 150
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configure wave -valuecolwidth 135
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configure wave -justifyvalue left
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configure wave -signalnamewidth 1
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configure wave -snapdistance 10
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configure wave -datasetprefix 0
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configure wave -rowmargin 4
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configure wave -childrowmargin 2
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configure wave -gridoffset 0
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configure wave -gridperiod 1
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configure wave -griddelta 40
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configure wave -timeline 0
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configure wave -timelineunits ns
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update
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WaveRestoreZoom {9226708 ps} {10228612 ps}
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@ -78,7 +78,7 @@
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* Since Lifespan is a duration, there is an inherent difference in the expiration time between writer and reader. This in addition to the fact that the reader may use the Reception time for the expiration time calculation could lead to an actual expiration duration almost double in length (If sent right before expiring locally in the writer).
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* The current implementation will sent a second unregister/dispose Sample, if the user does the unregister/dispose operation a second time. Should we handle that specially?
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* If a Keyed Reader receives a DATA Message with no Key hash and no Payload, it will drop it since there is no way to determine the instance (And the SN will never be accepted).
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* If a Best Effort Remote Reader sends a ACKNACK, he will indirectly receive a lease deadline and may timeout (DoS Attack)
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* Fast-RTPS does not follow DDSI-RTPS Specification
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- Open Github Issue
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@ -81,7 +81,7 @@ begin
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ENTITYID => DEFAULT_WRITER_ENTITYID,
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WITH_KEY => TRUE,
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PUSH_MODE => TRUE,
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INLINE_QOS => gen_inline_qos(NUM_READERS), -- TODO
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INLINE_QOS => gen_inline_qos(NUM_READERS+7),
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MAX_REMOTE_ENDPOINTS => MAX_REMOTE_ENDPOINTS
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)
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port map (
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@ -81,7 +81,7 @@ begin
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ENTITYID => DEFAULT_WRITER_ENTITYID,
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WITH_KEY => TRUE,
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PUSH_MODE => TRUE,
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INLINE_QOS => gen_inline_qos(NUM_READERS), -- TODO
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INLINE_QOS => gen_inline_qos(NUM_READERS+7),
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MAX_REMOTE_ENDPOINTS => MAX_REMOTE_ENDPOINTS
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)
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port map (
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550
src/Tests/Level_0/L0_rtps_writer_test2_vrkdp.vhd
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550
src/Tests/Level_0/L0_rtps_writer_test2_vrkdp.vhd
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@ -0,0 +1,550 @@
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library ieee;
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use ieee.std_logic_1164.all;
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use ieee.numeric_std.all;
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library osvvm; -- Utility Library
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context osvvm.OsvvmContext;
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use work.rtps_package.all;
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use work.user_config.all;
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use work.rtps_config_package.all;
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use work.rtps_test_package.all;
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-- This testbench tests the Liveliness Handling (Active Remote Readers) of the RTPS Writer.
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-- The testbench checks the memory contents at specific times.
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entity L0_rtps_writer_test2_vrkdp is
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end entity;
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architecture testbench of L0_rtps_writer_test2_vrkdp is
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-- *CONSTANT DECLARATION*
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constant MAX_REMOTE_ENDPOINTS : natural := 3;
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-- *TYPE DECLARATION*
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type TEST_STAGE_TYPE is (IDLE, BUSY);
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type TEST_RAM_TYPE is array (0 to (MAX_REMOTE_ENDPOINTS*READER_ENDPOINT_FRAME_SIZE_A)-1) of std_logic_vector(WORD_WIDTH-1 downto 0);
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-- *SIGNAL DECLARATION*
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signal clk, empty_user, empty_meta, rd_user, rd_meta, last_word_in_user, last_word_in_meta : std_logic := '0';
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signal reset : std_logic := '1';
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signal data_in_meta, data_in_user : std_logic_vector(WORD_WIDTH-1 downto 0) := (others => '0');
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signal start_hc : std_logic := '0';
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signal stim_stage_user, stim_stage_meta : TEST_STAGE_TYPE := IDLE;
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shared variable stimulus_user, stimulus_meta : TEST_PACKET_TYPE := EMPTY_TEST_PACKET;
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signal packet_sent_user, packet_sent_meta : std_logic := '0';
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signal cnt_stim_user, cnt_stim_meta : natural := 0;
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signal start_user, start_meta : std_logic := '0';
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signal test_time : TIME_TYPE := TIME_ZERO;
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shared variable SB_mem : work.ScoreBoardPkg_MemoryTest.ScoreBoardPType;
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signal stim_done, mem_check_done, test_done : std_logic := '0';
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signal check_trigger : std_logic := '0';
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-- *FUNCTION DECLARATION*
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function gen_sn(input : natural) return SEQUENCENUMBER_TYPE is
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variable ret : SEQUENCENUMBER_TYPE;
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begin
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ret(0) := (others => '0');
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ret(1) := unsigned(int(input, WORD_WIDTH));
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return ret;
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end function;
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begin
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-- Unit Under Test
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uut : entity work.rtps_writer(arch)
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generic map (
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RELIABILTY_QOS => RELIABLE_RELIABILITY_QOS,
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LIVELINESS_QOS => AUTOMATIC_LIVELINESS_QOS,
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DURABILITY_QOS => VOLATILE_DURABILITY_QOS,
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DESTINATION_ORDER_QOS => BY_RECEPTION_TIMESTAMP_DESTINATION_ORDER_QOS,
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ACKNACK_RESPONSE_DELAY => DURATION_ZERO,
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ACKNACK_SUPPRESSION_DELAY => DURATION_ZERO,
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LEASE_DURATION => gen_duration(1,0),
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HEARTBEAT_PERIOD => DURATION_INFINITE,
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ENTITYID => DEFAULT_WRITER_ENTITYID,
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WITH_KEY => TRUE,
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PUSH_MODE => TRUE,
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INLINE_QOS => gen_inline_qos(NUM_READERS+7),
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MAX_REMOTE_ENDPOINTS => MAX_REMOTE_ENDPOINTS
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)
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port map (
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clk => clk,
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reset => reset,
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time => test_time,
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empty_user => empty_user or packet_sent_user,
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rd_user => rd_user,
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data_in_user => data_in_user,
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last_word_in_user => last_word_in_user,
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empty_meta => empty_meta or packet_sent_meta,
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rd_meta => rd_meta,
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data_in_meta => data_in_meta,
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last_word_in_meta => last_word_in_meta,
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alive_sig => open,
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wr_rtps => open,
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full_rtps => '0',
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last_word_out_rtps => open,
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data_out_rtps => open,
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assert_liveliness => '0',
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data_available => '0',
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start_hc => start_hc,
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opcode_hc => open,
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ack_hc => '0',
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seq_nr_hc => open,
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done_hc => '0',
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ret_hc => ERROR,
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get_data_hc => open,
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data_in_hc => (others => '0'),
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valid_in_hc => '0',
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ready_in_hc => open,
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last_word_in_hc => '0',
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cc_instance_handle => HANDLE_NIL,
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cc_kind => ALIVE,
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cc_source_timestamp => TIME_INVALID,
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cc_seq_nr => SEQUENCENUMBER_UNKNOWN
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);
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stimulus_prc : process
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variable RV : RandomPType;
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variable e0, e1, e2, e3, endpoint : ENDPOINT_DATA_TYPE := DEFAULT_ENDPOINT_DATA;
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variable sub : RTPS_SUBMESSAGE_TYPE := DEFAULT_RTPS_SUBMESSAGE;
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alias idle_sig is <<signal uut.idle_sig : std_logic>>;
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-- Wrapper to use procedure as function
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impure function gen_rand_loc_2 return LOCATOR_TYPE is
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variable ret : LOCATOR_TYPE := EMPTY_LOCATOR;
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begin
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gen_rand_loc(RV, ret);
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return ret;
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end function;
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impure function gen_rand_guid_prefix return GUIDPREFIX_TYPE is
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variable ret : GUIDPREFIX_TYPE;
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begin
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ret := (0 => RV.RandSlv(WORD_WIDTH), 1 => RV.RandSlv(WORD_WIDTH), 2 => RV.RandSlv(WORD_WIDTH));
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return ret;
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end function;
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procedure start_meta_test is
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begin
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start_meta <= '1';
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wait until rising_edge(clk);
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start_meta <= '0';
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wait until rising_edge(clk);
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end procedure;
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procedure start_user_test is
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begin
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start_user <= '1';
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wait until rising_edge(clk);
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start_user <= '0';
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wait until rising_edge(clk);
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end procedure;
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procedure start_mem_check is
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begin
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check_trigger <= '1';
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wait until rising_edge(clk);
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check_trigger <= '0';
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wait until rising_edge(clk);
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end procedure;
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procedure wait_on_user_sent is
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begin
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wait until rising_edge(packet_sent_user);
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end procedure;
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procedure wait_on_meta_sent is
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begin
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wait until rising_edge(packet_sent_meta);
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end procedure;
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procedure wait_on_mem_check is
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begin
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if (mem_check_done /= '1') then
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wait until mem_check_done = '1';
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end if;
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end procedure;
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procedure wait_on_completion is
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begin
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if (test_done /= '1') then
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wait until test_done = '1';
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end if;
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end procedure;
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procedure wait_on_idle is
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begin
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if (idle_sig /= '1') then
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wait until idle_sig = '1';
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end if;
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end procedure;
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begin
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SetAlertLogName("rtps_writer (Volatile, Reliable, Keyed, By Reception Timestamp, Push Mode) - Level 0 - Reader Liveliness Handling");
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SetAlertEnable(FAILURE, TRUE);
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SetAlertEnable(ERROR, TRUE);
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SetAlertEnable(WARNING, TRUE);
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SetLogEnable(DEBUG, FALSE);
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SetLogEnable(PASSED, FALSE);
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SetLogEnable(INFO, TRUE);
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RV.InitSeed(RV'instance_name);
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-- Endpoint 0
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e0 := DEFAULT_ENDPOINT_DATA;
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e0.participant.guidPrefix := gen_rand_guid_prefix;
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e0.entityid := RV.RandSlv(ENTITYID_WIDTH);
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e0.unicastLocatorList := (numLocators => int(1,CDR_LONG_WIDTH), locator => (0 => gen_rand_loc_2, others => EMPTY_LOCATOR));
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-- Endpoint 1
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e1 := DEFAULT_ENDPOINT_DATA;
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e1.participant.guidPrefix := gen_rand_guid_prefix;
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e1.entityid := RV.RandSlv(ENTITYID_WIDTH);
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e1.unicastLocatorList := (numLocators => int(1,CDR_LONG_WIDTH), locator => (0 => gen_rand_loc_2, others => EMPTY_LOCATOR));
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e1.reliability := BEST_EFFORT_RELIABILITY_QOS;
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-- Endpoint 2
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e2 := DEFAULT_ENDPOINT_DATA;
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e2.participant.guidPrefix := gen_rand_guid_prefix;
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e2.entityid := RV.RandSlv(ENTITYID_WIDTH);
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e2.unicastLocatorList := (numLocators => int(1,CDR_LONG_WIDTH), locator => (0 => gen_rand_loc_2, others => EMPTY_LOCATOR));
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e2.expectsInlineQoS(0) := '1';
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-- Endpoint 3
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e3 := DEFAULT_ENDPOINT_DATA;
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e3.participant.guidPrefix := gen_rand_guid_prefix;
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e3.entityid := RV.RandSlv(ENTITYID_WIDTH);
|
||||
e3.unicastLocatorList := (numLocators => int(1,CDR_LONG_WIDTH), locator => (0 => gen_rand_loc_2, others => EMPTY_LOCATOR));
|
||||
e3.expectsInlineQoS(0) := '1';
|
||||
e3.durability := TRANSIENT_LOCAL_DURABILITY_QOS;
|
||||
e3.reliability := BEST_EFFORT_RELIABILITY_QOS;
|
||||
|
||||
Log("Initiating Test", INFO);
|
||||
Log("Current Time: 0s", INFO);
|
||||
test_time <= TIME_ZERO;
|
||||
stim_done <= '0';
|
||||
start_meta <= '0';
|
||||
start_user <= '0';
|
||||
check_trigger <= '0';
|
||||
reset <= '1';
|
||||
wait until rising_edge(clk);
|
||||
wait until rising_edge(clk);
|
||||
reset <= '0';
|
||||
|
||||
|
||||
Log("Insert Endpoint 0", INFO);
|
||||
endpoint := e0;
|
||||
endpoint.nr := 0;
|
||||
endpoint.match := MATCH;
|
||||
gen_endpoint_match_frame(endpoint, stimulus_meta);
|
||||
SB_mem.Push(gen_reader_endpoint_mem_frame_a(endpoint));
|
||||
start_meta_test;
|
||||
wait_on_meta_sent;
|
||||
stimulus_meta := EMPTY_TEST_PACKET;
|
||||
stimulus_user := EMPTY_TEST_PACKET;
|
||||
start_mem_check;
|
||||
wait_on_mem_check;
|
||||
-- MEMORY STATE [e0,0,0]
|
||||
|
||||
Log("Insert Endpoint 1", INFO);
|
||||
endpoint := e1;
|
||||
endpoint.nr := 1;
|
||||
endpoint.match := MATCH;
|
||||
gen_endpoint_match_frame(endpoint, stimulus_meta);
|
||||
SB_mem.Push(gen_reader_endpoint_mem_frame_a(endpoint));
|
||||
start_meta_test;
|
||||
wait_on_meta_sent;
|
||||
stimulus_meta := EMPTY_TEST_PACKET;
|
||||
stimulus_user := EMPTY_TEST_PACKET;
|
||||
start_mem_check;
|
||||
wait_on_mem_check;
|
||||
-- MEMORY STATE [e0,e1,0]
|
||||
|
||||
Log("Insert Endpoint 2", INFO);
|
||||
endpoint := e2;
|
||||
endpoint.nr := 2;
|
||||
endpoint.match := MATCH;
|
||||
gen_endpoint_match_frame(endpoint, stimulus_meta);
|
||||
SB_mem.Push(gen_reader_endpoint_mem_frame_a(endpoint));
|
||||
start_meta_test;
|
||||
wait_on_meta_sent;
|
||||
stimulus_meta := EMPTY_TEST_PACKET;
|
||||
stimulus_user := EMPTY_TEST_PACKET;
|
||||
start_mem_check;
|
||||
wait_on_mem_check;
|
||||
-- MEMORY STATE [e0,e1,e2]
|
||||
|
||||
Log("Current Time: 0.5s", INFO);
|
||||
test_time <= gen_duration(0,500);
|
||||
wait until rising_edge(clk);
|
||||
wait until rising_edge(clk); -- Allow idle_sig to go low
|
||||
wait_on_idle;
|
||||
|
||||
Log("Endpoint 2 sent ACKNACK [Request SN 1]", INFO);
|
||||
endpoint := e2;
|
||||
sub := DEFAULT_RTPS_SUBMESSAGE;
|
||||
sub.submessageID := SID_ACKNACK;
|
||||
sub.writerId := DEFAULT_WRITER_ENTITYID;
|
||||
sub.readerId := endpoint.entityid;
|
||||
sub.readerSNState := (base => gen_sn(1), numBits => int(1, CDR_LONG_WIDTH), bitmap => (0 => '1', others => '0'));
|
||||
sub.flags(SUBMESSAGE_FINAL_FLAG_POS) := '1';
|
||||
gen_rtps_handler_out(sub, get_loc(endpoint), FALSE, TIME_INVALID, endpoint.participant.guidPrefix, stimulus_user);
|
||||
start_user_test;
|
||||
wait_on_user_sent;
|
||||
stimulus_meta := EMPTY_TEST_PACKET;
|
||||
stimulus_user := EMPTY_TEST_PACKET;
|
||||
wait_on_idle;
|
||||
|
||||
Log("Current Time: 1s", INFO);
|
||||
test_time <= gen_duration(1,0);
|
||||
wait until rising_edge(clk);
|
||||
wait until rising_edge(clk); -- Allow idle_sig to go low
|
||||
wait_on_idle;
|
||||
|
||||
Log("Check Removal of Endpoint 0", INFO);
|
||||
-- Re-check Mem-State
|
||||
endpoint := e0;
|
||||
endpoint.nr := 0;
|
||||
endpoint.match := UNMATCH;
|
||||
SB_mem.Push(gen_reader_endpoint_mem_frame_a(endpoint));
|
||||
start_mem_check;
|
||||
wait_on_mem_check;
|
||||
endpoint := e1;
|
||||
endpoint.nr := 1;
|
||||
endpoint.match := MATCH;
|
||||
SB_mem.Push(gen_reader_endpoint_mem_frame_a(endpoint));
|
||||
start_mem_check;
|
||||
wait_on_mem_check;
|
||||
endpoint := e2;
|
||||
endpoint.nr := 2;
|
||||
endpoint.match := MATCH;
|
||||
SB_mem.Push(gen_reader_endpoint_mem_frame_a(endpoint));
|
||||
start_mem_check;
|
||||
wait_on_mem_check;
|
||||
-- MEMORY STATE [0,e1,e2]
|
||||
|
||||
Log("Insert Endpoint 3", INFO);
|
||||
endpoint := e3;
|
||||
endpoint.nr := 0;
|
||||
endpoint.match := MATCH;
|
||||
gen_endpoint_match_frame(endpoint, stimulus_meta);
|
||||
SB_mem.Push(gen_reader_endpoint_mem_frame_a(endpoint));
|
||||
start_meta_test;
|
||||
wait_on_meta_sent;
|
||||
stimulus_meta := EMPTY_TEST_PACKET;
|
||||
stimulus_user := EMPTY_TEST_PACKET;
|
||||
start_mem_check;
|
||||
wait_on_mem_check;
|
||||
-- MEMORY STATE [e3,e1,e2]
|
||||
|
||||
Log("Current Time: 1.5s", INFO);
|
||||
test_time <= gen_duration(1,500);
|
||||
wait until rising_edge(clk);
|
||||
wait until rising_edge(clk); -- Allow idle_sig to go low
|
||||
wait_on_idle;
|
||||
|
||||
Log("Check Removal of Endpoint 2", INFO);
|
||||
-- Re-check Mem-State
|
||||
endpoint := e3;
|
||||
endpoint.nr := 0;
|
||||
endpoint.match := MATCH;
|
||||
SB_mem.Push(gen_reader_endpoint_mem_frame_a(endpoint));
|
||||
start_mem_check;
|
||||
wait_on_mem_check;
|
||||
endpoint := e1;
|
||||
endpoint.nr := 1;
|
||||
endpoint.match := MATCH;
|
||||
SB_mem.Push(gen_reader_endpoint_mem_frame_a(endpoint));
|
||||
start_mem_check;
|
||||
wait_on_mem_check;
|
||||
endpoint := e2;
|
||||
endpoint.nr := 2;
|
||||
endpoint.match := UNMATCH;
|
||||
SB_mem.Push(gen_reader_endpoint_mem_frame_a(endpoint));
|
||||
start_mem_check;
|
||||
wait_on_mem_check;
|
||||
-- MEMORY STATE [e3,e1,0]
|
||||
|
||||
Log("Current Time: 2s", INFO);
|
||||
test_time <= gen_duration(2,0);
|
||||
wait until rising_edge(clk);
|
||||
wait until rising_edge(clk); -- Allow idle_sig to go low
|
||||
wait_on_idle;
|
||||
|
||||
Log("Check Memory State", INFO);
|
||||
-- Re-check Mem-State
|
||||
endpoint := e3;
|
||||
endpoint.nr := 0;
|
||||
endpoint.match := MATCH;
|
||||
SB_mem.Push(gen_reader_endpoint_mem_frame_a(endpoint));
|
||||
start_mem_check;
|
||||
wait_on_mem_check;
|
||||
endpoint := e1;
|
||||
endpoint.nr := 1;
|
||||
endpoint.match := MATCH;
|
||||
SB_mem.Push(gen_reader_endpoint_mem_frame_a(endpoint));
|
||||
start_mem_check;
|
||||
wait_on_mem_check;
|
||||
-- MEMORY STATE [e3,e1,0]
|
||||
|
||||
stim_done <= '1';
|
||||
wait_on_completion;
|
||||
TranscriptOpen(RESULTS_FILE, APPEND_MODE);
|
||||
SetTranscriptMirror;
|
||||
ReportAlerts;
|
||||
TranscriptClose;
|
||||
std.env.stop;
|
||||
wait;
|
||||
end process;
|
||||
|
||||
clock_prc : process
|
||||
begin
|
||||
clk <= '0';
|
||||
wait for 25 ns;
|
||||
clk <= '1';
|
||||
wait for 25 ns;
|
||||
end process;
|
||||
|
||||
empty_meta_prc : process
|
||||
begin
|
||||
empty_meta <= '0';
|
||||
wait until rd_meta = '1';
|
||||
wait until rising_edge(clk);
|
||||
empty_meta <= '1';
|
||||
wait until rising_edge(clk);
|
||||
end process;
|
||||
|
||||
empty_user_prc : process
|
||||
begin
|
||||
empty_user <= '0';
|
||||
wait until rd_user = '1';
|
||||
wait until rising_edge(clk);
|
||||
empty_user <= '1';
|
||||
wait until rising_edge(clk);
|
||||
end process;
|
||||
|
||||
alert_prc : process(all)
|
||||
begin
|
||||
if rising_edge(clk) then
|
||||
alertif(empty_meta = '1' and rd_meta = '1', "Input FIFO read signal high while empty signal high (meta)", ERROR);
|
||||
alertif(empty_user = '1' and rd_user = '1', "Input FIFO read signal high while empty signal high (user)", ERROR);
|
||||
alertif(start_hc = '1', "Unexpected History Cache Operation initiated", FAILURE);
|
||||
end if;
|
||||
end process;
|
||||
|
||||
input_meta_prc : process(all)
|
||||
begin
|
||||
data_in_meta <= stimulus_meta.data(cnt_stim_meta);
|
||||
last_word_in_meta <= stimulus_meta.last(cnt_stim_meta);
|
||||
|
||||
if rising_edge(clk) then
|
||||
if (reset = '1') then
|
||||
cnt_stim_meta <= 0;
|
||||
stim_stage_meta <= IDLE;
|
||||
packet_sent_meta <= '1';
|
||||
else
|
||||
case (stim_stage_meta) is
|
||||
when IDLE =>
|
||||
if (start_meta = '1' and stimulus_meta.length /= 0) then
|
||||
stim_stage_meta <= BUSY;
|
||||
packet_sent_meta <= '0';
|
||||
end if;
|
||||
when BUSY =>
|
||||
if (rd_meta = '1') then
|
||||
if (cnt_stim_meta = stimulus_meta.length-1) then
|
||||
stim_stage_meta <= IDLE;
|
||||
packet_sent_meta <= '1';
|
||||
cnt_stim_meta <= 0;
|
||||
else
|
||||
cnt_stim_meta <= cnt_stim_meta + 1;
|
||||
end if;
|
||||
end if;
|
||||
end case;
|
||||
end if;
|
||||
end if;
|
||||
end process;
|
||||
|
||||
input_user_prc : process(all)
|
||||
begin
|
||||
data_in_user <= stimulus_user.data(cnt_stim_user);
|
||||
last_word_in_user <= stimulus_user.last(cnt_stim_user);
|
||||
|
||||
if rising_edge(clk) then
|
||||
if (reset = '1') then
|
||||
cnt_stim_user <= 0;
|
||||
stim_stage_user <= IDLE;
|
||||
packet_sent_user <= '1';
|
||||
else
|
||||
case (stim_stage_user) is
|
||||
when IDLE =>
|
||||
if (start_user = '1' and stimulus_user.length /= 0) then
|
||||
stim_stage_user <= BUSY;
|
||||
packet_sent_user <= '0';
|
||||
end if;
|
||||
when BUSY =>
|
||||
if (rd_user = '1') then
|
||||
if (cnt_stim_user = stimulus_user.length-1) then
|
||||
stim_stage_user <= IDLE;
|
||||
packet_sent_user <= '1';
|
||||
cnt_stim_user <= 0;
|
||||
else
|
||||
cnt_stim_user <= cnt_stim_user + 1;
|
||||
end if;
|
||||
end if;
|
||||
end case;
|
||||
end if;
|
||||
end if;
|
||||
end process;
|
||||
|
||||
done_proc : process(clk)
|
||||
begin
|
||||
if rising_edge(clk) then
|
||||
if (stim_done = '1' and SB_mem.empty) then
|
||||
test_done <= '1';
|
||||
else
|
||||
test_done <= '0';
|
||||
end if;
|
||||
end if;
|
||||
end process;
|
||||
|
||||
mem_check_prc : process
|
||||
alias mem is <<signal uut.mem_ctrl_inst.ram_inst.mem : TEST_RAM_TYPE>>;
|
||||
alias mem_op_done is <<signal uut.mem_op_done : std_logic>>;
|
||||
alias idle_sig is <<signal uut.idle_sig : std_logic>>;
|
||||
variable reference : TEST_READER_ENDPOINT_MEMORY_FRAME_TYPE_A;
|
||||
begin
|
||||
mem_check_done <= '0';
|
||||
-- SAFEGUARD: (Prevent Fall-through Behavior)
|
||||
if (reset /= '0') then
|
||||
wait until reset = '0';
|
||||
end if;
|
||||
-- Wait for Trigger
|
||||
wait until rising_edge(check_trigger);
|
||||
-- Delay 1 clk (Allow trigger to go low)
|
||||
wait until rising_edge(clk);
|
||||
-- Wait for UUT IDLE state
|
||||
if (idle_sig /= '1') then
|
||||
wait until idle_sig = '1';
|
||||
end if;
|
||||
-- Wait for ongoing memory operation
|
||||
if (mem_op_done /= '1') then
|
||||
wait until mem_op_done = '1';
|
||||
end if;
|
||||
while (not SB_mem.empty) loop
|
||||
SB_mem.Pop(reference);
|
||||
for i in 0 to reference'length-1 loop
|
||||
AffirmIf(?? (mem(reference(i).addr) ?= reference(i).data), "Address: " & integer'image(reference(i).addr) & " Received: " & to_hstring(mem(reference(i).addr)) & " Expected: " & to_hstring(reference(i).data));
|
||||
end loop;
|
||||
end loop;
|
||||
-- Toggle High for one clock cycle
|
||||
mem_check_done <= '1';
|
||||
wait until rising_edge(clk);
|
||||
end process;
|
||||
|
||||
watchdog : process
|
||||
begin
|
||||
wait for 1 ms;
|
||||
Alert("Test timeout", FAILURE);
|
||||
std.env.stop;
|
||||
end process;
|
||||
|
||||
end architecture;
|
||||
@ -52,6 +52,7 @@ analyze Level_1/L1_rtps_writer_test1_vrksp.vhd
|
||||
analyze Level_1/L1_rtps_writer_test1_vrkdn.vhd
|
||||
analyze Level_1/L1_rtps_writer_test1_trkdn.vhd
|
||||
analyze Level_1/L1_rtps_writer_test2_vrkdn.vhd
|
||||
analyze Level_0/L0_rtps_writer_test2_vrkdp.vhd
|
||||
|
||||
#simulate L0_rtps_handler_test1
|
||||
#simulate L0_rtps_handler_test2
|
||||
@ -86,4 +87,5 @@ analyze Level_1/L1_rtps_writer_test2_vrkdn.vhd
|
||||
#simulate L1_rtps_writer_test1_vrksp
|
||||
#simulate L1_rtps_writer_test1_vrkdn
|
||||
#simulate L1_rtps_writer_test1_trkdn
|
||||
simulate L1_rtps_writer_test2_vrkdn
|
||||
#simulate L1_rtps_writer_test2_vrkdn
|
||||
simulate L0_rtps_writer_test2_vrkdp
|
||||
@ -1445,6 +1445,11 @@ begin
|
||||
mem_field_flags <= EMF_ENTITYID_FLAG or EMF_IPV4_ADDR_FLAG or EMF_UDP_PORT_FLAG or EMF_NEXT_SEQ_NR_FLAG;
|
||||
cnt_next <= 2;
|
||||
end if;
|
||||
|
||||
-- Update Check Time
|
||||
if (mem_endpoint_data.lease_deadline /= TIME_INVALID and mem_endpoint_data.lease_deadline < check_time) then
|
||||
check_time_next <= mem_endpoint_data.lease_deadline;
|
||||
end if;
|
||||
else
|
||||
-- Update Check Time
|
||||
if (RELIABILTY_QOS = RELIABLE_RELIABILITY_QOS and mem_endpoint_data.res_time /= TIME_INVALID and mem_endpoint_data.lease_deadline /= TIME_INVALID and mem_endpoint_data.res_time < mem_endpoint_data.lease_deadline) then
|
||||
|
||||
@ -931,47 +931,8 @@ begin
|
||||
when PROCESS_NACK =>
|
||||
-- Synthesis Guard
|
||||
if (RELIABILTY_QOS = RELIABLE_RELIABILITY_QOS) then
|
||||
-- Memory Operation Guard
|
||||
-- Wait for Endpoint Data
|
||||
if (mem_op_done = '1') then
|
||||
-- No Pending Response
|
||||
if (mem_endpoint_data.res_time = TIME_INVALID) then
|
||||
mem_op_start <= '1';
|
||||
mem_opcode <= UPDATE_ENDPOINT;
|
||||
mem_field_flags <= EMF_REQ_SEQ_NR_BASE_FLAG or EMF_REQ_SEQ_NR_BITMAP_FLAG or EMF_RES_TIME_FLAG;
|
||||
seq_nr <= nack_base;
|
||||
if (ACKNACK_RESPONSE_DELAY /= DURATION_INFINITE) then
|
||||
res_time <= time + ACKNACK_RESPONSE_DELAY;
|
||||
-- NOTE: Last Bit denotes if this is Response or Suppression Delay
|
||||
res_time(1)(0) <= '0';
|
||||
|
||||
-- XXX: Possible Worst Case Path (64-bit addition and comparison in same clock)
|
||||
-- Update Check Time
|
||||
if ((time + ACKNACK_RESPONSE_DELAY) < check_time) then
|
||||
check_time_next <= time + ACKNACK_RESPONSE_DELAY;
|
||||
end if;
|
||||
else
|
||||
res_time <= TIME_INVALID;
|
||||
end if;
|
||||
-- Currently in Acknack Response Delay
|
||||
elsif (mem_endpoint_data.res_time(1)(0) = '0') then
|
||||
mem_op_start <= '1';
|
||||
mem_opcode <= UPDATE_ENDPOINT;
|
||||
mem_field_flags <= EMF_REQ_SEQ_NR_BASE_FLAG or EMF_REQ_SEQ_NR_BITMAP_FLAG;
|
||||
seq_nr <= nack_base;
|
||||
end if;
|
||||
|
||||
-- DONE
|
||||
stage_next <= PROCESS_ACK;
|
||||
end if;
|
||||
end if;
|
||||
when PROCESS_ACK =>
|
||||
-- Synthesis Guard
|
||||
if (RELIABILTY_QOS = RELIABLE_RELIABILITY_QOS) then
|
||||
-- Wait for Endpoint Search
|
||||
if (mem_op_done = '1') then
|
||||
-- DEFAULT
|
||||
stage_next <= SKIP_PACKET;
|
||||
|
||||
-- Known Remote Endpoint
|
||||
if (mem_addr_base /= ENDPOINT_MEMORY_MAX_ADDRESS) then
|
||||
|
||||
@ -991,10 +952,52 @@ begin
|
||||
lease_deadline <= TIME_INVALID;
|
||||
end if;
|
||||
|
||||
-- No Pending Response
|
||||
if (mem_endpoint_data.res_time = TIME_INVALID) then
|
||||
mem_field_flags <= EMF_LEASE_DEADLINE_FLAG or EMF_REQ_SEQ_NR_BASE_FLAG or EMF_REQ_SEQ_NR_BITMAP_FLAG or EMF_RES_TIME_FLAG;
|
||||
seq_nr <= nack_base;
|
||||
if (ACKNACK_RESPONSE_DELAY /= DURATION_INFINITE) then
|
||||
res_time <= time + ACKNACK_RESPONSE_DELAY;
|
||||
-- NOTE: Last Bit denotes if this is Response or Suppression Delay
|
||||
res_time(1)(0) <= '0';
|
||||
|
||||
-- XXX: Possible Worst Case Path (64-bit addition and comparison in same clock)
|
||||
-- Update Check Time
|
||||
if ((time + ACKNACK_RESPONSE_DELAY) < check_time) then
|
||||
check_time_next <= time + ACKNACK_RESPONSE_DELAY;
|
||||
end if;
|
||||
else
|
||||
res_time <= TIME_INVALID;
|
||||
end if;
|
||||
-- Currently in Acknack Response Delay
|
||||
elsif (mem_endpoint_data.res_time(1)(0) = '0') then
|
||||
mem_field_flags <= EMF_LEASE_DEADLINE_FLAG or EMF_REQ_SEQ_NR_BASE_FLAG or EMF_REQ_SEQ_NR_BITMAP_FLAG;
|
||||
seq_nr <= nack_base;
|
||||
end if;
|
||||
|
||||
stage_next <= PROCESS_ACK;
|
||||
else
|
||||
-- Skip
|
||||
stage_next <= SKIP_PACKET;
|
||||
end if;
|
||||
end if;
|
||||
end if;
|
||||
when PROCESS_ACK =>
|
||||
-- Synthesis Guard
|
||||
if (RELIABILTY_QOS = RELIABLE_RELIABILITY_QOS) then
|
||||
-- Wait for Endpoint Search
|
||||
if (mem_op_done = '1') then
|
||||
-- DEFAULT
|
||||
stage_next <= SKIP_PACKET;
|
||||
|
||||
-- Known Remote Endpoint
|
||||
if (mem_addr_base /= ENDPOINT_MEMORY_MAX_ADDRESS) then
|
||||
-- New Sequence Numbers are ACKed
|
||||
if (ack_base > mem_endpoint_data.ack_seq_nr_base) then
|
||||
-- Update ACK Sequence Number Base
|
||||
mem_field_flags <= EMF_LEASE_DEADLINE_FLAG or EMF_ACK_SEQ_NR_BASE_FLAG;
|
||||
mem_op_start <= '1';
|
||||
mem_opcode <= UPDATE_ENDPOINT;
|
||||
mem_field_flags <= EMF_ACK_SEQ_NR_BASE_FLAG;
|
||||
seq_nr <= ack_base;
|
||||
-- NOTE: The global_ack_seq_nr_base contains the lowest SN of all remote Endpoints.
|
||||
-- It only needs to be updated, if the remote Endpoint with the lowest ACKed SN is updated.
|
||||
@ -1124,6 +1127,11 @@ begin
|
||||
stage_next <= HANDLE_REQUESTS;
|
||||
cnt_next <= 4;
|
||||
end if;
|
||||
|
||||
-- Update Check Time
|
||||
if (mem_endpoint_data.lease_deadline /= TIME_INVALID and mem_endpoint_data.lease_deadline < check_time) then
|
||||
check_time_next <= mem_endpoint_data.lease_deadline;
|
||||
end if;
|
||||
else
|
||||
-- Update Check Time
|
||||
if (RELIABILTY_QOS = RELIABLE_RELIABILITY_QOS and mem_endpoint_data.res_time /= TIME_INVALID and mem_endpoint_data.lease_deadline /= TIME_INVALID and mem_endpoint_data.res_time < mem_endpoint_data.lease_deadline) then
|
||||
@ -1236,8 +1244,8 @@ begin
|
||||
cnt_next <= cnt + 1;
|
||||
-- Find SN
|
||||
when 1 =>
|
||||
-- End of Bitmap
|
||||
if (req_bitmap_pos = req_seq_nr_bitmap'length-1) then
|
||||
-- End of Bitmap or Requested SN is above last Written
|
||||
if (req_bitmap_pos = req_seq_nr_bitmap'length-1 or next_seq_nr > last_seq_nr) then
|
||||
if (gap_in_progress = '1') then
|
||||
-- NOTE: We close the GAP, than come back here, and exit through the else branch.
|
||||
-- Close GAP Message
|
||||
@ -1905,8 +1913,8 @@ begin
|
||||
|
||||
-- Continue
|
||||
if (RELIABILTY_QOS = RELIABLE_RELIABILITY_QOS and stale_check = '1') then
|
||||
stage_next <= HANDLE_REQUESTS;
|
||||
cnt_next <= 0;
|
||||
stage_next <= HANDLE_REQUESTS;
|
||||
cnt_next <= 0;
|
||||
elsif (DURABILITY_QOS /= VOLATILE_DURABILITY_QOS and historical_push = '1') then
|
||||
stage_next <= HANDLE_HISTORICAL;
|
||||
cnt_next <= 0;
|
||||
@ -1982,7 +1990,8 @@ begin
|
||||
data_out_rtps <= std_logic_vector(last_seq_nr(1));
|
||||
-- Count
|
||||
when 7 =>
|
||||
data_out_rtps <= std_logic_vector(count);
|
||||
data_out_rtps <= std_logic_vector(count);
|
||||
last_word_out_rtps <= '1';
|
||||
|
||||
stage_next <= HANDLE_HEARTBEATS;
|
||||
cnt_next <= 1;
|
||||
@ -2124,14 +2133,14 @@ begin
|
||||
mem_cnt_next <= 0;
|
||||
when GET_NEXT_ENDPOINT =>
|
||||
-- Memory Bound Guard
|
||||
if (mem_addr_base /= max_endpoint_addr) then
|
||||
if (mem_addr_base >= max_endpoint_addr) then
|
||||
mem_addr_base_next <= ENDPOINT_MEMORY_MAX_ADDRESS;
|
||||
else
|
||||
-- Reached End of Memory, No match
|
||||
mem_addr_base_next <= mem_addr_base + ENDPOINT_FRAME_SIZE;
|
||||
mem_pos_next <= mem_pos + 1;
|
||||
mem_stage_next <= GET_NEXT_ENDPOINT;
|
||||
mem_cnt_next <= 0;
|
||||
else
|
||||
mem_addr_base_next <= ENDPOINT_MEMORY_MAX_ADDRESS;
|
||||
end if;
|
||||
when GET_ENDPOINT =>
|
||||
-- Fetch Endpoint Data
|
||||
@ -3514,7 +3523,7 @@ begin
|
||||
sn_latch_2 <= SEQUENCENUMBER_UNKNOWN;
|
||||
sn_latch_3 <= SEQUENCENUMBER_UNKNOWN;
|
||||
check_time <= TIME_INVALID;
|
||||
heartbeat_time <= TIME_INVALID;
|
||||
heartbeat_time <= time + HEARTBEAT_PERIOD;
|
||||
guid <= GUID_UNKNOWN;
|
||||
addr <= IPv4_ADDRESS_INVALID;
|
||||
portn <= UDP_PORT_INVALID;
|
||||
|
||||
Loading…
Reference in New Issue
Block a user