Added DATA_AVAILABLE_STATUS, and SAMPLE_REJECTED_STATUS in DDS Reader

This commit is contained in:
Greek 2021-01-27 12:01:38 +01:00
parent 607273e1c4
commit 4914dbe5ea

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@ -274,6 +274,12 @@ architecture arch of history_cache is
signal inst_data_variant : std_logic := '0'; signal inst_data_variant : std_logic := '0';
signal abort_khg : std_logic := '0'; signal abort_khg : std_logic := '0';
signal status_sig, status_sig_next : std_logic_vector(STATUS_KIND_WIDTH-1 downto 0) := (others => '0');
signal sample_rej_cnt, sample_rej_cnt_next : unsigned(SAMPLE_REJECTED_STATUS_COUNT_WIDTH-1 downto 0) := (others => '0');
signal sample_rej_cnt_change, sample_rej_cnt_change_next : unsigned(SAMPLE_REJECTED_STATUS_COUNT_WIDTH-1 downto 0) := (others => '0');
signal sample_rej_last_reason, sample_rej_last_reason_next : std_logic_vector(CDR_ENUMERATION_WIDTH-1 downto 0) := (others =>'0');
signal sample_rej_last_inst, sample_rej_last_inst_next : INSTANCE_HANDLE_TYPE := (others => (others => '0'));
--*****ALIAS DECLARATION***** --*****ALIAS DECLARATION*****
alias prev_sample : unsigned(SAMPLE_MEMORY_ADDR_WIDTH-1 downto 0) is sample_addr_latch_1; alias prev_sample : unsigned(SAMPLE_MEMORY_ADDR_WIDTH-1 downto 0) is sample_addr_latch_1;
alias prev_sample_next : unsigned(SAMPLE_MEMORY_ADDR_WIDTH-1 downto 0) is sample_addr_latch_1_next; alias prev_sample_next : unsigned(SAMPLE_MEMORY_ADDR_WIDTH-1 downto 0) is sample_addr_latch_1_next;
@ -441,11 +447,16 @@ begin
is_first_instance_sample_next <= is_first_instance_sample; is_first_instance_sample_next <= is_first_instance_sample;
dynamic_next_instance_next <= dynamic_next_instance; dynamic_next_instance_next <= dynamic_next_instance;
last_read_ts_next <= last_read_ts; last_read_ts_next <= last_read_ts;
sample_rej_cnt_next <= sample_rej_cnt;
sample_rej_cnt_change_next <= sample_rej_cnt_change;
sample_rej_last_reason_next <= sample_rej_last_reason;
sample_rej_last_inst_next <= sample_rej_last_inst;
ack_dds <= '0'; ack_dds <= '0';
inst_data_variant <= '0'; inst_data_variant <= '0';
done_dds <= '0'; done_dds <= '0';
abort_khg <= '0'; abort_khg <= '0';
return_code_dds <= RETCODE_UNSUPPORTED; return_code_dds <= RETCODE_UNSUPPORTED;
status_sig_next <= status_sig;
case (stage) is case (stage) is
when IDLE => when IDLE =>
@ -596,6 +607,9 @@ begin
key_hash_next <= instance_handle_in; key_hash_next <= instance_handle_in;
stage_next <= FIND_NEXT_INSTANCE; stage_next <= FIND_NEXT_INSTANCE;
cnt_next <= 0; cnt_next <= 0;
when GET_SAMPLE_REJECTED_STATUS =>
ack_dds <= '1';
stage_next <= GET_SAMPLE_REJECTED_STATUS;
when others => when others =>
ack_dds <= '1'; ack_dds <= '1';
stage_next <= UNKNOWN_OPERATION; stage_next <= UNKNOWN_OPERATION;
@ -874,6 +888,12 @@ begin
-- Reject Change -- Reject Change
res_rtps <= REJECTED; res_rtps <= REJECTED;
stage_next <= IDLE; stage_next <= IDLE;
-- Update Sample Reject Status
status_sig_next(SAMPLE_REJECTED_STATUS) <= '1';
sample_rej_cnt_next <= sample_rej_cnt + 1;
sample_rej_cnt_change_next <= sample_rej_cnt_change + 1;
sample_rej_last_reason_next <= REJECTED_BY_SAMPLES_PER_INSTANCE_LIMIT;
sample_rej_last_inst_next <= key_hash;
else else
-- Accept Change (Remove Oldest Instance Sample) -- Accept Change (Remove Oldest Instance Sample)
remove_oldest_inst_sample_next <= '1'; remove_oldest_inst_sample_next <= '1';
@ -886,6 +906,12 @@ begin
-- Reject Change -- Reject Change
res_rtps <= REJECTED; res_rtps <= REJECTED;
stage_next <= IDLE; stage_next <= IDLE;
-- Update Sample Reject Status
status_sig_next(SAMPLE_REJECTED_STATUS) <= '1';
sample_rej_cnt_next <= sample_rej_cnt + 1;
sample_rej_cnt_change_next <= sample_rej_cnt_change + 1;
sample_rej_last_reason_next <= REJECTED_BY_SAMPLES_LIMIT;
sample_rej_last_inst_next <= key_hash;
else else
-- Accept Change (Remove Oldest Sample) -- Accept Change (Remove Oldest Sample)
remove_oldest_sample_next <= '1'; remove_oldest_sample_next <= '1';
@ -907,12 +933,24 @@ begin
-- Reject Change -- Reject Change
res_rtps <= REJECTED; res_rtps <= REJECTED;
stage_next <= IDLE; stage_next <= IDLE;
-- Update Sample Reject Status
status_sig_next(SAMPLE_REJECTED_STATUS) <= '1';
sample_rej_cnt_next <= sample_rej_cnt + 1;
sample_rej_cnt_change_next <= sample_rej_cnt_change + 1;
sample_rej_last_reason_next <= REJECTED_BY_INSTANCES_LIMIT;
sample_rej_last_inst_next <= key_hash;
-- RESOURCE_LIMITS_QOS (MAX_SAMPLES) -- RESOURCE_LIMITS_QOS (MAX_SAMPLES)
elsif (empty_sample_list_head = empty_sample_list_tail) then elsif (empty_sample_list_head = empty_sample_list_tail) then
if (HISTORY_QOS = KEEP_ALL_HISTORY_QOS and RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS) then if (HISTORY_QOS = KEEP_ALL_HISTORY_QOS and RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS) then
-- Reject Change -- Reject Change
res_rtps <= REJECTED; res_rtps <= REJECTED;
stage_next <= IDLE; stage_next <= IDLE;
-- Update Sample Reject Status
status_sig_next(SAMPLE_REJECTED_STATUS) <= '1';
sample_rej_cnt_next <= sample_rej_cnt + 1;
sample_rej_cnt_change_next <= sample_rej_cnt_change + 1;
sample_rej_last_reason_next <= REJECTED_BY_SAMPLES_LIMIT;
sample_rej_last_inst_next <= key_hash;
else else
-- Accept Change (Remove Oldest Sample) -- Accept Change (Remove Oldest Sample)
remove_oldest_sample_next <= '1'; remove_oldest_sample_next <= '1';
@ -1264,6 +1302,9 @@ begin
newest_sample_next <= empty_sample_list_head; newest_sample_next <= empty_sample_list_head;
end if; end if;
-- Signal Data Available
status_sig_next(DATA_AVAILABLE_STATUS) <= '1';
-- NOTE: added_new_instance and remove_oldest_sample are NOT mutual exclusive, but Instance Removal takes precedence. -- NOTE: added_new_instance and remove_oldest_sample are NOT mutual exclusive, but Instance Removal takes precedence.
-- New Instance was added, and Instance Memory is Full -- New Instance was added, and Instance Memory is Full
@ -1528,6 +1569,13 @@ begin
when 1 => when 1 =>
res_rtps <= REJECTED; res_rtps <= REJECTED;
stage_next <= IDLE; stage_next <= IDLE;
-- TODO: Add a new Reject Status? (E.g. REJECTED_BY_PAYLOAD_LIMIT?, or UNSPECIFIED REJECT?)
-- Update Sample Reject Status
status_sig_next(SAMPLE_REJECTED_STATUS) <= '1';
sample_rej_cnt_next <= sample_rej_cnt + 1;
sample_rej_cnt_change_next <= sample_rej_cnt_change + 1;
sample_rej_last_reason_next <= REJECTED_BY_SAMPLES_LIMIT;
sample_rej_last_inst_next <= key_hash;
when others => when others =>
null; null;
end case; end case;
@ -2127,6 +2175,9 @@ begin
end if; end if;
end if; end if;
-- Reset Data Available Status
status_sig_next(DATA_AVAILABLE_STATUS) <= '0';
-- Sample not marked as Read -- Sample not marked as Read
if (sample_status_info(READ_FLAG) /= '1') then if (sample_status_info(READ_FLAG) /= '1') then
-- Mark Sample as Read -- Mark Sample as Read
@ -2445,6 +2496,51 @@ begin
null; null;
end case; end case;
end if; end if;
when GET_SAMPLE_REJECTED_STATUS =>
if (ready_out_dds = '1') then
cnt_next <= cnt + 1;
valid_out_dds <= '1';
case (cnt) is
-- Total Count
when 0 =>
data_out_dds <= sample_rej_cnt;
-- Total Count Change
when 1 =>
data_out_dds <= sample_rej_cnt_change;
-- Reset
sample_rej_cnt_change_next <= (others => '0');
-- Last Reason
when 2 =>
data_out_dds <= sample_rej_last_reason;
-- Reset
sample_rej_last_reason <= NOT_REJECTED;
-- Last Instance Handle 1/4
when 3 =>
data_out_dds <= sample_rej_last_inst(0);
-- Last Instance Handle 2/4
when 4 =>
data_out_dds <= sample_rej_last_inst(1);
-- Last Instance Handle 3/4
when 5 =>
data_out_dds <= sample_rej_last_inst(2);
-- Last Instance Handle 4/4
when 6 =>
data_out_dds <= sample_rej_last_inst(3);
last_word_out_dds <= '1';
-- Return Code
when 7 =>
done_dds <= '1';
return_code_dds <= RETCODE_OK;
-- Reset
status_sig_next(SAMPLE_REJECTED_STATUS) <= '0';
-- DONE
stage_next <= IDLE;
when others =>
null;
end case;
end if;
when others => when others =>
null; null;
end case; end case;