Add test 2 of DDS Reader
Test TIME_BASED_FILTER QoS Handling.
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sim/L0_dds_reader_test2_arpkriu.do
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sim/L0_dds_reader_test2_arpkriu.do
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src/Tests/Level_0/L0_dds_reader_test2_arpkriu.vhd
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src/Tests/Level_0/L0_dds_reader_test2_arpkriu.vhd
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library ieee;
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use ieee.std_logic_1164.all;
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use ieee.numeric_std.all;
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library osvvm; -- Utility Library
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context osvvm.OsvvmContext;
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use work.rtps_package.all;
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use work.user_config.all;
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use work.rtps_config_package.all;
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use work.rtps_test_package.all;
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entity L0_dds_reader_test2_arpkriu is
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end entity;
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architecture testbench of L0_dds_reader_test2_arpkriu is
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-- *CONSTANT DECLARATION*
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constant MAX_REMOTE_ENDPOINTS : natural := 3;
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-- *TYPE DECLARATION*
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type DDS_STAGE_TYPE is (IDLE, START, DONE, CHECK_SI, CHECK_DATA, WAIT_EOC);
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type RTPS_STAGE_TYPE is (IDLE, START, PUSH, DONE);
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type KH_STAGE_TYPE is (IDLE, READ_DATA, PUSH_KEY_HASH);
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-- *SIGNAL DECLARATION*
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signal clk : std_logic := '0';
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signal reset : std_logic := '1';
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signal check_time : TIME_TYPE := TIME_ZERO;
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signal start_rtps, start_dds, start_kh, ack_rtps, ack_dds, ack_kh, done_rtps, done_dds : std_logic := '0';
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signal opcode_rtps : HISTORY_CACHE_OPCODE_TYPE := NOP;
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signal opcode_dds : DDS_READER_OPCODE_TYPE := NOP;
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signal opcode_kh : KEY_HOLDER_OPCODE_TYPE := NOP;
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signal ret_rtps : HISTORY_CACHE_RESPONSE_TYPE := ERROR;
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signal ready_in_rtps, valid_in_rtps, last_word_in_rtps : std_logic := '0';
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signal ready_out_dds, valid_out_dds, last_word_out_dds : std_logic := '0';
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signal ready_in_kh, ready_out_kh, valid_in_kh, valid_out_kh, last_word_in_kh, last_word_out_kh : std_logic := '0';
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signal data_in_rtps, data_out_dds, data_in_kh, data_out_kh : std_logic_vector(WORD_WIDTH-1 downto 0) := (others => '0');
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signal get_data_dds, si_valid_data, si_valid, eoc, abort_kh : std_logic := '0';
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signal return_code_dds : std_logic_vector(RETURN_CODE_WIDTH-1 downto 0) := (others => '0');
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signal status : std_logic_vector(STATUS_KIND_WIDTH-1 downto 0) := (others => '0');
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signal instance_state_dds, si_instance_state : std_logic_vector(INSTANCE_STATE_KIND_WIDTH-1 downto 0) := ANY_INSTANCE_STATE;
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signal view_state_dds, si_view_state : std_logic_vector(VIEW_STATE_KIND_WIDTH-1 downto 0) := ANY_VIEW_STATE;
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signal sample_state_dds, si_sample_state : std_logic_vector(SAMPLE_STATE_KIND_WIDTH-1 downto 0) := ANY_SAMPLE_STATE;
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signal instance_handle_dds, si_instance_handle : INSTANCE_HANDLE_TYPE := HANDLE_NIL;
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signal max_samples_dds : std_logic_vector(MAX_SAMPLES_WIDTH-1 downto 0) := (others => '0');
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signal si_source_timestamp : TIME_TYPE := TIME_INVALID;
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signal si_publication_handle : PUBLICATION_HANDLE_TYPE := (others => (others => '0'));
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signal si_disposed_generation_count : std_logic_vector(DISPOSED_GENERATION_COUNT_WIDTH-1 downto 0) := (others => '0');
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signal si_no_writers_generation_count : std_logic_vector(NO_WRITERS_GENERATION_COUNT_WIDTH-1 downto 0) := (others => '0');
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signal si_sample_rank : std_logic_vector(SAMPLE_RANK_WIDTH-1 downto 0) := (others => '0');
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signal si_generation_rank : std_logic_vector(GENERATION_RANK_WIDTH-1 downto 0) := (others => '0');
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signal si_absolute_generation_rank: std_logic_vector(ABSOLUTE_GENERATION_COUNT_WIDTH-1 downto 0) := (others => '0');
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signal dds_start , dds_done , rtps_start, rtps_done : std_logic := '0';
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signal dds_cnt, dds_cnt2, rtps_cnt, kh_cnt : natural := 0;
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signal dds_stage : DDS_STAGE_TYPE := IDLE;
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signal rtps_stage : RTPS_STAGE_TYPE := IDLE;
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signal kh_stage : KH_STAGE_TYPE := IDLE;
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signal kh_data : TEST_PACKET_TYPE := EMPTY_TEST_PACKET;
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shared variable dds : DDS_READER_TEST_TYPE := DEFAULT_DDS_READER_TEST;
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shared variable rtps : RTPS_READER_TEST_TYPE := DEFAULT_RTPS_READER_TEST;
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shared variable mem : DDS_READER_MEM_TYPE := DEFAULT_DDS_READER_MEM;
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signal data_id, ret_id, sstate_id, vstate_id, istate_id, inst_id, ts_id, pub_id, dis_gen_cnt_id, no_w_gen_cnt_id, srank_id, grank_id, agrank_id, eoc_id, valid_id : AlertLogIDType;
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-- *FUNCTION DECLARATION*
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function extract_key_hash (payload : TEST_PACKET_TYPE) return INSTANCE_HANDLE_TYPE is
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variable ret : INSTANCE_HANDLE_TYPE := HANDLE_NIL;
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begin
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for i in 0 to 3 loop
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ret(i) := not payload.data(i);
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end loop;
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return ret;
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end function;
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function gen_sn(input : natural) return SEQUENCENUMBER_TYPE is
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variable ret : SEQUENCENUMBER_TYPE;
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begin
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ret(0) := (others => '0');
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ret(1) := unsigned(int(input, WORD_WIDTH));
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return ret;
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end function;
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begin
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-- Unit Under Test
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uut : entity work.dds_reader(arch)
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generic map (
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TIME_BASED_FILTER_QOS => gen_duration(2,0),
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DEADLINE_QOS => DURATION_INFINITE,
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MAX_SAMPLES => std_logic_vector(to_unsigned(4,CDR_LONG_WIDTH)),
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MAX_INSTANCES => std_logic_vector(to_unsigned(3,CDR_LONG_WIDTH)),
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MAX_SAMPLES_PER_INSTANCE => std_logic_vector(to_unsigned(2,CDR_LONG_WIDTH)),
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HISTORY_QOS => KEEP_ALL_HISTORY_QOS,
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RELIABILITY_QOS => RELIABLE_RELIABILITY_QOS,
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PRESENTATION_QOS => INSTANCE_PRESENTATION_QOS,
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DESTINATION_ORDER_QOS => BY_RECEPTION_TIMESTAMP_DESTINATION_ORDER_QOS,
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COHERENT_ACCESS => FALSE,
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ORDERED_ACCESS => FALSE,
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WITH_KEY => TRUE,
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PAYLOAD_FRAME_SIZE => 11,
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MAX_REMOTE_ENDPOINTS => MAX_REMOTE_ENDPOINTS
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)
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port map (
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clk => clk,
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reset => reset,
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time => check_time,
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start_rtps => start_rtps,
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opcode_rtps => opcode_rtps,
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ack_rtps => ack_rtps,
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done_rtps => done_rtps,
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ret_rtps => ret_rtps,
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data_in_rtps => data_in_rtps,
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valid_in_rtps => valid_in_rtps,
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ready_in_rtps => ready_in_rtps,
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last_word_in_rtps => last_word_in_rtps,
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start_kh => start_kh,
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opcode_kh => opcode_kh,
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ack_kh => ack_kh,
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data_in_kh => data_in_kh,
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valid_in_kh => valid_in_kh,
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ready_in_kh => ready_in_kh,
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last_word_in_kh => last_word_in_kh,
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data_out_kh => data_out_kh,
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valid_out_kh => valid_out_kh,
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ready_out_kh => ready_out_kh,
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last_word_out_kh => last_word_out_kh,
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abort_kh => abort_kh,
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start_dds => start_dds,
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ack_dds => ack_dds,
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opcode_dds => opcode_dds,
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instance_state_dds => instance_state_dds,
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view_state_dds => view_state_dds,
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sample_state_dds => sample_state_dds,
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instance_handle_dds => instance_handle_dds,
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max_samples_dds => max_samples_dds,
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get_data_dds => get_data_dds,
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done_dds => done_dds,
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return_code_dds => return_code_dds,
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ready_out_dds => ready_out_dds,
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valid_out_dds => valid_out_dds,
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data_out_dds => data_out_dds,
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last_word_out_dds => last_word_out_dds,
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si_sample_state => si_sample_state,
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si_view_state => si_view_state,
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si_instance_state => si_instance_state,
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si_source_timestamp => si_source_timestamp,
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si_instance_handle => si_instance_handle,
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si_publication_handle => si_publication_handle,
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si_disposed_generation_count => si_disposed_generation_count,
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si_no_writers_generation_count => si_no_writers_generation_count,
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si_sample_rank => si_sample_rank,
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si_generation_rank => si_generation_rank,
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si_absolute_generation_rank => si_absolute_generation_rank,
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si_valid_data => si_valid_data,
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si_valid => si_valid,
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eoc => eoc,
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status => status
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);
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stimulus_prc : process
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variable RV : RandomPType;
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variable kh1, kh2, kh3, kh4 : INSTANCE_HANDLE_TYPE := HANDLE_NIL;
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variable cc1, cc2, cc3, cc4, cc : CACHE_CHANGE_TYPE := DEFAULT_CACHE_CHANGE;
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variable s : SAMPLE_TYPE := DEFAULT_SAMPLE;
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alias idle_sig is <<signal uut.idle_sig : std_logic>>;
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impure function gen_payload(key_hash : INSTANCE_HANDLE_TYPE; len : natural) return TEST_PACKET_TYPE is
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variable ret : TEST_PACKET_TYPE := EMPTY_TEST_PACKET;
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begin
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assert (len >= 4) report "Payload length has to be at least 16 Bytes long" severity FAILURE;
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for i in 0 to len-1 loop
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if (i < 4) then
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-- NOTE: Beginning of payload is negated key to allow deterministic Key Hash generation from the kh_prc
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ret.data(ret.length) := not key_hash(i);
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else
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ret.data(ret.length) := RV.RandSlv(WORD_WIDTH);
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end if;
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ret.length := ret.length + 1;
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end loop;
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ret.last(ret.length-1) := '1';
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return ret;
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end function;
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impure function gen_key_hash return KEY_HASH_TYPE is
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variable ret : KEY_HASH_TYPE := (others => (others => '0'));
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begin
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for i in 0 to KEY_HASH_TYPE'length-1 loop
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ret(i) := RV.RandSlv(WORD_WIDTH);
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end loop;
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return ret;
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end function;
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procedure start_dds is
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begin
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dds_start <= '1';
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wait until rising_edge(clk);
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dds_start <= '0';
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wait until rising_edge(clk);
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end procedure;
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procedure start_rtps is
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begin
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rtps_start <= '1';
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wait until rising_edge(clk);
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rtps_start <= '0';
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wait until rising_edge(clk);
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end procedure;
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procedure wait_on_dds is
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begin
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if (dds_done /= '1') then
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wait until dds_done = '1';
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end if;
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end procedure;
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procedure wait_on_rtps is
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begin
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if (rtps_done /= '1') then
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wait until rtps_done = '1';
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end if;
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end procedure;
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procedure wait_on_completion is
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begin
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if (rtps_done /= '1' or dds_done /= '1') then
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wait until rtps_done = '1' and dds_done = '1';
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end if;
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end procedure;
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-- NOTE: This procedure waits until the idle_sig is high for at least
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-- two consecutive clock cycles.
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procedure wait_on_idle is
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begin
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loop
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if (idle_sig /= '1') then
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wait until idle_sig = '1';
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else
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exit;
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end if;
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wait until rising_edge(clk);
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wait until rising_edge(clk);
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end loop;
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end procedure;
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begin
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SetAlertLogName("dds_reader - (KEEP ALL, Reliable, Positive TIME_BASED_FILTER, Keyed, BY_RECEPTION_TIMESTAMP_DESTINATION_ORDER, ACCESS SCOPE Instance, Unordered) - Level 0 - TIME_BASED_FILTER QoS Handling");
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SetAlertEnable(FAILURE, TRUE);
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SetAlertEnable(ERROR, TRUE);
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SetAlertEnable(WARNING, TRUE);
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SetLogEnable(DEBUG, FALSE);
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SetLogEnable(PASSED, FALSE);
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SetLogEnable(INFO, TRUE);
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RV.InitSeed(RV'instance_name);
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sstate_id <= GetAlertLogID("Sample State", ALERTLOG_BASE_ID);
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vstate_id <= GetAlertLogID("View State", ALERTLOG_BASE_ID);
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istate_id <= GetAlertLogID("Instance State", ALERTLOG_BASE_ID);
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ts_id <= GetAlertLogID("Source Timestamp", ALERTLOG_BASE_ID);
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inst_id <= GetAlertLogID("Instance Handle", ALERTLOG_BASE_ID);
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pub_id <= GetAlertLogID("Publication Hanlde", ALERTLOG_BASE_ID);
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dis_gen_cnt_id <= GetAlertLogID("Disposed Generation Count", ALERTLOG_BASE_ID);
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no_w_gen_cnt_id <= GetAlertLogID("No Writers Generation Count", ALERTLOG_BASE_ID);
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srank_id <= GetAlertLogID("Sample Rank", ALERTLOG_BASE_ID);
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grank_id <= GetAlertLogID("Generation Rank", ALERTLOG_BASE_ID);
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agrank_id <= GetAlertLogID("Absolute Generation Rank", ALERTLOG_BASE_ID);
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eoc_id <= GetAlertLogID("End Of Collection", ALERTLOG_BASE_ID);
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valid_id <= GetAlertLogID("Valid Data", ALERTLOG_BASE_ID);
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data_id <= GetAlertLogID("Data Out", ALERTLOG_BASE_ID);
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ret_id <= GetAlertLogID("Return Code", ALERTLOG_BASE_ID);
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-- Key Hashes
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kh1 := gen_key_hash;
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kh2 := gen_key_hash;
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kh3 := gen_key_hash;
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kh4 := gen_key_hash;
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Log("Initiating Test", INFO);
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Log("Current Time: 0s", INFO);
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check_time <= TIME_ZERO;
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reset <= '1';
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wait until rising_edge(clk);
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wait until rising_edge(clk);
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reset <= '0';
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-- MEM: 0, 0, 0, 0
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-- ISTATE: -
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-- WRITER: -
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cc := DEFAULT_CACHE_CHANGE;
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cc.serialized_key := FALSE;
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cc.kind := ALIVE;
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cc.instance := kh1;
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cc.payload := gen_payload(kh1,10);
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Log("RTPS Operation ADD_CACHE_CHANGE [KEY_HASH, Instance 1, Writer 0, Aligned Payload] (ACCEPTED)", INFO);
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rtps := DEFAULT_RTPS_READER_TEST;
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rtps.opcode := ADD_CACHE_CHANGE;
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rtps.cc := cc;
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rtps.writer_pos := 0;
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rtps.ret_code := OK;
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s := to_sample(cc,ALIVE_INSTANCE_STATE);
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add_sample(s,mem, BY_RECEPTION_TIMESTAMP_DESTINATION_ORDER_QOS);
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start_rtps;
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wait_on_rtps;
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wait_on_idle;
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-- MEM: I1S1, 0, 0, 0
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-- ISTATE: I1:ALIVE
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-- WRITER: W0:I1
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Log("Current Time: 1s", INFO);
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check_time <= gen_duration(1,0);
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wait until rising_edge(clk);
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wait until rising_edge(clk);
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wait_on_idle;
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cc := DEFAULT_CACHE_CHANGE;
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cc.serialized_key := FALSE;
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cc.kind := ALIVE;
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cc.instance := kh1;
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cc.payload := gen_payload(kh1,10);
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Log("RTPS Operation ADD_CACHE_CHANGE [KEY_HASH, Instance 1, Writer 0, Aligned Payload] (IGNORED: Time Based Filter)", INFO);
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rtps := DEFAULT_RTPS_READER_TEST;
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rtps.opcode := ADD_CACHE_CHANGE;
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rtps.cc := cc;
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rtps.writer_pos := 0;
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rtps.ret_code := OK;
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start_rtps;
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wait_on_rtps;
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wait_on_idle;
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cc := DEFAULT_CACHE_CHANGE;
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cc.serialized_key := FALSE;
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cc.kind := ALIVE;
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cc.instance := kh2;
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cc.payload := gen_payload(kh2,10);
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Log("RTPS Operation ADD_CACHE_CHANGE [KEY_HASH, Instance 2, Writer 1, Aligned Payload] (ACCEPTED)", INFO);
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rtps := DEFAULT_RTPS_READER_TEST;
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rtps.opcode := ADD_CACHE_CHANGE;
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rtps.cc := cc;
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rtps.writer_pos := 1;
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rtps.ret_code := OK;
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s := to_sample(cc,ALIVE_INSTANCE_STATE);
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add_sample(s,mem, BY_RECEPTION_TIMESTAMP_DESTINATION_ORDER_QOS);
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start_rtps;
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wait_on_rtps;
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wait_on_idle;
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-- MEM: I1S1, I2S1, 0, 0
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-- ISTATE: I1:ALIVE, I2:ALIVE
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-- WRITER: W0:I1, W1:I2
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Log("Current Time: 2s", INFO);
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check_time <= gen_duration(2,0);
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wait until rising_edge(clk);
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wait until rising_edge(clk);
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wait_on_idle;
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cc := DEFAULT_CACHE_CHANGE;
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cc.serialized_key := FALSE;
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cc.kind := ALIVE;
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cc.instance := kh2;
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cc.payload := gen_payload(kh2,10);
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Log("RTPS Operation ADD_CACHE_CHANGE [KEY_HASH, Instance 2, Writer 0, Aligned Payload] (IGNORED: Time Based Filter)", INFO);
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rtps := DEFAULT_RTPS_READER_TEST;
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rtps.opcode := ADD_CACHE_CHANGE;
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rtps.cc := cc;
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rtps.writer_pos := 1;
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rtps.ret_code := OK;
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start_rtps;
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wait_on_rtps;
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wait_on_idle;
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cc := DEFAULT_CACHE_CHANGE;
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cc.serialized_key := FALSE;
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cc.kind := ALIVE;
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cc.instance := kh1;
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cc.payload := gen_payload(kh1,10);
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|
||||
Log("RTPS Operation ADD_CACHE_CHANGE [KEY_HASH, Instance 1, Writer 0, Aligned Payload] (ACCEPTED)", INFO);
|
||||
rtps := DEFAULT_RTPS_READER_TEST;
|
||||
rtps.opcode := ADD_CACHE_CHANGE;
|
||||
rtps.cc := cc;
|
||||
rtps.writer_pos := 0;
|
||||
rtps.ret_code := OK;
|
||||
s := to_sample(cc,ALIVE_INSTANCE_STATE);
|
||||
add_sample(s,mem, BY_RECEPTION_TIMESTAMP_DESTINATION_ORDER_QOS);
|
||||
start_rtps;
|
||||
wait_on_rtps;
|
||||
wait_on_idle;
|
||||
-- MEM: I1S1, I2S1, I1S2, 0
|
||||
-- ISTATE: I1:ALIVE, I2:ALIVE
|
||||
-- WRITER: W0:I1, W1:I2
|
||||
|
||||
-- VAILDATE STATE
|
||||
|
||||
Log("DDS Operation READ [MAX_SAMPLES 4, ANY_SAMPLE_STATE, ANY_INSTANCE_STATE, ANY_VIEW_STATE]", INFO);
|
||||
dds := DEFAULT_DDS_READER_TEST;
|
||||
dds.opcode := READ;
|
||||
dds.max_samples := 4;
|
||||
dds.sstate := ANY_SAMPLE_STATE;
|
||||
dds.istate := ANY_INSTANCE_STATE;
|
||||
dds.vstate := ANY_VIEW_STATE;
|
||||
start_dds;
|
||||
wait_on_dds;
|
||||
wait_on_idle;
|
||||
|
||||
wait_on_completion;
|
||||
TranscriptOpen(RESULTS_FILE, APPEND_MODE);
|
||||
SetTranscriptMirror;
|
||||
ReportAlerts;
|
||||
TranscriptClose;
|
||||
std.env.stop;
|
||||
wait;
|
||||
end process;
|
||||
|
||||
clock_prc : process
|
||||
begin
|
||||
clk <= '0';
|
||||
wait for 25 ns;
|
||||
clk <= '1';
|
||||
wait for 25 ns;
|
||||
end process;
|
||||
|
||||
alert_prc : process(all)
|
||||
begin
|
||||
if rising_edge(clk) then
|
||||
-- TODO
|
||||
end if;
|
||||
end process;
|
||||
|
||||
dds_prc : process(all)
|
||||
variable col : COLLECTION_TYPE := DEFAULT_COLLECTION;
|
||||
begin
|
||||
if rising_edge(clk) then
|
||||
dds_done <= '0';
|
||||
case (dds_stage ) is
|
||||
when IDLE =>
|
||||
if (dds_start = '1') then
|
||||
dds_stage <= START;
|
||||
else
|
||||
dds_done <= '1';
|
||||
end if;
|
||||
when START =>
|
||||
if (ack_dds = '1') then
|
||||
dds_stage <= DONE;
|
||||
dds_cnt <= 0;
|
||||
end if;
|
||||
when DONE =>
|
||||
if (done_dds = '1') then
|
||||
AffirmIfEqual(ret_id, return_code_dds, dds.ret_code);
|
||||
case (dds.ret_code) is
|
||||
when RETCODE_OK =>
|
||||
gen_collection(mem, col, dds, INSTANCE_PRESENTATION_QOS, FALSE);
|
||||
dds_stage <= CHECK_SI;
|
||||
dds_cnt <= 0;
|
||||
when others =>
|
||||
dds_stage <= IDLE;
|
||||
end case;
|
||||
end if;
|
||||
when CHECK_SI =>
|
||||
if (si_valid = '1') then
|
||||
AffirmIfEqual(sstate_id, si_sample_state, col.s(dds_cnt).sstate);
|
||||
AffirmIfEqual(vstate_id, si_view_state, col.s(dds_cnt).vstate);
|
||||
AffirmIfEqual(istate_id, si_instance_state, col.s(dds_cnt).istate);
|
||||
AffirmIfEqual(ts_id, convert_from_double_word(si_source_timestamp), convert_from_double_word(col.s(dds_cnt).ts));
|
||||
AffirmIfEqual(inst_id, to_unsigned(si_instance_handle), to_unsigned(col.s(dds_cnt).inst));
|
||||
AffirmIfEqual(pub_id, to_unsigned(si_publication_handle), to_unsigned(HANDLE_NIL));
|
||||
AffirmIfEqual(dis_gen_cnt_id, si_disposed_generation_count, std_logic_vector(to_unsigned(col.s(dds_cnt).dis_gen_cnt,WORD_WIDTH)));
|
||||
AffirmIfEqual(no_w_gen_cnt_id, si_no_writers_generation_count, std_logic_vector(to_unsigned(col.s(dds_cnt).no_w_gen_cnt,WORD_WIDTH)));
|
||||
AffirmIfEqual(srank_id, si_sample_rank, std_logic_vector(to_unsigned(col.s(dds_cnt).srank,WORD_WIDTH)));
|
||||
AffirmIfEqual(grank_id, si_generation_rank, std_logic_vector(to_unsigned(col.s(dds_cnt).grank,WORD_WIDTH)));
|
||||
AffirmIfEqual(agrank_id, si_absolute_generation_rank, std_logic_vector(to_unsigned(col.s(dds_cnt).agrank,WORD_WIDTH)));
|
||||
if (si_valid_data = '1') then
|
||||
AffirmIf(valid_id, col.s(dds_cnt).data /= EMPTY_TEST_PACKET, "Sample with Data not expected");
|
||||
dds_stage <= CHECK_DATA;
|
||||
dds_cnt2 <= 0;
|
||||
else
|
||||
AffirmIf(valid_id, col.s(dds_cnt).data = EMPTY_TEST_PACKET, "Sample with Data expected");
|
||||
if (dds_cnt = col.len-1) then
|
||||
-- DONE
|
||||
dds_stage <= WAIT_EOC;
|
||||
else
|
||||
dds_cnt <= dds_cnt + 1;
|
||||
end if;
|
||||
end if;
|
||||
end if;
|
||||
AffirmIf(eoc_id, eoc = '0', "EOC pulled high");
|
||||
when CHECK_DATA =>
|
||||
if (valid_out_dds = '1') then
|
||||
AffirmIfEqual(data_id, data_out_dds, col.s(dds_cnt).data.data(dds_cnt2));
|
||||
dds_cnt2 <= dds_cnt2 + 1;
|
||||
if (dds_cnt2 = col.s(dds_cnt).data.length-1) then
|
||||
AlertIf(data_id, last_word_out_dds /= '1', "Last Word Signal not pulled High", ERROR);
|
||||
if (dds_cnt = col.len-1) then
|
||||
-- DONE
|
||||
dds_stage <= WAIT_EOC;
|
||||
else
|
||||
dds_stage <= CHECK_SI;
|
||||
dds_cnt <= dds_cnt + 1;
|
||||
end if;
|
||||
end if;
|
||||
end if;
|
||||
when WAIT_EOC =>
|
||||
if (eoc = '1') then
|
||||
dds_stage <= IDLE;
|
||||
end if;
|
||||
end case;
|
||||
end if;
|
||||
|
||||
-- DEFAULT
|
||||
start_dds <= '0';
|
||||
opcode_dds <= NOP;
|
||||
instance_state_dds <= ANY_INSTANCE_STATE;
|
||||
view_state_dds <= ANY_VIEW_STATE;
|
||||
sample_state_dds <= ANY_SAMPLE_STATE;
|
||||
instance_handle_dds <= HANDLE_NIL;
|
||||
max_samples_dds <= (others => '0');
|
||||
get_data_dds <= '0';
|
||||
ready_out_dds <= '0';
|
||||
|
||||
|
||||
case (dds_stage ) is
|
||||
when START =>
|
||||
start_dds <= '1';
|
||||
opcode_dds <= dds.opcode;
|
||||
instance_state_dds <= dds.istate;
|
||||
view_state_dds <= dds.vstate;
|
||||
sample_state_dds <= dds.sstate;
|
||||
instance_handle_dds <= dds.inst;
|
||||
max_samples_dds <= std_logic_vector(to_unsigned(dds.max_samples, WORD_WIDTH));
|
||||
when CHECK_SI =>
|
||||
if (si_valid = '1' and si_valid_data = '1') then
|
||||
get_data_dds <= '1';
|
||||
end if;
|
||||
when CHECK_DATA =>
|
||||
ready_out_dds <= '1';
|
||||
when others =>
|
||||
null;
|
||||
end case;
|
||||
end process;
|
||||
|
||||
rtps_prc : process(all)
|
||||
variable stimulus : TEST_PACKET_TYPE := EMPTY_TEST_PACKET;
|
||||
begin
|
||||
if rising_edge(clk) then
|
||||
rtps_done <= '0';
|
||||
case (rtps_stage) is
|
||||
when IDLE =>
|
||||
if (rtps_start = '1') then
|
||||
rtps_stage <= START;
|
||||
else
|
||||
rtps_done <= '1';
|
||||
end if;
|
||||
when START =>
|
||||
if (ack_rtps = '1') then
|
||||
case (rtps.opcode) is
|
||||
when ADD_CACHE_CHANGE =>
|
||||
gen_add_cache_change_dds(rtps.cc, rtps.lifespan, rtps.writer_pos, stimulus);
|
||||
rtps_stage <= PUSH;
|
||||
when others =>
|
||||
rtps_stage <= DONE;
|
||||
end case;
|
||||
end if;
|
||||
when PUSH =>
|
||||
if (ready_in_rtps = '1') then
|
||||
rtps_cnt <= rtps_cnt + 1;
|
||||
if (rtps_cnt = stimulus.length-1) then
|
||||
rtps_stage <= DONE;
|
||||
end if;
|
||||
end if;
|
||||
when DONE =>
|
||||
if (done_rtps = '1') then
|
||||
AffirmIfEqual(ret_id, HISTORY_CACHE_RESPONSE_TYPE'pos(ret_rtps), HISTORY_CACHE_RESPONSE_TYPE'pos(rtps.ret_code));
|
||||
rtps_stage <= IDLE;
|
||||
end if;
|
||||
end case;
|
||||
end if;
|
||||
|
||||
-- DEFAULT
|
||||
start_rtps <= '0';
|
||||
opcode_rtps <= NOP;
|
||||
valid_in_rtps <= '0';
|
||||
last_word_in_rtps <= '0';
|
||||
data_in_rtps <= (others => '0');
|
||||
|
||||
case (rtps_stage) is
|
||||
when START =>
|
||||
start_rtps <= '1';
|
||||
opcode_rtps <= rtps.opcode;
|
||||
case (rtps.opcode) is
|
||||
when REMOVE_WRITER =>
|
||||
data_in_rtps <= std_logic_vector(to_unsigned(rtps.writer_pos,WORD_WIDTH));
|
||||
when others =>
|
||||
null;
|
||||
end case;
|
||||
when PUSH =>
|
||||
valid_in_rtps <= '1';
|
||||
data_in_rtps <= stimulus.data(rtps_cnt);
|
||||
last_word_in_rtps <= stimulus.last(rtps_cnt);
|
||||
when others =>
|
||||
null;
|
||||
end case;
|
||||
end process;
|
||||
|
||||
kh_prc : process (all)
|
||||
variable tmp_key_hash : INSTANCE_HANDLE_TYPE := HANDLE_NIL;
|
||||
begin
|
||||
if rising_edge(clk) then
|
||||
case (kh_stage) is
|
||||
when IDLE =>
|
||||
if (start_kh = '1') then
|
||||
case (opcode_kh) is
|
||||
when PUSH_DATA =>
|
||||
kh_stage <= READ_DATA;
|
||||
kh_cnt <= 0;
|
||||
kh_data <= EMPTY_TEST_PACKET;
|
||||
when PUSH_SERIALIZED_KEY =>
|
||||
kh_stage <= READ_DATA;
|
||||
kh_cnt <= 0;
|
||||
kh_data <= EMPTY_TEST_PACKET;
|
||||
when READ_KEY_HASH =>
|
||||
kh_stage <= PUSH_KEY_HASH;
|
||||
kh_cnt <= 0;
|
||||
when others =>
|
||||
Alert("Unexpected Key Holder Operation", FAILURE);
|
||||
end case;
|
||||
end if;
|
||||
when READ_DATA =>
|
||||
if (valid_out_kh = '1') then
|
||||
kh_data.data(kh_cnt) <= data_out_kh;
|
||||
kh_data.last(kh_cnt) <= last_word_out_kh;
|
||||
kh_data.length <= kh_data.length + 1;
|
||||
|
||||
kh_cnt <= kh_cnt + 1;
|
||||
if (last_word_out_kh = '1') then
|
||||
kh_stage <= IDLE;
|
||||
end if;
|
||||
end if;
|
||||
when PUSH_KEY_HASH =>
|
||||
if (ready_in_kh = '1') then
|
||||
kh_cnt <= kh_cnt + 1;
|
||||
if (kh_cnt = INSTANCE_HANDLE_TYPE'length-1) then
|
||||
kh_stage <= IDLE;
|
||||
end if;
|
||||
end if;
|
||||
end case;
|
||||
end if;
|
||||
|
||||
-- DEFAULT
|
||||
ack_kh <= '0';
|
||||
ready_out_kh <= '0';
|
||||
valid_in_kh <= '0';
|
||||
data_in_kh <= (others => '0');
|
||||
last_word_in_kh <= '0';
|
||||
|
||||
case (kh_stage) is
|
||||
when IDLE =>
|
||||
if (start_kh = '1') then
|
||||
ack_kh <= '1';
|
||||
end if;
|
||||
when READ_DATA =>
|
||||
ready_out_kh <= '1';
|
||||
when PUSH_KEY_HASH =>
|
||||
valid_in_kh <= '1';
|
||||
tmp_key_hash := extract_key_hash(kh_data);
|
||||
data_in_kh <= tmp_key_hash(kh_cnt);
|
||||
if (kh_cnt = INSTANCE_HANDLE_TYPE'length-1) then
|
||||
last_word_in_kh <= '1';
|
||||
end if;
|
||||
end case;
|
||||
end process;
|
||||
|
||||
watchdog : process
|
||||
begin
|
||||
wait for 1 ms;
|
||||
Alert("Test timeout", FAILURE);
|
||||
std.env.stop;
|
||||
end process;
|
||||
|
||||
end architecture;
|
||||
@ -20,56 +20,58 @@ analyze ../rtps_reader.vhd
|
||||
analyze ../rtps_writer.vhd
|
||||
analyze ../dds_writer.vhd
|
||||
analyze ../dds_reader.vhd
|
||||
#analyze Level_0/L0_rtps_handler_test1.vhd
|
||||
#analyze Level_0/L0_rtps_handler_test2.vhd
|
||||
#analyze Level_0/L0_rtps_builtin_endpoint_test1.vhd
|
||||
#analyze Level_0/L0_rtps_builtin_endpoint_test2.vhd
|
||||
#analyze Level_0/L0_rtps_builtin_endpoint_test3.vhd
|
||||
#analyze Level_0/L0_rtps_builtin_endpoint_test4.vhd
|
||||
#analyze Level_0/L0_rtps_builtin_endpoint_test5.vhd
|
||||
#analyze Level_0/L0_rtps_builtin_endpoint_test6.vhd
|
||||
#analyze Level_0/L0_rtps_builtin_endpoint_test7.vhd
|
||||
#analyze Level_0/L0_rtps_out_test1.vhd
|
||||
#analyze Level_1/L1_rtps_builtin_endpoint_test1.vhd
|
||||
#analyze Level_0/L0_mem_ctrl_test1.vhd
|
||||
#analyze Level_0/L0_rtps_reader_test1_vrk.vhd
|
||||
#analyze Level_0/L0_rtps_reader_test1_vbk.vhd
|
||||
#analyze Level_0/L0_rtps_reader_test2_vrk.vhd
|
||||
#analyze Level_0/L0_rtps_reader_test2_trk.vhd
|
||||
#analyze Level_0/L0_rtps_reader_test2_vbk.vhd
|
||||
#analyze Level_0/L0_rtps_reader_test2_tbk.vhd
|
||||
#analyze Level_0/L0_rtps_reader_test2_vrn.vhd
|
||||
#analyze Level_0/L0_rtps_reader_test3_a.vhd
|
||||
#analyze Level_0/L0_rtps_reader_test3_m.vhd
|
||||
#analyze Level_1/L1_rtps_reader_test1_vrk.vhd
|
||||
#analyze Level_1/L1_rtps_reader_test1_trk.vhd
|
||||
#analyze Level_0/L0_rtps_writer_test1_vrkdp.vhd
|
||||
#analyze Level_0/L0_rtps_writer_test1_vbkdp.vhd
|
||||
#analyze Level_1/L1_rtps_writer_test1_vrkdp.vhd
|
||||
#analyze Level_1/L1_rtps_writer_test1_trkdp.vhd
|
||||
#analyze Level_1/L1_rtps_writer_test1_tbkdp.vhd
|
||||
#analyze Level_1/L1_rtps_writer_test1_vbkdp.vhd
|
||||
#analyze Level_1/L1_rtps_writer_test1_vrndp.vhd
|
||||
#analyze Level_1/L1_rtps_writer_test1_vrksp.vhd
|
||||
#analyze Level_1/L1_rtps_writer_test1_vrkdn.vhd
|
||||
#analyze Level_1/L1_rtps_writer_test1_trkdn.vhd
|
||||
#analyze Level_1/L1_rtps_writer_test2_vrkdn.vhd
|
||||
#analyze Level_0/L0_rtps_writer_test2_vrkdp.vhd
|
||||
#analyze Level_0/L0_dds_writer_test1_aik.vhd
|
||||
#analyze Level_0/L0_dds_writer_test1_ain.vhd
|
||||
#analyze Level_0/L0_dds_writer_test1_lik.vhd
|
||||
#analyze Level_0/L0_dds_writer_test1_afk.vhd
|
||||
#analyze Level_0/L0_dds_writer_test2_aik.vhd
|
||||
#analyze Level_0/L0_dds_writer_test3_aik.vhd
|
||||
#analyze Level_0/L0_dds_writer_test3_ain.vhd
|
||||
#analyze Level_0/L0_dds_writer_test4_aik.vhd
|
||||
#analyze Level_0/L0_dds_writer_test5_afk.vhd
|
||||
analyze Level_0/L0_rtps_handler_test1.vhd
|
||||
analyze Level_0/L0_rtps_handler_test2.vhd
|
||||
analyze Level_0/L0_rtps_builtin_endpoint_test1.vhd
|
||||
analyze Level_0/L0_rtps_builtin_endpoint_test2.vhd
|
||||
analyze Level_0/L0_rtps_builtin_endpoint_test3.vhd
|
||||
analyze Level_0/L0_rtps_builtin_endpoint_test4.vhd
|
||||
analyze Level_0/L0_rtps_builtin_endpoint_test5.vhd
|
||||
analyze Level_0/L0_rtps_builtin_endpoint_test6.vhd
|
||||
analyze Level_0/L0_rtps_builtin_endpoint_test7.vhd
|
||||
analyze Level_0/L0_rtps_out_test1.vhd
|
||||
analyze Level_1/L1_rtps_builtin_endpoint_test1.vhd
|
||||
analyze Level_0/L0_mem_ctrl_test1.vhd
|
||||
analyze Level_0/L0_rtps_reader_test1_vrk.vhd
|
||||
analyze Level_0/L0_rtps_reader_test1_vbk.vhd
|
||||
analyze Level_0/L0_rtps_reader_test2_vrk.vhd
|
||||
analyze Level_0/L0_rtps_reader_test2_trk.vhd
|
||||
analyze Level_0/L0_rtps_reader_test2_vbk.vhd
|
||||
analyze Level_0/L0_rtps_reader_test2_tbk.vhd
|
||||
analyze Level_0/L0_rtps_reader_test2_vrn.vhd
|
||||
analyze Level_0/L0_rtps_reader_test3_a.vhd
|
||||
analyze Level_0/L0_rtps_reader_test3_m.vhd
|
||||
analyze Level_1/L1_rtps_reader_test1_vrk.vhd
|
||||
analyze Level_1/L1_rtps_reader_test1_trk.vhd
|
||||
analyze Level_0/L0_rtps_writer_test1_vrkdp.vhd
|
||||
analyze Level_0/L0_rtps_writer_test1_vbkdp.vhd
|
||||
analyze Level_1/L1_rtps_writer_test1_vrkdp.vhd
|
||||
analyze Level_1/L1_rtps_writer_test1_trkdp.vhd
|
||||
analyze Level_1/L1_rtps_writer_test1_tbkdp.vhd
|
||||
analyze Level_1/L1_rtps_writer_test1_vbkdp.vhd
|
||||
analyze Level_1/L1_rtps_writer_test1_vrndp.vhd
|
||||
analyze Level_1/L1_rtps_writer_test1_vrksp.vhd
|
||||
analyze Level_1/L1_rtps_writer_test1_vrkdn.vhd
|
||||
analyze Level_1/L1_rtps_writer_test1_trkdn.vhd
|
||||
analyze Level_1/L1_rtps_writer_test2_vrkdn.vhd
|
||||
analyze Level_0/L0_rtps_writer_test2_vrkdp.vhd
|
||||
analyze Level_0/L0_dds_writer_test1_aik.vhd
|
||||
analyze Level_0/L0_dds_writer_test1_ain.vhd
|
||||
analyze Level_0/L0_dds_writer_test1_lik.vhd
|
||||
analyze Level_0/L0_dds_writer_test1_afk.vhd
|
||||
analyze Level_0/L0_dds_writer_test2_aik.vhd
|
||||
analyze Level_0/L0_dds_writer_test3_aik.vhd
|
||||
analyze Level_0/L0_dds_writer_test3_ain.vhd
|
||||
analyze Level_0/L0_dds_writer_test4_aik.vhd
|
||||
analyze Level_0/L0_dds_writer_test5_afk.vhd
|
||||
analyze Level_0/L0_dds_reader_test1_arzkriu.vhd
|
||||
analyze Level_0/L0_dds_reader_test1_lrzkriu.vhd
|
||||
analyze Level_0/L0_dds_reader_test1_lbzkriu.vhd
|
||||
analyze Level_0/L0_dds_reader_test1_abzkriu.vhd
|
||||
analyze Level_0/L0_dds_reader_test1_arznriu.vhd
|
||||
analyze Level_0/L0_dds_reader_test1_arzksiu.vhd
|
||||
analyze Level_0/L0_dds_reader_test2_arpkriu.vhd
|
||||
|
||||
|
||||
#simulate L0_rtps_handler_test1
|
||||
#simulate L0_rtps_handler_test2
|
||||
@ -115,9 +117,10 @@ analyze Level_0/L0_dds_reader_test1_arzksiu.vhd
|
||||
#simulate L0_dds_writer_test3_ain
|
||||
#simulate L0_dds_writer_test4_aik
|
||||
#simulate L0_dds_writer_test5_afk
|
||||
simulate L0_dds_reader_test1_arzkriu
|
||||
#simulate L0_dds_reader_test1_arzkriu
|
||||
#simulate L0_dds_reader_test1_lrzkriu
|
||||
#simulate L0_dds_reader_test1_lbzkriu
|
||||
#simulate L0_dds_reader_test1_abzkriu
|
||||
#simulate L0_dds_reader_test1_arznriu
|
||||
#simulate L0_dds_reader_test1_arzksiu
|
||||
simulate L0_dds_reader_test2_arpkriu
|
||||
Loading…
Reference in New Issue
Block a user