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Define Type2 IDL and implement TYPE2_READER_WRAPPER

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A test type is defined in IDL, and then manually implemented in the
Reader Wrapper.
This commit is contained in:
Greek 2021-11-04 13:55:04 +01:00
parent ee67fe9493
commit 5a22d51974
5 changed files with 1452 additions and 1 deletions
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61
src/Tests/Type2.idl Normal file
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@ -0,0 +1,61 @@
@extensibility(FINAL) @nested
union TestUnion_t switch (char) {
case 'a':
long LongU;
default:
octet OctetU;
};
@bit_bound(9)
bitmask TestBitmask_t {
@position(0) POS1,
@position(3) POS3,
@position(4) POS4
};
@bit_bound(7)
enum TestEnum_t {
A,
B,
C,
D
};
typedef octet TestArray_t[5];
@extensibility(FINAL) @nested
struct NestedStruct_t {
@key TestArray_t TestArray;
char TestChar;
wchar TestWChar;
long long TestLongLong;
@optional long double TestLongDouble;
};
typedef sequence<NestedStruct_t, 4> TestSequence_t;
typedef string<12> TestString_t;
typedef TestMap_t map<octet, short, 4>;
@extensibility(FINAL) @topic
struct Type2 {
@key long id;
@key TestSequence_t TestSequence;
TestMap_t TestMap;
TestEnum_t TestEnum;
@optional TestUnion_t TestUnion;
TestBitmask_t TestBitmask
TestString_t TestString;
};
@final
struct NestedStruct_tKeyHolder {
TestArray_t TestArray;
};
typedef sequence<NestedStruct_tKeyHolder, 4> TestSequence_tKeyHolder;
@final
struct Type2KeyHolder {
long id;
TestSequence_tKeyHolder TestSequence;
};

87
src/Tests/Type2_package.vhd Normal file
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@ -0,0 +1,87 @@
library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;
use work.rtps_package.all;
use work.math_pkg.all;
package Type2_package is
constant TESTSEQUENCE_MAX_DEPTH : natural := 4;
constant TESTSEQUENCE_ADDR_WIDTH : natural := log2c(TESTSEQUENCE_MAX_DEPTH);
constant TESTSEQUENCE_TESTARRAY_MAX_DEPTH : natural := 5;
constant TESTSEQUENCE_TESTARRAY_ADDR_WIDTH : natural := log2c(TESTSEQUENCE_TESTARRAY_MAX_DEPTH);
constant TESTSTRING_MAX_DEPTH : natural := 12;
constant TESTSTRING_ADDR_WIDTH : natural := log2c(TESTSTRING_MAX_DEPTH);
constant TESTMAP_MAX_DEPTH : natural := 4;
constant TESTMAP_ADDR_WIDTH : natural := log2c(TESTMAP_MAX_DEPTH);
constant TESTUNION_LONGU_D : std_logic_vector(CDR_CHAR_WIDTH-1 downto 0) := x"61";
constant TESTBITMASK_WIDTH : natural := 9;
constant TESTBITMASK_CDR_WIDTH : natural := CDR_SHORT_WIDTH;
constant TESTBITMASK_POS1 : natural := 0;
constant TESTBITMASK_POS3 : natural := 3;
constant TESTBITMASK_POS4 : natural := 4;
constant TESTENUM_WIDTH : natural := 7;
constant TESTENUM_CDR_WIDTH : natural := CDR_INT8_WIDTH;
constant TESTENUM_A : std_logic_vector(TESTENUM_WIDTH-1 downto 0) := "0000001";
constant TESTENUM_B : std_logic_vector(TESTENUM_WIDTH-1 downto 0) := "0000010";
constant TESTENUM_C : std_logic_vector(TESTENUM_WIDTH-1 downto 0) := "0000011";
constant TESTENUM_D : std_logic_vector(TESTENUM_WIDTH-1 downto 0) := "0000100";
constant MAX_ID_SIZE : natural := 4;
constant MAX_TESTSEQUENCE_TESTARRAY_SIZE : natural := 5;
constant MAX_TESTSEQUENCE_TESTCHAR_SIZE : natural := 1;
constant MAX_TESTSEQUENCE_TESTWCHAR_SIZE : natural := 2;
constant MAX_TESTSEQUENCE_TESTLONGLONG_SIZE : natural := 8;
constant MAX_TESTSEQUENCE_TESTLONGDOUBLE_SIZE : natural := 20;
constant MAX_TESTSEQUENCE_SIZE : natural := 148; -- 152
constant MAX_TESTMAP_SIZE : natural := 20; -- 172
constant MAX_TESTENUM_SIZE : natural := 1; -- 173
constant MAX_TESTUNION_SIZE : natural := 7; -- 180
constant MAX_TESTBITMASK_SIZE : natural := 4; -- 184
constant MAX_TESTSTRING_SIZE : natural := 17; -- 201
constant MAX_TYPE2_SIZE : natural := 201;
constant MAX_TYPE2_KEY_HOLDER_SIZE : natural := 28;
-- TODO:
constant MAX_ALIGN_OFFSET_WIDTH : natural := 3;
type ALIGN_TYPE is (ALIGN_1, ALIGN_2, ALIGN_4, ALIGN_8);
function check_align(offset : unsigned; align : ALIGN_TYPE) return boolean;
end package;
package body Type2_package is
function check_align(offset : unsigned; align : ALIGN_TYPE) return boolean is
variable ret : boolean := FALSE;
begin
assert (offset'length = MAX_ALIGN_OFFSET_WIDTH) severity FAILURE;
case (align) is
when ALIGN_1 =>
ret := TRUE;
when ALIGN_2 =>
if (offset(0 downto 0) = "0") then
ret := TRUE;
end if;
when ALIGN_4 =>
if (offset(1 downto 0) = "00") then
ret := TRUE;
end if;
when ALIGN_8 =>
if (offset(2 downto 0) = "000") then
ret := TRUE;
end if;
end case;
return ret;
end function;
end package body;

1151
src/Tests/Type2_reader_wrapper.vhd Normal file
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108
src/Type_CDR_ref.txt Normal file
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@ -0,0 +1,108 @@
# IDL DEFINITION
module Messenger {
@extensibility(FINAL) @nested
union TestUnion_t switch (char) {
case 'A':
long LongU;
default:
octet OctetU;
};
@bit_bound(7)
enum TestEnum_t {
A,
B,
C,
D
};
typedef octet TestArray_t[5];
@extensibility(FINAL) @nested
struct NestedStruct_t {
@key TestArray_t TestArray;
octet TestOctet;
short TestShort;
long long TestLongLong;
};
typedef sequence<NestedStruct_t, 4> TestSequence_t;
typedef string<12> TestString_t;
@topic
@extensibility(FINAL)
struct Message {
@key long id;
TestSequence_t TestSequence;
TestEnum_t TestEnum;
@optional TestUnion_t TestUnion;
TestString_t TestString;
};
};
# CONTENT INITIALIZATION
Messenger::Message message;
message.id = 10;
message.TestSequence.length(2);
message.TestSequence[0] = Messenger::NestedStruct_t();
message.TestSequence[0].TestArray[0] = 1;
message.TestSequence[0].TestArray[1] = 2;
message.TestSequence[0].TestArray[2] = 3;
message.TestSequence[0].TestArray[3] = 4;
message.TestSequence[0].TestArray[4] = 5;
message.TestSequence[0].TestOctet = 'a';
message.TestSequence[0].TestShort = L'b';
message.TestSequence[0].TestLongLong = 1024;
message.TestSequence[1] = Messenger::NestedStruct_t();
message.TestSequence[1].TestArray[0] = 6;
message.TestSequence[1].TestArray[1] = 7;
message.TestSequence[1].TestArray[2] = 8;
message.TestSequence[1].TestArray[3] = 9;
message.TestSequence[1].TestArray[4] = 10;
message.TestSequence[1].TestOctet = 'A';
message.TestSequence[1].TestShort = L'B';
message.TestSequence[1].TestLongLong = 4096;
message.TestEnum = Messenger::TestEnum_t::C;
message.TestUnion._d(0);
message.TestUnion.LongU(512);
message.TestUnion.OctetU(128);
message.TestString = "HelloWorld";
31............24..............16..............8...............0
+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
| Representation_id | Representation_options |
00 01 (=CDR_LE) 00 00
| id |
0a 00 00 00
| TestSequence.length |
02 00 00 00
| TS[0].TA[0] | TS[0].TA[1] | TS[0].TA[2] | TS[0].TA[3] | (TS...TestSequence, TA..TestArray)
01 02 03 04
| TS[0].TA[4] |TS[0].TestOctet| TS[0].TestShort |
05 61 62 00
| TS[0].TestLongLong |
| |
00 04 00 00 00 00 00 00
| TS[1].TA[0] | TS[2].TA[1] | TS[3].TA[2] | TS[4].TA[3] |
06 07 08 09
| TS[1].TA[4] |TS[1].TestOctet| TS[1].TestShort |
0a 41 42 00
| TS[0].TestLongLong |
| |
00 10 00 00 00 00 00 00
| TestEnum |
02 00 00 00
| TestUnion._d | TU.OctetU | PADDING |
00 80 00 00
| TestString.length |
0b 00 00 00
| TestString[0] | TestString[1] | TestString[2] | TestString[3] |
48 65 6c 6c
| TestString[4] | TestString[5] | TestString[6] | TestString[7] |
6f 57 6f 72
| TestString[8] | TestString[9] | TestString[10]|###############|
6c 64 00

46
src/rtps_config_package.vhd
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@ -43,7 +43,6 @@ package rtps_config_package is
type HISTORY_CACHE_OPCODE_TYPE is (NOP, ADD_CACHE_CHANGE, GET_CACHE_CHANGE, ACK_CACHE_CHANGE, NACK_CACHE_CHANGE, REMOVE_CACHE_CHANGE, REMOVE_WRITER, GET_MIN_SN, GET_MAX_SN); type HISTORY_CACHE_OPCODE_TYPE is (NOP, ADD_CACHE_CHANGE, GET_CACHE_CHANGE, ACK_CACHE_CHANGE, NACK_CACHE_CHANGE, REMOVE_CACHE_CHANGE, REMOVE_WRITER, GET_MIN_SN, GET_MAX_SN);
type KEY_HOLDER_OPCODE_TYPE is (NOP, PUSH_DATA, PUSH_SERIALIZED_KEY, READ_KEY_HASH, READ_SERIALIZED_KEY); type KEY_HOLDER_OPCODE_TYPE is (NOP, PUSH_DATA, PUSH_SERIALIZED_KEY, READ_KEY_HASH, READ_SERIALIZED_KEY);
type KEY_GENERATOR_OPCODE_TYPE is (NOP, WRITE_PAYLOAD, READ_KEY, READ_SIZE);
type HISTORY_CACHE_RESPONSE_TYPE is (OK, REJECTED, INVALID, ERROR); type HISTORY_CACHE_RESPONSE_TYPE is (OK, REJECTED, INVALID, ERROR);
type DDS_WRITER_OPCODE_TYPE is (NOP, REGISTER_INSTANCE, WRITE, DISPOSE, UNREGISTER_INSTANCE, LOOKUP_INSTANCE, WAIT_FOR_ACKNOWLEDGEMENTS, GET_OFFERED_DEADLINE_MISSED_STATUS, ASSERT_LIVELINESS, GET_LIVELINESS_LOST_STATUS); type DDS_WRITER_OPCODE_TYPE is (NOP, REGISTER_INSTANCE, WRITE, DISPOSE, UNREGISTER_INSTANCE, LOOKUP_INSTANCE, WAIT_FOR_ACKNOWLEDGEMENTS, GET_OFFERED_DEADLINE_MISSED_STATUS, ASSERT_LIVELINESS, GET_LIVELINESS_LOST_STATUS);
type DDS_READER_OPCODE_TYPE is (NOP, READ, TAKE, READ_NEXT_SAMPLE, TAKE_NEXT_SAMPLE, READ_INSTANCE, TAKE_INSTANCE, READ_NEXT_INSTANCE, TAKE_NEXT_INSTANCE, GET_SAMPLE_REJECTED_STATUS, GET_REQUESTED_DEADLINE_MISSED_STATUS); type DDS_READER_OPCODE_TYPE is (NOP, READ, TAKE, READ_NEXT_SAMPLE, TAKE_NEXT_SAMPLE, READ_INSTANCE, TAKE_INSTANCE, READ_NEXT_INSTANCE, TAKE_NEXT_INSTANCE, GET_SAMPLE_REJECTED_STATUS, GET_REQUESTED_DEADLINE_MISSED_STATUS);
@ -140,6 +139,19 @@ package rtps_config_package is
function gen_inline_qos (id : natural) return OUTPUT_DATA_TYPE; function gen_inline_qos (id : natural) return OUTPUT_DATA_TYPE;
-- Indexing Function to extract sub-vectors from std_logic_vector signals
-- input SLV from which to extract a sub-vector
-- index The SLV is divided in width-sized sub-vectors. index states which sub-vector to extract (depending on invert)
-- width width of sub-vector (NOTE: SLV must have a length multiple to width)
-- invert If invert=TRUE, index 0 is the leftmost sub-vector, else the rightmost
function get_sub_vector (input : std_logic_vector; index : natural; width : natural; invert : boolean) return std_logic_vector;
-- Indexing Function to write sub-vectors to std_logic_vector signals
-- input SLV from to which to write a sub-vector
-- sub Sub-vector to write into the SLV
-- index The SLV is divided in sub-sized 'sub'-vectors. index states which sub-vector to write (depending on invert)
-- invert If invert=TRUE, index 0 is the leftmost sub-vector, else the rightmost
function write_sub_vector(input : std_logic_vector; sub : std_logic_vector; index : natural; invert : boolean) return std_logic_vector;
end package; end package;
package body rtps_config_package is package body rtps_config_package is
@ -1200,4 +1212,36 @@ package body rtps_config_package is
end if; end if;
end function; end function;
function get_sub_vector (input : std_logic_vector; index : natural; width : natural; invert : boolean) return std_logic_vector is
variable ret : std_logic_vector(width-1 downto 0) := (others => '0');
begin
assert(input'length mod width = 0) report "Input Length has to be multiple of width" severity FAILURE;
assert(input'length / width > index) report "Index out of bounds" severity FAILURE;
if (invert = TRUE) then
ret := input(input'length-(index*width)-1 downto input'length-((index+1)*width));
else
ret := input(((index+1)*width)-1 downto index*width);
end if;
return ret;
end function;
function write_sub_vector(input : std_logic_vector; sub : std_logic_vector; index : natural; invert : boolean) return std_logic_vector is
variable ret : std_logic_vector(input'length-1 downto 0) := (others => '0');
begin
assert(input'length mod sub'length = 0) report "Input Length has to be multiple of sub width" severity FAILURE;
assert(input'length / sub'length > index) report "Index out of bounds" severity FAILURE;
ret := input;
if (invert = TRUE) then
ret(input'length-(index*sub'length)-1 downto input'length-((index+1)*sub'length)) := sub;
else
ret(((index+1)*sub'length)-1 downto index*sub'length) := sub;
end if;
return ret;
end function;
end package body; end package body;