Fix Port Name Convention and RTPS/DDS Handshacking
This commit is contained in:
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dc8746c463
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6488918ede
@ -36,13 +36,12 @@ entity dds_reader is
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start_dds : in std_logic;
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ack_dds : out std_logic;
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opcode_dds : in HISTORY_CACHE_OPCODE_TYPE;
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instance_state_in : in std_logic_vector(INSTANCE_STATE_KIND_WIDTH-1 downto 0);
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view_state_in : in std_logic_vector(VIEW_STATE_KIND_WIDTH-1 downto 0);
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sample_state_in : in std_logic_vector(SAMPLE_STATE_KIND_WIDTH-1 downto 0);
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instance_handle_in : in INSTANCE_HANDLE_TYPE;
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max_samples_in : in std_logic_vector(MAX_SAMPLES_WIDTH-1 downto 0);
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next_sample : in std_logic;
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get_data : in std_logic;
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instance_state_dds : in std_logic_vector(INSTANCE_STATE_KIND_WIDTH-1 downto 0);
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view_state_dds : in std_logic_vector(VIEW_STATE_KIND_WIDTH-1 downto 0);
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sample_state_dds : in std_logic_vector(SAMPLE_STATE_KIND_WIDTH-1 downto 0);
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instance_handle_dds : in INSTANCE_HANDLE_TYPE;
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max_samples_dds : in std_logic_vector(MAX_SAMPLES_WIDTH-1 downto 0);
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get_data_dds : in std_logic;
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done_dds : out std_logic;
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return_code_dds : out std_logic_vector(RETURN_CODE_WIDTH-1 downto 0);
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ready_out_dds : in std_logic;
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@ -510,6 +509,21 @@ begin
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);
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end generate;
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si_sample_state <= si_sample_state_sig;
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si_view_state <= si_view_state_sig;
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si_instance_state <= si_instance_handle_sig;
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si_source_timestamp <= si_source_timestamp_sig;
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si_instance_handle <= si_instance_handle_sig;
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si_publication_handle <= si_publication_handle_sig;
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si_disposed_generation_count <= si_disposed_generation_count_sig;
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si_no_writers_generation_count <= si_no_writers_generation_count_sig;
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si_sample_rank <= si_sample_rank_sig;
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si_generation_rank <= si_generation_rank_sig;
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si_absolute_generation_count <= si_absolute_generation_count_sig;
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si_valid_data <= si_valid_data_sig;
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si_valid <= si_valid_sig;
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status <= status_sig;
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-- *Main State Machine*
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-- STATE DESCRIPTION
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-- IDLE Idle State. Initiates Deadline Miss Checks, Lifespan Expiry Checks, RTPS Operation handling, and DDS Operation handling, in that priority order.
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@ -647,9 +661,6 @@ begin
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case (stage) is
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when IDLE =>
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-- DEFAULT
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ready_in_rtps <= '1';
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-- Reset
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remove_oldest_inst_sample_next <= '0';
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remove_oldest_sample_next <= '0';
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@ -692,8 +703,6 @@ begin
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elsif (start_rtps = '1') then
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case (opcode_rtps) is
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when ADD_CHANGE =>
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-- This Operation does not accept input at this time
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ready_in_rtps <= '0';
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res_rtps <= ACK;
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stage_next <= ADD_SAMPLE_INFO;
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@ -701,30 +710,27 @@ begin
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cnt_next <= 0;
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end if;
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when REMOVE_WRITER =>
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-- Input and Memory Gurad
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if (valid_in_rtps = '1') then
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res_rtps <= ACK;
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res_rtps <= ACK;
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-- Synthesis Guard
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if (WITH_KEY) then
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-- Latch Writer Pos
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writer_pos_next <= to_integer(unsigned(data_in_rtps));
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stage_next <= REMOVE_WRITER;
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cnt_next <= 2;
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else
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-- Convert Writer Bitmap to SLV
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tmp_bitmap := to_endpoint_bitmap(inst_data.writer_bitmap);
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-- Synthesis Guard
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if (WITH_KEY) then
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-- Latch Writer Pos
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writer_pos_next <= to_integer(unsigned(data_in_rtps));
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stage_next <= REMOVE_WRITER;
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cnt_next <= 2;
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else
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-- Convert Writer Bitmap to SLV
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tmp_bitmap := to_endpoint_bitmap(inst_data.writer_bitmap);
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-- Remove Writer
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tmp_bitmap(to_integer(unsigned(data_in_rtps))) := '0';
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-- Convert Back
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inst_data_next.writer_bitmap <= from_endpoint_bitmap(tmp_bitmap);
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-- NOT_ALIVE_NO_WRITERS Transition
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if (tmp_bitmap = (tmp_bitmap'range => '0') and inst_data.status_info(NOT_ALIVE_DISPOSED_FLAG) = '0') then
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inst_data_next.status_info(NOT_ALIVE_NO_WRITERS_FLAG) <= '1';
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end if;
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-- Remove Writer
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tmp_bitmap(to_integer(unsigned(data_in_rtps))) := '0';
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-- Convert Back
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inst_data_next.writer_bitmap <= from_endpoint_bitmap(tmp_bitmap);
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-- NOT_ALIVE_NO_WRITERS Transition
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if (tmp_bitmap = (tmp_bitmap'range => '0') and inst_data.status_info(NOT_ALIVE_DISPOSED_FLAG) = '0') then
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inst_data_next.status_info(NOT_ALIVE_NO_WRITERS_FLAG) <= '1';
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end if;
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end if;
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when others =>
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@ -741,10 +747,10 @@ begin
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-- DDS Operation
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elsif (start_dds = '1') then
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-- Latch Input Signals
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sample_state_next <= sample_state_in;
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view_state_next <= view_state_in;
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sample_state_next <= sample_state_dds;
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view_state_next <= view_state_dds;
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instance_state_next <= instance_state;
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max_samples_next <= unsigned(max_samples_in);
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max_samples_next <= unsigned(max_samples_dds);
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-- Reset
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single_sample_next <= '0';
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@ -809,7 +815,7 @@ begin
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ack_dds <= '1';
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single_instance_next <= '1';
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cur_sample_next <= oldest_sample;
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key_hash_next <= instance_handle_in;
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key_hash_next <= instance_handle_dds;
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stage_next <= CHECK_INSTANCE;
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cnt_next <= 0;
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else
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@ -823,7 +829,7 @@ begin
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is_take_next <= '1';
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single_instance_next <= '1';
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cur_sample_next <= oldest_sample;
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key_hash_next <= instance_handle_in;
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key_hash_next <= instance_handle_dds;
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stage_next <= CHECK_INSTANCE;
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cnt_next <= 0;
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else
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@ -837,7 +843,7 @@ begin
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single_instance_next <= '1';
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dynamic_next_instance_next <= '1';
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cur_sample_next <= oldest_sample;
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key_hash_next <= instance_handle_in;
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key_hash_next <= instance_handle_dds;
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stage_next <= FIND_NEXT_INSTANCE;
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cnt_next <= 0;
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else
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@ -852,7 +858,7 @@ begin
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single_instance_next <= '1';
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dynamic_next_instance_next <= '1';
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cur_sample_next <= oldest_sample;
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key_hash_next <= instance_handle_in;
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key_hash_next <= instance_handle_dds;
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stage_next <= FIND_NEXT_INSTANCE;
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cnt_next <= 0;
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else
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@ -1368,7 +1374,7 @@ begin
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-- Synthesis Guard
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if (WITH_KEY) then
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tmp_update <= tmp_update or IMF_STATUS_FLAG;
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status_info_update <= inst_data.status;
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status_info_update <= inst_data.status_info;
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status_info_update(NOT_ALIVE_DISPOSED_FLAG) <= '1';
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status_info_update(LIVELINESS_FLAG) <= '1';
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else
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@ -1399,7 +1405,7 @@ begin
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-- Synthesis Guard
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if (WITH_KEY) then
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tmp_update <= tmp_update or IMF_STATUS_FLAG;
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status_info_update <= inst_data.status;
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status_info_update <= inst_data.status_info;
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status_info_update(NOT_ALIVE_NO_WRITERS_FLAG) <= '1';
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status_info_update(LIVELINESS_FLAG) <= '1';
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else
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@ -1413,7 +1419,7 @@ begin
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-- Synthesis Guard
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if (WITH_KEY) then
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tmp_update <= tmp_update or IMF_STATUS_FLAG;
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status_info_update <= inst_data.status;
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status_info_update <= inst_data.status_info;
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status_info_update(NOT_ALIVE_DISPOSED_FLAG) <= '0';
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status_info_update(NOT_ALIVE_NO_WRITERS_FLAG) <= '0';
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status_info_update(LIVELINESS_FLAG) <= '1';
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@ -2212,8 +2218,8 @@ begin
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writer_bitmap <= from_endpoint_bitmap(tmp_bitmap);
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-- NOT_ALIVE_NO_WRITERS Transition
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if (tmp_bitmap = (tmp_bitmap'range => '0') and inst_data.status(NOT_ALIVE_DISPOSED_FLAG) = '0') then
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status_info_update <= inst_data.status;
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if (tmp_bitmap = (tmp_bitmap'range => '0') and inst_data.status_info(NOT_ALIVE_DISPOSED_FLAG) = '0') then
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status_info_update <= inst_data.status_info;
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status_info_update(NOT_ALIVE_NO_WRITERS_FLAG) <= '1';
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inst_op_start <= '1';
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inst_opcode <= UPDATE_INSTANCE;
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@ -2987,7 +2993,7 @@ begin
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status_sig_next(DATA_AVAILABLE_STATUS) <= '0';
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-- Sample Data Request
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if (get_data = '1') then
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if (get_data_dds = '1') then
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stage_next <= GET_PAYLOAD;
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cnt_next <= 0;
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else
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@ -28,28 +28,28 @@ entity rtps_reader is
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clk : in std_logic;
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reset : in std_logic;
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time : in TIME_TYPE;
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-- FROM RTPS_HANDLER
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empty : in std_logic;
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rd : out std_logic;
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last_word_in : in std_logic;
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data_in : in std_logic_vector(WORD_WIDTH-1 downto 0);
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-- FROM RTPS_BUILTIN_ENDPOINT
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meta_empty : in std_logic;
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meta_data_in : in std_logic_vector(WORD_WIDTH-1 downto 0);
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meta_rd : out std_logic;
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-- FROM RTPS_HANDLER (USER TRAFFIC)
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empty_user : in std_logic;
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rd_user : out std_logic;
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last_word_in_user : in std_logic;
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data_in_user : in std_logic_vector(WORD_WIDTH-1 downto 0);
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-- FROM RTPS_BUILTIN_ENDPOINT (META TRAFFIC)
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empty_meta : in std_logic;
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data_in_meta : in std_logic_vector(WORD_WIDTH-1 downto 0);
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rd_meta : out std_logic;
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-- RTPS OUTPUT
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rtps_wr : out std_logic;
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rtps_full : in std_logic;
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last_word_out : out std_logic;
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data_out : out std_logic_vector(WORD_WIDTH-1 downto 0);
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wr_rtps : out std_logic;
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full_rtps : in std_logic;
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last_word_out_rtps : out std_logic;
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data_out_rtps : out std_logic_vector(WORD_WIDTH-1 downto 0);
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-- TO DDS READER
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dds_start : out std_logic;
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dds_opcode : out HISTORY_CACHE_OPCODE_TYPE;
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dds_res : in HISTORY_CACHE_RESPOSNE_TYPE;
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dds_data_out : in std_logic_vector(WORD_WIDTH-1 downto 0);
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dds_valid_out : in std_logic;
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dds_ready_out : out std_logic;
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dds_last_word_out : in std_logic
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start_dds : out std_logic;
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opcode_dds : out HISTORY_CACHE_OPCODE_TYPE;
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res_dds : in HISTORY_CACHE_RESPOSNE_TYPE;
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data_out_dds : out std_logic_vector(WORD_WIDTH-1 downto 0);
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valid_out_dds : out std_logic;
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ready_out_dds : in std_logic;
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last_word_out_dds : out std_logic
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);
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end entity;
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@ -102,7 +102,7 @@ architecture arch of rtps_reader is
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-- *Memory FSM Opcodes*
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-- OPCODE DESCRIPTION
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-- SEARCH_ENDPOINT Find Endpoint with specified GUID in memory
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-- INSERT_ENDPOINT Insert Endpoint to first available empty slot in memory
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-- INSERT_ENDPOINT Insert Endpoint to first available empty_user slot in memory
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-- UPDATE_ENDPOINT Update Endpoint pointed by mem_addr_base. (mem_field_flags specifies which Fields to update)
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-- REMOVE_ENDPOINT Remove Endpoint pointed by mem_addr_base
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-- GET_FIRST_ENDPOINT Get Endpoint Data of first Endpoint stored in Memory. (mem_field_flags specifies which Fields to get)
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@ -198,7 +198,7 @@ architecture arch of rtps_reader is
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signal sn_latch_2, sn_latch_2_next : SEQUENCENUMBER_TYPE := SEQUENCENUMBER_UNKNOWN;
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-- Generic Sequence Number Latch
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signal sn_latch_3, sn_latch_3_next : SEQUENCENUMBER_TYPE := SEQUENCENUMBER_UNKNOWN;
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-- Toggle latching the "last_word_in" signal until reset
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-- Toggle latching the "last_word_in_user" signal until reset
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signal last_word_in_latch, last_word_in_latch_next : std_logic := '0';
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-- Time of next Stale Endpoint Check
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signal check_time, check_time_next : TIME_TYPE := TIME_INVALID;
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@ -261,16 +261,16 @@ architecture arch of rtps_reader is
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--*****ALIAS DECLARATION*****
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-- ENDPOINT FRAME HEADER
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alias header_opcode : std_logic_vector(7 downto 0) is data_in(31 downto 24);
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alias header_flags : std_logic_vector(7 downto 0) is data_in(23 downto 16);
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alias header_udp_port : std_logic_vector(15 downto 0) is data_in(15 downto 0);
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alias header_opcode : std_logic_vector(7 downto 0) is data_in_user(31 downto 24);
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alias header_flags : std_logic_vector(7 downto 0) is data_in_user(23 downto 16);
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alias header_udp_port : std_logic_vector(15 downto 0) is data_in_user(15 downto 0);
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-- RTPS PARAMETER LIST HEADER
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alias parameter_id : std_logic_vector(15 downto 0) is data_in(31 downto 16);
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alias parameter_length : std_logic_vector(15 downto 0) is data_in(15 downto 0);
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alias parameter_id : std_logic_vector(15 downto 0) is data_in_user(31 downto 16);
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alias parameter_length : std_logic_vector(15 downto 0) is data_in_user(15 downto 0);
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alias must_understand : std_logic is parameter_id(14);
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-- RTPS DATA PAYLOAD HEADER
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alias representation_id : std_logic_vector(15 downto 0) is data_in(31 downto 16);
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alias representation_options : std_logic_vector(15 downto 0) is data_in(15 downto 0);
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alias representation_id : std_logic_vector(15 downto 0) is data_in_user(31 downto 16);
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alias representation_options : std_logic_vector(15 downto 0) is data_in_user(15 downto 0);
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-- RTPS SUBMESSAGE FLAGS
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alias endian_flag : std_logic is flags(0);
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alias qos_flag : std_logic is flags(1);
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@ -320,14 +320,14 @@ begin
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read => mem_read,
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ready_in => mem_ready_in,
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valid_in => mem_valid_in,
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data_in => mem_write_data,
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data_in_user => mem_write_data,
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ready_out => mem_ready_out,
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valid_out => mem_valid_out,
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data_out => mem_read_data
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data_out_rtps => mem_read_data
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);
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-- Big Endian Representation
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data_in_swapped <= endian_swap(endian_flag, data_in);
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data_in_swapped <= endian_swap(endian_flag, data_in_user);
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-- *Main State Machine*
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-- STATE DESCRIPTION
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@ -392,24 +392,24 @@ begin
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lifespan_next <= lifespan;
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-- DEFAULT Unregistered
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mem_opcode <= NOP;
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dds_opcode <= ADD_CACHE_CHANGE;
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opcode_dds <= ADD_CACHE_CHANGE;
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lease_deadline <= TIME_INVALID;
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res_time <= TIME_INVALID;
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meta_rd <= '0';
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rd <= '0';
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rd_meta <= '0';
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rd_user <= '0';
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mem_op_start <= '0';
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dds_start <= '0';
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dds_ready_out <= '0';
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dds_valid_in <= '0';
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dds_last_word_in <= '0';
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start_dds <= '0';
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ready_out_dds <= '0';
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valid_out_dds <= '0';
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last_word_out_dds <= '0';
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rd_guard := '0';
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mem_field_flags <= (others => '0');
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dds_data_in <= (others => '0');
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data_out_dds <= (others => '0');
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-- Last Word Latch Setter
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if (last_word_in = '1') then
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if (last_word_in_user = '1') then
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last_word_in_latch_next <= '1';
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end if;
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@ -437,19 +437,19 @@ begin
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check_time_next <= TIME_INFINITE;
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end if;
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-- Input FIFO Guard
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elsif (meta_empty = '0') then
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meta_rd <= '1';
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elsif (empty_meta = '0') then
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rd_meta <= '1';
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-- Mark as METATRAFFIC
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is_meta_next <= '1';
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-- Latch Endpoint Metatraffic Opcode
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meta_opcode_next <= meta_data_in;
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meta_opcode_next <= data_in_meta;
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stage_next <= LATCH_GUIDPREFIX;
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cnt_next <= 0;
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-- Input FIFO Guard
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elsif (empty = '0') then
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elsif (empty_user = '0') then
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rd_guard := '1';
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-- Latch Opcode
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@ -467,9 +467,9 @@ begin
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end if;
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when LATCH_GUIDPREFIX =>
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-- Input FIFO Guard
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if ((is_meta = '1' and meta_empty = '0') or (is_meta = '0' and empty = '0')) then
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if ((is_meta = '1' and empty_meta = '0') or (is_meta = '0' and empty_user = '0')) then
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if (is_meta = '1') then
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meta_rd <= '1';
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rd_meta <= '1';
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else
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rd_guard := '1';
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end if;
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@ -479,23 +479,23 @@ begin
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-- GUID Prefix 1/3
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when 0 =>
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if (is_meta = '1') then
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guid_next(0) <= meta_data_in;
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guid_next(0) <= data_in_meta;
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else
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guid_next(0) <= data_in;
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guid_next(0) <= data_in_user;
|
||||
end if;
|
||||
-- GUID Prefix 2/3
|
||||
when 1 =>
|
||||
if (is_meta = '1') then
|
||||
guid_next(1) <= meta_data_in;
|
||||
guid_next(1) <= data_in_meta;
|
||||
else
|
||||
guid_next(1) <= data_in;
|
||||
guid_next(1) <= data_in_user;
|
||||
end if;
|
||||
-- GUID Prefix 3/3
|
||||
when 2 =>
|
||||
if (is_meta = '1') then
|
||||
guid_next(2) <= meta_data_in;
|
||||
guid_next(2) <= data_in_meta;
|
||||
else
|
||||
guid_next(2) <= data_in;
|
||||
guid_next(2) <= data_in_user;
|
||||
end if;
|
||||
|
||||
if (is_meta = '1' and (meta_opcode = OPCODE_PARTICIPANT_UNMATCH or meta_opcode = OPCODE_LIVELINESS_UPDATE)) then
|
||||
@ -508,14 +508,14 @@ begin
|
||||
end if;
|
||||
when LATCH_ENTITYID =>
|
||||
-- Input FIFO Guard
|
||||
if ((is_meta = '1' and meta_empty = '0') or (is_meta = '0' and empty = '0')) then
|
||||
if ((is_meta = '1' and empty_meta = '0') or (is_meta = '0' and empty_user = '0')) then
|
||||
if (is_meta = '1') then
|
||||
meta_rd <= '1';
|
||||
guid_next(3) <= meta_data_in;
|
||||
rd_meta <= '1';
|
||||
guid_next(3) <= data_in_meta;
|
||||
-- Memory Operation Guard
|
||||
else
|
||||
rd_guard := '1';
|
||||
guid_next(3) <= data_in;
|
||||
guid_next(3) <= data_in_user;
|
||||
end if;
|
||||
stage_next <= INITIATE_ENDPOINT_SEARCH;
|
||||
end if;
|
||||
@ -584,17 +584,17 @@ begin
|
||||
-- Synthesis Guard
|
||||
if (RELIABILTY_QOS = RELIABLE_RELIABILITY_QOS) then
|
||||
-- Input FIFO Guard
|
||||
if (meta_empty = '0') then
|
||||
meta_rd <= '1';
|
||||
if (empty_meta = '0') then
|
||||
rd_meta <= '1';
|
||||
cnt_next <= cnt + 1;
|
||||
|
||||
case (cnt) is
|
||||
-- IPv4 Address
|
||||
when 0 =>
|
||||
addr_next <= meta_data_in;
|
||||
addr_next <= data_in_meta;
|
||||
-- UDP Port
|
||||
when 1 =>
|
||||
portn_next <= meta_data_in(WORD_WIDTH-1 downto WORD_WIDTH-UDP_PORT_WIDTH-1);
|
||||
portn_next <= data_in_meta(WORD_WIDTH-1 downto WORD_WIDTH-UDP_PORT_WIDTH-1);
|
||||
|
||||
stage_next <= METATRAFFIC_OPERATION;
|
||||
when others =>
|
||||
@ -643,21 +643,17 @@ begin
|
||||
-- Ignore
|
||||
stage_next <= IDLE;
|
||||
else
|
||||
-- Output Guard
|
||||
if (dds_ready_in = '1') then
|
||||
-- Propagate Removal
|
||||
dds_start <= '1';
|
||||
dds_opcode <= REMOVE_WRITER;
|
||||
dds_valid_in <= '1';
|
||||
dds_data_in <= std_logic_vector(to_unsigned(mem_pos, WORD_WIDTH));
|
||||
-- Wait for Operation Acknowledgement
|
||||
if (dds_res = ACK) then
|
||||
-- Remove Unmatched Remote Endpoint
|
||||
mem_op_start <= '1';
|
||||
mem_opcode <= REMOVE_ENDPOINT;
|
||||
-- DONE
|
||||
stage_next <= IDLE;
|
||||
end if;
|
||||
-- Propagate Removal
|
||||
start_dds <= '1';
|
||||
opcode_dds <= REMOVE_WRITER;
|
||||
data_out_dds <= std_logic_vector(to_unsigned(mem_pos, WORD_WIDTH));
|
||||
-- Wait for Operation Acknowledgement
|
||||
if (res_dds = ACK) then
|
||||
-- Remove Unmatched Remote Endpoint
|
||||
mem_op_start <= '1';
|
||||
mem_opcode <= REMOVE_ENDPOINT;
|
||||
-- DONE
|
||||
stage_next <= IDLE;
|
||||
end if;
|
||||
end if;
|
||||
when OPCODE_PARTICIPANT_UNMATCH =>
|
||||
@ -670,19 +666,15 @@ begin
|
||||
else
|
||||
-- Participant Match
|
||||
if (guid(0) = mem_endpoint_data.guid(0) and guid(1) = mem_endpoint_data.guid(1) and guid(2) = mem_endpoint_data.guid(2)) then
|
||||
-- Output Guard
|
||||
if (dds_ready_in = '1') then
|
||||
-- Propagate Removal
|
||||
dds_start <= '1';
|
||||
dds_opcode <= REMOVE_WRITER;
|
||||
dds_valid_in <= '1';
|
||||
dds_data_in <= std_logic_vector(to_unsigned(mem_pos, WORD_WIDTH));
|
||||
-- Wait for Operation Acknowledgement
|
||||
if (dds_res = ACK) then
|
||||
-- Remove Unmatched Remote Endpoint
|
||||
mem_op_start <= '1';
|
||||
mem_opcode <= REMOVE_ENDPOINT;
|
||||
end if;
|
||||
-- Propagate Removal
|
||||
start_dds <= '1';
|
||||
opcode_dds <= REMOVE_WRITER;
|
||||
data_out_dds <= std_logic_vector(to_unsigned(mem_pos, WORD_WIDTH));
|
||||
-- Wait for Operation Acknowledgement
|
||||
if (res_dds = ACK) then
|
||||
-- Remove Unmatched Remote Endpoint
|
||||
mem_op_start <= '1';
|
||||
mem_opcode <= REMOVE_ENDPOINT;
|
||||
end if;
|
||||
end if;
|
||||
cnt_next <= 1;
|
||||
@ -738,37 +730,37 @@ begin
|
||||
end if;
|
||||
when LATCH_SRC_ADDR =>
|
||||
-- Input FIFO Guard
|
||||
if (empty = '0') then
|
||||
if (empty_user = '0') then
|
||||
rd_guard := '1';
|
||||
|
||||
-- Latch Source IP Address
|
||||
addr_next <= data_in;
|
||||
addr_next <= data_in_user;
|
||||
|
||||
stage_next <= LATCH_GUIDPREFIX;
|
||||
cnt_next <= 0;
|
||||
end if;
|
||||
when LATCH_EXTRA_DATA =>
|
||||
-- Input FIFO Guard
|
||||
if (empty = '0') then
|
||||
if (empty_user = '0') then
|
||||
rd_guard := '1';
|
||||
cnt_next <= cnt + 1;
|
||||
|
||||
case (cnt) is
|
||||
-- Sequence Number 1/2
|
||||
when 0 =>
|
||||
seq_nr_next(0) <= unsigned(data_in);
|
||||
seq_nr_next(0) <= unsigned(data_in_user);
|
||||
-- Sequence Number 2/2
|
||||
when 1 =>
|
||||
seq_nr_next(1) <= unsigned(data_in);
|
||||
seq_nr_next(1) <= unsigned(data_in_user);
|
||||
-- Store Next Sequence Number
|
||||
tmp_dw := (0 => seq_nr(0), 1 => unsigned(data_in));
|
||||
tmp_dw := (0 => seq_nr(0), 1 => unsigned(data_in_user));
|
||||
next_seq_nr_next <= tmp_dw + 1;
|
||||
-- Timestamp 1/2
|
||||
when 2 =>
|
||||
ts_next(0) <= unsigned(data_in);
|
||||
ts_next(0) <= unsigned(data_in_user);
|
||||
-- Timestamp 2/2
|
||||
when 3 =>
|
||||
ts_next(1) <= unsigned(data_in);
|
||||
ts_next(1) <= unsigned(data_in_user);
|
||||
|
||||
if (qos_flag = '1') then
|
||||
stage_next <= PROCESS_INLINE_QOS;
|
||||
@ -781,23 +773,23 @@ begin
|
||||
end if;
|
||||
when LATCH_HEARTBEAT =>
|
||||
-- Input FIFO Guard
|
||||
if (empty = '0') then
|
||||
if (empty_user = '0') then
|
||||
rd_guard := '1';
|
||||
cnt_next <= cnt + 1;
|
||||
|
||||
case (cnt) is
|
||||
-- First Sequence Number 1/2
|
||||
when 0 =>
|
||||
first_seq_nr_next(0) <= unsigned(data_in);
|
||||
first_seq_nr_next(0) <= unsigned(data_in_user);
|
||||
-- First Sequence Number 2/2
|
||||
when 1 =>
|
||||
first_seq_nr_next(1) <= unsigned(data_in);
|
||||
first_seq_nr_next(1) <= unsigned(data_in_user);
|
||||
-- Last Sequence Number 1/2
|
||||
when 2 =>
|
||||
last_seq_nr_next(0) <= unsigned(data_in);
|
||||
last_seq_nr_next(0) <= unsigned(data_in_user);
|
||||
-- Last Sequence Number 2/2
|
||||
when 3 =>
|
||||
last_seq_nr_next(1) <= unsigned(data_in);
|
||||
last_seq_nr_next(1) <= unsigned(data_in_user);
|
||||
|
||||
stage_next <= PROCESS_HEARTBEAT;
|
||||
when others =>
|
||||
@ -885,27 +877,27 @@ begin
|
||||
end if;
|
||||
when LATCH_GAP =>
|
||||
-- Input FIFO Guard
|
||||
if (empty = '0') then
|
||||
if (empty_user = '0') then
|
||||
rd_guard := '1';
|
||||
cnt_next <= cnt + 1;
|
||||
|
||||
case (cnt) is
|
||||
-- GapStart Sequence Number 1/2
|
||||
when 0 =>
|
||||
gap_start_next(0) <= unsigned(data_in);
|
||||
gap_start_next(0) <= unsigned(data_in_user);
|
||||
-- GapStart Sequence Number 2/2
|
||||
when 1 =>
|
||||
gap_start_next(1) <= unsigned(data_in);
|
||||
gap_start_next(1) <= unsigned(data_in_user);
|
||||
-- GapList.Base 1/2
|
||||
when 2 =>
|
||||
gap_list_base_next(0) <= unsigned(data_in);
|
||||
gap_list_base_next(0) <= unsigned(data_in_user);
|
||||
-- GapList.Base 2/2
|
||||
when 3 =>
|
||||
gap_list_base_next(1) <= unsigned(data_in);
|
||||
gap_list_base_next(1) <= unsigned(data_in_user);
|
||||
-- ReaderSNState.NumBits
|
||||
when 4 =>
|
||||
gap_list_end_next <= gap_list_base + to_integer(unsigned(data_in));
|
||||
bitmap_cnt_next <= unsigned(round_slv(data_in(log2c(MAX_BITMAP_WIDTH)-1 downto 0),bitmap_cnt'length));
|
||||
gap_list_end_next <= gap_list_base + to_integer(unsigned(data_in_user));
|
||||
bitmap_cnt_next <= unsigned(round_slv(data_in_user(log2c(MAX_BITMAP_WIDTH)-1 downto 0),bitmap_cnt'length));
|
||||
cnt2_next <= 0;
|
||||
-- ReaderSNState.Bitmap
|
||||
when 5 =>
|
||||
@ -971,7 +963,7 @@ begin
|
||||
end if;
|
||||
when PROCESS_INLINE_QOS =>
|
||||
-- input FIFO Guard
|
||||
if (empty = '0') then
|
||||
if (empty_user = '0') then
|
||||
rd_guard := '1';
|
||||
-- Reset Word Counter
|
||||
reset_read_cnt <= '1';
|
||||
@ -1068,7 +1060,7 @@ begin
|
||||
end if;
|
||||
when LATCH_LIFESPAN =>
|
||||
-- Input FIFO Guard
|
||||
if (empty = '0') then
|
||||
if (empty_user = '0') then
|
||||
rd_guard := '1';
|
||||
cnt_next <= cnt + 1;
|
||||
|
||||
@ -1093,23 +1085,23 @@ begin
|
||||
end if;
|
||||
when LATCH_KEY_HASH =>
|
||||
-- Input FIFO Guard
|
||||
if (empty = '0') then
|
||||
if (empty_user = '0') then
|
||||
rd_guard := '1';
|
||||
cnt_next <= cnt + 1;
|
||||
|
||||
case (cnt) is
|
||||
-- Key Hash 1/4
|
||||
when 0 =>
|
||||
key_hash_next(0) <= data_in;
|
||||
key_hash_next(0) <= data_in_user;
|
||||
-- Key Hash 2/4
|
||||
when 1 =>
|
||||
key_hash_next(1) <= data_in;
|
||||
key_hash_next(1) <= data_in_user;
|
||||
-- Key Hash 3/4
|
||||
when 2 =>
|
||||
key_hash_next(2) <= data_in;
|
||||
key_hash_next(2) <= data_in_user;
|
||||
-- Key Hash 4/4
|
||||
when 3 =>
|
||||
key_hash_next(3) <= data_in;
|
||||
key_hash_next(3) <= data_in_user;
|
||||
|
||||
-- DONE
|
||||
stage_next <= SKIP_PARAMETER;
|
||||
@ -1119,106 +1111,149 @@ begin
|
||||
end if;
|
||||
when LATCH_STATUS_INFO =>
|
||||
-- Input FIFO Guard
|
||||
if (empty = '0') then
|
||||
if (empty_user = '0') then
|
||||
rd_guard := '1';
|
||||
|
||||
status_info_next <= data_in;
|
||||
status_info_next <= data_in_user;
|
||||
|
||||
-- DONE
|
||||
stage_next <= SKIP_PARAMETER;
|
||||
end if;
|
||||
when INITIATE_ADD_CACHE_CHANGE_REQUEST =>
|
||||
dds_start <= '1';
|
||||
dds_opcode <= ADD_CACHE_CHANGE;
|
||||
start_dds <= '1';
|
||||
opcode_dds <= ADD_CACHE_CHANGE;
|
||||
-- Wait until History Cache acknowledges request
|
||||
if (dds_res = ACK) then
|
||||
if (res_dds = ACK) then
|
||||
stage_next <= ADD_CACHE_CHANGE;
|
||||
cnt_next <= 0;
|
||||
end if;
|
||||
when ADD_CACHE_CHANGE =>
|
||||
if (dds_ready_in = '1') then
|
||||
dds_valid_in <= '1';
|
||||
cnt_next <= cnt + 1;
|
||||
|
||||
case (cnt) is
|
||||
-- Status Info
|
||||
when 0 =>
|
||||
dds_data_in <= status_info;
|
||||
dds_data_in(KEY_HASH_FLAG) <= key_hash_rcvd;
|
||||
dds_data_in(PAYLOAD_FLAG) <= data_flag;
|
||||
-- Timestamp 1/2
|
||||
when 1 =>
|
||||
dds_data_in <= ts(0);
|
||||
-- Timestamp 2/2
|
||||
when 2 =>
|
||||
dds_data_in <= ts(1);
|
||||
-- Lifespan Deadline 1/2
|
||||
when 3 =>
|
||||
dds_data_in <= lifespan(0);
|
||||
-- Lifespan Deadline 2/2
|
||||
when 4 =>
|
||||
dds_data_in <= lifespan(1);
|
||||
case (cnt) is
|
||||
-- Status Info
|
||||
when 0 =>
|
||||
valid_out_dds <= '1';
|
||||
data_out_dds <= status_info;
|
||||
data_out_dds(KEY_HASH_FLAG) <= key_hash_rcvd;
|
||||
data_out_dds(PAYLOAD_FLAG) <= data_flag;
|
||||
-- Output Guard
|
||||
if (ready_out_dds = '1') then
|
||||
cnt_next <= cnt + 1;
|
||||
end if;
|
||||
-- Timestamp 1/2
|
||||
when 1 =>
|
||||
valid_out_dds <= '1';
|
||||
data_out_dds <= ts(0);
|
||||
-- Output Guard
|
||||
if (ready_out_dds = '1') then
|
||||
cnt_next <= cnt + 1;
|
||||
end if;
|
||||
-- Timestamp 2/2
|
||||
when 2 =>
|
||||
valid_out_dds <= '1';
|
||||
data_out_dds <= ts(1);
|
||||
-- Output Guard
|
||||
if (ready_out_dds = '1') then
|
||||
cnt_next <= cnt + 1;
|
||||
end if;
|
||||
-- Lifespan Deadline 1/2
|
||||
when 3 =>
|
||||
valid_out_dds <= '1';
|
||||
data_out_dds <= lifespan(0);
|
||||
-- Output Guard
|
||||
if (ready_out_dds = '1') then
|
||||
cnt_next <= cnt + 1;
|
||||
end if;
|
||||
-- Lifespan Deadline 2/2
|
||||
when 4 =>
|
||||
valid_out_dds <= '1';
|
||||
data_out_dds <= lifespan(1);
|
||||
-- Output Guard
|
||||
if (ready_out_dds = '1') then
|
||||
-- Skip Key Hash, if not received
|
||||
if (not WITH_KEY or key_hash_rcvd = '0') then
|
||||
cnt_next <= 9;
|
||||
cnt_next <= cnt + 5;
|
||||
else
|
||||
cnt_next <= cnt + 1;
|
||||
end if;
|
||||
-- Key hash 1/4
|
||||
when 5 =>
|
||||
dds_data_in <= key_hash(0);
|
||||
-- Key Hash 2/4
|
||||
when 6 =>
|
||||
dds_data_in <= key_hash(1);
|
||||
-- Key Hash 3/4
|
||||
when 7 =>
|
||||
dds_data_in <= key_hash(2);
|
||||
-- Key hash 4/4
|
||||
when 8 =>
|
||||
dds_data_in <= key_hash(3);
|
||||
-- Endpoint Memory Position
|
||||
when 9 =>
|
||||
-- Wait for Endpoint Search
|
||||
if (mem_op_done = '1') then
|
||||
|
||||
-- TODO: Assert mem_pos range fits in CDR_LONG
|
||||
dds_data_in <= std_logic_vector(to_unsigned(mem_pos, CDR_LONG_WIDTH));
|
||||
|
||||
end if;
|
||||
-- Key hash 1/4
|
||||
when 5 =>
|
||||
valid_out_dds <= '1';
|
||||
data_out_dds <= key_hash(0);
|
||||
-- Output Guard
|
||||
if (ready_out_dds = '1') then
|
||||
cnt_next <= cnt + 1;
|
||||
end if;
|
||||
-- Key Hash 2/4
|
||||
when 6 =>
|
||||
valid_out_dds <= '1';
|
||||
data_out_dds <= key_hash(1);
|
||||
-- Output Guard
|
||||
if (ready_out_dds = '1') then
|
||||
cnt_next <= cnt + 1;
|
||||
end if;
|
||||
-- Key Hash 3/4
|
||||
when 7 =>
|
||||
valid_out_dds <= '1';
|
||||
data_out_dds <= key_hash(2);
|
||||
-- Output Guard
|
||||
if (ready_out_dds = '1') then
|
||||
cnt_next <= cnt + 1;
|
||||
end if;
|
||||
-- Key hash 4/4
|
||||
when 8 =>
|
||||
valid_out_dds <= '1';
|
||||
data_out_dds <= key_hash(3);
|
||||
-- Output Guard
|
||||
if (ready_out_dds = '1') then
|
||||
cnt_next <= cnt + 1;
|
||||
end if;
|
||||
-- Endpoint Memory Position
|
||||
when 9 =>
|
||||
-- Wait for Endpoint Search
|
||||
if (mem_op_done = '1') then
|
||||
valid_out_dds <= '1';
|
||||
-- TODO: Assert mem_pos range fits in CDR_LONG
|
||||
data_out_dds <= std_logic_vector(to_unsigned(mem_pos, CDR_LONG_WIDTH));
|
||||
|
||||
-- Output Guard
|
||||
if (ready_out_dds = '1') then
|
||||
-- Payload exists
|
||||
if (data_flag = '1' or (WITH_KEY and key_flag = '1')) then
|
||||
stage_next <= PUSH_PAYLOAD;
|
||||
else
|
||||
-- DONE
|
||||
dds_last_word_in <= '1';
|
||||
stage_next <= FINALIZE_ADD_CACHE_CHANGE_REQUEST;
|
||||
last_word_out_dds <= '1';
|
||||
stage_next <= FINALIZE_ADD_CACHE_CHANGE_REQUEST;
|
||||
end if;
|
||||
else
|
||||
-- Keep State
|
||||
dds_valid_in <= '0';
|
||||
cnt_next <= cnt;
|
||||
end if;
|
||||
when others =>
|
||||
null;
|
||||
end case;
|
||||
end if;
|
||||
end if;
|
||||
when others =>
|
||||
null;
|
||||
end case;
|
||||
when PUSH_PAYLOAD =>
|
||||
-- Input/Output Guard
|
||||
if (empty = '0' and dds_ready_in = '1') then
|
||||
rd_guard := '1';
|
||||
dds_valid_in <= '1';
|
||||
|
||||
-- Input Guard
|
||||
if (empty_user = '0') then
|
||||
valid_out_dds <= '1';
|
||||
-- Push Payload to History Cache
|
||||
dds_data_in <= data_in;
|
||||
data_out_dds <= data_in_user;
|
||||
last_word_out_dds <= last_word_in_user;
|
||||
|
||||
-- Exit Condition
|
||||
if (last_word_in = '1') then
|
||||
dds_last_word_in <= '1';
|
||||
stage_next <= FINALIZE_ADD_CACHE_CHANGE_REQUEST;
|
||||
-- Output Guard
|
||||
if (ready_out_dds = '1') then
|
||||
rd_guard := '1';
|
||||
|
||||
-- Exit Condition
|
||||
if (last_word_in_user = '1') then
|
||||
stage_next <= FINALIZE_ADD_CACHE_CHANGE_REQUEST;
|
||||
end if;
|
||||
end if;
|
||||
end if;
|
||||
when FINALIZE_ADD_CACHE_CHANGE_REQUEST =>
|
||||
-- NOTE: Memory is already in done state from previous state (ADD_CACHE_CHANGE)
|
||||
assert (mem_op_done = '1') report "FINALIZE_ADD_CACHE_CHANGE_REQUEST precondition not met. mem_op_done /= '1'" severity FAILURE;
|
||||
-- Wait for History Cache Response
|
||||
if (dds_res /= UNDEFINED) then
|
||||
if (res_dds /= UNDEFINED) then
|
||||
|
||||
-- NOTE: The Lease Duration is also updated if the Cache Change is not accepted. This in effect "skews" the
|
||||
-- "correctness" of the Writer Liveliness Protocol until the reader has no pending request from the Writer.
|
||||
@ -1242,7 +1277,7 @@ begin
|
||||
-- NOTE: In case the operation was unsucessfull (e.g. reached Resource Limits), the Sequence Number is not updated
|
||||
-- and thus not "acknowledged".
|
||||
-- Operation was Accepted
|
||||
if (dds_res = ACCEPTED) then
|
||||
if (res_dds = ACCEPTED) then
|
||||
-- Update also next sequence number
|
||||
mem_field_flags <= NEXT_SEQ_NR_FLAG or LEASE_DEADLINE_FLAG;
|
||||
end if;
|
||||
@ -1348,7 +1383,7 @@ begin
|
||||
-- Synthesis Guard
|
||||
if (RELIABILTY_QOS = RELIABLE_RELIABILITY_QOS) then
|
||||
-- Output FIFO Guard
|
||||
if (rtps_full = '0') then
|
||||
if (full_rtps = '0') then
|
||||
wr_sig <= '1';
|
||||
cnt_next <= cnt + 1;
|
||||
|
||||
@ -1356,24 +1391,24 @@ begin
|
||||
-- OUTPUT HEADER
|
||||
-- Src IPv4 Address
|
||||
when 0 =>
|
||||
data_out <= DEFAULT_IPv4_ADDRESS;
|
||||
data_out_rtps <= DEFAULT_IPv4_ADDRESS;
|
||||
-- Dest IPv4 Address
|
||||
when 1 =>
|
||||
data_out <= mem_endpoint_data.addr;
|
||||
data_out_rtps <= mem_endpoint_data.addr;
|
||||
-- Src and Dest UDPv4 Ports
|
||||
when 2 =>
|
||||
data_out <= USER_IPv4_UNICAST_PORT & mem_endpoint_data.portn;
|
||||
data_out_rtps <= USER_IPv4_UNICAST_PORT & mem_endpoint_data.portn;
|
||||
-- RTPS MESSAGE HEADER
|
||||
when 3 =>
|
||||
data_out <= PROTOCOL_RTPS;
|
||||
data_out_rtps <= PROTOCOL_RTPS;
|
||||
when 4 =>
|
||||
data_out <= PROTOCOLVERSION_2_4 & VENDORID;
|
||||
data_out_rtps <= PROTOCOLVERSION_2_4 & VENDORID;
|
||||
when 5 =>
|
||||
data_out <= GUIDPREFIX(0);
|
||||
data_out_rtps <= GUIDPREFIX(0);
|
||||
when 6 =>
|
||||
data_out <= GUIDPREFIX(1);
|
||||
data_out_rtps <= GUIDPREFIX(1);
|
||||
when 7 =>
|
||||
data_out <= GUIDPREFIX(2);
|
||||
data_out_rtps <= GUIDPREFIX(2);
|
||||
-- Continue with respective RTPS Submessage
|
||||
stage_next <= return_stage;
|
||||
cnt_next <= 0;
|
||||
@ -1386,7 +1421,7 @@ begin
|
||||
-- Synthesis Guard
|
||||
if (RELIABILTY_QOS = RELIABLE_RELIABILITY_QOS) then
|
||||
-- Output FIFO Guard
|
||||
if (rtps_full = '0') then
|
||||
if (full_rtps = '0') then
|
||||
wr_sig <= '1';
|
||||
cnt_next <= cnt + 1;
|
||||
|
||||
@ -1394,31 +1429,31 @@ begin
|
||||
-- ACKNACK RTPS SUBMESSAGE
|
||||
-- RTPS Submessage Header
|
||||
when 0 =>
|
||||
data_out <= SID_ACKNACK & "00000010" & std_logic_vector(to_unsigned(28, SUBMESSAGE_LENGTH_WIDTH));
|
||||
data_out_rtps <= SID_ACKNACK & "00000010" & std_logic_vector(to_unsigned(28, SUBMESSAGE_LENGTH_WIDTH));
|
||||
-- Reader Entity ID
|
||||
when 1 =>
|
||||
data_out <= ENTITYID;
|
||||
data_out_rtps <= ENTITYID;
|
||||
-- Writer Entity ID
|
||||
when 2 =>
|
||||
data_out <= ENTITYID_UNKNOWN;
|
||||
data_out_rtps <= ENTITYID_UNKNOWN;
|
||||
-- Sequence Number Set (Bitmap Base 1/2)
|
||||
when 3 =>
|
||||
data_out <= std_logic_vector(mem_endpoint_data.next_seq_nr(0));
|
||||
data_out_rtps <= std_logic_vector(mem_endpoint_data.next_seq_nr(0));
|
||||
-- Sequence Number Set (Bitmap Base 2/2)
|
||||
when 4 =>
|
||||
data_out <= std_logic_vector(mem_endpoint_data.next_seq_nr(1));
|
||||
data_out_rtps <= std_logic_vector(mem_endpoint_data.next_seq_nr(1));
|
||||
-- Sequence Number Set (NumBits)
|
||||
when 5 =>
|
||||
data_out <= std_logic_vector(to_unsigned(CDR_LONG_WIDTH, CDR_LONG_WIDTH));
|
||||
data_out_rtps <= std_logic_vector(to_unsigned(CDR_LONG_WIDTH, CDR_LONG_WIDTH));
|
||||
-- Sequence Number Set (Bitmap)
|
||||
when 6 =>
|
||||
-- NOTE: In order to avoid having to generate a variable sized bitmap, we always request the next 32 sequence numbers, even if they do not exist (yet)
|
||||
-- XXX: Assumes correct implementation of the RTPS Protocol (i.e. Writer ignores requested SNs that do not exist)
|
||||
data_out <= (others => '1');
|
||||
data_out_rtps <= (others => '1');
|
||||
-- Count
|
||||
when 7 =>
|
||||
data_out <= std_logic_vector(count);
|
||||
last_word_out <= '1';
|
||||
data_out_rtps <= std_logic_vector(count);
|
||||
last_word_out_rtps <= '1';
|
||||
|
||||
-- Stale Check in Progress
|
||||
if (stale_check = '1') then
|
||||
@ -1436,7 +1471,7 @@ begin
|
||||
end if;
|
||||
when SKIP_PARAMETER =>
|
||||
-- Consumed last word of Packet
|
||||
if (last_word_in_latch = '1' and last_word_in = '0') then
|
||||
if (last_word_in_latch = '1' and last_word_in_user = '0') then
|
||||
-- Reset Last Word In Latch
|
||||
last_word_in_latch_next <= '0';
|
||||
-- Continue parsing next Packet
|
||||
@ -1446,12 +1481,12 @@ begin
|
||||
-- End of Parameter
|
||||
elsif ((read_cnt & "00" ) >= parameter_end) then
|
||||
-- Parse Next Parameter
|
||||
-- NOTE: data_in is already showing the next parameter
|
||||
-- NOTE: data_in_user is already showing the next parameter
|
||||
stage_next <= PROCESS_PL;
|
||||
-- Reset Parameter End
|
||||
parameter_end_next <= (others => '1');
|
||||
-- Input FIFO Guard
|
||||
elsif (empty = '0') then
|
||||
elsif (empty_user = '0') then
|
||||
-- Skip-Read
|
||||
rd_guard := '1';
|
||||
end if;
|
||||
@ -1465,13 +1500,13 @@ begin
|
||||
-- DONE
|
||||
stage_next <= IDLE;
|
||||
-- Consumed last word of Packet
|
||||
elsif (last_word_in_latch = '1' and last_word_in = '0') then
|
||||
elsif (last_word_in_latch = '1' and last_word_in_user = '0') then
|
||||
-- Reset Last Word In Latch
|
||||
last_word_in_latch_next <= '0';
|
||||
-- DONE
|
||||
stage_next <= IDLE;
|
||||
-- Input FIFO Guard
|
||||
elsif (empty = '0') then
|
||||
elsif (empty_user = '0') then
|
||||
-- Skip-Read
|
||||
rd_guard := '1';
|
||||
end if;
|
||||
@ -1484,7 +1519,7 @@ begin
|
||||
-- NOTE: If the Packet Length is smaller than expected there will be a read from input FIFO while
|
||||
-- the Packet Length has been reached and will be caught by this clause.
|
||||
-- The SKIP_PACKET clause prevents a read signal from occuring in this situation, and thus prevents from entering this state.
|
||||
if ((last_word_in_latch = '1' and last_word_in = '0') and rd_guard = '1') then
|
||||
if ((last_word_in_latch = '1' and last_word_in_user = '0') and rd_guard = '1') then
|
||||
-- Force rd_sig low
|
||||
rd_sig <= '0';
|
||||
-- Continue parsing next Packet
|
||||
@ -1518,7 +1553,7 @@ begin
|
||||
-- INSERT_ENDPOINT See Memory OPCODE Description
|
||||
-- UPDATE_ENDPOINT See Memory OPCODE Description
|
||||
-- REMOVE_ENDPOINT See Memory OPCODE Description
|
||||
-- FIND_EMPTY_SLOT Find first empty slot in memory.
|
||||
-- FIND_EMPTY_SLOT Find first empty_user slot in memory.
|
||||
-- RESET_MAX_POINTER Reset the max_endpoint_addr pointer to last occupied slot in memory.
|
||||
-- GET_NEXT_ENDPOINT See Memory OPCODE Description
|
||||
mem_ctrl_prc : process(all)
|
||||
@ -2452,7 +2487,7 @@ begin
|
||||
null;
|
||||
end case;
|
||||
when REMOVE_ENDPOINT =>
|
||||
-- Mark with ENTITYID_UNKNOWN to mark slot empty
|
||||
-- Mark with ENTITYID_UNKNOWN to mark slot empty_user
|
||||
mem_valid_in <= '1';
|
||||
mem_addr <= mem_addr_base + EMF_ENTITYID_OFFSET;
|
||||
mem_write_data <= ENTITYID_UNKNOWN;
|
||||
@ -2655,7 +2690,7 @@ begin
|
||||
-- Reset Read counter
|
||||
if (reset = '1' or reset_read_cnt = '1') then
|
||||
read_cnt <= (others => '0');
|
||||
-- Increment read counter each time rd is high
|
||||
-- Increment read counter each time rd_user is high
|
||||
elsif (rd_sig = '1') then
|
||||
read_cnt <= read_cnt + 1;
|
||||
end if;
|
||||
|
||||
Loading…
Reference in New Issue
Block a user