greek64/rtps-fpga
2
1
Fork 0
Code Issues Pull Requests Releases Wiki Activity

BUG FIX: rtps_builtin_endpoint does double endian swap (pre-swaped by rtps_handler)

Browse Source
This commit is contained in:
Greek 2021-12-11 17:42:24 +01:00
parent 48468d1131
commit 719766f5ed
1 changed files with 23 additions and 16 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

39
src/rtps_builtin_endpoint.vhd
View File

@ -1225,12 +1225,12 @@ begin
-- Latch Sequence Number -- Latch Sequence Number
case (cnt) is case (cnt) is
when 0 => when 0 =>
seq_nr_next(0) <= unsigned(data_in_swapped); seq_nr_next(0) <= unsigned(data_in);
cnt_next <= cnt + 1; cnt_next <= cnt + 1;
when 1 => when 1 =>
seq_nr_next(1) <= unsigned(data_in_swapped); seq_nr_next(1) <= unsigned(data_in);
-- Store Next Sequence Number -- Store Next Sequence Number
tmp_dw := (0 => seq_nr(0), 1 => unsigned(data_in_swapped)); tmp_dw := (0 => seq_nr(0), 1 => unsigned(data_in));
next_seq_nr_next <= tmp_dw + 1; next_seq_nr_next <= tmp_dw + 1;
stage_next <= PROCESS_DATA; stage_next <= PROCESS_DATA;
@ -1424,6 +1424,8 @@ begin
end case; end case;
end if; end if;
when PROCESS_GAP => when PROCESS_GAP =>
-- NOTE: Data is already endain swapped by rtps_handler
-- Input FIFO Guard -- Input FIFO Guard
if (empty = '0') then if (empty = '0') then
rd_guard := '1'; rd_guard := '1';
@ -1431,24 +1433,24 @@ begin
case (cnt) is case (cnt) is
-- GapStart Sequence Number 1/2 -- GapStart Sequence Number 1/2
when 0 => when 0 =>
gap_start_next(0) <= unsigned(data_in_swapped); gap_start_next(0) <= unsigned(data_in);
cnt_next <= cnt + 1; cnt_next <= cnt + 1;
-- GapStart Sequence Number 2/2 -- GapStart Sequence Number 2/2
when 1 => when 1 =>
gap_start_next(1) <= unsigned(data_in_swapped); gap_start_next(1) <= unsigned(data_in);
cnt_next <= cnt + 1; cnt_next <= cnt + 1;
-- GapList.Base 1/2 -- GapList.Base 1/2
when 2 => when 2 =>
gap_list_base_next(0) <= unsigned(data_in_swapped); gap_list_base_next(0) <= unsigned(data_in);
cnt_next <= cnt + 1; cnt_next <= cnt + 1;
-- GapList.Base 2/2 -- GapList.Base 2/2
when 3 => when 3 =>
gap_list_base_next(1) <= unsigned(data_in_swapped); gap_list_base_next(1) <= unsigned(data_in);
cnt_next <= cnt + 1; cnt_next <= cnt + 1;
-- GapList.NumBits -- GapList.NumBits
when 4 => when 4 =>
gap_list_end_next <= gap_list_base + to_integer(unsigned(data_in_swapped)); gap_list_end_next <= gap_list_base + to_integer(unsigned(data_in));
bitmap_cnt_next <= unsigned(round_slv(data_in_swapped(log2c(MAX_BITMAP_WIDTH)-1 downto 0),bitmap_cnt'length)); bitmap_cnt_next <= unsigned(round_slv(data_in(log2c(MAX_BITMAP_WIDTH)-1 downto 0),bitmap_cnt'length));
cnt2_next <= 0; cnt2_next <= 0;
cnt_next <= cnt + 1; cnt_next <= cnt + 1;
-- GapList.Bitmap -- GapList.Bitmap
@ -1457,7 +1459,7 @@ begin
if (cnt2 < bitmap_cnt) then if (cnt2 < bitmap_cnt) then
cnt2_next <= cnt2 + 1; cnt2_next <= cnt2 + 1;
bitmap_latch_next(cnt2) <= data_in_swapped; bitmap_latch_next(cnt2) <= data_in;
else else
stage_next <= PROCESS_GAP_SEQUENCE_NUMBERS; stage_next <= PROCESS_GAP_SEQUENCE_NUMBERS;
end if; end if;
@ -1518,6 +1520,8 @@ begin
end if; end if;
end if; end if;
when PROCESS_HEARTBEAT => when PROCESS_HEARTBEAT =>
-- NOTE: Data is already endain swapped by rtps_handler
-- Input FIFO Guard -- Input FIFO Guard
if (empty = '0') then if (empty = '0') then
rd_guard := '1'; rd_guard := '1';
@ -1525,16 +1529,16 @@ begin
-- Latch Sequence Numbers -- Latch Sequence Numbers
case (cnt) is case (cnt) is
when 0 => when 0 =>
first_seq_nr_next(0) <= unsigned(data_in_swapped); first_seq_nr_next(0) <= unsigned(data_in);
cnt_next <= cnt + 1; cnt_next <= cnt + 1;
when 1 => when 1 =>
first_seq_nr_next(1) <= unsigned(data_in_swapped); first_seq_nr_next(1) <= unsigned(data_in);
cnt_next <= cnt + 1; cnt_next <= cnt + 1;
when 2 => when 2 =>
last_seq_nr_next(0) <= unsigned(data_in_swapped); last_seq_nr_next(0) <= unsigned(data_in);
cnt_next <= cnt + 1; cnt_next <= cnt + 1;
when 3 => when 3 =>
last_seq_nr_next(1) <= unsigned(data_in_swapped); last_seq_nr_next(1) <= unsigned(data_in);
stage_next <= PROCESS_HEARTBEAT_SEQUENCE_NUMBERS; stage_next <= PROCESS_HEARTBEAT_SEQUENCE_NUMBERS;
when others => when others =>
null; null;
@ -1621,6 +1625,9 @@ begin
stage_next <= SKIP_PACKET; stage_next <= SKIP_PACKET;
end if; end if;
when PROCESS_ACKNACK => when PROCESS_ACKNACK =>
-- NOTE: Data is already endain swapped by rtps_handler
-- Input FIFO Guard
if (empty = '0') then if (empty = '0') then
rd_guard := '1'; rd_guard := '1';
@ -1628,10 +1635,10 @@ begin
-- NOTE: Because we always sent the entire history cache, we only need to look at the SequenceNumberSetBase to determine if we need to sent data or not -- NOTE: Because we always sent the entire history cache, we only need to look at the SequenceNumberSetBase to determine if we need to sent data or not
case (cnt) is case (cnt) is
when 0 => when 0 =>
first_seq_nr_next(0) <= unsigned(data_in_swapped); first_seq_nr_next(0) <= unsigned(data_in);
cnt_next <= cnt + 1; cnt_next <= cnt + 1;
when 1 => when 1 =>
first_seq_nr_next(1) <= unsigned(data_in_swapped); first_seq_nr_next(1) <= unsigned(data_in);
stage_next <= PROCESS_ACKNACK_SEQUENCE_NUMBERS; stage_next <= PROCESS_ACKNACK_SEQUENCE_NUMBERS;
when others => when others =>