diff --git a/sim/L0_dds_reader_test5_arzkriu.do b/sim/L0_dds_reader_test5_arzkriu.do new file mode 100644 index 0000000..1924091 --- /dev/null +++ b/sim/L0_dds_reader_test5_arzkriu.do @@ -0,0 +1,198 @@ +onerror {resume} +radix define DDS_RETCODE { + "10#0#" "RETCODE_OK", + "10#1#" "RETCODE_ERROR", + "10#2#" "RETCODE_UNSUPPORTED", + "10#3#" "RETCODE_BAD_PARAMETER", + "10#4#" "RETCODE_PRECONDITION_NOT_MET", + "10#5#" "RETCODE_OUT_OF_RESOURCES", + "10#6#" "RETCODE_NOT_ENABLED", + "10#7#" "RETCODE_IMMUTABLE_POLICY", + "10#8#" "RETCODE_INCONSISTENT_POLICY", + "10#9#" "RETCODE_ALREADY_DELETED", + "10#10#" "RETCODE_TIMEOUT", + "10#11#" "RETCODE_NO_DATA", + "10#12#" "RETCODE_ILLEGAL_OPERATION", + -default unsigned +} +radix define SAMPLE_STATE { + "16#00000001#" "READ_SAMPLE_STATE", + "16#00000002#" "NOT_READ_SAMPLE_STATE", + "16#FFFFFFFF#" "ANY_SAMPLE_STATE", + -default binary +} +radix define VIEW_STATE { + "16#00000001#" "NEW_VIEW_STATE", + "16#00000002#" "NOT_NEW_VIEW_STATE", + "16#FFFFFFFF#" "ANY_VIEW_STATE", + -default binary +} +radix define INSTANCE_STATE { + "16#00000001#" "ALIVE_INSTANCE_STATE", + "16#00000002#" "NOT_ALIVE_DISPOSED_INSTANCE_STATE", + "16#00000004#" "NOT_ALIVE_NO_WRITERS_INSTANCE_STATE", + "16#FFFFFFFF#" "ANY_INSTANCE_STATE", + -default binary +} +radix define LAST_REASON { + "16#00000000#" "NOT_REJECTED", + "16#00000001#" "REJECTED_BY_INSTANCES_LIMIT", + "16#00000002#" "REJECTED_BY_SAMPLES_LIMIT", + "16#00000003#" "REJECTED_BY_SAMPLES_PER_INSTANCE_LIMIT", + "16#000000FF#" "REJECTED_BY_PAYOAD_MEMORY_LIMIT", + -default binary +} +quietly WaveActivateNextPane {} 0 +add wave -noupdate -divider SYSTEM +add wave -noupdate /l0_dds_reader_test5_arzkriu/uut/clk +add wave -noupdate /l0_dds_reader_test5_arzkriu/uut/reset +add wave -noupdate -radix unsigned /l0_dds_reader_test5_arzkriu/uut/time +add wave -noupdate -divider RTPS +add wave -noupdate -expand -group RTPS /l0_dds_reader_test5_arzkriu/uut/start_rtps +add wave -noupdate -expand -group RTPS /l0_dds_reader_test5_arzkriu/uut/opcode_rtps +add wave -noupdate -expand -group RTPS /l0_dds_reader_test5_arzkriu/uut/ack_rtps +add wave -noupdate -expand -group RTPS /l0_dds_reader_test5_arzkriu/uut/ret_rtps +add wave -noupdate -expand -group RTPS /l0_dds_reader_test5_arzkriu/uut/done_rtps +add wave -noupdate -expand -group RTPS /l0_dds_reader_test5_arzkriu/uut/ready_in_rtps +add wave -noupdate -expand -group RTPS /l0_dds_reader_test5_arzkriu/uut/valid_in_rtps +add wave -noupdate -expand -group RTPS -radix hexadecimal /l0_dds_reader_test5_arzkriu/uut/data_in_rtps +add wave -noupdate -expand -group RTPS /l0_dds_reader_test5_arzkriu/uut/last_word_in_rtps +add wave -noupdate -divider DDS +add wave -noupdate -group DDS /l0_dds_reader_test5_arzkriu/uut/start_dds +add wave -noupdate -group DDS /l0_dds_reader_test5_arzkriu/uut/ack_dds +add wave -noupdate -group DDS /l0_dds_reader_test5_arzkriu/uut/opcode_dds +add wave -noupdate -group DDS -radix SAMPLE_STATE /l0_dds_reader_test5_arzkriu/uut/sample_state_dds +add wave -noupdate -group DDS -radix INSTANCE_STATE /l0_dds_reader_test5_arzkriu/uut/instance_state_dds +add wave -noupdate -group DDS -radix VIEW_STATE /l0_dds_reader_test5_arzkriu/uut/view_state_dds +add wave -noupdate -group DDS -radix hexadecimal /l0_dds_reader_test5_arzkriu/uut/instance_handle_dds +add wave -noupdate -group DDS -radix unsigned /l0_dds_reader_test5_arzkriu/uut/max_samples_dds +add wave -noupdate -group DDS -radix DDS_RETCODE /l0_dds_reader_test5_arzkriu/uut/return_code_dds +add wave -noupdate -group DDS /l0_dds_reader_test5_arzkriu/uut/done_dds +add wave -noupdate -group DDS -divider SI +add wave -noupdate -group DDS -radix SAMPLE_STATE /l0_dds_reader_test5_arzkriu/uut/si_sample_state +add wave -noupdate -group DDS -radix VIEW_STATE /l0_dds_reader_test5_arzkriu/uut/si_view_state +add wave -noupdate -group DDS -radix INSTANCE_STATE /l0_dds_reader_test5_arzkriu/uut/si_instance_state +add wave -noupdate -group DDS -radix unsigned /l0_dds_reader_test5_arzkriu/uut/si_source_timestamp +add wave -noupdate -group DDS -radix hexadecimal /l0_dds_reader_test5_arzkriu/uut/si_instance_handle +add wave -noupdate -group DDS -radix hexadecimal /l0_dds_reader_test5_arzkriu/uut/si_publication_handle +add wave -noupdate -group DDS -radix unsigned /l0_dds_reader_test5_arzkriu/uut/si_disposed_generation_count +add wave -noupdate -group DDS -radix unsigned /l0_dds_reader_test5_arzkriu/uut/si_no_writers_generation_count +add wave -noupdate -group DDS -radix unsigned /l0_dds_reader_test5_arzkriu/uut/si_sample_rank +add wave -noupdate -group DDS -radix unsigned /l0_dds_reader_test5_arzkriu/uut/si_generation_rank +add wave -noupdate -group DDS -radix unsigned /l0_dds_reader_test5_arzkriu/uut/si_absolute_generation_rank +add wave -noupdate -group DDS /l0_dds_reader_test5_arzkriu/uut/si_valid_data +add wave -noupdate -group DDS /l0_dds_reader_test5_arzkriu/uut/si_valid +add wave -noupdate -group DDS /l0_dds_reader_test5_arzkriu/uut/get_data_dds +add wave -noupdate -group DDS /l0_dds_reader_test5_arzkriu/uut/eoc +add wave -noupdate -group DDS -divider OUTPUT +add wave -noupdate -group DDS /l0_dds_reader_test5_arzkriu/uut/ready_out_dds +add wave -noupdate -group DDS /l0_dds_reader_test5_arzkriu/uut/valid_out_dds +add wave -noupdate -group DDS -radix hexadecimal /l0_dds_reader_test5_arzkriu/uut/data_out_dds +add wave -noupdate -group DDS /l0_dds_reader_test5_arzkriu/uut/last_word_out_dds +add wave -noupdate -divider {MAIN FSM} +add wave -noupdate /l0_dds_reader_test5_arzkriu/uut/stage +add wave -noupdate /l0_dds_reader_test5_arzkriu/uut/stage_next +add wave -noupdate /l0_dds_reader_test5_arzkriu/uut/cnt +add wave -noupdate -divider MEMORY +add wave -noupdate -group {SAMPLE MEM} /l0_dds_reader_test5_arzkriu/uut/sample_abort_read +add wave -noupdate -group {SAMPLE MEM} -radix unsigned /l0_dds_reader_test5_arzkriu/uut/sample_mem_ctrl_inst/addr +add wave -noupdate -group {SAMPLE MEM} /l0_dds_reader_test5_arzkriu/uut/sample_mem_ctrl_inst/read +add wave -noupdate -group {SAMPLE MEM} /l0_dds_reader_test5_arzkriu/uut/sample_mem_ctrl_inst/ready_in +add wave -noupdate -group {SAMPLE MEM} /l0_dds_reader_test5_arzkriu/uut/sample_mem_ctrl_inst/valid_in +add wave -noupdate -group {SAMPLE MEM} -radix hexadecimal /l0_dds_reader_test5_arzkriu/uut/sample_mem_ctrl_inst/data_in +add wave -noupdate -group {SAMPLE MEM} /l0_dds_reader_test5_arzkriu/uut/sample_mem_ctrl_inst/ready_out +add wave -noupdate -group {SAMPLE MEM} /l0_dds_reader_test5_arzkriu/uut/sample_mem_ctrl_inst/valid_out +add wave -noupdate -group {SAMPLE MEM} -radix hexadecimal /l0_dds_reader_test5_arzkriu/uut/sample_mem_ctrl_inst/data_out +add wave -noupdate -group {PAYLOAD MEM} /l0_dds_reader_test5_arzkriu/uut/payload_abort_read +add wave -noupdate -group {PAYLOAD MEM} -radix unsigned /l0_dds_reader_test5_arzkriu/uut/payload_mem_ctrl_inst/addr +add wave -noupdate -group {PAYLOAD MEM} /l0_dds_reader_test5_arzkriu/uut/payload_mem_ctrl_inst/read +add wave -noupdate -group {PAYLOAD MEM} /l0_dds_reader_test5_arzkriu/uut/payload_mem_ctrl_inst/ready_in +add wave -noupdate -group {PAYLOAD MEM} /l0_dds_reader_test5_arzkriu/uut/payload_mem_ctrl_inst/valid_in +add wave -noupdate -group {PAYLOAD MEM} -radix hexadecimal /l0_dds_reader_test5_arzkriu/uut/payload_mem_ctrl_inst/data_in +add wave -noupdate -group {PAYLOAD MEM} /l0_dds_reader_test5_arzkriu/uut/payload_mem_ctrl_inst/ready_out +add wave -noupdate -group {PAYLOAD MEM} /l0_dds_reader_test5_arzkriu/uut/payload_mem_ctrl_inst/valid_out +add wave -noupdate -group {PAYLOAD MEM} -radix hexadecimal /l0_dds_reader_test5_arzkriu/uut/payload_mem_ctrl_inst/data_out +add wave -noupdate -group {INSTANCE MEM} /l0_dds_reader_test5_arzkriu/uut/inst_abort_read +add wave -noupdate -group {INSTANCE MEM} -radix unsigned /l0_dds_reader_test5_arzkriu/uut/gen_instance_mem_ctrl_inst/instance_mem_ctrl_inst/addr +add wave -noupdate -group {INSTANCE MEM} /l0_dds_reader_test5_arzkriu/uut/gen_instance_mem_ctrl_inst/instance_mem_ctrl_inst/read +add wave -noupdate -group {INSTANCE MEM} /l0_dds_reader_test5_arzkriu/uut/gen_instance_mem_ctrl_inst/instance_mem_ctrl_inst/ready_in +add wave -noupdate -group {INSTANCE MEM} /l0_dds_reader_test5_arzkriu/uut/gen_instance_mem_ctrl_inst/instance_mem_ctrl_inst/valid_in +add wave -noupdate -group {INSTANCE MEM} -radix hexadecimal /l0_dds_reader_test5_arzkriu/uut/gen_instance_mem_ctrl_inst/instance_mem_ctrl_inst/data_in +add wave -noupdate -group {INSTANCE MEM} /l0_dds_reader_test5_arzkriu/uut/gen_instance_mem_ctrl_inst/instance_mem_ctrl_inst/ready_out +add wave -noupdate -group {INSTANCE MEM} /l0_dds_reader_test5_arzkriu/uut/gen_instance_mem_ctrl_inst/instance_mem_ctrl_inst/valid_out +add wave -noupdate -group {INSTANCE MEM} -radix hexadecimal /l0_dds_reader_test5_arzkriu/uut/gen_instance_mem_ctrl_inst/instance_mem_ctrl_inst/data_out +add wave -noupdate /l0_dds_reader_test5_arzkriu/uut/inst_op_start +add wave -noupdate /l0_dds_reader_test5_arzkriu/uut/inst_opcode +add wave -noupdate /l0_dds_reader_test5_arzkriu/uut/inst_op_done +add wave -noupdate /l0_dds_reader_test5_arzkriu/uut/inst_stage +add wave -noupdate /l0_dds_reader_test5_arzkriu/uut/inst_stage_next +add wave -noupdate /l0_dds_reader_test5_arzkriu/uut/inst_cnt +add wave -noupdate -radix unsigned /l0_dds_reader_test5_arzkriu/uut/inst_addr_base +add wave -noupdate /l0_dds_reader_test5_arzkriu/uut/inst_mem_fields +add wave -noupdate -childformat {{/l0_dds_reader_test5_arzkriu/uut/inst_data.key_hash -radix hexadecimal} {/l0_dds_reader_test5_arzkriu/uut/inst_data.status_info -radix binary} {/l0_dds_reader_test5_arzkriu/uut/inst_data.sample_cnt -radix unsigned} {/l0_dds_reader_test5_arzkriu/uut/inst_data.disposed_gen_cnt -radix unsigned} {/l0_dds_reader_test5_arzkriu/uut/inst_data.no_writers_gen_cnt -radix unsigned} {/l0_dds_reader_test5_arzkriu/uut/inst_data.ignore_deadline -radix unsigned} {/l0_dds_reader_test5_arzkriu/uut/inst_data.writer_bitmap -radix binary -childformat {{/l0_dds_reader_test5_arzkriu/uut/inst_data.writer_bitmap(0) -radix binary -childformat {{/l0_dds_reader_test5_arzkriu/uut/inst_data.writer_bitmap(0)(0) -radix binary} {/l0_dds_reader_test5_arzkriu/uut/inst_data.writer_bitmap(0)(1) -radix binary} {/l0_dds_reader_test5_arzkriu/uut/inst_data.writer_bitmap(0)(2) -radix binary} {/l0_dds_reader_test5_arzkriu/uut/inst_data.writer_bitmap(0)(3) -radix binary} {/l0_dds_reader_test5_arzkriu/uut/inst_data.writer_bitmap(0)(4) -radix binary} {/l0_dds_reader_test5_arzkriu/uut/inst_data.writer_bitmap(0)(5) -radix binary} {/l0_dds_reader_test5_arzkriu/uut/inst_data.writer_bitmap(0)(6) -radix binary} {/l0_dds_reader_test5_arzkriu/uut/inst_data.writer_bitmap(0)(7) -radix binary} {/l0_dds_reader_test5_arzkriu/uut/inst_data.writer_bitmap(0)(8) -radix binary} {/l0_dds_reader_test5_arzkriu/uut/inst_data.writer_bitmap(0)(9) -radix binary} {/l0_dds_reader_test5_arzkriu/uut/inst_data.writer_bitmap(0)(10) -radix binary} {/l0_dds_reader_test5_arzkriu/uut/inst_data.writer_bitmap(0)(11) -radix binary} {/l0_dds_reader_test5_arzkriu/uut/inst_data.writer_bitmap(0)(12) -radix binary} {/l0_dds_reader_test5_arzkriu/uut/inst_data.writer_bitmap(0)(13) -radix binary} {/l0_dds_reader_test5_arzkriu/uut/inst_data.writer_bitmap(0)(14) -radix binary} {/l0_dds_reader_test5_arzkriu/uut/inst_data.writer_bitmap(0)(15) -radix binary} {/l0_dds_reader_test5_arzkriu/uut/inst_data.writer_bitmap(0)(16) -radix binary} {/l0_dds_reader_test5_arzkriu/uut/inst_data.writer_bitmap(0)(17) -radix binary} {/l0_dds_reader_test5_arzkriu/uut/inst_data.writer_bitmap(0)(18) -radix binary} {/l0_dds_reader_test5_arzkriu/uut/inst_data.writer_bitmap(0)(19) -radix binary} {/l0_dds_reader_test5_arzkriu/uut/inst_data.writer_bitmap(0)(20) -radix binary} {/l0_dds_reader_test5_arzkriu/uut/inst_data.writer_bitmap(0)(21) -radix binary} {/l0_dds_reader_test5_arzkriu/uut/inst_data.writer_bitmap(0)(22) -radix binary} {/l0_dds_reader_test5_arzkriu/uut/inst_data.writer_bitmap(0)(23) -radix binary} {/l0_dds_reader_test5_arzkriu/uut/inst_data.writer_bitmap(0)(24) -radix binary} {/l0_dds_reader_test5_arzkriu/uut/inst_data.writer_bitmap(0)(25) -radix binary} {/l0_dds_reader_test5_arzkriu/uut/inst_data.writer_bitmap(0)(26) -radix binary} {/l0_dds_reader_test5_arzkriu/uut/inst_data.writer_bitmap(0)(27) -radix binary} {/l0_dds_reader_test5_arzkriu/uut/inst_data.writer_bitmap(0)(28) -radix binary} {/l0_dds_reader_test5_arzkriu/uut/inst_data.writer_bitmap(0)(29) -radix binary} {/l0_dds_reader_test5_arzkriu/uut/inst_data.writer_bitmap(0)(30) -radix binary} {/l0_dds_reader_test5_arzkriu/uut/inst_data.writer_bitmap(0)(31) -radix binary}}}}}} -expand -subitemconfig {/l0_dds_reader_test5_arzkriu/uut/inst_data.key_hash {-height 15 -radix hexadecimal} /l0_dds_reader_test5_arzkriu/uut/inst_data.status_info {-height 15 -radix binary} /l0_dds_reader_test5_arzkriu/uut/inst_data.sample_cnt {-height 15 -radix unsigned} /l0_dds_reader_test5_arzkriu/uut/inst_data.disposed_gen_cnt {-height 15 -radix unsigned} /l0_dds_reader_test5_arzkriu/uut/inst_data.no_writers_gen_cnt {-height 15 -radix unsigned} /l0_dds_reader_test5_arzkriu/uut/inst_data.ignore_deadline {-height 15 -radix unsigned} /l0_dds_reader_test5_arzkriu/uut/inst_data.writer_bitmap {-height 15 -radix binary -childformat {{/l0_dds_reader_test5_arzkriu/uut/inst_data.writer_bitmap(0) -radix binary -childformat {{/l0_dds_reader_test5_arzkriu/uut/inst_data.writer_bitmap(0)(0) -radix binary} {/l0_dds_reader_test5_arzkriu/uut/inst_data.writer_bitmap(0)(1) -radix binary} {/l0_dds_reader_test5_arzkriu/uut/inst_data.writer_bitmap(0)(2) -radix binary} {/l0_dds_reader_test5_arzkriu/uut/inst_data.writer_bitmap(0)(3) -radix binary} {/l0_dds_reader_test5_arzkriu/uut/inst_data.writer_bitmap(0)(4) -radix binary} {/l0_dds_reader_test5_arzkriu/uut/inst_data.writer_bitmap(0)(5) -radix binary} {/l0_dds_reader_test5_arzkriu/uut/inst_data.writer_bitmap(0)(6) -radix binary} {/l0_dds_reader_test5_arzkriu/uut/inst_data.writer_bitmap(0)(7) -radix binary} {/l0_dds_reader_test5_arzkriu/uut/inst_data.writer_bitmap(0)(8) -radix binary} {/l0_dds_reader_test5_arzkriu/uut/inst_data.writer_bitmap(0)(9) -radix binary} {/l0_dds_reader_test5_arzkriu/uut/inst_data.writer_bitmap(0)(10) -radix binary} {/l0_dds_reader_test5_arzkriu/uut/inst_data.writer_bitmap(0)(11) -radix binary} {/l0_dds_reader_test5_arzkriu/uut/inst_data.writer_bitmap(0)(12) -radix binary} {/l0_dds_reader_test5_arzkriu/uut/inst_data.writer_bitmap(0)(13) -radix binary} {/l0_dds_reader_test5_arzkriu/uut/inst_data.writer_bitmap(0)(14) -radix binary} {/l0_dds_reader_test5_arzkriu/uut/inst_data.writer_bitmap(0)(15) -radix binary} {/l0_dds_reader_test5_arzkriu/uut/inst_data.writer_bitmap(0)(16) -radix binary} {/l0_dds_reader_test5_arzkriu/uut/inst_data.writer_bitmap(0)(17) -radix binary} {/l0_dds_reader_test5_arzkriu/uut/inst_data.writer_bitmap(0)(18) -radix binary} {/l0_dds_reader_test5_arzkriu/uut/inst_data.writer_bitmap(0)(19) -radix binary} {/l0_dds_reader_test5_arzkriu/uut/inst_data.writer_bitmap(0)(20) -radix binary} {/l0_dds_reader_test5_arzkriu/uut/inst_data.writer_bitmap(0)(21) -radix binary} {/l0_dds_reader_test5_arzkriu/uut/inst_data.writer_bitmap(0)(22) -radix binary} {/l0_dds_reader_test5_arzkriu/uut/inst_data.writer_bitmap(0)(23) -radix binary} {/l0_dds_reader_test5_arzkriu/uut/inst_data.writer_bitmap(0)(24) -radix binary} {/l0_dds_reader_test5_arzkriu/uut/inst_data.writer_bitmap(0)(25) -radix binary} {/l0_dds_reader_test5_arzkriu/uut/inst_data.writer_bitmap(0)(26) -radix binary} {/l0_dds_reader_test5_arzkriu/uut/inst_data.writer_bitmap(0)(27) -radix binary} {/l0_dds_reader_test5_arzkriu/uut/inst_data.writer_bitmap(0)(28) -radix binary} {/l0_dds_reader_test5_arzkriu/uut/inst_data.writer_bitmap(0)(29) -radix binary} {/l0_dds_reader_test5_arzkriu/uut/inst_data.writer_bitmap(0)(30) -radix binary} {/l0_dds_reader_test5_arzkriu/uut/inst_data.writer_bitmap(0)(31) -radix binary}}}}} /l0_dds_reader_test5_arzkriu/uut/inst_data.writer_bitmap(0) {-height 15 -radix binary -childformat {{/l0_dds_reader_test5_arzkriu/uut/inst_data.writer_bitmap(0)(0) -radix binary} {/l0_dds_reader_test5_arzkriu/uut/inst_data.writer_bitmap(0)(1) -radix binary} {/l0_dds_reader_test5_arzkriu/uut/inst_data.writer_bitmap(0)(2) -radix binary} {/l0_dds_reader_test5_arzkriu/uut/inst_data.writer_bitmap(0)(3) -radix binary} {/l0_dds_reader_test5_arzkriu/uut/inst_data.writer_bitmap(0)(4) -radix binary} {/l0_dds_reader_test5_arzkriu/uut/inst_data.writer_bitmap(0)(5) -radix binary} {/l0_dds_reader_test5_arzkriu/uut/inst_data.writer_bitmap(0)(6) -radix binary} {/l0_dds_reader_test5_arzkriu/uut/inst_data.writer_bitmap(0)(7) -radix binary} {/l0_dds_reader_test5_arzkriu/uut/inst_data.writer_bitmap(0)(8) -radix binary} {/l0_dds_reader_test5_arzkriu/uut/inst_data.writer_bitmap(0)(9) -radix binary} {/l0_dds_reader_test5_arzkriu/uut/inst_data.writer_bitmap(0)(10) -radix binary} {/l0_dds_reader_test5_arzkriu/uut/inst_data.writer_bitmap(0)(11) -radix binary} {/l0_dds_reader_test5_arzkriu/uut/inst_data.writer_bitmap(0)(12) -radix binary} {/l0_dds_reader_test5_arzkriu/uut/inst_data.writer_bitmap(0)(13) -radix binary} {/l0_dds_reader_test5_arzkriu/uut/inst_data.writer_bitmap(0)(14) -radix binary} {/l0_dds_reader_test5_arzkriu/uut/inst_data.writer_bitmap(0)(15) -radix binary} {/l0_dds_reader_test5_arzkriu/uut/inst_data.writer_bitmap(0)(16) -radix binary} {/l0_dds_reader_test5_arzkriu/uut/inst_data.writer_bitmap(0)(17) -radix binary} {/l0_dds_reader_test5_arzkriu/uut/inst_data.writer_bitmap(0)(18) -radix binary} {/l0_dds_reader_test5_arzkriu/uut/inst_data.writer_bitmap(0)(19) -radix binary} {/l0_dds_reader_test5_arzkriu/uut/inst_data.writer_bitmap(0)(20) -radix binary} {/l0_dds_reader_test5_arzkriu/uut/inst_data.writer_bitmap(0)(21) -radix binary} {/l0_dds_reader_test5_arzkriu/uut/inst_data.writer_bitmap(0)(22) -radix binary} {/l0_dds_reader_test5_arzkriu/uut/inst_data.writer_bitmap(0)(23) -radix binary} {/l0_dds_reader_test5_arzkriu/uut/inst_data.writer_bitmap(0)(24) -radix binary} {/l0_dds_reader_test5_arzkriu/uut/inst_data.writer_bitmap(0)(25) -radix binary} {/l0_dds_reader_test5_arzkriu/uut/inst_data.writer_bitmap(0)(26) -radix binary} {/l0_dds_reader_test5_arzkriu/uut/inst_data.writer_bitmap(0)(27) -radix binary} {/l0_dds_reader_test5_arzkriu/uut/inst_data.writer_bitmap(0)(28) -radix binary} {/l0_dds_reader_test5_arzkriu/uut/inst_data.writer_bitmap(0)(29) -radix binary} {/l0_dds_reader_test5_arzkriu/uut/inst_data.writer_bitmap(0)(30) -radix binary} {/l0_dds_reader_test5_arzkriu/uut/inst_data.writer_bitmap(0)(31) -radix binary}}} /l0_dds_reader_test5_arzkriu/uut/inst_data.writer_bitmap(0)(0) {-height 15 -radix binary} /l0_dds_reader_test5_arzkriu/uut/inst_data.writer_bitmap(0)(1) {-height 15 -radix binary} /l0_dds_reader_test5_arzkriu/uut/inst_data.writer_bitmap(0)(2) {-height 15 -radix binary} /l0_dds_reader_test5_arzkriu/uut/inst_data.writer_bitmap(0)(3) {-height 15 -radix binary} /l0_dds_reader_test5_arzkriu/uut/inst_data.writer_bitmap(0)(4) {-height 15 -radix binary} /l0_dds_reader_test5_arzkriu/uut/inst_data.writer_bitmap(0)(5) {-height 15 -radix binary} /l0_dds_reader_test5_arzkriu/uut/inst_data.writer_bitmap(0)(6) {-height 15 -radix binary} /l0_dds_reader_test5_arzkriu/uut/inst_data.writer_bitmap(0)(7) {-height 15 -radix binary} /l0_dds_reader_test5_arzkriu/uut/inst_data.writer_bitmap(0)(8) {-height 15 -radix binary} /l0_dds_reader_test5_arzkriu/uut/inst_data.writer_bitmap(0)(9) {-height 15 -radix binary} /l0_dds_reader_test5_arzkriu/uut/inst_data.writer_bitmap(0)(10) {-height 15 -radix binary} /l0_dds_reader_test5_arzkriu/uut/inst_data.writer_bitmap(0)(11) {-height 15 -radix binary} /l0_dds_reader_test5_arzkriu/uut/inst_data.writer_bitmap(0)(12) {-height 15 -radix binary} /l0_dds_reader_test5_arzkriu/uut/inst_data.writer_bitmap(0)(13) {-height 15 -radix binary} /l0_dds_reader_test5_arzkriu/uut/inst_data.writer_bitmap(0)(14) {-height 15 -radix binary} /l0_dds_reader_test5_arzkriu/uut/inst_data.writer_bitmap(0)(15) {-height 15 -radix binary} /l0_dds_reader_test5_arzkriu/uut/inst_data.writer_bitmap(0)(16) {-height 15 -radix binary} /l0_dds_reader_test5_arzkriu/uut/inst_data.writer_bitmap(0)(17) {-height 15 -radix binary} /l0_dds_reader_test5_arzkriu/uut/inst_data.writer_bitmap(0)(18) {-height 15 -radix binary} /l0_dds_reader_test5_arzkriu/uut/inst_data.writer_bitmap(0)(19) {-height 15 -radix binary} /l0_dds_reader_test5_arzkriu/uut/inst_data.writer_bitmap(0)(20) {-height 15 -radix binary} /l0_dds_reader_test5_arzkriu/uut/inst_data.writer_bitmap(0)(21) {-height 15 -radix binary} /l0_dds_reader_test5_arzkriu/uut/inst_data.writer_bitmap(0)(22) {-height 15 -radix binary} /l0_dds_reader_test5_arzkriu/uut/inst_data.writer_bitmap(0)(23) {-height 15 -radix binary} /l0_dds_reader_test5_arzkriu/uut/inst_data.writer_bitmap(0)(24) {-height 15 -radix binary} /l0_dds_reader_test5_arzkriu/uut/inst_data.writer_bitmap(0)(25) {-height 15 -radix binary} /l0_dds_reader_test5_arzkriu/uut/inst_data.writer_bitmap(0)(26) {-height 15 -radix binary} /l0_dds_reader_test5_arzkriu/uut/inst_data.writer_bitmap(0)(27) {-height 15 -radix binary} /l0_dds_reader_test5_arzkriu/uut/inst_data.writer_bitmap(0)(28) {-height 15 -radix binary} /l0_dds_reader_test5_arzkriu/uut/inst_data.writer_bitmap(0)(29) {-height 15 -radix binary} /l0_dds_reader_test5_arzkriu/uut/inst_data.writer_bitmap(0)(30) {-height 15 -radix binary} /l0_dds_reader_test5_arzkriu/uut/inst_data.writer_bitmap(0)(31) {-height 15 -radix binary}} /l0_dds_reader_test5_arzkriu/uut/inst_data +add wave -noupdate -radix unsigned /l0_dds_reader_test5_arzkriu/uut/inst_next_addr_base +add wave -noupdate -radix unsigned /l0_dds_reader_test5_arzkriu/uut/inst_prev_addr_base +add wave -noupdate /l0_dds_reader_test5_arzkriu/uut/current_imf +add wave -noupdate /l0_dds_reader_test5_arzkriu/uut/stale_inst_cnt +add wave -noupdate -divider POINTERS +add wave -noupdate -group {LIST POINTERS} -radix unsigned /l0_dds_reader_test5_arzkriu/uut/empty_sample_list_head +add wave -noupdate -group {LIST POINTERS} -radix unsigned /l0_dds_reader_test5_arzkriu/uut/empty_sample_list_tail +add wave -noupdate -group {LIST POINTERS} -radix unsigned /l0_dds_reader_test5_arzkriu/uut/empty_payload_list_head +add wave -noupdate -group {LIST POINTERS} -radix unsigned /l0_dds_reader_test5_arzkriu/uut/oldest_sample +add wave -noupdate -group {LIST POINTERS} -radix unsigned /l0_dds_reader_test5_arzkriu/uut/newest_sample +add wave -noupdate -group {LIST POINTERS} -radix unsigned /l0_dds_reader_test5_arzkriu/uut/inst_empty_head +add wave -noupdate -group {LIST POINTERS} -radix unsigned /l0_dds_reader_test5_arzkriu/uut/inst_occupied_head +add wave -noupdate -expand -group {GENERAL POINTERS} -radix unsigned /l0_dds_reader_test5_arzkriu/uut/cur_sample +add wave -noupdate -expand -group {GENERAL POINTERS} -radix unsigned /l0_dds_reader_test5_arzkriu/uut/next_sample +add wave -noupdate -expand -group {GENERAL POINTERS} -radix unsigned /l0_dds_reader_test5_arzkriu/uut/prev_sample +add wave -noupdate -expand -group {GENERAL POINTERS} -radix unsigned /l0_dds_reader_test5_arzkriu/uut/cur_payload +add wave -noupdate -expand -group {GENERAL POINTERS} -radix unsigned /l0_dds_reader_test5_arzkriu/uut/next_payload +add wave -noupdate -expand -group {GENERAL POINTERS} -radix unsigned /l0_dds_reader_test5_arzkriu/uut/cur_inst +add wave -noupdate -expand -group {GENERAL POINTERS} -radix unsigned /l0_dds_reader_test5_arzkriu/uut/next_inst +add wave -noupdate -divider TESTBENCH +add wave -noupdate -group TESTBENCH /l0_dds_reader_test5_arzkriu/dds_start +add wave -noupdate -group TESTBENCH /l0_dds_reader_test5_arzkriu/dds_stage +add wave -noupdate -group TESTBENCH /l0_dds_reader_test5_arzkriu/dds_cnt +add wave -noupdate -group TESTBENCH /l0_dds_reader_test5_arzkriu/dds_cnt2 +add wave -noupdate -group TESTBENCH /l0_dds_reader_test5_arzkriu/dds_done +add wave -noupdate -group TESTBENCH /l0_dds_reader_test5_arzkriu/rtps_start +add wave -noupdate -group TESTBENCH /l0_dds_reader_test5_arzkriu/rtps_stage +add wave -noupdate -group TESTBENCH /l0_dds_reader_test5_arzkriu/rtps_cnt +add wave -noupdate -group TESTBENCH /l0_dds_reader_test5_arzkriu/rtps_done +add wave -noupdate -divider {KEY HOLDER} +add wave -noupdate -group {KEY HOLDER} /l0_dds_reader_test5_arzkriu/uut/start_kh +add wave -noupdate -group {KEY HOLDER} /l0_dds_reader_test5_arzkriu/uut/opcode_kh +add wave -noupdate -group {KEY HOLDER} /l0_dds_reader_test5_arzkriu/uut/ack_kh +add wave -noupdate -group {KEY HOLDER} -radix hexadecimal /l0_dds_reader_test5_arzkriu/uut/data_in_kh +add wave -noupdate -group {KEY HOLDER} /l0_dds_reader_test5_arzkriu/uut/valid_in_kh +add wave -noupdate -group {KEY HOLDER} /l0_dds_reader_test5_arzkriu/uut/ready_in_kh +add wave -noupdate -group {KEY HOLDER} /l0_dds_reader_test5_arzkriu/uut/last_word_in_kh +add wave -noupdate -group {KEY HOLDER} -radix hexadecimal /l0_dds_reader_test5_arzkriu/uut/data_out_kh +add wave -noupdate -group {KEY HOLDER} /l0_dds_reader_test5_arzkriu/uut/valid_out_kh +add wave -noupdate -group {KEY HOLDER} /l0_dds_reader_test5_arzkriu/uut/ready_out_kh +add wave -noupdate -group {KEY HOLDER} /l0_dds_reader_test5_arzkriu/uut/last_word_out_kh +add wave -noupdate -group {KEY HOLDER} /l0_dds_reader_test5_arzkriu/uut/abort_kh +add wave -noupdate -divider MISC +add wave -noupdate /l0_dds_reader_test5_arzkriu/uut/status +add wave -noupdate -radix unsigned /l0_dds_reader_test5_arzkriu/uut/sample_rej_cnt +add wave -noupdate -radix unsigned /l0_dds_reader_test5_arzkriu/uut/sample_rej_cnt_change +add wave -noupdate /l0_dds_reader_test5_arzkriu/uut/sample_rej_last_reason +add wave -noupdate -radix hexadecimal /l0_dds_reader_test5_arzkriu/uut/sample_rej_last_inst +TreeUpdate [SetDefaultTree] +WaveRestoreCursors {{Cursor 1} {32825000 ps} 0} {{Cursor 2} {115175000 ps} 1} +quietly wave cursor active 1 +configure wave -namecolwidth 187 +configure wave -valuecolwidth 100 +configure wave -justifyvalue left +configure wave -signalnamewidth 1 +configure wave -snapdistance 10 +configure wave -datasetprefix 0 +configure wave -rowmargin 4 +configure wave -childrowmargin 2 +configure wave -gridoffset 0 +configure wave -gridperiod 1 +configure wave -griddelta 40 +configure wave -timeline 0 +configure wave -timelineunits ns +update +WaveRestoreZoom {32324680 ps} {33325321 ps} diff --git a/src/Tests/Level_0/L0_dds_reader_test5_arzkriu.vhd b/src/Tests/Level_0/L0_dds_reader_test5_arzkriu.vhd new file mode 100644 index 0000000..dcaf2e3 --- /dev/null +++ b/src/Tests/Level_0/L0_dds_reader_test5_arzkriu.vhd @@ -0,0 +1,1010 @@ +library ieee; +use ieee.std_logic_1164.all; +use ieee.numeric_std.all; + +library osvvm; -- Utility Library +context osvvm.OsvvmContext; + +use work.rtps_package.all; +use work.user_config.all; +use work.rtps_config_package.all; +use work.rtps_test_package.all; + +-- This testbench tests the Sample Reject Status Handling of the DDS Reader, and more specifically the GET_SAMPLE_REJECTED_STATUS DDS Operation. + +entity L0_dds_reader_test5_arzkriu is +end entity; + + +architecture testbench of L0_dds_reader_test5_arzkriu is + + -- *CONSTANT DECLARATION* + constant MAX_REMOTE_ENDPOINTS : natural := 3; + + -- *TYPE DECLARATION* + type DDS_STAGE_TYPE is (IDLE, START, DONE, CHECK_SI, CHECK_DATA, WAIT_EOC, CHECK_SAMPLE_REJECT); + type RTPS_STAGE_TYPE is (IDLE, START, PUSH, DONE); + type KH_STAGE_TYPE is (IDLE, READ_DATA, PUSH_KEY_HASH); + + -- *SIGNAL DECLARATION* + signal clk : std_logic := '0'; + signal reset : std_logic := '1'; + signal check_time : TIME_TYPE := TIME_ZERO; + signal start_rtps, start_dds, start_kh, ack_rtps, ack_dds, ack_kh, done_rtps, done_dds : std_logic := '0'; + signal opcode_rtps : HISTORY_CACHE_OPCODE_TYPE := NOP; + signal opcode_dds : DDS_READER_OPCODE_TYPE := NOP; + signal opcode_kh : KEY_HOLDER_OPCODE_TYPE := NOP; + signal ret_rtps : HISTORY_CACHE_RESPONSE_TYPE := ERROR; + signal ready_in_rtps, valid_in_rtps, last_word_in_rtps : std_logic := '0'; + signal ready_out_dds, valid_out_dds, last_word_out_dds : std_logic := '0'; + signal ready_in_kh, ready_out_kh, valid_in_kh, valid_out_kh, last_word_in_kh, last_word_out_kh : std_logic := '0'; + signal data_in_rtps, data_out_dds, data_in_kh, data_out_kh : std_logic_vector(WORD_WIDTH-1 downto 0) := (others => '0'); + signal get_data_dds, si_valid_data, si_valid, eoc, abort_kh : std_logic := '0'; + signal return_code_dds : std_logic_vector(RETURN_CODE_WIDTH-1 downto 0) := (others => '0'); + signal status : std_logic_vector(STATUS_KIND_WIDTH-1 downto 0) := (others => '0'); + signal instance_state_dds, si_instance_state : std_logic_vector(INSTANCE_STATE_KIND_WIDTH-1 downto 0) := ANY_INSTANCE_STATE; + signal view_state_dds, si_view_state : std_logic_vector(VIEW_STATE_KIND_WIDTH-1 downto 0) := ANY_VIEW_STATE; + signal sample_state_dds, si_sample_state : std_logic_vector(SAMPLE_STATE_KIND_WIDTH-1 downto 0) := ANY_SAMPLE_STATE; + signal instance_handle_dds, si_instance_handle : INSTANCE_HANDLE_TYPE := HANDLE_NIL; + signal max_samples_dds : std_logic_vector(MAX_SAMPLES_WIDTH-1 downto 0) := (others => '0'); + signal si_source_timestamp : TIME_TYPE := TIME_INVALID; + signal si_publication_handle : PUBLICATION_HANDLE_TYPE := (others => (others => '0')); + signal si_disposed_generation_count : std_logic_vector(DISPOSED_GENERATION_COUNT_WIDTH-1 downto 0) := (others => '0'); + signal si_no_writers_generation_count : std_logic_vector(NO_WRITERS_GENERATION_COUNT_WIDTH-1 downto 0) := (others => '0'); + signal si_sample_rank : std_logic_vector(SAMPLE_RANK_WIDTH-1 downto 0) := (others => '0'); + signal si_generation_rank : std_logic_vector(GENERATION_RANK_WIDTH-1 downto 0) := (others => '0'); + signal si_absolute_generation_rank: std_logic_vector(ABSOLUTE_GENERATION_COUNT_WIDTH-1 downto 0) := (others => '0'); + + signal dds_start , dds_done , rtps_start, rtps_done : std_logic := '0'; + signal dds_cnt, dds_cnt2, rtps_cnt, kh_cnt : natural := 0; + signal dds_stage : DDS_STAGE_TYPE := IDLE; + signal rtps_stage : RTPS_STAGE_TYPE := IDLE; + signal kh_stage : KH_STAGE_TYPE := IDLE; + signal kh_data : TEST_PACKET_TYPE := EMPTY_TEST_PACKET; + shared variable dds : DDS_READER_TEST_TYPE := DEFAULT_DDS_READER_TEST; + shared variable rtps : RTPS_READER_TEST_TYPE := DEFAULT_RTPS_READER_TEST; + shared variable mem : DDS_READER_MEM_TYPE := DEFAULT_DDS_READER_MEM; + signal data_id, ret_id, sstate_id, vstate_id, istate_id, inst_id, ts_id, pub_id, dis_gen_cnt_id, no_w_gen_cnt_id, srank_id, grank_id, agrank_id, eoc_id, valid_id, status_id : AlertLogIDType; + + -- *FUNCTION DECLARATION* + function extract_key_hash (payload : TEST_PACKET_TYPE) return INSTANCE_HANDLE_TYPE is + variable ret : INSTANCE_HANDLE_TYPE := HANDLE_NIL; + begin + for i in 0 to 3 loop + ret(i) := not payload.data(i); + end loop; + + return ret; + end function; + + function gen_sn(input : natural) return SEQUENCENUMBER_TYPE is + variable ret : SEQUENCENUMBER_TYPE; + begin + ret(0) := (others => '0'); + ret(1) := unsigned(int(input, WORD_WIDTH)); + return ret; + end function; + +begin + + -- Unit Under Test + uut : entity work.dds_reader(arch) + generic map ( + TIME_BASED_FILTER_QOS => DURATION_ZERO, + DEADLINE_QOS => DURATION_INFINITE, + MAX_SAMPLES => std_logic_vector(to_unsigned(2,CDR_LONG_WIDTH)), + MAX_INSTANCES => std_logic_vector(to_unsigned(3,CDR_LONG_WIDTH)), + MAX_SAMPLES_PER_INSTANCE => std_logic_vector(to_unsigned(1,CDR_LONG_WIDTH)), + HISTORY_QOS => KEEP_ALL_HISTORY_QOS, + RELIABILITY_QOS => RELIABLE_RELIABILITY_QOS, + PRESENTATION_QOS => INSTANCE_PRESENTATION_QOS, + DESTINATION_ORDER_QOS => BY_RECEPTION_TIMESTAMP_DESTINATION_ORDER_QOS, + COHERENT_ACCESS => FALSE, + ORDERED_ACCESS => FALSE, + WITH_KEY => TRUE, + PAYLOAD_FRAME_SIZE => 11, + MAX_REMOTE_ENDPOINTS => MAX_REMOTE_ENDPOINTS + ) + port map ( + clk => clk, + reset => reset, + time => check_time, + start_rtps => start_rtps, + opcode_rtps => opcode_rtps, + ack_rtps => ack_rtps, + done_rtps => done_rtps, + ret_rtps => ret_rtps, + data_in_rtps => data_in_rtps, + valid_in_rtps => valid_in_rtps, + ready_in_rtps => ready_in_rtps, + last_word_in_rtps => last_word_in_rtps, + start_kh => start_kh, + opcode_kh => opcode_kh, + ack_kh => ack_kh, + data_in_kh => data_in_kh, + valid_in_kh => valid_in_kh, + ready_in_kh => ready_in_kh, + last_word_in_kh => last_word_in_kh, + data_out_kh => data_out_kh, + valid_out_kh => valid_out_kh, + ready_out_kh => ready_out_kh, + last_word_out_kh => last_word_out_kh, + abort_kh => abort_kh, + start_dds => start_dds, + ack_dds => ack_dds, + opcode_dds => opcode_dds, + instance_state_dds => instance_state_dds, + view_state_dds => view_state_dds, + sample_state_dds => sample_state_dds, + instance_handle_dds => instance_handle_dds, + max_samples_dds => max_samples_dds, + get_data_dds => get_data_dds, + done_dds => done_dds, + return_code_dds => return_code_dds, + ready_out_dds => ready_out_dds, + valid_out_dds => valid_out_dds, + data_out_dds => data_out_dds, + last_word_out_dds => last_word_out_dds, + si_sample_state => si_sample_state, + si_view_state => si_view_state, + si_instance_state => si_instance_state, + si_source_timestamp => si_source_timestamp, + si_instance_handle => si_instance_handle, + si_publication_handle => si_publication_handle, + si_disposed_generation_count => si_disposed_generation_count, + si_no_writers_generation_count => si_no_writers_generation_count, + si_sample_rank => si_sample_rank, + si_generation_rank => si_generation_rank, + si_absolute_generation_rank => si_absolute_generation_rank, + si_valid_data => si_valid_data, + si_valid => si_valid, + eoc => eoc, + status => status + ); + + stimulus_prc : process + variable RV : RandomPType; + variable cc : CACHE_CHANGE_TYPE := DEFAULT_CACHE_CHANGE; + variable s : SAMPLE_TYPE := DEFAULT_SAMPLE; + variable kh1, kh2, kh3, kh4, kh5 : INSTANCE_HANDLE_TYPE := HANDLE_NIL; + + alias idle_sig is <>; + + impure function gen_payload(key_hash : INSTANCE_HANDLE_TYPE; len : natural) return TEST_PACKET_TYPE is + variable ret : TEST_PACKET_TYPE := EMPTY_TEST_PACKET; + begin + assert (len >= 4) report "Payload length has to be at least 16 Bytes long" severity FAILURE; + + for i in 0 to len-1 loop + if (i < 4) then + -- NOTE: Beginning of payload is negated key to allow deterministic Key Hash generation from the kh_prc + ret.data(ret.length) := not key_hash(i); + else + ret.data(ret.length) := RV.RandSlv(WORD_WIDTH); + end if; + ret.length := ret.length + 1; + end loop; + ret.last(ret.length-1) := '1'; + + return ret; + end function; + + impure function gen_key_hash return KEY_HASH_TYPE is + variable ret : KEY_HASH_TYPE := (others => (others => '0')); + begin + for i in 0 to KEY_HASH_TYPE'length-1 loop + ret(i) := RV.RandSlv(WORD_WIDTH); + end loop; + return ret; + end function; + + procedure start_dds is + begin + dds_start <= '1'; + wait until rising_edge(clk); + dds_start <= '0'; + wait until rising_edge(clk); + end procedure; + + procedure start_rtps is + begin + rtps_start <= '1'; + wait until rising_edge(clk); + rtps_start <= '0'; + wait until rising_edge(clk); + end procedure; + + procedure wait_on_dds is + begin + if (dds_done /= '1') then + wait until dds_done = '1'; + end if; + end procedure; + + procedure wait_on_rtps is + begin + if (rtps_done /= '1') then + wait until rtps_done = '1'; + end if; + end procedure; + + procedure wait_on_completion is + begin + if (rtps_done /= '1' or dds_done /= '1') then + wait until rtps_done = '1' and dds_done = '1'; + end if; + end procedure; + + -- NOTE: This procedure waits until the idle_sig is high for at least + -- two consecutive clock cycles. + procedure wait_on_idle is + begin + loop + if (idle_sig /= '1') then + wait until idle_sig = '1'; + else + exit; + end if; + wait until rising_edge(clk); + wait until rising_edge(clk); + end loop; + end procedure; + + begin + + SetAlertLogName("dds_reader - (KEEP ALL, Reliable, Zero TIME_BASED_FILTER, Keyed, BY_RECEPTION_TIMESTAMP_DESTINATION_ORDER, ACCESS SCOPE Instance, Unordered) - Level 0 - Sample Rejected Status Handling"); + SetAlertEnable(FAILURE, TRUE); + SetAlertEnable(ERROR, TRUE); + SetAlertEnable(WARNING, TRUE); + SetLogEnable(DEBUG, FALSE); + SetLogEnable(PASSED, FALSE); + SetLogEnable(INFO, TRUE); + RV.InitSeed(RV'instance_name); + sstate_id <= GetAlertLogID("Sample State", ALERTLOG_BASE_ID); + vstate_id <= GetAlertLogID("View State", ALERTLOG_BASE_ID); + istate_id <= GetAlertLogID("Instance State", ALERTLOG_BASE_ID); + ts_id <= GetAlertLogID("Source Timestamp", ALERTLOG_BASE_ID); + inst_id <= GetAlertLogID("Instance Handle", ALERTLOG_BASE_ID); + pub_id <= GetAlertLogID("Publication Hanlde", ALERTLOG_BASE_ID); + dis_gen_cnt_id <= GetAlertLogID("Disposed Generation Count", ALERTLOG_BASE_ID); + no_w_gen_cnt_id <= GetAlertLogID("No Writers Generation Count", ALERTLOG_BASE_ID); + srank_id <= GetAlertLogID("Sample Rank", ALERTLOG_BASE_ID); + grank_id <= GetAlertLogID("Generation Rank", ALERTLOG_BASE_ID); + agrank_id <= GetAlertLogID("Absolute Generation Rank", ALERTLOG_BASE_ID); + eoc_id <= GetAlertLogID("End of Collection", ALERTLOG_BASE_ID); + valid_id <= GetAlertLogID("Valid Data", ALERTLOG_BASE_ID); + data_id <= GetAlertLogID("Data Out", ALERTLOG_BASE_ID); + ret_id <= GetAlertLogID("Return Code", ALERTLOG_BASE_ID); + status_id <= GetAlertLogID("Communication Status", ALERTLOG_BASE_ID); + + -- Key Hashes + kh1 := gen_key_hash; + kh2 := gen_key_hash; + kh3 := gen_key_hash; + kh4 := gen_key_hash; + kh5 := gen_key_hash; + + + + Log("Initiating Test", INFO); + reset <= '1'; + wait until rising_edge(clk); + wait until rising_edge(clk); + reset <= '0'; + -- MEM: - + -- ISTATE: - + -- WRITER: - + + AffirmIf(status_id,(status and SAMPLE_REJECTED_STATUS) /= SAMPLE_REJECTED_STATUS, "Expected: 0", "Received: 1"); + + cc := DEFAULT_CACHE_CHANGE; + cc.serialized_key := FALSE; + cc.kind := ALIVE; + cc.instance := kh1; + cc.payload := gen_payload(kh1,30); + cc.src_timestamp := gen_duration(1,0); + + Log("RTPS Operation ADD_CACHE_CHANGE [KEY_HASH, Instance 1, Writer 0, Aligned Payload (3 Slots)] (ACCEPTED)", INFO); + rtps := DEFAULT_RTPS_READER_TEST; + rtps.opcode := ADD_CACHE_CHANGE; + rtps.cc := cc; + rtps.writer_pos := 0; + rtps.ret_code := OK; + s := to_sample(cc,ALIVE_INSTANCE_STATE); + add_sample(s,mem, BY_RECEPTION_TIMESTAMP_DESTINATION_ORDER_QOS); + start_rtps; + wait_on_rtps; + wait_on_idle; + -- MEM: I1S1 + -- ISTATE: I1:ALIVE + -- WRITER: W0:I1 + + AffirmIf(status_id,(status and SAMPLE_REJECTED_STATUS) /= SAMPLE_REJECTED_STATUS, "Expected: 0", "Received: 1"); + + cc := DEFAULT_CACHE_CHANGE; + cc.serialized_key := FALSE; + cc.kind := ALIVE; + cc.instance := kh2; + cc.payload := gen_payload(kh2,10); + cc.src_timestamp := gen_duration(2,0); + + Log("RTPS Operation ADD_CACHE_CHANGE [KEY_HASH, Instance 2, Writer 1, Aligned Payload] (REJECTED: Payload memory Full)", INFO); + rtps := DEFAULT_RTPS_READER_TEST; + rtps.opcode := ADD_CACHE_CHANGE; + rtps.cc := cc; + rtps.writer_pos := 1; + rtps.ret_code := REJECTED; + start_rtps; + wait_on_rtps; + wait_on_idle; + -- MEM: I1S1 + -- ISTATE: I1:ALIVE + -- WRITER: W0:I1 + + AffirmIf(status_id,(status and SAMPLE_REJECTED_STATUS) = SAMPLE_REJECTED_STATUS, "Expected: 1", "Received: 0"); + + Log("DDS Operation GET_SAMPLE_REJECTED_STATUS (Expected: Count 1, Change 1, HANDLE_NIL, REJECTED_BY_PAYOAD_MEMORY_LIMIT)", INFO); + dds := DEFAULT_DDS_READER_TEST; + dds.opcode := GET_SAMPLE_REJECTED_STATUS; + dds.ret_code := RETCODE_OK; + dds.count := 1; + dds.change := 1; + dds.inst := HANDLE_NIL; + dds.last_reason:= REJECTED_BY_PAYOAD_MEMORY_LIMIT; + start_dds; + wait_on_dds; + wait_on_idle; + + AffirmIf(status_id,(status and SAMPLE_REJECTED_STATUS) /= SAMPLE_REJECTED_STATUS, "Expected: 0", "Received: 1"); + + Log("DDS Operation TAKE [MAX_SAMPLES 1, ANY_SAMPLE_STATE, ANY_INSTANCE_STATE, ANY_VIEW_STATE]", INFO); + dds := DEFAULT_DDS_READER_TEST; + dds.opcode := TAKE; + dds.max_samples := 1; + dds.sstate := ANY_SAMPLE_STATE; + dds.istate := ANY_INSTANCE_STATE; + dds.vstate := ANY_VIEW_STATE; + start_dds; + wait_on_dds; + -- MEM: - + -- ISTATE: I1:ALIVE + -- WRITER: W0:I1 + + cc := DEFAULT_CACHE_CHANGE; + cc.serialized_key := FALSE; + cc.kind := ALIVE; + cc.instance := kh2; + cc.payload := gen_payload(kh2,40); + cc.src_timestamp := gen_duration(3,0); + + Log("RTPS Operation ADD_CACHE_CHANGE [KEY_HASH, Instance 2, Writer 1, Aligned Payload (4 Slots)] (REJECTED: Payload memory Full)", INFO); + rtps := DEFAULT_RTPS_READER_TEST; + rtps.opcode := ADD_CACHE_CHANGE; + rtps.cc := cc; + rtps.writer_pos := 1; + rtps.ret_code := REJECTED; + start_rtps; + wait_on_rtps; + wait_on_idle; + -- MEM: - + -- ISTATE: I1:ALIVE + -- WRITER: W0:I1 + + AffirmIf(status_id,(status and SAMPLE_REJECTED_STATUS) = SAMPLE_REJECTED_STATUS, "Expected: 1", "Received: 0"); + + Log("DDS Operation GET_SAMPLE_REJECTED_STATUS (Expected: Count 2, Change 1, Instance 2, REJECTED_BY_PAYOAD_MEMORY_LIMIT)", INFO); + dds := DEFAULT_DDS_READER_TEST; + dds.opcode := GET_SAMPLE_REJECTED_STATUS; + dds.ret_code := RETCODE_OK; + dds.count := 2; + dds.change := 1; + dds.inst := kh2; + dds.last_reason:= REJECTED_BY_PAYOAD_MEMORY_LIMIT; + start_dds; + wait_on_dds; + wait_on_idle; + + AffirmIf(status_id,(status and SAMPLE_REJECTED_STATUS) /= SAMPLE_REJECTED_STATUS, "Expected: 0", "Received: 1"); + + cc := DEFAULT_CACHE_CHANGE; + cc.serialized_key := FALSE; + cc.kind := ALIVE; + cc.instance := kh1; + cc.payload := gen_payload(kh1,10); + cc.src_timestamp := gen_duration(4,0); + + Log("RTPS Operation ADD_CACHE_CHANGE [KEY_HASH, Instance 1, Writer 0, Aligned Payload] (ACCEPTED)", INFO); + rtps := DEFAULT_RTPS_READER_TEST; + rtps.opcode := ADD_CACHE_CHANGE; + rtps.cc := cc; + rtps.writer_pos := 0; + rtps.ret_code := OK; + s := to_sample(cc,ALIVE_INSTANCE_STATE); + add_sample(s,mem, BY_RECEPTION_TIMESTAMP_DESTINATION_ORDER_QOS); + start_rtps; + wait_on_rtps; + wait_on_idle; + -- MEM: I1S2 + -- ISTATE: I1:ALIVE + -- WRITER: W0:I1 + + cc := DEFAULT_CACHE_CHANGE; + cc.serialized_key := FALSE; + cc.kind := ALIVE; + cc.instance := kh1; + cc.payload := gen_payload(kh1,10); + cc.src_timestamp := gen_duration(5,0); + + Log("RTPS Operation ADD_CACHE_CHANGE [KEY_HASH, Instance 1, Writer 1, Aligned Payload] (REJECTED: MAX_SAMPLES_PER_INSTANCE exceeded)", INFO); + rtps := DEFAULT_RTPS_READER_TEST; + rtps.opcode := ADD_CACHE_CHANGE; + rtps.cc := cc; + rtps.writer_pos := 1; + rtps.ret_code := REJECTED; + start_rtps; + wait_on_rtps; + wait_on_idle; + -- MEM: I1S2 + -- ISTATE: I1:ALIVE + -- WRITER: W0:I1 + + AffirmIf(status_id,(status and SAMPLE_REJECTED_STATUS) = SAMPLE_REJECTED_STATUS, "Expected: 1", "Received: 0"); + + Log("DDS Operation GET_SAMPLE_REJECTED_STATUS (Expected: Count 3, Change 1, Instance 1, REJECTED_BY_SAMPLES_PER_INSTANCE_LIMIT)", INFO); + dds := DEFAULT_DDS_READER_TEST; + dds.opcode := GET_SAMPLE_REJECTED_STATUS; + dds.ret_code := RETCODE_OK; + dds.count := 3; + dds.change := 1; + dds.inst := kh1; + dds.last_reason:= REJECTED_BY_SAMPLES_PER_INSTANCE_LIMIT; + start_dds; + wait_on_dds; + wait_on_idle; + + AffirmIf(status_id,(status and SAMPLE_REJECTED_STATUS) /= SAMPLE_REJECTED_STATUS, "Expected: 0", "Received: 1"); + + cc := DEFAULT_CACHE_CHANGE; + cc.serialized_key := FALSE; + cc.kind := ALIVE; + cc.instance := kh2; + cc.payload := gen_payload(kh2,10); + cc.src_timestamp := gen_duration(5,0); + + Log("RTPS Operation ADD_CACHE_CHANGE [KEY_HASH, Instance 2, Writer 1, Aligned Payload] (ACCEPTED)", INFO); + rtps := DEFAULT_RTPS_READER_TEST; + rtps.opcode := ADD_CACHE_CHANGE; + rtps.cc := cc; + rtps.writer_pos := 1; + rtps.ret_code := OK; + s := to_sample(cc,ALIVE_INSTANCE_STATE); + add_sample(s,mem, BY_RECEPTION_TIMESTAMP_DESTINATION_ORDER_QOS); + start_rtps; + wait_on_rtps; + wait_on_idle; + -- MEM: I1S2, I2S1 + -- ISTATE: I1:ALIVE, I2:ALIVE + -- WRITER: W0:I1, W1:I2 + + AffirmIf(status_id,(status and SAMPLE_REJECTED_STATUS) /= SAMPLE_REJECTED_STATUS, "Expected: 0", "Received: 1"); + + cc := DEFAULT_CACHE_CHANGE; + cc.serialized_key := FALSE; + cc.kind := ALIVE; + cc.instance := kh3; + cc.payload := gen_payload(kh3,10); + cc.src_timestamp := gen_duration(6,0); + + Log("RTPS Operation ADD_CACHE_CHANGE [KEY_HASH, Instance 3, Writer 2, Aligned Payload] (REJECTED: MAX_SAMPLES exceeded)", INFO); + rtps := DEFAULT_RTPS_READER_TEST; + rtps.opcode := ADD_CACHE_CHANGE; + rtps.cc := cc; + rtps.writer_pos := 2; + rtps.ret_code := REJECTED; + start_rtps; + wait_on_rtps; + wait_on_idle; + -- MEM: I1S2, I2S1 + -- ISTATE: I1:ALIVE, I2:ALIVE + -- WRITER: W0:I1, W1:I2 + + AffirmIf(status_id,(status and SAMPLE_REJECTED_STATUS) = SAMPLE_REJECTED_STATUS, "Expected: 1", "Received: 0"); + + Log("DDS Operation GET_SAMPLE_REJECTED_STATUS (Expected: Count 4, Change 1, Instance 3, REJECTED_BY_SAMPLES_LIMIT)", INFO); + dds := DEFAULT_DDS_READER_TEST; + dds.opcode := GET_SAMPLE_REJECTED_STATUS; + dds.ret_code := RETCODE_OK; + dds.count := 4; + dds.change := 1; + dds.inst := kh3; + dds.last_reason:= REJECTED_BY_SAMPLES_LIMIT; + start_dds; + wait_on_dds; + wait_on_idle; + + AffirmIf(status_id,(status and SAMPLE_REJECTED_STATUS) /= SAMPLE_REJECTED_STATUS, "Expected: 0", "Received: 1"); + + Log("DDS Operation TAKE [MAX_SAMPLES 1, ANY_SAMPLE_STATE, ANY_INSTANCE_STATE, ANY_VIEW_STATE]", INFO); + dds := DEFAULT_DDS_READER_TEST; + dds.opcode := TAKE; + dds.max_samples := 1; + dds.sstate := ANY_SAMPLE_STATE; + dds.istate := ANY_INSTANCE_STATE; + dds.vstate := ANY_VIEW_STATE; + start_dds; + wait_on_dds; + -- MEM: I2S1 + -- ISTATE: I1:ALIVE, I2:ALIVE + -- WRITER: W0:I1, W1:I2 + + AffirmIf(status_id,(status and SAMPLE_REJECTED_STATUS) /= SAMPLE_REJECTED_STATUS, "Expected: 0", "Received: 1"); + + cc := DEFAULT_CACHE_CHANGE; + cc.serialized_key := FALSE; + cc.kind := ALIVE; + cc.instance := kh3; + cc.payload := gen_payload(kh3,10); + cc.src_timestamp := gen_duration(7,0); + + Log("RTPS Operation ADD_CACHE_CHANGE [KEY_HASH, Instance 3, Writer 2, Aligned Payload] (ACCEPTED)", INFO); + rtps := DEFAULT_RTPS_READER_TEST; + rtps.opcode := ADD_CACHE_CHANGE; + rtps.cc := cc; + rtps.writer_pos := 2; + rtps.ret_code := OK; + s := to_sample(cc,ALIVE_INSTANCE_STATE); + add_sample(s,mem, BY_RECEPTION_TIMESTAMP_DESTINATION_ORDER_QOS); + start_rtps; + wait_on_rtps; + wait_on_idle; + -- MEM: I2S1, I3S1 + -- ISTATE: I1:ALIVE, I2:ALIVE, I3:ALIVE + -- WRITER: W0:I1, W1:I2, W2:I3 + + AffirmIf(status_id,(status and SAMPLE_REJECTED_STATUS) /= SAMPLE_REJECTED_STATUS, "Expected: 0", "Received: 1"); + + cc := DEFAULT_CACHE_CHANGE; + cc.serialized_key := FALSE; + cc.kind := ALIVE; + cc.instance := kh1; + cc.payload := gen_payload(kh1,10); + cc.src_timestamp := gen_duration(8,0); + + Log("RTPS Operation ADD_CACHE_CHANGE [KEY_HASH, Instance 1, Writer 0, Aligned Payload] (REJECTED: MAX_SAMPLES exceeded)", INFO); + rtps := DEFAULT_RTPS_READER_TEST; + rtps.opcode := ADD_CACHE_CHANGE; + rtps.cc := cc; + rtps.writer_pos := 2; + rtps.ret_code := REJECTED; + start_rtps; + wait_on_rtps; + wait_on_idle; + -- MEM: I2S1, I3S1 + -- ISTATE: I1:ALIVE, I2:ALIVE, I3:ALIVE + -- WRITER: W0:I1, W1:I2, W2:I3 + + AffirmIf(status_id,(status and SAMPLE_REJECTED_STATUS) = SAMPLE_REJECTED_STATUS, "Expected: 1", "Received: 0"); + + Log("DDS Operation GET_SAMPLE_REJECTED_STATUS (Expected: Count 5, Change 1, Instance 1, REJECTED_BY_SAMPLES_LIMIT)", INFO); + dds := DEFAULT_DDS_READER_TEST; + dds.opcode := GET_SAMPLE_REJECTED_STATUS; + dds.ret_code := RETCODE_OK; + dds.count := 5; + dds.change := 1; + dds.inst := kh1; + dds.last_reason:= REJECTED_BY_SAMPLES_LIMIT; + start_dds; + wait_on_dds; + wait_on_idle; + + AffirmIf(status_id,(status and SAMPLE_REJECTED_STATUS) /= SAMPLE_REJECTED_STATUS, "Expected: 0", "Received: 1"); + + cc := DEFAULT_CACHE_CHANGE; + cc.serialized_key := FALSE; + cc.kind := ALIVE; + cc.instance := kh4; + cc.payload := gen_payload(kh4,10); + cc.src_timestamp := gen_duration(9,0); + + Log("RTPS Operation ADD_CACHE_CHANGE [KEY_HASH, Instance 4, Writer 0, Aligned Payload] (REJECTED: MAX_INSTANCES exceeded)", INFO); + rtps := DEFAULT_RTPS_READER_TEST; + rtps.opcode := ADD_CACHE_CHANGE; + rtps.cc := cc; + rtps.writer_pos := 0; + rtps.ret_code := REJECTED; + start_rtps; + wait_on_rtps; + wait_on_idle; + -- MEM: I2S1, I3S1 + -- ISTATE: I1:ALIVE, I2:ALIVE, I3:ALIVE + -- WRITER: W0:I1, W1:I2, W2:I3 + + AffirmIf(status_id,(status and SAMPLE_REJECTED_STATUS) = SAMPLE_REJECTED_STATUS, "Expected: 1", "Received: 0"); + + Log("DDS Operation GET_SAMPLE_REJECTED_STATUS (Expected: Count 6, Change 1, Instance 1, REJECTED_BY_SAMPLES_LIMIT)", INFO); + dds := DEFAULT_DDS_READER_TEST; + dds.opcode := GET_SAMPLE_REJECTED_STATUS; + dds.ret_code := RETCODE_OK; + dds.count := 6; + dds.change := 1; + dds.inst := kh4; + dds.last_reason:= REJECTED_BY_SAMPLES_LIMIT; + start_dds; + wait_on_dds; + wait_on_idle; + + AffirmIf(status_id,(status and SAMPLE_REJECTED_STATUS) /= SAMPLE_REJECTED_STATUS, "Expected: 0", "Received: 1"); + + Log("DDS Operation TAKE [MAX_SAMPLES 1, ANY_SAMPLE_STATE, ANY_INSTANCE_STATE, ANY_VIEW_STATE]", INFO); + dds := DEFAULT_DDS_READER_TEST; + dds.opcode := TAKE; + dds.max_samples := 1; + dds.sstate := ANY_SAMPLE_STATE; + dds.istate := ANY_INSTANCE_STATE; + dds.vstate := ANY_VIEW_STATE; + start_dds; + wait_on_dds; + -- MEM: I3S1 + -- ISTATE: I1:ALIVE, I2:ALIVE, I3:ALIVE + -- WRITER: W0:I1, W1:I2, W2:I3 + + AffirmIf(status_id,(status and SAMPLE_REJECTED_STATUS) /= SAMPLE_REJECTED_STATUS, "Expected: 0", "Received: 1"); + + cc := DEFAULT_CACHE_CHANGE; + cc.serialized_key := FALSE; + cc.kind := ALIVE; + cc.instance := kh4; + cc.payload := gen_payload(kh4,10); + cc.src_timestamp := gen_duration(10,0); + + Log("RTPS Operation ADD_CACHE_CHANGE [KEY_HASH, Instance 4, Writer 0, Aligned Payload] (REJECTED: MAX_INSTANCES exceeded)", INFO); + rtps := DEFAULT_RTPS_READER_TEST; + rtps.opcode := ADD_CACHE_CHANGE; + rtps.cc := cc; + rtps.writer_pos := 0; + rtps.ret_code := REJECTED; + start_rtps; + wait_on_rtps; + wait_on_idle; + + AffirmIf(status_id,(status and SAMPLE_REJECTED_STATUS) = SAMPLE_REJECTED_STATUS, "Expected: 1", "Received: 0"); + + cc := DEFAULT_CACHE_CHANGE; + cc.serialized_key := FALSE; + cc.kind := ALIVE; + cc.instance := kh5; + cc.payload := gen_payload(kh5,10); + cc.src_timestamp := gen_duration(11,0); + + Log("RTPS Operation ADD_CACHE_CHANGE [KEY_HASH, Instance 5, Writer 1, Aligned Payload] (REJECTED: MAX_INSTANCES exceeded)", INFO); + rtps := DEFAULT_RTPS_READER_TEST; + rtps.opcode := ADD_CACHE_CHANGE; + rtps.cc := cc; + rtps.writer_pos := 1; + rtps.ret_code := REJECTED; + start_rtps; + wait_on_rtps; + wait_on_idle; + + AffirmIf(status_id,(status and SAMPLE_REJECTED_STATUS) = SAMPLE_REJECTED_STATUS, "Expected: 1", "Received: 0"); + + Log("DDS Operation GET_SAMPLE_REJECTED_STATUS (Expected: Count 8, Change 2, Instance 5, REJECTED_BY_INSTANCES_LIMIT)", INFO); + dds := DEFAULT_DDS_READER_TEST; + dds.opcode := GET_SAMPLE_REJECTED_STATUS; + dds.ret_code := RETCODE_OK; + dds.count := 8; + dds.change := 2; + dds.inst := kh5; + dds.last_reason:= REJECTED_BY_INSTANCES_LIMIT; + start_dds; + wait_on_dds; + wait_on_idle; + + AffirmIf(status_id,(status and SAMPLE_REJECTED_STATUS) /= SAMPLE_REJECTED_STATUS, "Expected: 0", "Received: 1"); + + wait_on_completion; + TranscriptOpen(RESULTS_FILE, APPEND_MODE); + SetTranscriptMirror; + ReportAlerts; + TranscriptClose; + std.env.stop; + wait; + end process; + + clock_prc : process + begin + clk <= '0'; + wait for 25 ns; + clk <= '1'; + wait for 25 ns; + end process; + + alert_prc : process(all) + begin + if rising_edge(clk) then + -- TODO + end if; + end process; + + dds_prc : process(all) + variable col : COLLECTION_TYPE := DEFAULT_COLLECTION; + begin + if rising_edge(clk) then + dds_done <= '0'; + case (dds_stage ) is + when IDLE => + if (dds_start = '1') then + dds_stage <= START; + else + dds_done <= '1'; + end if; + when START => + if (ack_dds = '1') then + dds_stage <= DONE; + dds_cnt <= 0; + end if; + when DONE => + if (done_dds = '1') then + AffirmIfEqual(ret_id, return_code_dds, dds.ret_code); + case (dds.ret_code) is + when RETCODE_OK => + case (dds.opcode) is + when GET_SAMPLE_REJECTED_STATUS => + dds_stage <= CHECK_SAMPLE_REJECT; + dds_cnt <= 0; + when others => + gen_collection(mem, col, dds, INSTANCE_PRESENTATION_QOS, FALSE); + dds_stage <= CHECK_SI; + dds_cnt <= 0; + end case; + when others => + dds_stage <= IDLE; + end case; + end if; + when CHECK_SI => + if (si_valid = '1') then + AffirmIfEqual(sstate_id, si_sample_state, col.s(dds_cnt).sstate); + AffirmIfEqual(vstate_id, si_view_state, col.s(dds_cnt).vstate); + AffirmIfEqual(istate_id, si_instance_state, col.s(dds_cnt).istate); + AffirmIfEqual(ts_id, convert_from_double_word(si_source_timestamp), convert_from_double_word(col.s(dds_cnt).ts)); + AffirmIfEqual(inst_id, to_unsigned(si_instance_handle), to_unsigned(col.s(dds_cnt).inst)); + AffirmIfEqual(pub_id, to_unsigned(si_publication_handle), to_unsigned(HANDLE_NIL)); + AffirmIfEqual(dis_gen_cnt_id, si_disposed_generation_count, std_logic_vector(to_unsigned(col.s(dds_cnt).dis_gen_cnt,WORD_WIDTH))); + AffirmIfEqual(no_w_gen_cnt_id, si_no_writers_generation_count, std_logic_vector(to_unsigned(col.s(dds_cnt).no_w_gen_cnt,WORD_WIDTH))); + AffirmIfEqual(srank_id, si_sample_rank, std_logic_vector(to_unsigned(col.s(dds_cnt).srank,WORD_WIDTH))); + AffirmIfEqual(grank_id, si_generation_rank, std_logic_vector(to_unsigned(col.s(dds_cnt).grank,WORD_WIDTH))); + AffirmIfEqual(agrank_id, si_absolute_generation_rank, std_logic_vector(to_unsigned(col.s(dds_cnt).agrank,WORD_WIDTH))); + if (si_valid_data = '1') then + AffirmIf(valid_id, col.s(dds_cnt).data /= EMPTY_TEST_PACKET, "Sample with Data not expected"); + dds_stage <= CHECK_DATA; + dds_cnt2 <= 0; + else + AffirmIf(valid_id, col.s(dds_cnt).data = EMPTY_TEST_PACKET, "Sample with Data expected"); + if (dds_cnt = col.len-1) then + -- DONE + dds_stage <= WAIT_EOC; + else + dds_cnt <= dds_cnt + 1; + end if; + end if; + end if; + AffirmIf(eoc_id, eoc = '0', "EOC pulled high"); + when CHECK_DATA => + if (valid_out_dds = '1') then + AffirmIfEqual(data_id, data_out_dds, col.s(dds_cnt).data.data(dds_cnt2)); + dds_cnt2 <= dds_cnt2 + 1; + if (dds_cnt2 = col.s(dds_cnt).data.length-1) then + AlertIf(data_id, last_word_out_dds /= '1', "Last Word Signal not pulled High", ERROR); + if (dds_cnt = col.len-1) then + -- DONE + dds_stage <= WAIT_EOC; + else + dds_stage <= CHECK_SI; + dds_cnt <= dds_cnt + 1; + end if; + end if; + end if; + when WAIT_EOC => + if (eoc = '1') then + dds_stage <= IDLE; + end if; + when CHECK_SAMPLE_REJECT => + if (valid_out_dds = '1') then + dds_cnt <= dds_cnt + 1; + case (dds_cnt) is + when 0 => + AffirmIfEqual(data_id, data_out_dds, std_logic_vector(to_unsigned(dds.count,CDR_LONG_WIDTH))); + when 1 => + AffirmIfEqual(data_id, data_out_dds, std_logic_vector(to_unsigned(dds.change,CDR_LONG_WIDTH))); + when 2 => + AffirmIfEqual(data_id, data_out_dds, dds.last_reason); + when 3 => + AffirmIfEqual(data_id, data_out_dds, std_logic_vector(dds.inst(0))); + when 4 => + AffirmIfEqual(data_id, data_out_dds, std_logic_vector(dds.inst(1))); + when 5 => + AffirmIfEqual(data_id, data_out_dds, std_logic_vector(dds.inst(2))); + when 6 => + AffirmIfEqual(data_id, data_out_dds, std_logic_vector(dds.inst(3))); + AlertIf(data_id, last_word_out_dds /= '1', "Last Word Signal not pulled High", ERROR); + dds_stage <= IDLE; + when others => + null; + end case; + end if; + end case; + end if; + + -- DEFAULT + start_dds <= '0'; + opcode_dds <= NOP; + instance_state_dds <= ANY_INSTANCE_STATE; + view_state_dds <= ANY_VIEW_STATE; + sample_state_dds <= ANY_SAMPLE_STATE; + instance_handle_dds <= HANDLE_NIL; + max_samples_dds <= (others => '0'); + get_data_dds <= '0'; + ready_out_dds <= '0'; + + + case (dds_stage ) is + when START => + start_dds <= '1'; + opcode_dds <= dds.opcode; + instance_state_dds <= dds.istate; + view_state_dds <= dds.vstate; + sample_state_dds <= dds.sstate; + instance_handle_dds <= dds.inst; + max_samples_dds <= std_logic_vector(to_unsigned(dds.max_samples, WORD_WIDTH)); + when CHECK_SI => + if (si_valid = '1' and si_valid_data = '1') then + get_data_dds <= '1'; + end if; + when CHECK_DATA => + ready_out_dds <= '1'; + when CHECK_SAMPLE_REJECT => + ready_out_dds <= '1'; + when others => + null; + end case; + end process; + + rtps_prc : process(all) + variable stimulus : TEST_PACKET_TYPE := EMPTY_TEST_PACKET; + begin + if rising_edge(clk) then + rtps_done <= '0'; + case (rtps_stage) is + when IDLE => + if (rtps_start = '1') then + rtps_stage <= START; + else + rtps_done <= '1'; + end if; + when START => + if (ack_rtps = '1') then + case (rtps.opcode) is + when ADD_CACHE_CHANGE => + gen_add_cache_change_dds(rtps.cc, rtps.lifespan, rtps.writer_pos, stimulus); + rtps_stage <= PUSH; + when others => + rtps_stage <= DONE; + end case; + end if; + when PUSH => + if (ready_in_rtps = '1') then + rtps_cnt <= rtps_cnt + 1; + if (rtps_cnt = stimulus.length-1) then + rtps_stage <= DONE; + end if; + end if; + when DONE => + if (done_rtps = '1') then + AffirmIfEqual(ret_id, HISTORY_CACHE_RESPONSE_TYPE'pos(ret_rtps), HISTORY_CACHE_RESPONSE_TYPE'pos(rtps.ret_code)); + rtps_stage <= IDLE; + end if; + end case; + end if; + + -- DEFAULT + start_rtps <= '0'; + opcode_rtps <= NOP; + valid_in_rtps <= '0'; + last_word_in_rtps <= '0'; + data_in_rtps <= (others => '0'); + + case (rtps_stage) is + when START => + start_rtps <= '1'; + opcode_rtps <= rtps.opcode; + case (rtps.opcode) is + when REMOVE_WRITER => + data_in_rtps <= std_logic_vector(to_unsigned(rtps.writer_pos,WORD_WIDTH)); + when others => + null; + end case; + when PUSH => + valid_in_rtps <= '1'; + data_in_rtps <= stimulus.data(rtps_cnt); + last_word_in_rtps <= stimulus.last(rtps_cnt); + when others => + null; + end case; + end process; + + kh_prc : process (all) + variable tmp_key_hash : INSTANCE_HANDLE_TYPE := HANDLE_NIL; + begin + if rising_edge(clk) then + case (kh_stage) is + when IDLE => + if (start_kh = '1') then + case (opcode_kh) is + when PUSH_DATA => + kh_stage <= READ_DATA; + kh_cnt <= 0; + kh_data <= EMPTY_TEST_PACKET; + when PUSH_SERIALIZED_KEY => + kh_stage <= READ_DATA; + kh_cnt <= 0; + kh_data <= EMPTY_TEST_PACKET; + when READ_KEY_HASH => + kh_stage <= PUSH_KEY_HASH; + kh_cnt <= 0; + when others => + Alert("Unexpected Key Holder Operation", FAILURE); + end case; + end if; + when READ_DATA => + if (valid_out_kh = '1') then + kh_data.data(kh_cnt) <= data_out_kh; + kh_data.last(kh_cnt) <= last_word_out_kh; + kh_data.length <= kh_data.length + 1; + + kh_cnt <= kh_cnt + 1; + if (last_word_out_kh = '1') then + kh_stage <= IDLE; + end if; + end if; + when PUSH_KEY_HASH => + if (ready_in_kh = '1') then + kh_cnt <= kh_cnt + 1; + if (kh_cnt = INSTANCE_HANDLE_TYPE'length-1) then + kh_stage <= IDLE; + end if; + end if; + end case; + end if; + + -- DEFAULT + ack_kh <= '0'; + ready_out_kh <= '0'; + valid_in_kh <= '0'; + data_in_kh <= (others => '0'); + last_word_in_kh <= '0'; + + case (kh_stage) is + when IDLE => + if (start_kh = '1') then + ack_kh <= '1'; + end if; + when READ_DATA => + ready_out_kh <= '1'; + when PUSH_KEY_HASH => + valid_in_kh <= '1'; + tmp_key_hash := extract_key_hash(kh_data); + data_in_kh <= tmp_key_hash(kh_cnt); + if (kh_cnt = INSTANCE_HANDLE_TYPE'length-1) then + last_word_in_kh <= '1'; + end if; + end case; + end process; + + watchdog : process + begin + wait for 1 ms; + Alert("Test timeout", FAILURE); + std.env.stop; + end process; + +end architecture; \ No newline at end of file diff --git a/src/Tests/testbench.pro b/src/Tests/testbench.pro index 0161137..d5825b3 100644 --- a/src/Tests/testbench.pro +++ b/src/Tests/testbench.pro @@ -77,8 +77,9 @@ analyze ../dds_reader.vhd #analyze Level_0/L0_dds_reader_test3_arzkrto.vhd #analyze Level_0/L0_dds_reader_test3_arznriu.vhd #analyze Level_0/L0_dds_reader_test3_arzksto.vhd -analyze Level_0/L0_dds_reader_test4_arzkriu.vhd -analyze Level_0/L0_dds_reader_test4_arznriu.vhd +#analyze Level_0/L0_dds_reader_test4_arzkriu.vhd +#analyze Level_0/L0_dds_reader_test4_arznriu.vhd +analyze Level_0/L0_dds_reader_test5_arzkriu.vhd #simulate L0_rtps_handler_test1 #simulate L0_rtps_handler_test2 @@ -137,5 +138,6 @@ analyze Level_0/L0_dds_reader_test4_arznriu.vhd #simulate L0_dds_reader_test3_arzkrto #simulate L0_dds_reader_test3_arznriu #simulate L0_dds_reader_test3_arzksto -simulate L0_dds_reader_test4_arzkriu -#simulate L0_dds_reader_test4_arznriu \ No newline at end of file +#simulate L0_dds_reader_test4_arzkriu +#simulate L0_dds_reader_test4_arznriu +simulate L0_dds_reader_test5_arzkriu \ No newline at end of file diff --git a/src/dds_reader.vhd b/src/dds_reader.vhd index 2652d9a..1257648 100644 --- a/src/dds_reader.vhd +++ b/src/dds_reader.vhd @@ -820,9 +820,16 @@ begin if (HISTORY_QOS = KEEP_ALL_HISTORY_QOS and RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS) then ack_rtps <= '1'; -- Reject Change - stage_next <= SKIP_AND_RETURN; - cnt_next <= 0; - rtps_return_code_latch_next <= REJECTED; + stage_next <= SKIP_AND_RETURN; + cnt_next <= 0; + rtps_return_code_latch_next <= REJECTED; + + -- Update Sample Reject Status + status_sig_next <= status_sig or SAMPLE_REJECTED_STATUS; + sample_rej_cnt_next <= sample_rej_cnt + 1; + sample_rej_cnt_change_next <= sample_rej_cnt_change + 1; + sample_rej_last_reason_next <= REJECTED_BY_PAYOAD_MEMORY_LIMIT; + sample_rej_last_inst_next <= HANDLE_NIL; else assert (oldest_sample /= SAMPLE_MEMORY_MAX_ADDRESS) severity FAILURE; -- Do not ACK Operation @@ -1424,16 +1431,16 @@ begin -- No Empty Payload Slots available if (resize(unsigned(payload_read_data),PAYLOAD_MEMORY_ADDR_WIDTH) = PAYLOAD_MEMORY_MAX_ADDRESS) then -- Reject Change - rtps_return_code_latch_next <= REJECTED; - stage_next <= SKIP_AND_RETURN; - cnt_next <= 0; + rtps_return_code_latch_next <= REJECTED; + stage_next <= SKIP_AND_RETURN; + cnt_next <= 0; -- Abort Key Hash Generation abort_kh <= '1'; -- Update Sample Reject Status status_sig_next <= status_sig or SAMPLE_REJECTED_STATUS; sample_rej_cnt_next <= sample_rej_cnt + 1; sample_rej_cnt_change_next <= sample_rej_cnt_change + 1; - sample_rej_last_reason_next <= REJECTED_BY_SAMPLES_LIMIT; + sample_rej_last_reason_next <= REJECTED_BY_PAYOAD_MEMORY_LIMIT; sample_rej_last_inst_next <= key_hash; else -- Latch next Payload Slot and Continue @@ -4223,7 +4230,7 @@ begin valid_out_dds <= '1'; if (ready_out_dds = '1') then -- Reset - sample_rej_last_reason <= NOT_REJECTED; + sample_rej_last_reason_next <= NOT_REJECTED; cnt_next <= cnt + 1; end if; -- Last Instance Handle 1/4 @@ -4254,7 +4261,8 @@ begin last_word_out_dds <= '1'; if (ready_out_dds = '1') then -- Reset - status_sig_next <= status_sig and (not SAMPLE_REJECTED_STATUS); + sample_rej_last_inst_next <= HANDLE_NIL; + status_sig_next <= status_sig and (not SAMPLE_REJECTED_STATUS); -- DONE stage_next <= IDLE; @@ -4313,7 +4321,8 @@ begin last_word_out_dds <= '1'; if (ready_out_dds = '1') then -- Reset - status_sig_next <= status_sig and (not REQUESTED_DEADLINE_MISSED_STATUS); + deadline_miss_last_inst_next <= HANDLE_NIL; + status_sig_next <= status_sig and (not REQUESTED_DEADLINE_MISSED_STATUS); -- DONE stage_next <= IDLE; diff --git a/src/rtps_package.vhd b/src/rtps_package.vhd index 3ae6c73..a8bacd8 100644 --- a/src/rtps_package.vhd +++ b/src/rtps_package.vhd @@ -175,6 +175,8 @@ package rtps_package is constant REJECTED_BY_INSTANCES_LIMIT : std_logic_vector(CDR_ENUMERATION_WIDTH-1 downto 0) := std_logic_vector(to_unsigned(1,CDR_ENUMERATION_WIDTH)); constant REJECTED_BY_SAMPLES_LIMIT : std_logic_vector(CDR_ENUMERATION_WIDTH-1 downto 0) := std_logic_vector(to_unsigned(2,CDR_ENUMERATION_WIDTH)); constant REJECTED_BY_SAMPLES_PER_INSTANCE_LIMIT : std_logic_vector(CDR_ENUMERATION_WIDTH-1 downto 0) := std_logic_vector(to_unsigned(3,CDR_ENUMERATION_WIDTH)); + -- Extension + constant REJECTED_BY_PAYOAD_MEMORY_LIMIT : std_logic_vector(CDR_ENUMERATION_WIDTH-1 downto 0) := std_logic_vector(to_unsigned(255,CDR_ENUMERATION_WIDTH)); -- *QOS POLICY ID* (DDS) constant INVALID_QOS_POLICY_ID : std_logic_vector(QOS_POLICY_ID_WIDTH-1 downto 0) := std_logic_vector(to_unsigned(0,QOS_POLICY_ID_WIDTH));