From ab20cad4d6bde129982d6d049aebba909c02e0ca Mon Sep 17 00:00:00 2001 From: Greek64 Date: Sun, 13 Mar 2022 16:36:57 +0100 Subject: [PATCH] code refactoring --- sim/L0_rtps_builtin_endpoint_test2.do | 69 -- sim/L0_rtps_builtin_endpoint_test3.do | 68 -- sim/L0_rtps_builtin_endpoint_test4.do | 68 -- sim/L0_rtps_builtin_endpoint_test5.do | 78 -- sim/L0_rtps_builtin_endpoint_test6.do | 71 -- sim/L0_rtps_discovery_module_test1_mc.do | 65 ++ sim/L0_rtps_discovery_module_test2.do | 69 ++ sim/L0_rtps_discovery_module_test3.do | 68 ++ sim/L0_rtps_discovery_module_test4.do | 68 ++ sim/L0_rtps_discovery_module_test5.do | 68 ++ sim/L0_rtps_discovery_module_test6.do | 71 ++ sim/L1_rtps_builtin_endpoint_test1.do | 89 --- sim/L1_rtps_discovery_module_test1.do | 89 +++ src/ros2/ros_action_server.vhd | 12 +- src/rtps_discovery_module.vhd | 914 +++++++++++------------ src/rtps_reader.vhd | 878 +++++++++++----------- src/rtps_writer.vhd | 893 +++++++++++----------- 17 files changed, 1814 insertions(+), 1824 deletions(-) delete mode 100644 sim/L0_rtps_builtin_endpoint_test2.do delete mode 100644 sim/L0_rtps_builtin_endpoint_test3.do delete mode 100644 sim/L0_rtps_builtin_endpoint_test4.do delete mode 100644 sim/L0_rtps_builtin_endpoint_test5.do delete mode 100644 sim/L0_rtps_builtin_endpoint_test6.do create mode 100644 sim/L0_rtps_discovery_module_test1_mc.do create mode 100644 sim/L0_rtps_discovery_module_test2.do create mode 100644 sim/L0_rtps_discovery_module_test3.do create mode 100644 sim/L0_rtps_discovery_module_test4.do create mode 100644 sim/L0_rtps_discovery_module_test5.do create mode 100644 sim/L0_rtps_discovery_module_test6.do delete mode 100644 sim/L1_rtps_builtin_endpoint_test1.do create mode 100644 sim/L1_rtps_discovery_module_test1.do diff --git a/sim/L0_rtps_builtin_endpoint_test2.do b/sim/L0_rtps_builtin_endpoint_test2.do deleted file mode 100644 index 581a619..0000000 --- a/sim/L0_rtps_builtin_endpoint_test2.do +++ /dev/null @@ -1,69 +0,0 @@ -onerror {resume} -quietly WaveActivateNextPane {} 0 -add wave -noupdate -divider SYSTEM -add wave -noupdate /L0_rtps_builtin_endpoint_test2/uut/clk -add wave -noupdate /L0_rtps_builtin_endpoint_test2/uut/reset -add wave -noupdate -divider INPUT -add wave -noupdate /L0_rtps_builtin_endpoint_test2/uut/empty -add wave -noupdate /L0_rtps_builtin_endpoint_test2/uut/rd -add wave -noupdate -radix hexadecimal /L0_rtps_builtin_endpoint_test2/uut/data_in -add wave -noupdate /L0_rtps_builtin_endpoint_test2/uut/last_word_in -add wave -noupdate /L0_rtps_builtin_endpoint_test2/uut/last_word_in_latch -add wave -noupdate -divider OUTPUT -add wave -noupdate -radix hexadecimal /L0_rtps_builtin_endpoint_test2/uut/data_out -add wave -noupdate /L0_rtps_builtin_endpoint_test2/uut/endpoint_wr -add wave -noupdate /L0_rtps_builtin_endpoint_test2/uut/last_word_out -add wave -noupdate -divider TESTBENCH -add wave -noupdate /L0_rtps_builtin_endpoint_test2/start -add wave -noupdate /L0_rtps_builtin_endpoint_test2/stim_stage -add wave -noupdate /L0_rtps_builtin_endpoint_test2/stimulus.length -add wave -noupdate /L0_rtps_builtin_endpoint_test2/cnt_stim -add wave -noupdate /L0_rtps_builtin_endpoint_test2/packet_sent -add wave -noupdate /L0_rtps_builtin_endpoint_test2/SB.ItemNumberVar -add wave -noupdate -divider {MAIN FSM} -add wave -noupdate /L0_rtps_builtin_endpoint_test2/uut/stage -add wave -noupdate /L0_rtps_builtin_endpoint_test2/uut/stage_next -add wave -noupdate /L0_rtps_builtin_endpoint_test2/uut/cnt -add wave -noupdate /L0_rtps_builtin_endpoint_test2/uut/endpoint_mask -add wave -noupdate /L0_rtps_builtin_endpoint_test2/uut/participant_match -add wave -noupdate -divider {MEM FSM} -add wave -noupdate -group MEM_FSM /L0_rtps_builtin_endpoint_test2/uut/mem_opcode -add wave -noupdate -group MEM_FSM /L0_rtps_builtin_endpoint_test2/uut/mem_op_start -add wave -noupdate -group MEM_FSM /L0_rtps_builtin_endpoint_test2/uut/mem_op_done -add wave -noupdate -group MEM_FSM /L0_rtps_builtin_endpoint_test2/uut/mem_stage -add wave -noupdate -group MEM_FSM /L0_rtps_builtin_endpoint_test2/uut/mem_stage_next -add wave -noupdate -group MEM_FSM /L0_rtps_builtin_endpoint_test2/uut/mem_cnt -add wave -noupdate -group MEM_FSM -radix unsigned /L0_rtps_builtin_endpoint_test2/uut/mem_addr_base -add wave -noupdate -group MEM_FSM -radix unsigned /L0_rtps_builtin_endpoint_test2/uut/addr_res -add wave -noupdate -divider GUARD -add wave -noupdate -radix unsigned /L0_rtps_builtin_endpoint_test2/uut/read_cnt -add wave -noupdate -radix unsigned /L0_rtps_builtin_endpoint_test2/uut/parameter_end -add wave -noupdate /L0_rtps_builtin_endpoint_test2/uut/parse_prc/rd_guard -add wave -noupdate -divider MEMORY -add wave -noupdate -group MEMORY -radix unsigned /L0_rtps_builtin_endpoint_test2/uut/ram_inst/addr -add wave -noupdate -group MEMORY /L0_rtps_builtin_endpoint_test2/uut/ram_inst/wen -add wave -noupdate -group MEMORY /L0_rtps_builtin_endpoint_test2/uut/ram_inst/ren -add wave -noupdate -group MEMORY -radix hexadecimal /L0_rtps_builtin_endpoint_test2/uut/ram_inst/wr_data -add wave -noupdate -group MEMORY -radix hexadecimal /L0_rtps_builtin_endpoint_test2/uut/ram_inst/rd_data -add wave -noupdate -divider MISC -add wave -noupdate /L0_rtps_builtin_endpoint_test2/uut/update_participant_flags -add wave -noupdate -radix unsigned /L0_rtps_builtin_endpoint_test2/uut/mem_seq_nr -add wave -noupdate -radix unsigned /L0_rtps_builtin_endpoint_test2/uut/seq_nr -TreeUpdate [SetDefaultTree] -WaveRestoreCursors {Begin {63775000 ps} 1} {Error {66975000 ps} 1} {Cursor {33675000 ps} 0} -quietly wave cursor active 1 -configure wave -namecolwidth 149 -configure wave -valuecolwidth 144 -configure wave -justifyvalue left -configure wave -signalnamewidth 1 -configure wave -snapdistance 10 -configure wave -datasetprefix 0 -configure wave -rowmargin 4 -configure wave -childrowmargin 2 -configure wave -gridoffset 0 -configure wave -gridperiod 1 -configure wave -griddelta 40 -configure wave -timeline 0 -configure wave -timelineunits ns -update -WaveRestoreZoom {63200829 ps} {64349171 ps} diff --git a/sim/L0_rtps_builtin_endpoint_test3.do b/sim/L0_rtps_builtin_endpoint_test3.do deleted file mode 100644 index b996841..0000000 --- a/sim/L0_rtps_builtin_endpoint_test3.do +++ /dev/null @@ -1,68 +0,0 @@ -onerror {resume} -quietly WaveActivateNextPane {} 0 -add wave -noupdate -divider SYSTEM -add wave -noupdate /L0_rtps_builtin_endpoint_test3/uut/clk -add wave -noupdate /L0_rtps_builtin_endpoint_test3/uut/reset -add wave -noupdate -divider INPUT -add wave -noupdate /L0_rtps_builtin_endpoint_test3/uut/empty -add wave -noupdate /L0_rtps_builtin_endpoint_test3/uut/rd -add wave -noupdate -radix hexadecimal /L0_rtps_builtin_endpoint_test3/uut/data_in -add wave -noupdate /L0_rtps_builtin_endpoint_test3/uut/last_word_in -add wave -noupdate /L0_rtps_builtin_endpoint_test3/uut/last_word_in_latch -add wave -noupdate -divider OUTPUT -add wave -noupdate -radix hexadecimal /L0_rtps_builtin_endpoint_test3/uut/data_out -add wave -noupdate /L0_rtps_builtin_endpoint_test3/uut/endpoint_wr -add wave -noupdate /L0_rtps_builtin_endpoint_test3/uut/last_word_out -add wave -noupdate -divider TESTBENCH -add wave -noupdate /L0_rtps_builtin_endpoint_test3/start -add wave -noupdate /L0_rtps_builtin_endpoint_test3/stim_stage -add wave -noupdate /L0_rtps_builtin_endpoint_test3/stimulus.length -add wave -noupdate /L0_rtps_builtin_endpoint_test3/cnt_stim -add wave -noupdate /L0_rtps_builtin_endpoint_test3/packet_sent -add wave -noupdate -divider {MAIN FSM} -add wave -noupdate /L0_rtps_builtin_endpoint_test3/uut/stage -add wave -noupdate /L0_rtps_builtin_endpoint_test3/uut/stage_next -add wave -noupdate /L0_rtps_builtin_endpoint_test3/uut/cnt -add wave -noupdate /L0_rtps_builtin_endpoint_test3/uut/endpoint_mask -add wave -noupdate /L0_rtps_builtin_endpoint_test3/uut/participant_match -add wave -noupdate -divider {MEM FSM} -add wave -noupdate -group MEM_FSM /L0_rtps_builtin_endpoint_test3/uut/mem_opcode -add wave -noupdate -group MEM_FSM /L0_rtps_builtin_endpoint_test3/uut/mem_op_start -add wave -noupdate -group MEM_FSM /L0_rtps_builtin_endpoint_test3/uut/mem_op_done -add wave -noupdate -group MEM_FSM /L0_rtps_builtin_endpoint_test3/uut/mem_stage -add wave -noupdate -group MEM_FSM /L0_rtps_builtin_endpoint_test3/uut/mem_stage_next -add wave -noupdate -group MEM_FSM /L0_rtps_builtin_endpoint_test3/uut/mem_cnt -add wave -noupdate -group MEM_FSM -radix unsigned /L0_rtps_builtin_endpoint_test3/uut/mem_addr_base -add wave -noupdate -group MEM_FSM -radix unsigned /L0_rtps_builtin_endpoint_test3/uut/addr_res -add wave -noupdate -divider GUARD -add wave -noupdate -radix unsigned /L0_rtps_builtin_endpoint_test3/uut/read_cnt -add wave -noupdate -radix unsigned /L0_rtps_builtin_endpoint_test3/uut/parameter_end -add wave -noupdate /L0_rtps_builtin_endpoint_test3/uut/parse_prc/rd_guard -add wave -noupdate -divider MEMORY -add wave -noupdate -group MEMORY -radix unsigned /L0_rtps_builtin_endpoint_test3/uut/ram_inst/addr -add wave -noupdate -group MEMORY /L0_rtps_builtin_endpoint_test3/uut/ram_inst/wen -add wave -noupdate -group MEMORY /L0_rtps_builtin_endpoint_test3/uut/ram_inst/ren -add wave -noupdate -group MEMORY -radix hexadecimal /L0_rtps_builtin_endpoint_test3/uut/ram_inst/wr_data -add wave -noupdate -group MEMORY -radix hexadecimal /L0_rtps_builtin_endpoint_test3/uut/ram_inst/rd_data -add wave -noupdate -divider MISC -add wave -noupdate /L0_rtps_builtin_endpoint_test3/uut/update_participant_flags -add wave -noupdate -radix unsigned /L0_rtps_builtin_endpoint_test3/uut/mem_seq_nr -add wave -noupdate -radix unsigned /L0_rtps_builtin_endpoint_test3/uut/seq_nr -TreeUpdate [SetDefaultTree] -WaveRestoreCursors {Begin {847825000 ps} 1} {Error {851525000 ps} 1} {Cursor {33675000 ps} 0} -quietly wave cursor active 1 -configure wave -namecolwidth 149 -configure wave -valuecolwidth 144 -configure wave -justifyvalue left -configure wave -signalnamewidth 1 -configure wave -snapdistance 10 -configure wave -datasetprefix 0 -configure wave -rowmargin 4 -configure wave -childrowmargin 2 -configure wave -gridoffset 0 -configure wave -gridperiod 1 -configure wave -griddelta 40 -configure wave -timeline 0 -configure wave -timelineunits ns -update -WaveRestoreZoom {848883724 ps} {850032066 ps} diff --git a/sim/L0_rtps_builtin_endpoint_test4.do b/sim/L0_rtps_builtin_endpoint_test4.do deleted file mode 100644 index b4f1bf5..0000000 --- a/sim/L0_rtps_builtin_endpoint_test4.do +++ /dev/null @@ -1,68 +0,0 @@ -onerror {resume} -quietly WaveActivateNextPane {} 0 -add wave -noupdate -divider SYSTEM -add wave -noupdate /L0_rtps_builtin_endpoint_test4/uut/clk -add wave -noupdate /L0_rtps_builtin_endpoint_test4/uut/reset -add wave -noupdate -divider INPUT -add wave -noupdate /L0_rtps_builtin_endpoint_test4/uut/empty -add wave -noupdate /L0_rtps_builtin_endpoint_test4/uut/rd -add wave -noupdate -radix hexadecimal /L0_rtps_builtin_endpoint_test4/uut/data_in -add wave -noupdate /L0_rtps_builtin_endpoint_test4/uut/last_word_in -add wave -noupdate /L0_rtps_builtin_endpoint_test4/uut/last_word_in_latch -add wave -noupdate -divider OUTPUT -add wave -noupdate -radix hexadecimal /L0_rtps_builtin_endpoint_test4/uut/data_out -add wave -noupdate /L0_rtps_builtin_endpoint_test4/uut/endpoint_wr -add wave -noupdate /L0_rtps_builtin_endpoint_test4/uut/last_word_out -add wave -noupdate -divider TESTBENCH -add wave -noupdate /L0_rtps_builtin_endpoint_test4/start -add wave -noupdate /L0_rtps_builtin_endpoint_test4/stim_stage -add wave -noupdate /L0_rtps_builtin_endpoint_test4/stimulus.length -add wave -noupdate /L0_rtps_builtin_endpoint_test4/cnt_stim -add wave -noupdate /L0_rtps_builtin_endpoint_test4/packet_sent -add wave -noupdate -divider {MAIN FSM} -add wave -noupdate /L0_rtps_builtin_endpoint_test4/uut/stage -add wave -noupdate /L0_rtps_builtin_endpoint_test4/uut/stage_next -add wave -noupdate /L0_rtps_builtin_endpoint_test4/uut/cnt -add wave -noupdate /L0_rtps_builtin_endpoint_test4/uut/endpoint_mask -add wave -noupdate /L0_rtps_builtin_endpoint_test4/uut/participant_match -add wave -noupdate -divider {MEM FSM} -add wave -noupdate -group MEM_FSM /L0_rtps_builtin_endpoint_test4/uut/mem_opcode -add wave -noupdate -group MEM_FSM /L0_rtps_builtin_endpoint_test4/uut/mem_op_start -add wave -noupdate -group MEM_FSM /L0_rtps_builtin_endpoint_test4/uut/mem_op_done -add wave -noupdate -group MEM_FSM /L0_rtps_builtin_endpoint_test4/uut/mem_stage -add wave -noupdate -group MEM_FSM /L0_rtps_builtin_endpoint_test4/uut/mem_stage_next -add wave -noupdate -group MEM_FSM /L0_rtps_builtin_endpoint_test4/uut/mem_cnt -add wave -noupdate -group MEM_FSM -radix unsigned /L0_rtps_builtin_endpoint_test4/uut/mem_addr_base -add wave -noupdate -group MEM_FSM -radix unsigned /L0_rtps_builtin_endpoint_test4/uut/addr_res -add wave -noupdate -divider GUARD -add wave -noupdate -radix unsigned /L0_rtps_builtin_endpoint_test4/uut/read_cnt -add wave -noupdate -radix unsigned /L0_rtps_builtin_endpoint_test4/uut/parameter_end -add wave -noupdate /L0_rtps_builtin_endpoint_test4/uut/parse_prc/rd_guard -add wave -noupdate -divider MEMORY -add wave -noupdate -group MEMORY -radix unsigned /L0_rtps_builtin_endpoint_test4/uut/ram_inst/addr -add wave -noupdate -group MEMORY /L0_rtps_builtin_endpoint_test4/uut/ram_inst/wen -add wave -noupdate -group MEMORY /L0_rtps_builtin_endpoint_test4/uut/ram_inst/ren -add wave -noupdate -group MEMORY -radix hexadecimal /L0_rtps_builtin_endpoint_test4/uut/ram_inst/wr_data -add wave -noupdate -group MEMORY -radix hexadecimal /L0_rtps_builtin_endpoint_test4/uut/ram_inst/rd_data -add wave -noupdate -divider MISC -add wave -noupdate /L0_rtps_builtin_endpoint_test4/uut/update_participant_flags -add wave -noupdate -radix unsigned /L0_rtps_builtin_endpoint_test4/uut/mem_seq_nr -add wave -noupdate -radix unsigned /L0_rtps_builtin_endpoint_test4/uut/seq_nr -TreeUpdate [SetDefaultTree] -WaveRestoreCursors {Begin {847825000 ps} 1} {Error {851525000 ps} 1} {Cursor {33675000 ps} 0} -quietly wave cursor active 1 -configure wave -namecolwidth 149 -configure wave -valuecolwidth 144 -configure wave -justifyvalue left -configure wave -signalnamewidth 1 -configure wave -snapdistance 10 -configure wave -datasetprefix 0 -configure wave -rowmargin 4 -configure wave -childrowmargin 2 -configure wave -gridoffset 0 -configure wave -gridperiod 1 -configure wave -griddelta 40 -configure wave -timeline 0 -configure wave -timelineunits ns -update -WaveRestoreZoom {848883724 ps} {850032066 ps} diff --git a/sim/L0_rtps_builtin_endpoint_test5.do b/sim/L0_rtps_builtin_endpoint_test5.do deleted file mode 100644 index 3743b08..0000000 --- a/sim/L0_rtps_builtin_endpoint_test5.do +++ /dev/null @@ -1,78 +0,0 @@ -onerror {resume} -quietly WaveActivateNextPane {} 0 -add wave -noupdate -divider SYSTEM -add wave -noupdate /l0_rtps_builtin_endpoint_test5/uut/clk -add wave -noupdate /l0_rtps_builtin_endpoint_test5/uut/reset -add wave -noupdate -radix unsigned /l0_rtps_builtin_endpoint_test5/uut/time -add wave -noupdate -radix unsigned /l0_rtps_builtin_endpoint_test5/uut/check_time -add wave -noupdate -divider INPUT -add wave -noupdate /l0_rtps_builtin_endpoint_test5/uut/empty -add wave -noupdate /l0_rtps_builtin_endpoint_test5/uut/rd -add wave -noupdate -radix hexadecimal /l0_rtps_builtin_endpoint_test5/uut/data_in -add wave -noupdate /l0_rtps_builtin_endpoint_test5/uut/last_word_in -add wave -noupdate /l0_rtps_builtin_endpoint_test5/uut/last_word_in_latch -add wave -noupdate -divider {MAIN FSM} -add wave -noupdate /l0_rtps_builtin_endpoint_test5/uut/stage -add wave -noupdate /l0_rtps_builtin_endpoint_test5/uut/stage_next -add wave -noupdate /l0_rtps_builtin_endpoint_test5/uut/cnt -add wave -noupdate /l0_rtps_builtin_endpoint_test5/uut/endpoint_mask -add wave -noupdate /l0_rtps_builtin_endpoint_test5/uut/participant_match -add wave -noupdate -divider {MEM FSM} -add wave -noupdate -group MEMORY -radix unsigned /l0_rtps_builtin_endpoint_test5/uut/mem_ctrl_inst/addr -add wave -noupdate -group MEMORY /l0_rtps_builtin_endpoint_test5/uut/mem_ctrl_inst/read -add wave -noupdate -group MEMORY /l0_rtps_builtin_endpoint_test5/uut/mem_ctrl_inst/ready_in -add wave -noupdate -group MEMORY /l0_rtps_builtin_endpoint_test5/uut/mem_ctrl_inst/valid_in -add wave -noupdate -group MEMORY -radix hexadecimal /l0_rtps_builtin_endpoint_test5/uut/mem_ctrl_inst/data_in -add wave -noupdate -group MEMORY /l0_rtps_builtin_endpoint_test5/uut/mem_ctrl_inst/ready_out -add wave -noupdate -group MEMORY /l0_rtps_builtin_endpoint_test5/uut/mem_ctrl_inst/valid_out -add wave -noupdate -group MEMORY -radix hexadecimal /l0_rtps_builtin_endpoint_test5/uut/mem_ctrl_inst/data_out -add wave -noupdate /l0_rtps_builtin_endpoint_test5/uut/mem_op_start -add wave -noupdate /l0_rtps_builtin_endpoint_test5/uut/mem_opcode -add wave -noupdate /l0_rtps_builtin_endpoint_test5/uut/mem_op_done -add wave -noupdate /l0_rtps_builtin_endpoint_test5/uut/mem_stage -add wave -noupdate /l0_rtps_builtin_endpoint_test5/uut/mem_stage_next -add wave -noupdate /l0_rtps_builtin_endpoint_test5/uut/mem_cnt -add wave -noupdate -radix unsigned /l0_rtps_builtin_endpoint_test5/uut/mem_addr_base -add wave -noupdate -radix unsigned /l0_rtps_builtin_endpoint_test5/uut/mem_empty_head -add wave -noupdate -radix unsigned /l0_rtps_builtin_endpoint_test5/uut/mem_occupied_head -add wave -noupdate -childformat {{/l0_rtps_builtin_endpoint_test5/uut/participant_data.guid_prefix -radix hexadecimal} {/l0_rtps_builtin_endpoint_test5/uut/participant_data.meta_addr -radix hexadecimal} {/l0_rtps_builtin_endpoint_test5/uut/participant_data.def_addr -radix hexadecimal} {/l0_rtps_builtin_endpoint_test5/uut/participant_data.meta_port -radix hexadecimal} {/l0_rtps_builtin_endpoint_test5/uut/participant_data.def_port -radix hexadecimal} {/l0_rtps_builtin_endpoint_test5/uut/participant_data.lease_duration -radix unsigned} {/l0_rtps_builtin_endpoint_test5/uut/participant_data.lease_deadline -radix unsigned} {/l0_rtps_builtin_endpoint_test5/uut/participant_data.heartbeat_res_time -radix unsigned} {/l0_rtps_builtin_endpoint_test5/uut/participant_data.acknack_res_time -radix unsigned} {/l0_rtps_builtin_endpoint_test5/uut/participant_data.spdp_seq_nr -radix unsigned} {/l0_rtps_builtin_endpoint_test5/uut/participant_data.pub_seq_nr -radix unsigned} {/l0_rtps_builtin_endpoint_test5/uut/participant_data.sub_seq_nr -radix unsigned} {/l0_rtps_builtin_endpoint_test5/uut/participant_data.mes_seq_nr -radix unsigned}} -subitemconfig {/l0_rtps_builtin_endpoint_test5/uut/participant_data.guid_prefix {-height 15 -radix hexadecimal} /l0_rtps_builtin_endpoint_test5/uut/participant_data.meta_addr {-height 15 -radix hexadecimal} /l0_rtps_builtin_endpoint_test5/uut/participant_data.def_addr {-height 15 -radix hexadecimal} /l0_rtps_builtin_endpoint_test5/uut/participant_data.meta_port {-height 15 -radix hexadecimal} /l0_rtps_builtin_endpoint_test5/uut/participant_data.def_port {-height 15 -radix hexadecimal} /l0_rtps_builtin_endpoint_test5/uut/participant_data.lease_duration {-height 15 -radix unsigned} /l0_rtps_builtin_endpoint_test5/uut/participant_data.lease_deadline {-height 15 -radix unsigned} /l0_rtps_builtin_endpoint_test5/uut/participant_data.heartbeat_res_time {-height 15 -radix unsigned} /l0_rtps_builtin_endpoint_test5/uut/participant_data.acknack_res_time {-height 15 -radix unsigned} /l0_rtps_builtin_endpoint_test5/uut/participant_data.spdp_seq_nr {-height 15 -radix unsigned} /l0_rtps_builtin_endpoint_test5/uut/participant_data.pub_seq_nr {-height 15 -radix unsigned} /l0_rtps_builtin_endpoint_test5/uut/participant_data.sub_seq_nr {-height 15 -radix unsigned} /l0_rtps_builtin_endpoint_test5/uut/participant_data.mes_seq_nr {-height 15 -radix unsigned}} /l0_rtps_builtin_endpoint_test5/uut/participant_data -add wave -noupdate /l0_rtps_builtin_endpoint_test5/uut/current_pmf -add wave -noupdate /l0_rtps_builtin_endpoint_test5/uut/mem_field_flags -add wave -noupdate -divider GUARD -add wave -noupdate -radix unsigned /l0_rtps_builtin_endpoint_test5/uut/read_cnt -add wave -noupdate -radix unsigned /l0_rtps_builtin_endpoint_test5/uut/parameter_end -add wave -noupdate /l0_rtps_builtin_endpoint_test5/uut/parse_prc/rd_guard -add wave -noupdate -divider MISC -add wave -noupdate -radix unsigned /l0_rtps_builtin_endpoint_test5/uut/seq_nr -add wave -noupdate -divider TESTBENCH -add wave -noupdate -expand -group TESTBENCH /l0_rtps_builtin_endpoint_test5/start -add wave -noupdate -expand -group TESTBENCH /l0_rtps_builtin_endpoint_test5/stim_stage -add wave -noupdate -expand -group TESTBENCH /l0_rtps_builtin_endpoint_test5/stimulus.length -add wave -noupdate -expand -group TESTBENCH /l0_rtps_builtin_endpoint_test5/cnt_stim -add wave -noupdate -expand -group TESTBENCH /l0_rtps_builtin_endpoint_test5/packet_sent -add wave -noupdate -expand -group TESTBENCH /l0_rtps_builtin_endpoint_test5/check_done -add wave -noupdate -divider OUTPUT -add wave -noupdate -radix hexadecimal /l0_rtps_builtin_endpoint_test5/uut/data_out -add wave -noupdate /l0_rtps_builtin_endpoint_test5/uut/endpoint_full -add wave -noupdate /l0_rtps_builtin_endpoint_test5/uut/endpoint_wr -add wave -noupdate /l0_rtps_builtin_endpoint_test5/uut/rtps_wr -add wave -noupdate /l0_rtps_builtin_endpoint_test5/uut/rtps_full -add wave -noupdate /l0_rtps_builtin_endpoint_test5/uut/last_word_out -TreeUpdate [SetDefaultTree] -WaveRestoreCursors {{Cursor 1} {64726 ps} 0} -quietly wave cursor active 1 -configure wave -namecolwidth 149 -configure wave -valuecolwidth 144 -configure wave -justifyvalue left -configure wave -signalnamewidth 1 -configure wave -snapdistance 10 -configure wave -datasetprefix 0 -configure wave -rowmargin 4 -configure wave -childrowmargin 2 -configure wave -gridoffset 0 -configure wave -gridperiod 1 -configure wave -griddelta 40 -configure wave -timeline 0 -configure wave -timelineunits ps -update -WaveRestoreZoom {0 ps} {1148342 ps} diff --git a/sim/L0_rtps_builtin_endpoint_test6.do b/sim/L0_rtps_builtin_endpoint_test6.do deleted file mode 100644 index 7570cc5..0000000 --- a/sim/L0_rtps_builtin_endpoint_test6.do +++ /dev/null @@ -1,71 +0,0 @@ -onerror {resume} -quietly WaveActivateNextPane {} 0 -add wave -noupdate -divider SYSTEM -add wave -noupdate /L0_rtps_builtin_endpoint_test6/uut/clk -add wave -noupdate /L0_rtps_builtin_endpoint_test6/uut/reset -add wave -noupdate -divider INPUT -add wave -noupdate /L0_rtps_builtin_endpoint_test6/uut/empty -add wave -noupdate /L0_rtps_builtin_endpoint_test6/uut/rd -add wave -noupdate -radix hexadecimal /L0_rtps_builtin_endpoint_test6/uut/data_in -add wave -noupdate /L0_rtps_builtin_endpoint_test6/uut/last_word_in -add wave -noupdate /L0_rtps_builtin_endpoint_test6/uut/last_word_in_latch -add wave -noupdate -radix hexadecimal /L0_rtps_builtin_endpoint_test6/uut/time -add wave -noupdate -divider OUTPUT -add wave -noupdate -radix hexadecimal /L0_rtps_builtin_endpoint_test6/uut/data_out -add wave -noupdate /L0_rtps_builtin_endpoint_test6/uut/endpoint_wr -add wave -noupdate /L0_rtps_builtin_endpoint_test6/uut/last_word_out -add wave -noupdate -divider TESTBENCH -add wave -noupdate /L0_rtps_builtin_endpoint_test6/start -add wave -noupdate /L0_rtps_builtin_endpoint_test6/stim_stage -add wave -noupdate /L0_rtps_builtin_endpoint_test6/stimulus.length -add wave -noupdate /L0_rtps_builtin_endpoint_test6/cnt_stim -add wave -noupdate /L0_rtps_builtin_endpoint_test6/packet_sent -add wave -noupdate -divider {MAIN FSM} -add wave -noupdate /L0_rtps_builtin_endpoint_test6/uut/stage -add wave -noupdate /L0_rtps_builtin_endpoint_test6/uut/stage_next -add wave -noupdate /L0_rtps_builtin_endpoint_test6/uut/cnt -add wave -noupdate /L0_rtps_builtin_endpoint_test6/uut/endpoint_mask -add wave -noupdate /L0_rtps_builtin_endpoint_test6/uut/participant_match -add wave -noupdate -radix hexadecimal /L0_rtps_builtin_endpoint_test6/uut/lease_duration -add wave -noupdate -radix hexadecimal /L0_rtps_builtin_endpoint_test6/uut/deadline -add wave -noupdate -divider {MEM FSM} -add wave -noupdate -expand -group MEM_FSM /L0_rtps_builtin_endpoint_test6/uut/mem_opcode -add wave -noupdate -expand -group MEM_FSM /L0_rtps_builtin_endpoint_test6/uut/mem_op_start -add wave -noupdate -expand -group MEM_FSM /L0_rtps_builtin_endpoint_test6/uut/mem_op_done -add wave -noupdate -expand -group MEM_FSM /L0_rtps_builtin_endpoint_test6/uut/mem_stage -add wave -noupdate -expand -group MEM_FSM /L0_rtps_builtin_endpoint_test6/uut/mem_stage_next -add wave -noupdate -expand -group MEM_FSM /L0_rtps_builtin_endpoint_test6/uut/mem_cnt -add wave -noupdate -expand -group MEM_FSM -radix unsigned /L0_rtps_builtin_endpoint_test6/uut/mem_addr_base -add wave -noupdate -expand -group MEM_FSM -radix unsigned /L0_rtps_builtin_endpoint_test6/uut/addr_res -add wave -noupdate -divider GUARD -add wave -noupdate -radix unsigned /L0_rtps_builtin_endpoint_test6/uut/read_cnt -add wave -noupdate -radix unsigned /L0_rtps_builtin_endpoint_test6/uut/parameter_end -add wave -noupdate /L0_rtps_builtin_endpoint_test6/uut/parse_prc/rd_guard -add wave -noupdate -divider MEMORY -add wave -noupdate -expand -group MEMORY -radix unsigned /L0_rtps_builtin_endpoint_test6/uut/ram_inst/addr -add wave -noupdate -expand -group MEMORY /L0_rtps_builtin_endpoint_test6/uut/ram_inst/wen -add wave -noupdate -expand -group MEMORY /L0_rtps_builtin_endpoint_test6/uut/ram_inst/ren -add wave -noupdate -expand -group MEMORY -radix hexadecimal /L0_rtps_builtin_endpoint_test6/uut/ram_inst/wr_data -add wave -noupdate -expand -group MEMORY -radix hexadecimal /L0_rtps_builtin_endpoint_test6/uut/ram_inst/rd_data -add wave -noupdate -divider MISC -add wave -noupdate /L0_rtps_builtin_endpoint_test6/uut/update_participant_flags -add wave -noupdate -radix unsigned /L0_rtps_builtin_endpoint_test6/uut/mem_seq_nr -add wave -noupdate -radix unsigned /L0_rtps_builtin_endpoint_test6/uut/seq_nr -TreeUpdate [SetDefaultTree] -WaveRestoreCursors {Begin {31125000 ps} 1} {Error {45825000 ps} 1} {Cursor {31192063 ps} 0} -quietly wave cursor active 3 -configure wave -namecolwidth 149 -configure wave -valuecolwidth 144 -configure wave -justifyvalue left -configure wave -signalnamewidth 1 -configure wave -snapdistance 10 -configure wave -datasetprefix 0 -configure wave -rowmargin 4 -configure wave -childrowmargin 2 -configure wave -gridoffset 0 -configure wave -gridperiod 1 -configure wave -griddelta 40 -configure wave -timeline 0 -configure wave -timelineunits ns -update -WaveRestoreZoom {30675309 ps} {31823651 ps} diff --git a/sim/L0_rtps_discovery_module_test1_mc.do b/sim/L0_rtps_discovery_module_test1_mc.do new file mode 100644 index 0000000..1bba982 --- /dev/null +++ b/sim/L0_rtps_discovery_module_test1_mc.do @@ -0,0 +1,65 @@ +onerror {resume} +quietly WaveActivateNextPane {} 0 +add wave -noupdate -divider SYSTEM +add wave -noupdate /l0_rtps_discovery_module_test1_mc/uut/clk +add wave -noupdate /l0_rtps_discovery_module_test1_mc/uut/reset +add wave -noupdate -divider INPUT +add wave -noupdate /l0_rtps_discovery_module_test1_mc/uut/empty +add wave -noupdate /l0_rtps_discovery_module_test1_mc/uut/rd +add wave -noupdate -radix hexadecimal /l0_rtps_discovery_module_test1_mc/uut/data_in +add wave -noupdate /l0_rtps_discovery_module_test1_mc/uut/last_word_in +add wave -noupdate /l0_rtps_discovery_module_test1_mc/uut/last_word_in_latch +add wave -noupdate -divider OUTPUT +add wave -noupdate -group {RTPS OUT} /l0_rtps_discovery_module_test1_mc/uut/full_ro +add wave -noupdate -group {RTPS OUT} /l0_rtps_discovery_module_test1_mc/uut/wr_ro +add wave -noupdate -group {RTPS OUT} -radix hexadecimal /l0_rtps_discovery_module_test1_mc/uut/data_out_ro +add wave -noupdate -group {RTPS OUT} /l0_rtps_discovery_module_test1_mc/uut/last_word_out_ro +add wave -noupdate -divider {MAIN FSM} +add wave -noupdate /l0_rtps_discovery_module_test1_mc/uut/stage +add wave -noupdate /l0_rtps_discovery_module_test1_mc/uut/cnt +add wave -noupdate /l0_rtps_discovery_module_test1_mc/uut/endpoint_mask +add wave -noupdate /l0_rtps_discovery_module_test1_mc/uut/participant_match +add wave -noupdate -divider {MEM FSM} +add wave -noupdate -expand -group MEM_FSM /l0_rtps_discovery_module_test1_mc/uut/mem_op_start +add wave -noupdate -expand -group MEM_FSM /l0_rtps_discovery_module_test1_mc/uut/mem_opcode +add wave -noupdate -expand -group MEM_FSM /l0_rtps_discovery_module_test1_mc/uut/mem_op_done +add wave -noupdate -expand -group MEM_FSM /l0_rtps_discovery_module_test1_mc/uut/mem_stage +add wave -noupdate -expand -group MEM_FSM /l0_rtps_discovery_module_test1_mc/uut/mem_cnt +add wave -noupdate -expand -group MEM_FSM -radix unsigned /l0_rtps_discovery_module_test1_mc/uut/mem_empty_head +add wave -noupdate -expand -group MEM_FSM -radix unsigned /l0_rtps_discovery_module_test1_mc/uut/mem_occupied_head +add wave -noupdate -expand -group MEM_FSM -radix unsigned /l0_rtps_discovery_module_test1_mc/uut/mem_addr_base +add wave -noupdate -expand -group MEMORY -radix unsigned /l0_rtps_discovery_module_test1_mc/uut/mem_ctrl_inst/ram_inst/addr +add wave -noupdate -expand -group MEMORY /l0_rtps_discovery_module_test1_mc/uut/mem_ctrl_inst/ram_inst/wen +add wave -noupdate -expand -group MEMORY /l0_rtps_discovery_module_test1_mc/uut/mem_ctrl_inst/ram_inst/ren +add wave -noupdate -expand -group MEMORY -radix hexadecimal /l0_rtps_discovery_module_test1_mc/uut/mem_ctrl_inst/ram_inst/wr_data +add wave -noupdate -expand -group MEMORY -radix hexadecimal /l0_rtps_discovery_module_test1_mc/uut/mem_ctrl_inst/ram_inst/rd_data +add wave -noupdate -divider MISC +add wave -noupdate -radix unsigned /l0_rtps_discovery_module_test1_mc/uut/seq_nr +add wave -noupdate -divider TESTBENCH +add wave -noupdate -group TESTBENCH /l0_rtps_discovery_module_test1_mc/start +add wave -noupdate -group TESTBENCH /l0_rtps_discovery_module_test1_mc/stim_stage +add wave -noupdate -group TESTBENCH /l0_rtps_discovery_module_test1_mc/stimulus.length +add wave -noupdate -group TESTBENCH /l0_rtps_discovery_module_test1_mc/cnt_stim +add wave -noupdate -group TESTBENCH /l0_rtps_discovery_module_test1_mc/packet_sent +add wave -noupdate -divider GUARD +add wave -noupdate -radix unsigned /l0_rtps_discovery_module_test1_mc/uut/read_cnt +add wave -noupdate -radix unsigned /l0_rtps_discovery_module_test1_mc/uut/parameter_end +add wave -noupdate /l0_rtps_discovery_module_test1_mc/uut/parse_prc/rd_guard +TreeUpdate [SetDefaultTree] +WaveRestoreCursors {Begin {63775000 ps} 1} {Error {66975000 ps} 1} {Cursor {4039782 ps} 0} +quietly wave cursor active 3 +configure wave -namecolwidth 149 +configure wave -valuecolwidth 144 +configure wave -justifyvalue left +configure wave -signalnamewidth 1 +configure wave -snapdistance 10 +configure wave -datasetprefix 0 +configure wave -rowmargin 4 +configure wave -childrowmargin 2 +configure wave -gridoffset 0 +configure wave -gridperiod 1 +configure wave -griddelta 40 +configure wave -timeline 0 +configure wave -timelineunits ns +update +WaveRestoreZoom {3817836 ps} {4966178 ps} diff --git a/sim/L0_rtps_discovery_module_test2.do b/sim/L0_rtps_discovery_module_test2.do new file mode 100644 index 0000000..93ac068 --- /dev/null +++ b/sim/L0_rtps_discovery_module_test2.do @@ -0,0 +1,69 @@ +onerror {resume} +quietly WaveActivateNextPane {} 0 +add wave -noupdate -divider SYSTEM +add wave -noupdate /L0_rtps_discovery_module_test2/uut/clk +add wave -noupdate /L0_rtps_discovery_module_test2/uut/reset +add wave -noupdate -divider INPUT +add wave -noupdate /L0_rtps_discovery_module_test2/uut/empty +add wave -noupdate /L0_rtps_discovery_module_test2/uut/rd +add wave -noupdate -radix hexadecimal /L0_rtps_discovery_module_test2/uut/data_in +add wave -noupdate /L0_rtps_discovery_module_test2/uut/last_word_in +add wave -noupdate /L0_rtps_discovery_module_test2/uut/last_word_in_latch +add wave -noupdate -divider OUTPUT +add wave -noupdate -radix hexadecimal /L0_rtps_discovery_module_test2/uut/data_out +add wave -noupdate /L0_rtps_discovery_module_test2/uut/endpoint_wr +add wave -noupdate /L0_rtps_discovery_module_test2/uut/last_word_out +add wave -noupdate -divider TESTBENCH +add wave -noupdate /L0_rtps_discovery_module_test2/start +add wave -noupdate /L0_rtps_discovery_module_test2/stim_stage +add wave -noupdate /L0_rtps_discovery_module_test2/stimulus.length +add wave -noupdate /L0_rtps_discovery_module_test2/cnt_stim +add wave -noupdate /L0_rtps_discovery_module_test2/packet_sent +add wave -noupdate /L0_rtps_discovery_module_test2/SB.ItemNumberVar +add wave -noupdate -divider {MAIN FSM} +add wave -noupdate /L0_rtps_discovery_module_test2/uut/stage +add wave -noupdate /L0_rtps_discovery_module_test2/uut/stage_next +add wave -noupdate /L0_rtps_discovery_module_test2/uut/cnt +add wave -noupdate /L0_rtps_discovery_module_test2/uut/endpoint_mask +add wave -noupdate /L0_rtps_discovery_module_test2/uut/participant_match +add wave -noupdate -divider {MEM FSM} +add wave -noupdate -group MEM_FSM /L0_rtps_discovery_module_test2/uut/mem_opcode +add wave -noupdate -group MEM_FSM /L0_rtps_discovery_module_test2/uut/mem_op_start +add wave -noupdate -group MEM_FSM /L0_rtps_discovery_module_test2/uut/mem_op_done +add wave -noupdate -group MEM_FSM /L0_rtps_discovery_module_test2/uut/mem_stage +add wave -noupdate -group MEM_FSM /L0_rtps_discovery_module_test2/uut/mem_stage_next +add wave -noupdate -group MEM_FSM /L0_rtps_discovery_module_test2/uut/mem_cnt +add wave -noupdate -group MEM_FSM -radix unsigned /L0_rtps_discovery_module_test2/uut/mem_addr_base +add wave -noupdate -group MEM_FSM -radix unsigned /L0_rtps_discovery_module_test2/uut/addr_res +add wave -noupdate -divider GUARD +add wave -noupdate -radix unsigned /L0_rtps_discovery_module_test2/uut/read_cnt +add wave -noupdate -radix unsigned /L0_rtps_discovery_module_test2/uut/parameter_end +add wave -noupdate /L0_rtps_discovery_module_test2/uut/parse_prc/rd_guard +add wave -noupdate -divider MEMORY +add wave -noupdate -group MEMORY -radix unsigned /L0_rtps_discovery_module_test2/uut/ram_inst/addr +add wave -noupdate -group MEMORY /L0_rtps_discovery_module_test2/uut/ram_inst/wen +add wave -noupdate -group MEMORY /L0_rtps_discovery_module_test2/uut/ram_inst/ren +add wave -noupdate -group MEMORY -radix hexadecimal /L0_rtps_discovery_module_test2/uut/ram_inst/wr_data +add wave -noupdate -group MEMORY -radix hexadecimal /L0_rtps_discovery_module_test2/uut/ram_inst/rd_data +add wave -noupdate -divider MISC +add wave -noupdate /L0_rtps_discovery_module_test2/uut/update_participant_flags +add wave -noupdate -radix unsigned /L0_rtps_discovery_module_test2/uut/mem_seq_nr +add wave -noupdate -radix unsigned /L0_rtps_discovery_module_test2/uut/seq_nr +TreeUpdate [SetDefaultTree] +WaveRestoreCursors {Begin {63775000 ps} 1} {Error {66975000 ps} 1} {Cursor {33675000 ps} 0} +quietly wave cursor active 1 +configure wave -namecolwidth 149 +configure wave -valuecolwidth 144 +configure wave -justifyvalue left +configure wave -signalnamewidth 1 +configure wave -snapdistance 10 +configure wave -datasetprefix 0 +configure wave -rowmargin 4 +configure wave -childrowmargin 2 +configure wave -gridoffset 0 +configure wave -gridperiod 1 +configure wave -griddelta 40 +configure wave -timeline 0 +configure wave -timelineunits ns +update +WaveRestoreZoom {63200829 ps} {64349171 ps} diff --git a/sim/L0_rtps_discovery_module_test3.do b/sim/L0_rtps_discovery_module_test3.do new file mode 100644 index 0000000..e0674f5 --- /dev/null +++ b/sim/L0_rtps_discovery_module_test3.do @@ -0,0 +1,68 @@ +onerror {resume} +quietly WaveActivateNextPane {} 0 +add wave -noupdate -divider SYSTEM +add wave -noupdate /L0_rtps_discovery_module_test3/uut/clk +add wave -noupdate /L0_rtps_discovery_module_test3/uut/reset +add wave -noupdate -divider INPUT +add wave -noupdate /L0_rtps_discovery_module_test3/uut/empty +add wave -noupdate /L0_rtps_discovery_module_test3/uut/rd +add wave -noupdate -radix hexadecimal /L0_rtps_discovery_module_test3/uut/data_in +add wave -noupdate /L0_rtps_discovery_module_test3/uut/last_word_in +add wave -noupdate /L0_rtps_discovery_module_test3/uut/last_word_in_latch +add wave -noupdate -divider OUTPUT +add wave -noupdate -radix hexadecimal /L0_rtps_discovery_module_test3/uut/data_out +add wave -noupdate /L0_rtps_discovery_module_test3/uut/endpoint_wr +add wave -noupdate /L0_rtps_discovery_module_test3/uut/last_word_out +add wave -noupdate -divider TESTBENCH +add wave -noupdate /L0_rtps_discovery_module_test3/start +add wave -noupdate /L0_rtps_discovery_module_test3/stim_stage +add wave -noupdate /L0_rtps_discovery_module_test3/stimulus.length +add wave -noupdate /L0_rtps_discovery_module_test3/cnt_stim +add wave -noupdate /L0_rtps_discovery_module_test3/packet_sent +add wave -noupdate -divider {MAIN FSM} +add wave -noupdate /L0_rtps_discovery_module_test3/uut/stage +add wave -noupdate /L0_rtps_discovery_module_test3/uut/stage_next +add wave -noupdate /L0_rtps_discovery_module_test3/uut/cnt +add wave -noupdate /L0_rtps_discovery_module_test3/uut/endpoint_mask +add wave -noupdate /L0_rtps_discovery_module_test3/uut/participant_match +add wave -noupdate -divider {MEM FSM} +add wave -noupdate -group MEM_FSM /L0_rtps_discovery_module_test3/uut/mem_opcode +add wave -noupdate -group MEM_FSM /L0_rtps_discovery_module_test3/uut/mem_op_start +add wave -noupdate -group MEM_FSM /L0_rtps_discovery_module_test3/uut/mem_op_done +add wave -noupdate -group MEM_FSM /L0_rtps_discovery_module_test3/uut/mem_stage +add wave -noupdate -group MEM_FSM /L0_rtps_discovery_module_test3/uut/mem_stage_next +add wave -noupdate -group MEM_FSM /L0_rtps_discovery_module_test3/uut/mem_cnt +add wave -noupdate -group MEM_FSM -radix unsigned /L0_rtps_discovery_module_test3/uut/mem_addr_base +add wave -noupdate -group MEM_FSM -radix unsigned /L0_rtps_discovery_module_test3/uut/addr_res +add wave -noupdate -divider GUARD +add wave -noupdate -radix unsigned /L0_rtps_discovery_module_test3/uut/read_cnt +add wave -noupdate -radix unsigned /L0_rtps_discovery_module_test3/uut/parameter_end +add wave -noupdate /L0_rtps_discovery_module_test3/uut/parse_prc/rd_guard +add wave -noupdate -divider MEMORY +add wave -noupdate -group MEMORY -radix unsigned /L0_rtps_discovery_module_test3/uut/ram_inst/addr +add wave -noupdate -group MEMORY /L0_rtps_discovery_module_test3/uut/ram_inst/wen +add wave -noupdate -group MEMORY /L0_rtps_discovery_module_test3/uut/ram_inst/ren +add wave -noupdate -group MEMORY -radix hexadecimal /L0_rtps_discovery_module_test3/uut/ram_inst/wr_data +add wave -noupdate -group MEMORY -radix hexadecimal /L0_rtps_discovery_module_test3/uut/ram_inst/rd_data +add wave -noupdate -divider MISC +add wave -noupdate /L0_rtps_discovery_module_test3/uut/update_participant_flags +add wave -noupdate -radix unsigned /L0_rtps_discovery_module_test3/uut/mem_seq_nr +add wave -noupdate -radix unsigned /L0_rtps_discovery_module_test3/uut/seq_nr +TreeUpdate [SetDefaultTree] +WaveRestoreCursors {Begin {847825000 ps} 1} {Error {851525000 ps} 1} {Cursor {33675000 ps} 0} +quietly wave cursor active 1 +configure wave -namecolwidth 149 +configure wave -valuecolwidth 144 +configure wave -justifyvalue left +configure wave -signalnamewidth 1 +configure wave -snapdistance 10 +configure wave -datasetprefix 0 +configure wave -rowmargin 4 +configure wave -childrowmargin 2 +configure wave -gridoffset 0 +configure wave -gridperiod 1 +configure wave -griddelta 40 +configure wave -timeline 0 +configure wave -timelineunits ns +update +WaveRestoreZoom {848883724 ps} {850032066 ps} diff --git a/sim/L0_rtps_discovery_module_test4.do b/sim/L0_rtps_discovery_module_test4.do new file mode 100644 index 0000000..de76b62 --- /dev/null +++ b/sim/L0_rtps_discovery_module_test4.do @@ -0,0 +1,68 @@ +onerror {resume} +quietly WaveActivateNextPane {} 0 +add wave -noupdate -divider SYSTEM +add wave -noupdate /L0_rtps_discovery_module_test4/uut/clk +add wave -noupdate /L0_rtps_discovery_module_test4/uut/reset +add wave -noupdate -divider INPUT +add wave -noupdate /L0_rtps_discovery_module_test4/uut/empty +add wave -noupdate /L0_rtps_discovery_module_test4/uut/rd +add wave -noupdate -radix hexadecimal /L0_rtps_discovery_module_test4/uut/data_in +add wave -noupdate /L0_rtps_discovery_module_test4/uut/last_word_in +add wave -noupdate /L0_rtps_discovery_module_test4/uut/last_word_in_latch +add wave -noupdate -divider OUTPUT +add wave -noupdate -radix hexadecimal /L0_rtps_discovery_module_test4/uut/data_out +add wave -noupdate /L0_rtps_discovery_module_test4/uut/endpoint_wr +add wave -noupdate /L0_rtps_discovery_module_test4/uut/last_word_out +add wave -noupdate -divider TESTBENCH +add wave -noupdate /L0_rtps_discovery_module_test4/start +add wave -noupdate /L0_rtps_discovery_module_test4/stim_stage +add wave -noupdate /L0_rtps_discovery_module_test4/stimulus.length +add wave -noupdate /L0_rtps_discovery_module_test4/cnt_stim +add wave -noupdate /L0_rtps_discovery_module_test4/packet_sent +add wave -noupdate -divider {MAIN FSM} +add wave -noupdate /L0_rtps_discovery_module_test4/uut/stage +add wave -noupdate /L0_rtps_discovery_module_test4/uut/stage_next +add wave -noupdate /L0_rtps_discovery_module_test4/uut/cnt +add wave -noupdate /L0_rtps_discovery_module_test4/uut/endpoint_mask +add wave -noupdate /L0_rtps_discovery_module_test4/uut/participant_match +add wave -noupdate -divider {MEM FSM} +add wave -noupdate -group MEM_FSM /L0_rtps_discovery_module_test4/uut/mem_opcode +add wave -noupdate -group MEM_FSM /L0_rtps_discovery_module_test4/uut/mem_op_start +add wave -noupdate -group MEM_FSM /L0_rtps_discovery_module_test4/uut/mem_op_done +add wave -noupdate -group MEM_FSM /L0_rtps_discovery_module_test4/uut/mem_stage +add wave -noupdate -group MEM_FSM /L0_rtps_discovery_module_test4/uut/mem_stage_next +add wave -noupdate -group MEM_FSM /L0_rtps_discovery_module_test4/uut/mem_cnt +add wave -noupdate -group MEM_FSM -radix unsigned /L0_rtps_discovery_module_test4/uut/mem_addr_base +add wave -noupdate -group MEM_FSM -radix unsigned /L0_rtps_discovery_module_test4/uut/addr_res +add wave -noupdate -divider GUARD +add wave -noupdate -radix unsigned /L0_rtps_discovery_module_test4/uut/read_cnt +add wave -noupdate -radix unsigned /L0_rtps_discovery_module_test4/uut/parameter_end +add wave -noupdate /L0_rtps_discovery_module_test4/uut/parse_prc/rd_guard +add wave -noupdate -divider MEMORY +add wave -noupdate -group MEMORY -radix unsigned /L0_rtps_discovery_module_test4/uut/ram_inst/addr +add wave -noupdate -group MEMORY /L0_rtps_discovery_module_test4/uut/ram_inst/wen +add wave -noupdate -group MEMORY /L0_rtps_discovery_module_test4/uut/ram_inst/ren +add wave -noupdate -group MEMORY -radix hexadecimal /L0_rtps_discovery_module_test4/uut/ram_inst/wr_data +add wave -noupdate -group MEMORY -radix hexadecimal /L0_rtps_discovery_module_test4/uut/ram_inst/rd_data +add wave -noupdate -divider MISC +add wave -noupdate /L0_rtps_discovery_module_test4/uut/update_participant_flags +add wave -noupdate -radix unsigned /L0_rtps_discovery_module_test4/uut/mem_seq_nr +add wave -noupdate -radix unsigned /L0_rtps_discovery_module_test4/uut/seq_nr +TreeUpdate [SetDefaultTree] +WaveRestoreCursors {Begin {847825000 ps} 1} {Error {851525000 ps} 1} {Cursor {33675000 ps} 0} +quietly wave cursor active 1 +configure wave -namecolwidth 149 +configure wave -valuecolwidth 144 +configure wave -justifyvalue left +configure wave -signalnamewidth 1 +configure wave -snapdistance 10 +configure wave -datasetprefix 0 +configure wave -rowmargin 4 +configure wave -childrowmargin 2 +configure wave -gridoffset 0 +configure wave -gridperiod 1 +configure wave -griddelta 40 +configure wave -timeline 0 +configure wave -timelineunits ns +update +WaveRestoreZoom {848883724 ps} {850032066 ps} diff --git a/sim/L0_rtps_discovery_module_test5.do b/sim/L0_rtps_discovery_module_test5.do new file mode 100644 index 0000000..7764259 --- /dev/null +++ b/sim/L0_rtps_discovery_module_test5.do @@ -0,0 +1,68 @@ +onerror {resume} +quietly WaveActivateNextPane {} 0 +add wave -noupdate -divider SYSTEM +add wave -noupdate /l0_rtps_discovery_module_test5/uut/clk +add wave -noupdate /l0_rtps_discovery_module_test5/uut/reset +add wave -noupdate -radix unsigned /l0_rtps_discovery_module_test5/uut/time +add wave -noupdate -radix unsigned /l0_rtps_discovery_module_test5/uut/check_time +add wave -noupdate -divider INPUT +add wave -noupdate /l0_rtps_discovery_module_test5/uut/empty +add wave -noupdate /l0_rtps_discovery_module_test5/uut/rd +add wave -noupdate -radix hexadecimal /l0_rtps_discovery_module_test5/uut/data_in +add wave -noupdate /l0_rtps_discovery_module_test5/uut/last_word_in +add wave -noupdate /l0_rtps_discovery_module_test5/uut/last_word_in_latch +add wave -noupdate -divider {MAIN FSM} +add wave -noupdate /l0_rtps_discovery_module_test5/uut/stage +add wave -noupdate /l0_rtps_discovery_module_test5/uut/cnt +add wave -noupdate /l0_rtps_discovery_module_test5/uut/endpoint_mask +add wave -noupdate /l0_rtps_discovery_module_test5/uut/participant_match +add wave -noupdate -divider {MEM FSM} +add wave -noupdate /l0_rtps_discovery_module_test5/uut/mem_op_start +add wave -noupdate /l0_rtps_discovery_module_test5/uut/mem_opcode +add wave -noupdate /l0_rtps_discovery_module_test5/uut/mem_op_done +add wave -noupdate /l0_rtps_discovery_module_test5/uut/mem_stage +add wave -noupdate /l0_rtps_discovery_module_test5/uut/mem_cnt +add wave -noupdate -radix unsigned /l0_rtps_discovery_module_test5/uut/mem_addr_base +add wave -noupdate -radix unsigned /l0_rtps_discovery_module_test5/uut/mem_empty_head +add wave -noupdate -radix unsigned /l0_rtps_discovery_module_test5/uut/mem_occupied_head +add wave -noupdate -childformat {{/l0_rtps_discovery_module_test5/uut/participant_data.addr -radix unsigned} {/l0_rtps_discovery_module_test5/uut/participant_data.guid_prefix -radix hexadecimal} {/l0_rtps_discovery_module_test5/uut/participant_data.meta_addr -radix hexadecimal} {/l0_rtps_discovery_module_test5/uut/participant_data.def_addr -radix hexadecimal} {/l0_rtps_discovery_module_test5/uut/participant_data.meta_port -radix hexadecimal} {/l0_rtps_discovery_module_test5/uut/participant_data.def_port -radix hexadecimal} {/l0_rtps_discovery_module_test5/uut/participant_data.lease_duration -radix unsigned} {/l0_rtps_discovery_module_test5/uut/participant_data.lease_deadline -radix unsigned} {/l0_rtps_discovery_module_test5/uut/participant_data.heartbeat_res_time -radix unsigned} {/l0_rtps_discovery_module_test5/uut/participant_data.acknack_res_time -radix unsigned} {/l0_rtps_discovery_module_test5/uut/participant_data.spdp_seq_nr -radix unsigned} {/l0_rtps_discovery_module_test5/uut/participant_data.pub_seq_nr -radix unsigned} {/l0_rtps_discovery_module_test5/uut/participant_data.sub_seq_nr -radix unsigned} {/l0_rtps_discovery_module_test5/uut/participant_data.mes_seq_nr -radix unsigned}} -expand -subitemconfig {/l0_rtps_discovery_module_test5/uut/participant_data.addr {-radix unsigned} /l0_rtps_discovery_module_test5/uut/participant_data.guid_prefix {-radix hexadecimal} /l0_rtps_discovery_module_test5/uut/participant_data.meta_addr {-radix hexadecimal} /l0_rtps_discovery_module_test5/uut/participant_data.def_addr {-radix hexadecimal} /l0_rtps_discovery_module_test5/uut/participant_data.meta_port {-radix hexadecimal} /l0_rtps_discovery_module_test5/uut/participant_data.def_port {-radix hexadecimal} /l0_rtps_discovery_module_test5/uut/participant_data.lease_duration {-radix unsigned} /l0_rtps_discovery_module_test5/uut/participant_data.lease_deadline {-radix unsigned} /l0_rtps_discovery_module_test5/uut/participant_data.heartbeat_res_time {-radix unsigned} /l0_rtps_discovery_module_test5/uut/participant_data.acknack_res_time {-radix unsigned} /l0_rtps_discovery_module_test5/uut/participant_data.spdp_seq_nr {-radix unsigned} /l0_rtps_discovery_module_test5/uut/participant_data.pub_seq_nr {-radix unsigned} /l0_rtps_discovery_module_test5/uut/participant_data.sub_seq_nr {-radix unsigned} /l0_rtps_discovery_module_test5/uut/participant_data.mes_seq_nr {-radix unsigned}} /l0_rtps_discovery_module_test5/uut/participant_data +add wave -noupdate -group MEMORY -radix unsigned /l0_rtps_discovery_module_test5/uut/mem_ctrl_inst/addr +add wave -noupdate -group MEMORY /l0_rtps_discovery_module_test5/uut/mem_ctrl_inst/read +add wave -noupdate -group MEMORY /l0_rtps_discovery_module_test5/uut/mem_ctrl_inst/ready_in +add wave -noupdate -group MEMORY /l0_rtps_discovery_module_test5/uut/mem_ctrl_inst/valid_in +add wave -noupdate -group MEMORY -radix hexadecimal /l0_rtps_discovery_module_test5/uut/mem_ctrl_inst/data_in +add wave -noupdate -group MEMORY /l0_rtps_discovery_module_test5/uut/mem_ctrl_inst/ready_out +add wave -noupdate -group MEMORY /l0_rtps_discovery_module_test5/uut/mem_ctrl_inst/valid_out +add wave -noupdate -group MEMORY -radix hexadecimal /l0_rtps_discovery_module_test5/uut/mem_ctrl_inst/data_out +add wave -noupdate -divider GUARD +add wave -noupdate -radix unsigned /l0_rtps_discovery_module_test5/uut/read_cnt +add wave -noupdate -radix unsigned /l0_rtps_discovery_module_test5/uut/parameter_end +add wave -noupdate /l0_rtps_discovery_module_test5/uut/parse_prc/rd_guard +add wave -noupdate -divider MISC +add wave -noupdate -radix unsigned /l0_rtps_discovery_module_test5/uut/seq_nr +add wave -noupdate -divider TESTBENCH +add wave -noupdate -expand -group TESTBENCH /l0_rtps_discovery_module_test5/start +add wave -noupdate -expand -group TESTBENCH /l0_rtps_discovery_module_test5/stim_stage +add wave -noupdate -expand -group TESTBENCH /l0_rtps_discovery_module_test5/stimulus.length +add wave -noupdate -expand -group TESTBENCH /l0_rtps_discovery_module_test5/cnt_stim +add wave -noupdate -expand -group TESTBENCH /l0_rtps_discovery_module_test5/packet_sent +add wave -noupdate -expand -group TESTBENCH /l0_rtps_discovery_module_test5/check_done +add wave -noupdate -divider OUTPUT +TreeUpdate [SetDefaultTree] +WaveRestoreCursors {{Cursor 1} {40147792 ps} 0} +quietly wave cursor active 1 +configure wave -namecolwidth 149 +configure wave -valuecolwidth 144 +configure wave -justifyvalue left +configure wave -signalnamewidth 1 +configure wave -snapdistance 10 +configure wave -datasetprefix 0 +configure wave -rowmargin 4 +configure wave -childrowmargin 2 +configure wave -gridoffset 0 +configure wave -gridperiod 1 +configure wave -griddelta 40 +configure wave -timeline 0 +configure wave -timelineunits ps +update +WaveRestoreZoom {39422715 ps} {40571057 ps} diff --git a/sim/L0_rtps_discovery_module_test6.do b/sim/L0_rtps_discovery_module_test6.do new file mode 100644 index 0000000..8bb06ad --- /dev/null +++ b/sim/L0_rtps_discovery_module_test6.do @@ -0,0 +1,71 @@ +onerror {resume} +quietly WaveActivateNextPane {} 0 +add wave -noupdate -divider SYSTEM +add wave -noupdate /L0_rtps_discovery_module_test6/uut/clk +add wave -noupdate /L0_rtps_discovery_module_test6/uut/reset +add wave -noupdate -divider INPUT +add wave -noupdate /L0_rtps_discovery_module_test6/uut/empty +add wave -noupdate /L0_rtps_discovery_module_test6/uut/rd +add wave -noupdate -radix hexadecimal /L0_rtps_discovery_module_test6/uut/data_in +add wave -noupdate /L0_rtps_discovery_module_test6/uut/last_word_in +add wave -noupdate /L0_rtps_discovery_module_test6/uut/last_word_in_latch +add wave -noupdate -radix hexadecimal /L0_rtps_discovery_module_test6/uut/time +add wave -noupdate -divider OUTPUT +add wave -noupdate -radix hexadecimal /L0_rtps_discovery_module_test6/uut/data_out +add wave -noupdate /L0_rtps_discovery_module_test6/uut/endpoint_wr +add wave -noupdate /L0_rtps_discovery_module_test6/uut/last_word_out +add wave -noupdate -divider TESTBENCH +add wave -noupdate /L0_rtps_discovery_module_test6/start +add wave -noupdate /L0_rtps_discovery_module_test6/stim_stage +add wave -noupdate /L0_rtps_discovery_module_test6/stimulus.length +add wave -noupdate /L0_rtps_discovery_module_test6/cnt_stim +add wave -noupdate /L0_rtps_discovery_module_test6/packet_sent +add wave -noupdate -divider {MAIN FSM} +add wave -noupdate /L0_rtps_discovery_module_test6/uut/stage +add wave -noupdate /L0_rtps_discovery_module_test6/uut/stage_next +add wave -noupdate /L0_rtps_discovery_module_test6/uut/cnt +add wave -noupdate /L0_rtps_discovery_module_test6/uut/endpoint_mask +add wave -noupdate /L0_rtps_discovery_module_test6/uut/participant_match +add wave -noupdate -radix hexadecimal /L0_rtps_discovery_module_test6/uut/lease_duration +add wave -noupdate -radix hexadecimal /L0_rtps_discovery_module_test6/uut/deadline +add wave -noupdate -divider {MEM FSM} +add wave -noupdate -expand -group MEM_FSM /L0_rtps_discovery_module_test6/uut/mem_opcode +add wave -noupdate -expand -group MEM_FSM /L0_rtps_discovery_module_test6/uut/mem_op_start +add wave -noupdate -expand -group MEM_FSM /L0_rtps_discovery_module_test6/uut/mem_op_done +add wave -noupdate -expand -group MEM_FSM /L0_rtps_discovery_module_test6/uut/mem_stage +add wave -noupdate -expand -group MEM_FSM /L0_rtps_discovery_module_test6/uut/mem_stage_next +add wave -noupdate -expand -group MEM_FSM /L0_rtps_discovery_module_test6/uut/mem_cnt +add wave -noupdate -expand -group MEM_FSM -radix unsigned /L0_rtps_discovery_module_test6/uut/mem_addr_base +add wave -noupdate -expand -group MEM_FSM -radix unsigned /L0_rtps_discovery_module_test6/uut/addr_res +add wave -noupdate -divider GUARD +add wave -noupdate -radix unsigned /L0_rtps_discovery_module_test6/uut/read_cnt +add wave -noupdate -radix unsigned /L0_rtps_discovery_module_test6/uut/parameter_end +add wave -noupdate /L0_rtps_discovery_module_test6/uut/parse_prc/rd_guard +add wave -noupdate -divider MEMORY +add wave -noupdate -expand -group MEMORY -radix unsigned /L0_rtps_discovery_module_test6/uut/ram_inst/addr +add wave -noupdate -expand -group MEMORY /L0_rtps_discovery_module_test6/uut/ram_inst/wen +add wave -noupdate -expand -group MEMORY /L0_rtps_discovery_module_test6/uut/ram_inst/ren +add wave -noupdate -expand -group MEMORY -radix hexadecimal /L0_rtps_discovery_module_test6/uut/ram_inst/wr_data +add wave -noupdate -expand -group MEMORY -radix hexadecimal /L0_rtps_discovery_module_test6/uut/ram_inst/rd_data +add wave -noupdate -divider MISC +add wave -noupdate /L0_rtps_discovery_module_test6/uut/update_participant_flags +add wave -noupdate -radix unsigned /L0_rtps_discovery_module_test6/uut/mem_seq_nr +add wave -noupdate -radix unsigned /L0_rtps_discovery_module_test6/uut/seq_nr +TreeUpdate [SetDefaultTree] +WaveRestoreCursors {Begin {31125000 ps} 1} {Error {45825000 ps} 1} {Cursor {31192063 ps} 0} +quietly wave cursor active 3 +configure wave -namecolwidth 149 +configure wave -valuecolwidth 144 +configure wave -justifyvalue left +configure wave -signalnamewidth 1 +configure wave -snapdistance 10 +configure wave -datasetprefix 0 +configure wave -rowmargin 4 +configure wave -childrowmargin 2 +configure wave -gridoffset 0 +configure wave -gridperiod 1 +configure wave -griddelta 40 +configure wave -timeline 0 +configure wave -timelineunits ns +update +WaveRestoreZoom {30675309 ps} {31823651 ps} diff --git a/sim/L1_rtps_builtin_endpoint_test1.do b/sim/L1_rtps_builtin_endpoint_test1.do deleted file mode 100644 index edbba84..0000000 --- a/sim/L1_rtps_builtin_endpoint_test1.do +++ /dev/null @@ -1,89 +0,0 @@ -onerror {resume} -quietly WaveActivateNextPane {} 0 -add wave -noupdate -divider SYSTEM -add wave -noupdate /l1_rtps_builtin_endpoint_test1/uut/clk -add wave -noupdate /l1_rtps_builtin_endpoint_test1/uut/reset -add wave -noupdate -radix unsigned /l1_rtps_builtin_endpoint_test1/uut/time -add wave -noupdate -radix unsigned /l1_rtps_builtin_endpoint_test1/uut/check_time -add wave -noupdate -divider INPUT -add wave -noupdate /l1_rtps_builtin_endpoint_test1/uut/empty -add wave -noupdate /l1_rtps_builtin_endpoint_test1/uut/rd -add wave -noupdate -radix hexadecimal /l1_rtps_builtin_endpoint_test1/uut/data_in -add wave -noupdate /l1_rtps_builtin_endpoint_test1/uut/last_word_in -add wave -noupdate /l1_rtps_builtin_endpoint_test1/uut/last_word_in_latch -add wave -noupdate -radix hexadecimal /l1_rtps_builtin_endpoint_test1/uut/time -add wave -noupdate -divider OUTPUT -add wave -noupdate /l1_rtps_builtin_endpoint_test1/uut/full_ro -add wave -noupdate /l1_rtps_builtin_endpoint_test1/uut/wr_ro -add wave -noupdate -radix hexadecimal /l1_rtps_builtin_endpoint_test1/uut/data_out_ro -add wave -noupdate /l1_rtps_builtin_endpoint_test1/uut/last_word_out_ro -add wave -noupdate -divider {MAIN FSM} -add wave -noupdate /l1_rtps_builtin_endpoint_test1/uut/stage -add wave -noupdate /l1_rtps_builtin_endpoint_test1/uut/stage_next -add wave -noupdate /l1_rtps_builtin_endpoint_test1/uut/cnt -add wave -noupdate -divider {MEM FSM} -add wave -noupdate -group MEMORY /l1_rtps_builtin_endpoint_test1/uut/mem_abort_read -add wave -noupdate -group MEMORY -radix unsigned /l1_rtps_builtin_endpoint_test1/uut/mem_ctrl_inst/addr -add wave -noupdate -group MEMORY /l1_rtps_builtin_endpoint_test1/uut/mem_ctrl_inst/read -add wave -noupdate -group MEMORY /l1_rtps_builtin_endpoint_test1/uut/mem_ctrl_inst/ready_in -add wave -noupdate -group MEMORY /l1_rtps_builtin_endpoint_test1/uut/mem_ctrl_inst/valid_in -add wave -noupdate -group MEMORY -radix hexadecimal /l1_rtps_builtin_endpoint_test1/uut/mem_ctrl_inst/data_in -add wave -noupdate -group MEMORY /l1_rtps_builtin_endpoint_test1/uut/mem_ctrl_inst/ready_out -add wave -noupdate -group MEMORY /l1_rtps_builtin_endpoint_test1/uut/mem_ctrl_inst/valid_out -add wave -noupdate -group MEMORY -radix hexadecimal /l1_rtps_builtin_endpoint_test1/uut/mem_ctrl_inst/data_out -add wave -noupdate /l1_rtps_builtin_endpoint_test1/uut/mem_op_start -add wave -noupdate /l1_rtps_builtin_endpoint_test1/uut/mem_op_done -add wave -noupdate /l1_rtps_builtin_endpoint_test1/uut/mem_opcode -add wave -noupdate /l1_rtps_builtin_endpoint_test1/uut/mem_stage -add wave -noupdate /l1_rtps_builtin_endpoint_test1/uut/mem_stage_next -add wave -noupdate /l1_rtps_builtin_endpoint_test1/uut/mem_cnt -add wave -noupdate -childformat {{/l1_rtps_builtin_endpoint_test1/uut/participant_data.guid_prefix -radix hexadecimal} {/l1_rtps_builtin_endpoint_test1/uut/participant_data.meta_addr -radix hexadecimal} {/l1_rtps_builtin_endpoint_test1/uut/participant_data.def_addr -radix hexadecimal} {/l1_rtps_builtin_endpoint_test1/uut/participant_data.meta_port -radix hexadecimal} {/l1_rtps_builtin_endpoint_test1/uut/participant_data.def_port -radix hexadecimal} {/l1_rtps_builtin_endpoint_test1/uut/participant_data.lease_duration -radix unsigned} {/l1_rtps_builtin_endpoint_test1/uut/participant_data.lease_deadline -radix unsigned} {/l1_rtps_builtin_endpoint_test1/uut/participant_data.heartbeat_res_time -radix unsigned} {/l1_rtps_builtin_endpoint_test1/uut/participant_data.acknack_res_time -radix unsigned} {/l1_rtps_builtin_endpoint_test1/uut/participant_data.spdp_seq_nr -radix unsigned} {/l1_rtps_builtin_endpoint_test1/uut/participant_data.pub_seq_nr -radix unsigned} {/l1_rtps_builtin_endpoint_test1/uut/participant_data.sub_seq_nr -radix unsigned} {/l1_rtps_builtin_endpoint_test1/uut/participant_data.mes_seq_nr -radix unsigned}} -subitemconfig {/l1_rtps_builtin_endpoint_test1/uut/participant_data.guid_prefix {-height 15 -radix hexadecimal} /l1_rtps_builtin_endpoint_test1/uut/participant_data.meta_addr {-height 15 -radix hexadecimal} /l1_rtps_builtin_endpoint_test1/uut/participant_data.def_addr {-height 15 -radix hexadecimal} /l1_rtps_builtin_endpoint_test1/uut/participant_data.meta_port {-height 15 -radix hexadecimal} /l1_rtps_builtin_endpoint_test1/uut/participant_data.def_port {-height 15 -radix hexadecimal} /l1_rtps_builtin_endpoint_test1/uut/participant_data.lease_duration {-height 15 -radix unsigned} /l1_rtps_builtin_endpoint_test1/uut/participant_data.lease_deadline {-height 15 -radix unsigned} /l1_rtps_builtin_endpoint_test1/uut/participant_data.heartbeat_res_time {-height 15 -radix unsigned} /l1_rtps_builtin_endpoint_test1/uut/participant_data.acknack_res_time {-height 15 -radix unsigned} /l1_rtps_builtin_endpoint_test1/uut/participant_data.spdp_seq_nr {-height 15 -radix unsigned} /l1_rtps_builtin_endpoint_test1/uut/participant_data.pub_seq_nr {-height 15 -radix unsigned} /l1_rtps_builtin_endpoint_test1/uut/participant_data.sub_seq_nr {-height 15 -radix unsigned} /l1_rtps_builtin_endpoint_test1/uut/participant_data.mes_seq_nr {-height 15 -radix unsigned}} /l1_rtps_builtin_endpoint_test1/uut/participant_data -add wave -noupdate -radix unsigned /l1_rtps_builtin_endpoint_test1/uut/mem_addr_base -add wave -noupdate -radix unsigned /l1_rtps_builtin_endpoint_test1/uut/mem_empty_head -add wave -noupdate -radix unsigned /l1_rtps_builtin_endpoint_test1/uut/mem_occupied_head -add wave -noupdate -divider GUARD -add wave -noupdate -radix unsigned /l1_rtps_builtin_endpoint_test1/uut/read_cnt -add wave -noupdate -radix unsigned /l1_rtps_builtin_endpoint_test1/uut/parameter_end -add wave -noupdate /l1_rtps_builtin_endpoint_test1/uut/parse_prc/rd_guard -add wave -noupdate -divider MISC -add wave -noupdate /l1_rtps_builtin_endpoint_test1/uut/alive -add wave -noupdate /l1_rtps_builtin_endpoint_test1/uut/endpoint_alive -add wave -noupdate -radix unsigned -childformat {{/l1_rtps_builtin_endpoint_test1/uut/seq_nr(0) -radix unsigned} {/l1_rtps_builtin_endpoint_test1/uut/seq_nr(1) -radix unsigned}} -subitemconfig {/l1_rtps_builtin_endpoint_test1/uut/seq_nr(0) {-height 15 -radix unsigned} /l1_rtps_builtin_endpoint_test1/uut/seq_nr(1) {-height 15 -radix unsigned}} /l1_rtps_builtin_endpoint_test1/uut/seq_nr -add wave -noupdate -expand -group FIFO -radix hexadecimal /l1_rtps_builtin_endpoint_test1/fifo_inst/data_in -add wave -noupdate -expand -group FIFO /l1_rtps_builtin_endpoint_test1/fifo_inst/write -add wave -noupdate -expand -group FIFO /l1_rtps_builtin_endpoint_test1/fifo_inst/full -add wave -noupdate -expand -group FIFO -radix hexadecimal /l1_rtps_builtin_endpoint_test1/fifo_inst/data_out -add wave -noupdate -expand -group FIFO /l1_rtps_builtin_endpoint_test1/fifo_inst/read -add wave -noupdate -expand -group FIFO /l1_rtps_builtin_endpoint_test1/fifo_inst/empty -add wave -noupdate -group RTPS_OUT -radix hexadecimal /l1_rtps_builtin_endpoint_test1/rtps_out_inst/data_in -add wave -noupdate -group RTPS_OUT /l1_rtps_builtin_endpoint_test1/rtps_out_inst/last_word_in -add wave -noupdate -group RTPS_OUT /l1_rtps_builtin_endpoint_test1/rtps_out_inst/rd -add wave -noupdate -group RTPS_OUT /l1_rtps_builtin_endpoint_test1/rtps_out_inst/empty -add wave -noupdate -group RTPS_OUT -radix hexadecimal /l1_rtps_builtin_endpoint_test1/rtps_out_inst/data_out -add wave -noupdate -group RTPS_OUT /l1_rtps_builtin_endpoint_test1/rtps_out_inst/wr -add wave -noupdate -group RTPS_OUT /l1_rtps_builtin_endpoint_test1/rtps_out_inst/full -add wave -noupdate -group RTPS_OUT /l1_rtps_builtin_endpoint_test1/rtps_out_inst/selector -add wave -noupdate -divider TESTBENCH -add wave -noupdate -group TESTBENCH /l1_rtps_builtin_endpoint_test1/start -add wave -noupdate -group TESTBENCH /l1_rtps_builtin_endpoint_test1/stim_stage -add wave -noupdate -group TESTBENCH /l1_rtps_builtin_endpoint_test1/stimulus.length -add wave -noupdate -group TESTBENCH /l1_rtps_builtin_endpoint_test1/cnt_stim -add wave -noupdate -group TESTBENCH /l1_rtps_builtin_endpoint_test1/packet_sent -TreeUpdate [SetDefaultTree] -WaveRestoreCursors {Begin {88075000 ps} 0} {Error {36375000 ps} 1} {Cursor {36411652 ps} 0} -quietly wave cursor active 1 -configure wave -namecolwidth 149 -configure wave -valuecolwidth 144 -configure wave -justifyvalue left -configure wave -signalnamewidth 1 -configure wave -snapdistance 10 -configure wave -datasetprefix 0 -configure wave -rowmargin 4 -configure wave -childrowmargin 2 -configure wave -gridoffset 0 -configure wave -gridperiod 1 -configure wave -griddelta 40 -configure wave -timeline 0 -configure wave -timelineunits ns -update -WaveRestoreZoom {87500829 ps} {88649171 ps} diff --git a/sim/L1_rtps_discovery_module_test1.do b/sim/L1_rtps_discovery_module_test1.do new file mode 100644 index 0000000..9d1741f --- /dev/null +++ b/sim/L1_rtps_discovery_module_test1.do @@ -0,0 +1,89 @@ +onerror {resume} +quietly WaveActivateNextPane {} 0 +add wave -noupdate -divider SYSTEM +add wave -noupdate /L1_rtps_discovery_module_test1/uut/clk +add wave -noupdate /L1_rtps_discovery_module_test1/uut/reset +add wave -noupdate -radix unsigned /L1_rtps_discovery_module_test1/uut/time +add wave -noupdate -radix unsigned /L1_rtps_discovery_module_test1/uut/check_time +add wave -noupdate -divider INPUT +add wave -noupdate /L1_rtps_discovery_module_test1/uut/empty +add wave -noupdate /L1_rtps_discovery_module_test1/uut/rd +add wave -noupdate -radix hexadecimal /L1_rtps_discovery_module_test1/uut/data_in +add wave -noupdate /L1_rtps_discovery_module_test1/uut/last_word_in +add wave -noupdate /L1_rtps_discovery_module_test1/uut/last_word_in_latch +add wave -noupdate -radix hexadecimal /L1_rtps_discovery_module_test1/uut/time +add wave -noupdate -divider OUTPUT +add wave -noupdate /L1_rtps_discovery_module_test1/uut/full_ro +add wave -noupdate /L1_rtps_discovery_module_test1/uut/wr_ro +add wave -noupdate -radix hexadecimal /L1_rtps_discovery_module_test1/uut/data_out_ro +add wave -noupdate /L1_rtps_discovery_module_test1/uut/last_word_out_ro +add wave -noupdate -divider {MAIN FSM} +add wave -noupdate /L1_rtps_discovery_module_test1/uut/stage +add wave -noupdate /L1_rtps_discovery_module_test1/uut/stage_next +add wave -noupdate /L1_rtps_discovery_module_test1/uut/cnt +add wave -noupdate -divider {MEM FSM} +add wave -noupdate -group MEMORY /L1_rtps_discovery_module_test1/uut/mem_abort_read +add wave -noupdate -group MEMORY -radix unsigned /L1_rtps_discovery_module_test1/uut/mem_ctrl_inst/addr +add wave -noupdate -group MEMORY /L1_rtps_discovery_module_test1/uut/mem_ctrl_inst/read +add wave -noupdate -group MEMORY /L1_rtps_discovery_module_test1/uut/mem_ctrl_inst/ready_in +add wave -noupdate -group MEMORY /L1_rtps_discovery_module_test1/uut/mem_ctrl_inst/valid_in +add wave -noupdate -group MEMORY -radix hexadecimal /L1_rtps_discovery_module_test1/uut/mem_ctrl_inst/data_in +add wave -noupdate -group MEMORY /L1_rtps_discovery_module_test1/uut/mem_ctrl_inst/ready_out +add wave -noupdate -group MEMORY /L1_rtps_discovery_module_test1/uut/mem_ctrl_inst/valid_out +add wave -noupdate -group MEMORY -radix hexadecimal /L1_rtps_discovery_module_test1/uut/mem_ctrl_inst/data_out +add wave -noupdate /L1_rtps_discovery_module_test1/uut/mem_op_start +add wave -noupdate /L1_rtps_discovery_module_test1/uut/mem_op_done +add wave -noupdate /L1_rtps_discovery_module_test1/uut/mem_opcode +add wave -noupdate /L1_rtps_discovery_module_test1/uut/mem_stage +add wave -noupdate /L1_rtps_discovery_module_test1/uut/mem_stage_next +add wave -noupdate /L1_rtps_discovery_module_test1/uut/mem_cnt +add wave -noupdate -childformat {{/L1_rtps_discovery_module_test1/uut/participant_data.guid_prefix -radix hexadecimal} {/L1_rtps_discovery_module_test1/uut/participant_data.meta_addr -radix hexadecimal} {/L1_rtps_discovery_module_test1/uut/participant_data.def_addr -radix hexadecimal} {/L1_rtps_discovery_module_test1/uut/participant_data.meta_port -radix hexadecimal} {/L1_rtps_discovery_module_test1/uut/participant_data.def_port -radix hexadecimal} {/L1_rtps_discovery_module_test1/uut/participant_data.lease_duration -radix unsigned} {/L1_rtps_discovery_module_test1/uut/participant_data.lease_deadline -radix unsigned} {/L1_rtps_discovery_module_test1/uut/participant_data.heartbeat_res_time -radix unsigned} {/L1_rtps_discovery_module_test1/uut/participant_data.acknack_res_time -radix unsigned} {/L1_rtps_discovery_module_test1/uut/participant_data.spdp_seq_nr -radix unsigned} {/L1_rtps_discovery_module_test1/uut/participant_data.pub_seq_nr -radix unsigned} {/L1_rtps_discovery_module_test1/uut/participant_data.sub_seq_nr -radix unsigned} {/L1_rtps_discovery_module_test1/uut/participant_data.mes_seq_nr -radix unsigned}} -subitemconfig {/L1_rtps_discovery_module_test1/uut/participant_data.guid_prefix {-height 15 -radix hexadecimal} /L1_rtps_discovery_module_test1/uut/participant_data.meta_addr {-height 15 -radix hexadecimal} /L1_rtps_discovery_module_test1/uut/participant_data.def_addr {-height 15 -radix hexadecimal} /L1_rtps_discovery_module_test1/uut/participant_data.meta_port {-height 15 -radix hexadecimal} /L1_rtps_discovery_module_test1/uut/participant_data.def_port {-height 15 -radix hexadecimal} /L1_rtps_discovery_module_test1/uut/participant_data.lease_duration {-height 15 -radix unsigned} /L1_rtps_discovery_module_test1/uut/participant_data.lease_deadline {-height 15 -radix unsigned} /L1_rtps_discovery_module_test1/uut/participant_data.heartbeat_res_time {-height 15 -radix unsigned} /L1_rtps_discovery_module_test1/uut/participant_data.acknack_res_time {-height 15 -radix unsigned} /L1_rtps_discovery_module_test1/uut/participant_data.spdp_seq_nr {-height 15 -radix unsigned} /L1_rtps_discovery_module_test1/uut/participant_data.pub_seq_nr {-height 15 -radix unsigned} /L1_rtps_discovery_module_test1/uut/participant_data.sub_seq_nr {-height 15 -radix unsigned} /L1_rtps_discovery_module_test1/uut/participant_data.mes_seq_nr {-height 15 -radix unsigned}} /L1_rtps_discovery_module_test1/uut/participant_data +add wave -noupdate -radix unsigned /L1_rtps_discovery_module_test1/uut/mem_addr_base +add wave -noupdate -radix unsigned /L1_rtps_discovery_module_test1/uut/mem_empty_head +add wave -noupdate -radix unsigned /L1_rtps_discovery_module_test1/uut/mem_occupied_head +add wave -noupdate -divider GUARD +add wave -noupdate -radix unsigned /L1_rtps_discovery_module_test1/uut/read_cnt +add wave -noupdate -radix unsigned /L1_rtps_discovery_module_test1/uut/parameter_end +add wave -noupdate /L1_rtps_discovery_module_test1/uut/parse_prc/rd_guard +add wave -noupdate -divider MISC +add wave -noupdate /L1_rtps_discovery_module_test1/uut/alive +add wave -noupdate /L1_rtps_discovery_module_test1/uut/endpoint_alive +add wave -noupdate -radix unsigned -childformat {{/L1_rtps_discovery_module_test1/uut/seq_nr(0) -radix unsigned} {/L1_rtps_discovery_module_test1/uut/seq_nr(1) -radix unsigned}} -subitemconfig {/L1_rtps_discovery_module_test1/uut/seq_nr(0) {-height 15 -radix unsigned} /L1_rtps_discovery_module_test1/uut/seq_nr(1) {-height 15 -radix unsigned}} /L1_rtps_discovery_module_test1/uut/seq_nr +add wave -noupdate -expand -group FIFO -radix hexadecimal /L1_rtps_discovery_module_test1/fifo_inst/data_in +add wave -noupdate -expand -group FIFO /L1_rtps_discovery_module_test1/fifo_inst/write +add wave -noupdate -expand -group FIFO /L1_rtps_discovery_module_test1/fifo_inst/full +add wave -noupdate -expand -group FIFO -radix hexadecimal /L1_rtps_discovery_module_test1/fifo_inst/data_out +add wave -noupdate -expand -group FIFO /L1_rtps_discovery_module_test1/fifo_inst/read +add wave -noupdate -expand -group FIFO /L1_rtps_discovery_module_test1/fifo_inst/empty +add wave -noupdate -group RTPS_OUT -radix hexadecimal /L1_rtps_discovery_module_test1/rtps_out_inst/data_in +add wave -noupdate -group RTPS_OUT /L1_rtps_discovery_module_test1/rtps_out_inst/last_word_in +add wave -noupdate -group RTPS_OUT /L1_rtps_discovery_module_test1/rtps_out_inst/rd +add wave -noupdate -group RTPS_OUT /L1_rtps_discovery_module_test1/rtps_out_inst/empty +add wave -noupdate -group RTPS_OUT -radix hexadecimal /L1_rtps_discovery_module_test1/rtps_out_inst/data_out +add wave -noupdate -group RTPS_OUT /L1_rtps_discovery_module_test1/rtps_out_inst/wr +add wave -noupdate -group RTPS_OUT /L1_rtps_discovery_module_test1/rtps_out_inst/full +add wave -noupdate -group RTPS_OUT /L1_rtps_discovery_module_test1/rtps_out_inst/selector +add wave -noupdate -divider TESTBENCH +add wave -noupdate -group TESTBENCH /L1_rtps_discovery_module_test1/start +add wave -noupdate -group TESTBENCH /L1_rtps_discovery_module_test1/stim_stage +add wave -noupdate -group TESTBENCH /L1_rtps_discovery_module_test1/stimulus.length +add wave -noupdate -group TESTBENCH /L1_rtps_discovery_module_test1/cnt_stim +add wave -noupdate -group TESTBENCH /L1_rtps_discovery_module_test1/packet_sent +TreeUpdate [SetDefaultTree] +WaveRestoreCursors {Begin {88075000 ps} 0} {Error {36375000 ps} 1} {Cursor {36411652 ps} 0} +quietly wave cursor active 1 +configure wave -namecolwidth 149 +configure wave -valuecolwidth 144 +configure wave -justifyvalue left +configure wave -signalnamewidth 1 +configure wave -snapdistance 10 +configure wave -datasetprefix 0 +configure wave -rowmargin 4 +configure wave -childrowmargin 2 +configure wave -gridoffset 0 +configure wave -gridperiod 1 +configure wave -griddelta 40 +configure wave -timeline 0 +configure wave -timelineunits ns +update +WaveRestoreZoom {87500829 ps} {88649171 ps} diff --git a/src/ros2/ros_action_server.vhd b/src/ros2/ros_action_server.vhd index e6a9694..0145fbf 100644 --- a/src/ros2/ros_action_server.vhd +++ b/src/ros2/ros_action_server.vhd @@ -2319,7 +2319,8 @@ begin mem_valid_in <= '1'; mem_addr <= mem_addr_base + GMF_STATE_OFFSET; mem_write_data(CDR_INT8_WIDTH-1 downto 0) <= GoalStatus_package.STATUS_ACCEPTED; - mem_data_next.state <= GoalStatus_package.STATUS_ACCEPTED; + mem_data_next.state <= GoalStatus_package.STATUS_ACCEPTED; + mem_data_next.field_flags <= mem_data.field_flags or GMF_STATE_FLAG; -- Memory Flow Control Guard if (mem_ready_in = '1') then @@ -2360,7 +2361,8 @@ begin mem_valid_in <= '1'; mem_addr <= mem_addr_base + GMF_GOAL_ID_OFFSET + 3; mem_write_data <= mem_latch_data.goal_id(3); - mem_data_next.goal_id <= mem_latch_data.goal_id; + mem_data_next.goal_id <= mem_latch_data.goal_id; + mem_data_next.field_flags <= mem_data.field_flags or GMF_GOAL_ID_FLAG; -- Memory Flow Control Guard if (mem_ready_in = '1') then @@ -2381,7 +2383,8 @@ begin mem_valid_in <= '1'; mem_addr <= mem_addr_base + GMF_STAMP_OFFSET + 1; mem_write_data <= mem_latch_data.stamp.nanosec; - mem_data_next.stamp <= mem_latch_data.stamp; + mem_data_next.stamp <= mem_latch_data.stamp; + mem_data_next.field_flags <= mem_data.field_flags or GMF_STAMP_FLAG; -- Memory Flow Control Guard if (mem_ready_in = '1') then @@ -2412,7 +2415,8 @@ begin mem_valid_in <= '1'; mem_addr <= mem_addr_base + GMF_DEADLINE_OFFSET + 1; mem_write_data <= ROS_TIME_INFINITE.nanosec; - mem_data_next.deadline <= ROS_TIME_INFINITE; + mem_data_next.deadline <= ROS_TIME_INFINITE; + mem_data_next.field_flags <= mem_data.field_flags or GMF_DEADLINE_FLAG; -- Memory Flow Control Guard if (mem_ready_in = '1') then diff --git a/src/rtps_discovery_module.vhd b/src/rtps_discovery_module.vhd index 8319eef..8180d87 100644 --- a/src/rtps_discovery_module.vhd +++ b/src/rtps_discovery_module.vhd @@ -148,15 +148,15 @@ architecture arch of rtps_discovery_module is -- Memory FSM Opcodes -- OPCODE DESCRIPTION -- SEARCH_PARTICIPANT Search memory for Participant Entry with GUID Prefix equal to "guid" signal. - -- Set "mem_addr_base" to Base Address of found Participant Entry or PARTICIPANT_MEMORY_MAX_ADDRESS if nothing found. - -- "participant_data" contains memory Participant Data according to "mem_field_flags". + -- Set "participant_data.addr" to Base Address of found Participant Entry or PARTICIPANT_MEMORY_MAX_ADDRESS if nothing found. + -- "participant_data" contains memory Participant Data according to "mem_r.field_flags". -- INSERT_PARTICIPANT Write Participant Data to next avialable empty slot. - -- UPDATE_PARTICIPANT Update the Participant Data of the Participant Entry pointed by "mem_addr_base" according to the "mem_field_flags" flags. - -- REMOVE_PARTICIPANT Remove the Participant Entry pointed by "mem_addr_base". - -- "mem_addr_base" is set to the next Endpoint (or ENDPOINT_MEMORY_MAX_ADDRESS if no next Endpoint exists) - -- GET_NEXT_PARTICIPANT Get Participant Data of next participant (from the one pointed by "mem_addr_base") according to "mem_field_flags". - -- "mem_addr_base" is set to the Address of the Participant, or PARTICIPANT_MEMORY_MAX_ADDRESS if no Participant in Memory - -- GET_PATICIPANT Get Participant Data of participant pointed by "mem_addr_update" according to "mem_field_flags". + -- UPDATE_PARTICIPANT Update the Participant Data of the Participant Entry pointed by "participant_data.addr" according to the "mem_r.field_flags" flags. + -- REMOVE_PARTICIPANT Remove the Participant Entry pointed by "participant_data.addr". + -- "participant_data.addr" is set to the next Endpoint (or ENDPOINT_MEMORY_MAX_ADDRESS if no next Endpoint exists) + -- GET_NEXT_PARTICIPANT Get Participant Data of next participant (from the one pointed by "participant_data.addr") according to "mem_r.field_flags". + -- "participant_data.addr" is set to the Address of the Participant, or PARTICIPANT_MEMORY_MAX_ADDRESS if no Participant in Memory + -- GET_PATICIPANT Get Participant Data of participant pointed by "mem_r.addr" according to "mem_r.field_flags". -- Already fetched Data of the same Participant is not modified type MEM_OPCODE_TYPE is (NOP, SEARCH_PARTICIPANT, INSERT_PARTICIPANT, UPDATE_PARTICIPANT, GET_NEXT_PARTICIPANT, REMOVE_PARTICIPANT, GET_PARTICIPANT); -- RTPS Data Submessage Content: @@ -168,6 +168,7 @@ architecture arch of rtps_discovery_module is type STRING_CONTENT_TYPE is (TOPIC_NAME_TYPE, TYPE_NAME_TYPE, DOMAIN_TAG_TYPE); -- Record of all Participant Data stored in memory type PARTICIPANT_DATA_TYPE is record + addr : unsigned(PARTICIPANT_MEMORY_ADDR_WIDTH-1 downto 0); guid_prefix : GUIDPREFIX_TYPE; meta_addr : std_logic_vector(IPv4_ADDRESS_WIDTH-1 downto 0); def_addr : std_logic_vector(IPv4_ADDRESS_WIDTH-1 downto 0); @@ -182,9 +183,11 @@ architecture arch of rtps_discovery_module is pub_seq_nr : SEQUENCENUMBER_TYPE; sub_seq_nr : SEQUENCENUMBER_TYPE; mes_seq_nr : SEQUENCENUMBER_TYPE; + field_flags : std_logic_vector(0 to PMF_FLAG_WIDTH-1); end record; -- Zero initialized Participant Data constant ZERO_PARTICIPANT_DATA : PARTICIPANT_DATA_TYPE := ( + addr => PARTICIPANT_MEMORY_MAX_ADDRESS, guid_prefix => GUIDPREFIX_UNKNOWN, meta_addr => IPv4_ADDRESS_INVALID, def_addr => IPv4_ADDRESS_INVALID, @@ -198,34 +201,8 @@ architecture arch of rtps_discovery_module is spdp_seq_nr => SEQUENCENUMBER_UNKNOWN, pub_seq_nr => SEQUENCENUMBER_UNKNOWN, sub_seq_nr => SEQUENCENUMBER_UNKNOWN, - mes_seq_nr => SEQUENCENUMBER_UNKNOWN - ); - type PARTICIPANT_LATCH_DATA_TYPE is record - guid_prefix : GUIDPREFIX_TYPE; - meta_addr : std_logic_vector(IPv4_ADDRESS_WIDTH-1 downto 0); - def_addr : std_logic_vector(IPv4_ADDRESS_WIDTH-1 downto 0); - meta_port : std_logic_vector(UDP_PORT_WIDTH-1 downto 0); - def_port : std_logic_vector(UDP_PORT_WIDTH-1 downto 0); - extra_flags : std_logic_vector(EF_FLAG_WIDTH-1 downto 0); - lease_duration : DURATION_TYPE; - lease_deadline : TIME_TYPE; - res_time : TIME_TYPE; - seq_nr : SEQUENCENUMBER_TYPE; - field_flags : std_logic_vector(0 to PMF_FLAG_WIDTH-1); - end record; - -- Zero initialized Participant Data - constant ZERO_PARTICIPANT_LATCH_DATA : PARTICIPANT_LATCH_DATA_TYPE := ( - guid_prefix => GUIDPREFIX_UNKNOWN, - meta_addr => IPv4_ADDRESS_INVALID, - def_addr => IPv4_ADDRESS_INVALID, - meta_port => UDP_PORT_INVALID, - def_port => UDP_PORT_INVALID, - extra_flags => (others => '0'), - lease_duration => DURATION_ZERO, - lease_deadline => TIME_INVALID, - res_time => TIME_INVALID, - seq_nr => SEQUENCENUMBER_UNKNOWN, - field_flags => (others => '0') + mes_seq_nr => SEQUENCENUMBER_UNKNOWN, + field_flags => (others => '0') ); @@ -361,16 +338,8 @@ architecture arch of rtps_discovery_module is -- Contains flags that signify which PIDs where received. This is done in order to use the default value for -- not received elements. signal rcvd, rcvd_next : std_logic_vector(RCVD_FLAG_WIDTH-1 downto 0); - -- Signal containing the relevant Participant Memory Frame Fields of the Memory Operation - signal mem_field_flags : std_logic_vector(0 to PMF_FLAG_WIDTH-1) := (others => '0'); - -- Signal used to pass deadlines to the Memory FSM - signal deadline : TIME_TYPE; - -- Signal used to pass extra flags to the Memory FSM - signal extra_flags : std_logic_vector(0 to EF_FLAG_WIDTH-1); - -- Signal used to pass Participant Pointers to the Memory Process - signal mem_addr_update : unsigned(PARTICIPANT_MEMORY_ADDR_WIDTH-1 downto 0); - -- Signal used to be pass Response Times to the Memory FSM - signal res_time : TIME_TYPE; + -- Signal used to pass data to the memory process + signal mem_r : PARTICIPANT_DATA_TYPE; -- Test signal used for testbench synchronisation signal idle_sig : std_logic; -- Signifies that we received an Unregister/Dispose Status Info @@ -404,9 +373,7 @@ architecture arch of rtps_discovery_module is -- Latch for the Participant Data stored in memory signal participant_data, participant_data_next : PARTICIPANT_DATA_TYPE; -- Latch for Participant Data from main FSM - signal participant_latch_data, participant_latch_data_next : PARTICIPANT_LATCH_DATA_TYPE; - -- Participant Memory Flag Array denoting which participant_data Fields are up-to-date with the respective fields of the Participant (Pointed by mem_addr_base) - signal current_pmf, current_pmf_next : std_logic_vector(0 to PMF_FLAG_WIDTH-1); + signal participant_latch_data, participant_latch_data_next : PARTICIPANT_DATA_TYPE; -- *MEMORY CONTROL CONNECTION SIGNALS* @@ -486,13 +453,13 @@ architecture arch of rtps_discovery_module is procedure assert_sn is begin if (message_type = EDP and is_subscriber = '0') then - assert stable(clk, check_mask(current_pmf, PMF_PUB_SEQ_NR_FLAG)) severity FAILURE; + assert stable(clk, check_mask(participant_data.field_flags, PMF_PUB_SEQ_NR_FLAG)) severity FAILURE; elsif (message_type = EDP and is_subscriber = '1') then - assert stable(clk, check_mask(current_pmf, PMF_SUB_SEQ_NR_FLAG)) severity FAILURE; + assert stable(clk, check_mask(participant_data.field_flags, PMF_SUB_SEQ_NR_FLAG)) severity FAILURE; elsif (message_type = MESSAGE) then - assert stable(clk, check_mask(current_pmf, PMF_MES_SEQ_NR_FLAG)) severity FAILURE; + assert stable(clk, check_mask(participant_data.field_flags, PMF_MES_SEQ_NR_FLAG)) severity FAILURE; elsif (message_type = PDP) then - assert stable(clk, check_mask(current_pmf, PMF_SPDP_SEQ_NR_FLAG)) severity FAILURE; + assert stable(clk, check_mask(participant_data.field_flags, PMF_SPDP_SEQ_NR_FLAG)) severity FAILURE; else assert FALSE report "assert_sn: Unknown Message Type" severity FAILURE; end if; @@ -707,6 +674,7 @@ begin bitmap_pos_next <= bitmap_pos; ud_status_next <= ud_status; -- DEFAULT Unregistered + mem_r <= ZERO_PARTICIPANT_DATA; rd_sig <= '0'; rd_guard := '0'; reset_read_cnt <= '0'; @@ -717,11 +685,6 @@ begin reset_endpoint_alive <= '0'; idle_sig <= '0'; data_out_sig <= (others => '0'); - mem_field_flags <= (others => '0'); - extra_flags <= (others => '0'); - mem_addr_update <= PARTICIPANT_MEMORY_MAX_ADDRESS; - deadline <= TIME_INVALID; - res_time <= TIME_INVALID; -- Last Word Latch Setter if (last_word_in = '1') then @@ -782,11 +745,11 @@ begin end if; heartbeat_time_next <= time + HEARTBEAT_PERIOD; -- Send Heartbeat and Liveliness Assertions to all stored Participants - mem_op_start <= '1'; - mem_opcode <= GET_PARTICIPANT; - mem_addr_update <= mem_occupied_head; - mem_field_flags <= PMF_META_IPV4_ADDR_FLAG or PMF_UDP_PORT_FLAG; - stage_next <= FIND_PARTICIPANT_DEST; + mem_op_start <= '1'; + mem_opcode <= GET_PARTICIPANT; + mem_r.addr <= mem_occupied_head; + mem_r.field_flags <= PMF_META_IPV4_ADDR_FLAG or PMF_UDP_PORT_FLAG; + stage_next <= FIND_PARTICIPANT_DEST; -- Increment the counter for the new Heartbeat Messages count_next <= count + 1; -- Mark this as liveliness assertion (Allows the "SEND_MES_AUTO_LIVE" stage to decide on return stage) @@ -796,10 +759,10 @@ begin elsif (check_time <= time) then -- Memory Operation Guard if (mem_op_done = '1') then - mem_op_start <= '1'; - mem_opcode <= GET_PARTICIPANT; - mem_addr_update <= mem_occupied_head; - mem_field_flags <= PMF_LEASE_DEADLINE_FLAG or PMF_ACKNACK_RES_TIME_FLAG or PMF_HEARTBEAT_RES_TIME_FLAG; + mem_op_start <= '1'; + mem_opcode <= GET_PARTICIPANT; + mem_r.addr <= mem_occupied_head; + mem_r.field_flags <= PMF_LEASE_DEADLINE_FLAG or PMF_ACKNACK_RES_TIME_FLAG or PMF_HEARTBEAT_RES_TIME_FLAG; stale_check_next <= '1'; stage_next <= PARTICIPANT_STALE_CHECK; @@ -916,9 +879,10 @@ begin cnt_next <= 0; -- Start Participant Search - mem_op_start <= '1'; - mem_opcode <= SEARCH_PARTICIPANT; - mem_field_flags <= PMF_SPDP_SEQ_NR_FLAG or PMF_DEFAULT_IPV4_ADDR_FLAG or PMF_UDP_PORT_FLAG; + mem_op_start <= '1'; + mem_opcode <= SEARCH_PARTICIPANT; + mem_r.field_flags <= PMF_SPDP_SEQ_NR_FLAG or PMF_DEFAULT_IPV4_ADDR_FLAG or PMF_UDP_PORT_FLAG; + mem_r.guid_prefix <= GUIDPREFIX_TYPE(guid(0 to 2)); end if; when ENTITYID_SEDP_BUILTIN_PUBLICATIONS_ANNOUNCER => -- SANITY CHECK: Ignore if no Writers @@ -931,9 +895,10 @@ begin cnt_next <= 0; -- Start Participant Search - mem_op_start <= '1'; - mem_opcode <= SEARCH_PARTICIPANT; - mem_field_flags <= PMF_ACKNACK_RES_TIME_FLAG or PMF_EXTRA_FLAGS_FLAG; + mem_op_start <= '1'; + mem_opcode <= SEARCH_PARTICIPANT; + mem_r.field_flags <= PMF_ACKNACK_RES_TIME_FLAG or PMF_EXTRA_FLAGS_FLAG; + mem_r.guid_prefix <= GUIDPREFIX_TYPE(guid(0 to 2)); end if; when ENTITYID_SEDP_BUILTIN_PUBLICATIONS_DETECTOR => -- SANITY CHECK: Ignore if no Readers @@ -948,17 +913,19 @@ begin cnt_next <= 0; -- Start Participant Search - mem_op_start <= '1'; - mem_opcode <= SEARCH_PARTICIPANT; - mem_field_flags <= PMF_HEARTBEAT_RES_TIME_FLAG or PMF_PUB_SEQ_NR_FLAG; + mem_op_start <= '1'; + mem_opcode <= SEARCH_PARTICIPANT; + mem_r.field_flags <= PMF_HEARTBEAT_RES_TIME_FLAG or PMF_PUB_SEQ_NR_FLAG; + mem_r.guid_prefix <= GUIDPREFIX_TYPE(guid(0 to 2)); when SID_GAP => stage_next <= PROCESS_GAP; -- GAP Processing cnt_next <= 0; -- Start Participant Search - mem_op_start <= '1'; - mem_opcode <= SEARCH_PARTICIPANT; - mem_field_flags <= PMF_PUB_SEQ_NR_FLAG; + mem_op_start <= '1'; + mem_opcode <= SEARCH_PARTICIPANT; + mem_r.field_flags <= PMF_PUB_SEQ_NR_FLAG; + mem_r.guid_prefix <= GUIDPREFIX_TYPE(guid(0 to 2)); when SID_DATA => stage_next <= LATCH_SEQ_NR; -- DATA Processing cnt_next <= 0; @@ -967,9 +934,10 @@ begin endpoint_mask_next <= ENDPOINT_READERS; -- Start Participant Search - mem_op_start <= '1'; - mem_opcode <= SEARCH_PARTICIPANT; - mem_field_flags <= PMF_PUB_SEQ_NR_FLAG or PMF_DEFAULT_IPV4_ADDR_FLAG or PMF_UDP_PORT_FLAG; + mem_op_start <= '1'; + mem_opcode <= SEARCH_PARTICIPANT; + mem_r.field_flags <= PMF_PUB_SEQ_NR_FLAG or PMF_DEFAULT_IPV4_ADDR_FLAG or PMF_UDP_PORT_FLAG; + mem_r.guid_prefix <= GUIDPREFIX_TYPE(guid(0 to 2)); when others => null; end case; @@ -984,9 +952,10 @@ begin cnt_next <= 0; -- Start Participant Search - mem_op_start <= '1'; - mem_opcode <= SEARCH_PARTICIPANT; - mem_field_flags <= PMF_ACKNACK_RES_TIME_FLAG or PMF_EXTRA_FLAGS_FLAG; + mem_op_start <= '1'; + mem_opcode <= SEARCH_PARTICIPANT; + mem_r.field_flags <= PMF_ACKNACK_RES_TIME_FLAG or PMF_EXTRA_FLAGS_FLAG; + mem_r.guid_prefix <= GUIDPREFIX_TYPE(guid(0 to 2)); end if; when ENTITYID_SEDP_BUILTIN_SUBSCRIPTIONS_DETECTOR => -- SANITY CHECK: Ignore if no Writers @@ -1001,17 +970,19 @@ begin cnt_next <= 0; -- Start Participant Search - mem_op_start <= '1'; - mem_opcode <= SEARCH_PARTICIPANT; - mem_field_flags <= PMF_HEARTBEAT_RES_TIME_FLAG or PMF_SUB_SEQ_NR_FLAG; + mem_op_start <= '1'; + mem_opcode <= SEARCH_PARTICIPANT; + mem_r.field_flags <= PMF_HEARTBEAT_RES_TIME_FLAG or PMF_SUB_SEQ_NR_FLAG; + mem_r.guid_prefix <= GUIDPREFIX_TYPE(guid(0 to 2)); when SID_GAP => stage_next <= PROCESS_GAP; -- GAP Processing cnt_next <= 0; -- Start Participant Search - mem_op_start <= '1'; - mem_opcode <= SEARCH_PARTICIPANT; - mem_field_flags <= PMF_SUB_SEQ_NR_FLAG; + mem_op_start <= '1'; + mem_opcode <= SEARCH_PARTICIPANT; + mem_r.field_flags <= PMF_SUB_SEQ_NR_FLAG; + mem_r.guid_prefix <= GUIDPREFIX_TYPE(guid(0 to 2)); when SID_DATA => stage_next <= LATCH_SEQ_NR; -- DATA Processing cnt_next <= 0; @@ -1020,9 +991,10 @@ begin endpoint_mask_next <= not ENDPOINT_READERS; -- Start Participant Search - mem_op_start <= '1'; - mem_opcode <= SEARCH_PARTICIPANT; - mem_field_flags <= PMF_SUB_SEQ_NR_FLAG or PMF_DEFAULT_IPV4_ADDR_FLAG or PMF_UDP_PORT_FLAG; + mem_op_start <= '1'; + mem_opcode <= SEARCH_PARTICIPANT; + mem_r.field_flags <= PMF_SUB_SEQ_NR_FLAG or PMF_DEFAULT_IPV4_ADDR_FLAG or PMF_UDP_PORT_FLAG; + mem_r.guid_prefix <= GUIDPREFIX_TYPE(guid(0 to 2)); when others => null; end case; @@ -1038,9 +1010,10 @@ begin cnt_next <= 0; -- Start Participant Search - mem_op_start <= '1'; - mem_opcode <= SEARCH_PARTICIPANT; - mem_field_flags <= PMF_ACKNACK_RES_TIME_FLAG or PMF_EXTRA_FLAGS_FLAG; + mem_op_start <= '1'; + mem_opcode <= SEARCH_PARTICIPANT; + mem_r.field_flags <= PMF_ACKNACK_RES_TIME_FLAG or PMF_EXTRA_FLAGS_FLAG; + mem_r.guid_prefix <= GUIDPREFIX_TYPE(guid(0 to 2)); end if; end if; when ENTITYID_P2P_BUILTIN_PARTICIPANT_MESSAGE_READER => @@ -1055,17 +1028,19 @@ begin cnt_next <= 0; -- Start Participant Search - mem_op_start <= '1'; - mem_opcode <= SEARCH_PARTICIPANT; - mem_field_flags <= PMF_HEARTBEAT_RES_TIME_FLAG or PMF_MES_SEQ_NR_FLAG; + mem_op_start <= '1'; + mem_opcode <= SEARCH_PARTICIPANT; + mem_r.field_flags <= PMF_HEARTBEAT_RES_TIME_FLAG or PMF_MES_SEQ_NR_FLAG; + mem_r.guid_prefix <= GUIDPREFIX_TYPE(guid(0 to 2)); when SID_GAP => stage_next <= PROCESS_GAP; -- GAP Processing cnt_next <= 0; -- Start Participant Search - mem_op_start <= '1'; - mem_opcode <= SEARCH_PARTICIPANT; - mem_field_flags <= PMF_MES_SEQ_NR_FLAG; + mem_op_start <= '1'; + mem_opcode <= SEARCH_PARTICIPANT; + mem_r.field_flags <= PMF_MES_SEQ_NR_FLAG; + mem_r.guid_prefix <= GUIDPREFIX_TYPE(guid(0 to 2)); when SID_DATA => stage_next <= LATCH_SEQ_NR; -- DATA Processing cnt_next <= 0; @@ -1074,9 +1049,10 @@ begin endpoint_mask_next <= ENDPOINT_READERS; -- Start Participant Search - mem_op_start <= '1'; - mem_opcode <= SEARCH_PARTICIPANT; - mem_field_flags <= PMF_MES_SEQ_NR_FLAG or PMF_DEFAULT_IPV4_ADDR_FLAG or PMF_UDP_PORT_FLAG; + mem_op_start <= '1'; + mem_opcode <= SEARCH_PARTICIPANT; + mem_r.field_flags <= PMF_MES_SEQ_NR_FLAG or PMF_DEFAULT_IPV4_ADDR_FLAG or PMF_UDP_PORT_FLAG; + mem_r.guid_prefix <= GUIDPREFIX_TYPE(guid(0 to 2)); when others => null; end case; @@ -1105,9 +1081,10 @@ begin cnt_next <= 0; -- Start Participant Search - mem_op_start <= '1'; - mem_opcode <= SEARCH_PARTICIPANT; - mem_field_flags <= PMF_SPDP_SEQ_NR_FLAG or PMF_DEFAULT_IPV4_ADDR_FLAG or PMF_UDP_PORT_FLAG; + mem_op_start <= '1'; + mem_opcode <= SEARCH_PARTICIPANT; + mem_r.field_flags <= PMF_SPDP_SEQ_NR_FLAG or PMF_DEFAULT_IPV4_ADDR_FLAG or PMF_UDP_PORT_FLAG; + mem_r.guid_prefix <= GUIDPREFIX_TYPE(guid(0 to 2)); end if; when ENTITYID_SEDP_BUILTIN_PUBLICATIONS_DETECTOR => -- SANITY CHECK: Ignore if no Writers @@ -1120,9 +1097,10 @@ begin cnt_next <= 0; -- Start Participant Search - mem_op_start <= '1'; - mem_opcode <= SEARCH_PARTICIPANT; - mem_field_flags <= PMF_ACKNACK_RES_TIME_FLAG or PMF_EXTRA_FLAGS_FLAG; + mem_op_start <= '1'; + mem_opcode <= SEARCH_PARTICIPANT; + mem_r.field_flags <= PMF_ACKNACK_RES_TIME_FLAG or PMF_EXTRA_FLAGS_FLAG; + mem_r.guid_prefix <= GUIDPREFIX_TYPE(guid(0 to 2)); end if; when ENTITYID_SEDP_BUILTIN_PUBLICATIONS_ANNOUNCER => -- SANITY CHECK: Ignore if no Readers @@ -1136,17 +1114,19 @@ begin cnt_next <= 0; -- Start Participant Search - mem_op_start <= '1'; - mem_opcode <= SEARCH_PARTICIPANT; - mem_field_flags <= PMF_HEARTBEAT_RES_TIME_FLAG or PMF_PUB_SEQ_NR_FLAG; + mem_op_start <= '1'; + mem_opcode <= SEARCH_PARTICIPANT; + mem_r.field_flags <= PMF_HEARTBEAT_RES_TIME_FLAG or PMF_PUB_SEQ_NR_FLAG; + mem_r.guid_prefix <= GUIDPREFIX_TYPE(guid(0 to 2)); when SID_GAP => stage_next <= PROCESS_GAP; -- GAP Processing cnt_next <= 0; -- Start Participant Search - mem_op_start <= '1'; - mem_opcode <= SEARCH_PARTICIPANT; - mem_field_flags <= PMF_PUB_SEQ_NR_FLAG; + mem_op_start <= '1'; + mem_opcode <= SEARCH_PARTICIPANT; + mem_r.field_flags <= PMF_PUB_SEQ_NR_FLAG; + mem_r.guid_prefix <= GUIDPREFIX_TYPE(guid(0 to 2)); when SID_DATA => stage_next <= LATCH_SEQ_NR; -- DATA Processing cnt_next <= 0; @@ -1155,9 +1135,10 @@ begin endpoint_mask_next <= ENDPOINT_READERS; -- Start Participant Search - mem_op_start <= '1'; - mem_opcode <= SEARCH_PARTICIPANT; - mem_field_flags <= PMF_PUB_SEQ_NR_FLAG or PMF_DEFAULT_IPV4_ADDR_FLAG or PMF_UDP_PORT_FLAG; + mem_op_start <= '1'; + mem_opcode <= SEARCH_PARTICIPANT; + mem_r.field_flags <= PMF_PUB_SEQ_NR_FLAG or PMF_DEFAULT_IPV4_ADDR_FLAG or PMF_UDP_PORT_FLAG; + mem_r.guid_prefix <= GUIDPREFIX_TYPE(guid(0 to 2)); when others => null; end case; @@ -1172,9 +1153,10 @@ begin cnt_next <= 0; -- Start Participant Search - mem_op_start <= '1'; - mem_opcode <= SEARCH_PARTICIPANT; - mem_field_flags <= PMF_ACKNACK_RES_TIME_FLAG or PMF_EXTRA_FLAGS_FLAG; + mem_op_start <= '1'; + mem_opcode <= SEARCH_PARTICIPANT; + mem_r.field_flags <= PMF_ACKNACK_RES_TIME_FLAG or PMF_EXTRA_FLAGS_FLAG; + mem_r.guid_prefix <= GUIDPREFIX_TYPE(guid(0 to 2)); end if; when ENTITYID_SEDP_BUILTIN_SUBSCRIPTIONS_ANNOUNCER => -- SANITY CHECK: Ignore if no Writers @@ -1189,17 +1171,19 @@ begin cnt_next <= 0; -- Start Participant Search - mem_op_start <= '1'; - mem_opcode <= SEARCH_PARTICIPANT; - mem_field_flags <= PMF_HEARTBEAT_RES_TIME_FLAG or PMF_SUB_SEQ_NR_FLAG; + mem_op_start <= '1'; + mem_opcode <= SEARCH_PARTICIPANT; + mem_r.field_flags <= PMF_HEARTBEAT_RES_TIME_FLAG or PMF_SUB_SEQ_NR_FLAG; + mem_r.guid_prefix <= GUIDPREFIX_TYPE(guid(0 to 2)); when SID_GAP => stage_next <= PROCESS_GAP; -- GAP Processing cnt_next <= 0; -- Start Participant Search - mem_op_start <= '1'; - mem_opcode <= SEARCH_PARTICIPANT; - mem_field_flags <= PMF_SUB_SEQ_NR_FLAG; + mem_op_start <= '1'; + mem_opcode <= SEARCH_PARTICIPANT; + mem_r.field_flags <= PMF_SUB_SEQ_NR_FLAG; + mem_r.guid_prefix <= GUIDPREFIX_TYPE(guid(0 to 2)); when SID_DATA => stage_next <= LATCH_SEQ_NR; -- DATA Processing cnt_next <= 0; @@ -1208,9 +1192,10 @@ begin endpoint_mask_next <= not ENDPOINT_READERS; -- Start Participant Search - mem_op_start <= '1'; - mem_opcode <= SEARCH_PARTICIPANT; - mem_field_flags <= PMF_SUB_SEQ_NR_FLAG or PMF_DEFAULT_IPV4_ADDR_FLAG or PMF_UDP_PORT_FLAG; + mem_op_start <= '1'; + mem_opcode <= SEARCH_PARTICIPANT; + mem_r.field_flags <= PMF_SUB_SEQ_NR_FLAG or PMF_DEFAULT_IPV4_ADDR_FLAG or PMF_UDP_PORT_FLAG; + mem_r.guid_prefix <= GUIDPREFIX_TYPE(guid(0 to 2)); when others => null; end case; @@ -1226,9 +1211,10 @@ begin cnt_next <= 0; -- Start Participant Search - mem_op_start <= '1'; - mem_opcode <= SEARCH_PARTICIPANT; - mem_field_flags <= PMF_ACKNACK_RES_TIME_FLAG or PMF_EXTRA_FLAGS_FLAG; + mem_op_start <= '1'; + mem_opcode <= SEARCH_PARTICIPANT; + mem_r.field_flags <= PMF_ACKNACK_RES_TIME_FLAG or PMF_EXTRA_FLAGS_FLAG; + mem_r.guid_prefix <= GUIDPREFIX_TYPE(guid(0 to 2)); end if; end if; when ENTITYID_P2P_BUILTIN_PARTICIPANT_MESSAGE_WRITER => @@ -1243,17 +1229,19 @@ begin cnt_next <= 0; -- Start Participant Search - mem_op_start <= '1'; - mem_opcode <= SEARCH_PARTICIPANT; - mem_field_flags <= PMF_HEARTBEAT_RES_TIME_FLAG or PMF_MES_SEQ_NR_FLAG; + mem_op_start <= '1'; + mem_opcode <= SEARCH_PARTICIPANT; + mem_r.field_flags <= PMF_HEARTBEAT_RES_TIME_FLAG or PMF_MES_SEQ_NR_FLAG; + mem_r.guid_prefix <= GUIDPREFIX_TYPE(guid(0 to 2)); when SID_GAP => stage_next <= PROCESS_GAP; -- GAP Processing cnt_next <= 0; -- Start Participant Search - mem_op_start <= '1'; - mem_opcode <= SEARCH_PARTICIPANT; - mem_field_flags <= PMF_MES_SEQ_NR_FLAG; + mem_op_start <= '1'; + mem_opcode <= SEARCH_PARTICIPANT; + mem_r.field_flags <= PMF_MES_SEQ_NR_FLAG; + mem_r.guid_prefix <= GUIDPREFIX_TYPE(guid(0 to 2)); when SID_DATA => stage_next <= LATCH_SEQ_NR; -- DATA Processing cnt_next <= 0; @@ -1262,9 +1250,10 @@ begin endpoint_mask_next <= ENDPOINT_READERS; -- Start Participant Search - mem_op_start <= '1'; - mem_opcode <= SEARCH_PARTICIPANT; - mem_field_flags <= PMF_MES_SEQ_NR_FLAG or PMF_DEFAULT_IPV4_ADDR_FLAG or PMF_UDP_PORT_FLAG; + mem_op_start <= '1'; + mem_opcode <= SEARCH_PARTICIPANT; + mem_r.field_flags <= PMF_MES_SEQ_NR_FLAG or PMF_DEFAULT_IPV4_ADDR_FLAG or PMF_UDP_PORT_FLAG; + mem_r.guid_prefix <= GUIDPREFIX_TYPE(guid(0 to 2)); when others => null; end case; @@ -1367,17 +1356,18 @@ begin -- Wait for Participant Data if (mem_op_done = '1') then -- Participant in Buffer - if (mem_addr_base /= PARTICIPANT_MEMORY_MAX_ADDRESS) then - assert stable(clk, check_mask(current_pmf, PMF_MES_SEQ_NR_FLAG)) severity FAILURE; + if (participant_data.addr /= PARTICIPANT_MEMORY_MAX_ADDRESS) then + assert stable(clk, check_mask(participant_data.field_flags, PMF_MES_SEQ_NR_FLAG)) severity FAILURE; -- NOTE: Since the BuiltinParticipantMessageWriter has a History Depth of 1 (see DDSI-RTPS 2.3 8.4.13.3), we accept all newer SNs, since -- if the Writer has sent a newer SN he doesn't have the previous one anymore. -- Next Valid Sequence Number if (seq_nr >= mem_seq_nr) then - mem_op_start <= '1'; - mem_opcode <= UPDATE_PARTICIPANT; - mem_addr_update <= mem_addr_base; - mem_field_flags <= PMF_MES_SEQ_NR_FLAG; + mem_op_start <= '1'; + mem_opcode <= UPDATE_PARTICIPANT; + mem_r.addr <= participant_data.addr; + mem_r.field_flags <= PMF_MES_SEQ_NR_FLAG; + mem_r.mes_seq_nr <= next_seq_nr; -- Process Message Data stage_next <= PROCESS_MESSAGE; @@ -1532,7 +1522,7 @@ begin stage_next <= SKIP_PACKET; -- Sender known - if (mem_addr_base /= PARTICIPANT_MEMORY_MAX_ADDRESS) then + if (participant_data.addr /= PARTICIPANT_MEMORY_MAX_ADDRESS) then assert_sn; -- GAP is relevant @@ -1554,7 +1544,7 @@ begin when FIND_NEXT_VALID_IN_BITMAP => -- Memory Operation Guard if (mem_op_done = '1') then - assert stable(clk, mem_addr_base /= PARTICIPANT_MEMORY_MAX_ADDRESS) severity FAILURE; + assert stable(clk, participant_data.addr /= PARTICIPANT_MEMORY_MAX_ADDRESS) severity FAILURE; tmp_bitmap := to_slv_bitmap(bitmap_latch); @@ -1563,13 +1553,16 @@ begin -- Update next sequence number mem_op_start <= '1'; mem_opcode <= UPDATE_PARTICIPANT; - mem_addr_update <= mem_addr_base; + mem_r.addr <= participant_data.addr; if (message_type = EDP and is_subscriber = '0') then - mem_field_flags <= PMF_PUB_SEQ_NR_FLAG; + mem_r.field_flags <= PMF_PUB_SEQ_NR_FLAG; + mem_r.pub_seq_nr <= next_seq_nr; elsif (message_type = EDP and is_subscriber = '1') then - mem_field_flags <= PMF_SUB_SEQ_NR_FLAG; + mem_r.field_flags <= PMF_SUB_SEQ_NR_FLAG; + mem_r.sub_seq_nr <= next_seq_nr; else -- message_type = MESSAGE - mem_field_flags <= PMF_MES_SEQ_NR_FLAG; + mem_r.field_flags <= PMF_MES_SEQ_NR_FLAG; + mem_r.mes_seq_nr <= next_seq_nr; end if; -- DONE stage_next <= SKIP_PACKET; @@ -1610,8 +1603,8 @@ begin -- Wait for Participant Search to finish if (mem_op_done = '1') then -- Participant in Buffer - if (mem_addr_base /= PARTICIPANT_MEMORY_MAX_ADDRESS) then - assert stable(clk, check_mask(current_pmf, PMF_HEARTBEAT_RES_TIME_FLAG)) severity FAILURE; + if (participant_data.addr /= PARTICIPANT_MEMORY_MAX_ADDRESS) then + assert stable(clk, check_mask(participant_data.field_flags, PMF_HEARTBEAT_RES_TIME_FLAG)) severity FAILURE; assert_sn; -- No scheduled Heartbeat Response @@ -1619,50 +1612,56 @@ begin -- If current Sequence Number obsolete (removed from source history cache) if (first_seq_nr > mem_seq_nr) then -- Store new expected Sequence Number and set Response Dealy - mem_op_start <= '1'; - mem_opcode <= UPDATE_PARTICIPANT; - mem_addr_update <= mem_addr_base; - next_seq_nr_next <= first_seq_nr; + mem_op_start <= '1'; + mem_opcode <= UPDATE_PARTICIPANT; + mem_r.addr <= participant_data.addr; + if (message_type = EDP and is_subscriber = '0') then - mem_field_flags <= PMF_PUB_SEQ_NR_FLAG or PMF_HEARTBEAT_RES_TIME_FLAG; + mem_r.field_flags <= PMF_PUB_SEQ_NR_FLAG or PMF_HEARTBEAT_RES_TIME_FLAG; + mem_r.pub_seq_nr <= first_seq_nr; elsif (message_type = EDP and is_subscriber = '1') then - mem_field_flags <= PMF_SUB_SEQ_NR_FLAG or PMF_HEARTBEAT_RES_TIME_FLAG; + mem_r.field_flags <= PMF_SUB_SEQ_NR_FLAG or PMF_HEARTBEAT_RES_TIME_FLAG; + mem_r.sub_seq_nr <= first_seq_nr; else -- message_type = MESSAGE - mem_field_flags <= PMF_MES_SEQ_NR_FLAG or PMF_HEARTBEAT_RES_TIME_FLAG; + mem_r.field_flags <= PMF_MES_SEQ_NR_FLAG or PMF_HEARTBEAT_RES_TIME_FLAG; + mem_r.mes_seq_nr <= first_seq_nr; end if; -- NOTE: Only response with ACKNACK if SN is available (Or no Final Flag) if (PARTICIPANT_HEARTBEAT_RESPONSE_DELAY /= DURATION_INFINITE and (first_seq_nr <= last_seq_nr or final_flag = '0')) then tmp_dw := time + PARTICIPANT_HEARTBEAT_RESPONSE_DELAY; - res_time <= tmp_dw; + mem_r.heartbeat_res_time <= tmp_dw; + mem_r.acknack_res_time <= tmp_dw; -- NOTE: Last Bit denotes if this is Response or Suppression Delay - res_time(1)(0) <= '0'; + mem_r.heartbeat_res_time(1)(0) <= '0'; + mem_r.acknack_res_time(1)(0) <= '0'; -- XXX: Possible Worst Case Path (64-bit addition and comparison in same clock) -- Update Check Time if (tmp_dw < check_time) then check_time_next <= tmp_dw; end if; else - res_time <= TIME_INVALID; + mem_r.heartbeat_res_time <= TIME_INVALID; + mem_r.acknack_res_time <= TIME_INVALID; end if; -- If new Sequence Number is available or Writer expects ACKNACK elsif (last_seq_nr >= mem_seq_nr or final_flag = '0') then -- Set Response Delay - mem_op_start <= '1'; - mem_opcode <= UPDATE_PARTICIPANT; - mem_addr_update <= mem_addr_base; - mem_field_flags <= PMF_HEARTBEAT_RES_TIME_FLAG; + mem_op_start <= '1'; + mem_opcode <= UPDATE_PARTICIPANT; + mem_r.addr <= participant_data.addr; + mem_r.field_flags <= PMF_HEARTBEAT_RES_TIME_FLAG; if (PARTICIPANT_HEARTBEAT_RESPONSE_DELAY /= DURATION_INFINITE) then - tmp_dw := time + PARTICIPANT_HEARTBEAT_RESPONSE_DELAY; - res_time <= tmp_dw; + tmp_dw := time + PARTICIPANT_HEARTBEAT_RESPONSE_DELAY; + mem_r.heartbeat_res_time <= tmp_dw; -- NOTE: Last Bit denotes if this is Response or Suppression Delay - res_time(1)(0) <= '0'; + mem_r.heartbeat_res_time(1)(0) <= '0'; -- XXX: Possible Worst Case Path (64-bit addition and comparison in same clock) -- Update Check Time if (tmp_dw < check_time) then check_time_next <= tmp_dw; end if; else - res_time <= TIME_INVALID; + mem_r.heartbeat_res_time <= TIME_INVALID; end if; end if; -- Currently in Heartbeat Response Delay @@ -1670,16 +1669,18 @@ begin -- If current Sequence Number obsolete (removed from source history cache) if (first_seq_nr > mem_seq_nr) then -- Store new expected Sequence Number - mem_op_start <= '1'; - mem_opcode <= UPDATE_PARTICIPANT; - mem_addr_update <= mem_addr_base; - next_seq_nr_next <= first_seq_nr; + mem_op_start <= '1'; + mem_opcode <= UPDATE_PARTICIPANT; + mem_r.addr <= participant_data.addr; if (message_type = EDP and is_subscriber = '0') then - mem_field_flags <= PMF_PUB_SEQ_NR_FLAG; + mem_r.field_flags <= PMF_PUB_SEQ_NR_FLAG; + mem_r.pub_seq_nr <= first_seq_nr; elsif (message_type = EDP and is_subscriber = '1') then - mem_field_flags <= PMF_SUB_SEQ_NR_FLAG; + mem_r.field_flags <= PMF_SUB_SEQ_NR_FLAG; + mem_r.sub_seq_nr <= first_seq_nr; else -- message_type = MESSAGE - mem_field_flags <= PMF_MES_SEQ_NR_FLAG; + mem_r.field_flags <= PMF_MES_SEQ_NR_FLAG; + mem_r.mes_seq_nr <= first_seq_nr; end if; end if; end if; @@ -1714,8 +1715,8 @@ begin -- Wait for Participant Search to finish if (mem_op_done = '1') then -- Participant in Buffer - if (mem_addr_base /= PARTICIPANT_MEMORY_MAX_ADDRESS) then - assert stable(clk, check_mask(current_pmf, PMF_ACKNACK_RES_TIME_FLAG or PMF_EXTRA_FLAGS_FLAG)) severity FAILURE; + if (participant_data.addr /= PARTICIPANT_MEMORY_MAX_ADDRESS) then + assert stable(clk, check_mask(participant_data.field_flags, PMF_ACKNACK_RES_TIME_FLAG or PMF_EXTRA_FLAGS_FLAG)) severity FAILURE; -- No scheduled Acknack Response if (participant_data.acknack_res_time = TIME_INVALID) then @@ -1726,23 +1727,24 @@ begin -- If Reader has not ACKed all Publisher History Cache if (first_seq_nr <= PUB_SEQUENCENUMBER) then -- Set Acknack Response Time and Publisher Data as Acknack Response - mem_op_start <= '1'; - mem_opcode <= UPDATE_PARTICIPANT; - mem_addr_update <= mem_addr_base; - mem_field_flags <= PMF_EXTRA_FLAGS_FLAG or PMF_ACKNACK_RES_TIME_FLAG; + mem_op_start <= '1'; + mem_opcode <= UPDATE_PARTICIPANT; + mem_r.addr <= participant_data.addr; + mem_r.field_flags <= PMF_EXTRA_FLAGS_FLAG or PMF_ACKNACK_RES_TIME_FLAG; if (PARTICIPANT_ACKNACK_RESPONSE_DELAY /= DURATION_INFINITE) then tmp_dw := time + PARTICIPANT_ACKNACK_RESPONSE_DELAY; - res_time <= tmp_dw; + mem_r.acknack_res_time <= tmp_dw; -- NOTE: Last Bit denotes if this is Response or Suppression Delay - res_time(1)(0) <= '0'; - extra_flags <= participant_data.extra_flags or EF_PUB_DATA_FLAG; + mem_r.acknack_res_time(1)(0) <= '0'; + mem_r.extra_flags <= participant_data.extra_flags or EF_PUB_DATA_FLAG; -- XXX: Possible Worst Case Path (64-bit addition and comparison in same clock) -- Update Check Time if (tmp_dw < check_time) then check_time_next <= tmp_dw; end if; else - res_time <= TIME_INVALID; + mem_r.acknack_res_time <= TIME_INVALID; + mem_r.extra_flags <= participant_data.extra_flags; end if; end if; -- Publisher Acknack @@ -1750,23 +1752,24 @@ begin -- If Reader has not ACKed all Subscriber History Cache if (first_seq_nr <= SUB_SEQUENCENUMBER) then -- Set Acknack Response Time and set Subscriber Data as Acknack Response - mem_op_start <= '1'; - mem_opcode <= UPDATE_PARTICIPANT; - mem_addr_update <= mem_addr_base; - mem_field_flags <= PMF_EXTRA_FLAGS_FLAG or PMF_ACKNACK_RES_TIME_FLAG; + mem_op_start <= '1'; + mem_opcode <= UPDATE_PARTICIPANT; + mem_r.addr <= participant_data.addr; + mem_r.field_flags <= PMF_EXTRA_FLAGS_FLAG or PMF_ACKNACK_RES_TIME_FLAG; if (PARTICIPANT_ACKNACK_RESPONSE_DELAY /= DURATION_INFINITE) then tmp_dw := time + PARTICIPANT_ACKNACK_RESPONSE_DELAY; - res_time <= tmp_dw; + mem_r.acknack_res_time <= tmp_dw; -- NOTE: Last Bit denotes if this is Response or Suppression Delay - res_time(1)(0) <= '0'; - extra_flags <= participant_data.extra_flags or EF_SUB_DATA_FLAG; + mem_r.acknack_res_time(1)(0) <= '0'; + mem_r.extra_flags <= participant_data.extra_flags or EF_SUB_DATA_FLAG; -- XXX: Possible Worst Case Path (64-bit addition and comparison in same clock) -- Update Check Time if (tmp_dw < check_time) then check_time_next <= tmp_dw; end if; else - res_time <= TIME_INVALID; + mem_r.acknack_res_time <= TIME_INVALID; + mem_r.extra_flags <= participant_data.extra_flags; end if; end if; end if; @@ -1776,23 +1779,24 @@ begin -- If Reader has not ACKed all Message History Cache if (first_seq_nr <= auto_live_seq_nr) then -- Set Acknack Response Time and set Message Data as Acknack Response - mem_op_start <= '1'; - mem_opcode <= UPDATE_PARTICIPANT; - mem_addr_update <= mem_addr_base; - mem_field_flags <= PMF_EXTRA_FLAGS_FLAG or PMF_ACKNACK_RES_TIME_FLAG; + mem_op_start <= '1'; + mem_opcode <= UPDATE_PARTICIPANT; + mem_r.addr <= participant_data.addr; + mem_r.field_flags <= PMF_EXTRA_FLAGS_FLAG or PMF_ACKNACK_RES_TIME_FLAG; if (PARTICIPANT_ACKNACK_RESPONSE_DELAY /= DURATION_INFINITE) then tmp_dw := time + PARTICIPANT_ACKNACK_RESPONSE_DELAY; - res_time <= tmp_dw; + mem_r.acknack_res_time <= tmp_dw; -- NOTE: Last Bit denotes if this is Response or Suppression Delay - res_time(1)(0) <= '0'; - extra_flags <= participant_data.extra_flags or EF_MES_DATA_FLAG; + mem_r.acknack_res_time(1)(0) <= '0'; + mem_r.extra_flags <= participant_data.extra_flags or EF_MES_DATA_FLAG; -- XXX: Possible Worst Case Path (64-bit addition and comparison in same clock) -- Update Check Time if (tmp_dw < check_time) then check_time_next <= tmp_dw; end if; else - res_time <= TIME_INVALID; + mem_r.acknack_res_time <= TIME_INVALID; + mem_r.extra_flags <= participant_data.extra_flags; end if; end if; when others => @@ -1809,11 +1813,11 @@ begin -- If Reader has not ACKed all Publisher History Cache if (first_seq_nr <= PUB_SEQUENCENUMBER) then -- Set Publisher Data as Acknack Response - mem_op_start <= '1'; - mem_opcode <= UPDATE_PARTICIPANT; - mem_addr_update <= mem_addr_base; - mem_field_flags <= PMF_EXTRA_FLAGS_FLAG; - extra_flags <= participant_data.extra_flags or EF_PUB_DATA_FLAG; + mem_op_start <= '1'; + mem_opcode <= UPDATE_PARTICIPANT; + mem_r.addr <= participant_data.addr; + mem_r.field_flags <= PMF_EXTRA_FLAGS_FLAG; + mem_r.extra_flags <= participant_data.extra_flags or EF_PUB_DATA_FLAG; end if; end if; -- Publisher Acknack @@ -1823,11 +1827,11 @@ begin -- If Reader has not ACKed all Subscriber History Cache if (first_seq_nr <= SUB_SEQUENCENUMBER) then -- Set Subscriber Data as Acknack Response - mem_op_start <= '1'; - mem_opcode <= UPDATE_PARTICIPANT; - mem_addr_update <= mem_addr_base; - mem_field_flags <= PMF_EXTRA_FLAGS_FLAG; - extra_flags <= participant_data.extra_flags or EF_SUB_DATA_FLAG; + mem_op_start <= '1'; + mem_opcode <= UPDATE_PARTICIPANT; + mem_r.addr <= participant_data.addr; + mem_r.field_flags <= PMF_EXTRA_FLAGS_FLAG; + mem_r.extra_flags <= participant_data.extra_flags or EF_SUB_DATA_FLAG; end if; end if; end if; @@ -1840,11 +1844,11 @@ begin -- If Reader has not ACKed all Message History Cache if (first_seq_nr <= auto_live_seq_nr) then -- Set Message Data as Acknack Response - mem_op_start <= '1'; - mem_opcode <= UPDATE_PARTICIPANT; - mem_addr_update <= mem_addr_base; - mem_field_flags <= PMF_EXTRA_FLAGS_FLAG; - extra_flags <= participant_data.extra_flags or EF_MES_DATA_FLAG; + mem_op_start <= '1'; + mem_opcode <= UPDATE_PARTICIPANT; + mem_r.addr <= participant_data.addr; + mem_r.field_flags <= PMF_EXTRA_FLAGS_FLAG; + mem_r.extra_flags <= participant_data.extra_flags or EF_MES_DATA_FLAG; end if; end if; when others => @@ -1859,7 +1863,7 @@ begin -- Wait for Next Participant to be Fetched if (mem_op_done = '1') then -- No more Participants - if (mem_addr_base = PARTICIPANT_MEMORY_MAX_ADDRESS) then + if (participant_data.addr = PARTICIPANT_MEMORY_MAX_ADDRESS) then -- Reset is_live_assert_next <= '0'; @@ -1879,22 +1883,22 @@ begin case (cnt) is -- GET NEXT PARTICIPANT when 0 => - mem_op_start <= '1'; - mem_opcode <= GET_NEXT_PARTICIPANT; - mem_addr_update <= mem_addr_base; - mem_field_flags <= PMF_LEASE_DEADLINE_FLAG or PMF_ACKNACK_RES_TIME_FLAG or PMF_HEARTBEAT_RES_TIME_FLAG; - cnt_next <= cnt + 2; + mem_op_start <= '1'; + mem_opcode <= GET_NEXT_PARTICIPANT; + mem_r.addr <= participant_data.addr; + mem_r.field_flags <= PMF_LEASE_DEADLINE_FLAG or PMF_ACKNACK_RES_TIME_FLAG or PMF_HEARTBEAT_RES_TIME_FLAG; + cnt_next <= cnt + 2; -- GET PARTICIPANT when 1 => - mem_op_start <= '1'; - mem_opcode <= GET_PARTICIPANT; - mem_addr_update <= mem_addr_base; - mem_field_flags <= PMF_LEASE_DEADLINE_FLAG or PMF_ACKNACK_RES_TIME_FLAG or PMF_HEARTBEAT_RES_TIME_FLAG; - cnt_next <= cnt + 1; + mem_op_start <= '1'; + mem_opcode <= GET_PARTICIPANT; + mem_r.addr <= participant_data.addr; + mem_r.field_flags <= PMF_LEASE_DEADLINE_FLAG or PMF_ACKNACK_RES_TIME_FLAG or PMF_HEARTBEAT_RES_TIME_FLAG; + cnt_next <= cnt + 1; -- EXIT CONDITION when 2 => -- No More Participants - if (mem_addr_base = PARTICIPANT_MEMORY_MAX_ADDRESS) then + if (participant_data.addr = PARTICIPANT_MEMORY_MAX_ADDRESS) then -- Reset stale_check_next <= '0'; -- DONE @@ -1905,16 +1909,16 @@ begin end if; -- LEASE DEADLINE when 3 => - assert stable(clk, check_mask(current_pmf, PMF_LEASE_DEADLINE_FLAG)) severity FAILURE; - assert stable(clk, mem_addr_base /= PARTICIPANT_MEMORY_MAX_ADDRESS) severity FAILURE; + assert stable(clk, check_mask(participant_data.field_flags, PMF_LEASE_DEADLINE_FLAG)) severity FAILURE; + assert stable(clk, participant_data.addr /= PARTICIPANT_MEMORY_MAX_ADDRESS) severity FAILURE; -- Lease Expiration if (participant_data.lease_deadline /= TIME_INVALID and participant_data.lease_deadline <= time) then - mem_op_start <= '1'; - mem_opcode <= GET_PARTICIPANT; - mem_addr_update <= mem_addr_base; - mem_field_flags <= PMF_GUIDPREFIX_FLAG; - cnt_next <= 6; -- HELPER STAGE + mem_op_start <= '1'; + mem_opcode <= GET_PARTICIPANT; + mem_r.addr <= mem_addr_base; + mem_r.field_flags <= PMF_GUIDPREFIX_FLAG; + cnt_next <= 6; -- HELPER STAGE else -- Check Next Field cnt_next <= cnt + 1; @@ -1926,24 +1930,24 @@ begin end if; -- HEARTBEAT RESPONSE TIME when 4 => - assert stable(clk, check_mask(current_pmf, PMF_HEARTBEAT_RES_TIME_FLAG)) severity FAILURE; - assert stable(clk, mem_addr_base /= PARTICIPANT_MEMORY_MAX_ADDRESS) severity FAILURE; + assert stable(clk, check_mask(participant_data.field_flags, PMF_HEARTBEAT_RES_TIME_FLAG)) severity FAILURE; + assert stable(clk, participant_data.addr /= PARTICIPANT_MEMORY_MAX_ADDRESS) severity FAILURE; -- HEARTBEAT Response Time Passed if (participant_data.heartbeat_res_time /= TIME_INVALID and participant_data.heartbeat_res_time <= time) then -- Suppression Delay if (participant_data.heartbeat_res_time(1)(0) = '1') then - mem_op_start <= '1'; - mem_opcode <= UPDATE_PARTICIPANT; - mem_addr_update <= mem_addr_base; - mem_field_flags <= PMF_HEARTBEAT_RES_TIME_FLAG; - res_time <= TIME_INVALID; + mem_op_start <= '1'; + mem_opcode <= UPDATE_PARTICIPANT; + mem_r.addr <= participant_data.addr; + mem_r.field_flags <= PMF_HEARTBEAT_RES_TIME_FLAG; + mem_r.heartbeat_res_time <= TIME_INVALID; -- Response Delay else - mem_op_start <= '1'; - mem_opcode <= GET_PARTICIPANT; - mem_addr_update <= mem_addr_base; - mem_field_flags <= PMF_META_IPV4_ADDR_FLAG or PMF_UDP_PORT_FLAG or PMF_PUB_SEQ_NR_FLAG or PMF_SUB_SEQ_NR_FLAG or PMF_MES_SEQ_NR_FLAG; + mem_op_start <= '1'; + mem_opcode <= GET_PARTICIPANT; + mem_r.addr <= participant_data.addr; + mem_r.field_flags <= PMF_META_IPV4_ADDR_FLAG or PMF_UDP_PORT_FLAG or PMF_PUB_SEQ_NR_FLAG or PMF_SUB_SEQ_NR_FLAG or PMF_MES_SEQ_NR_FLAG; -- Send ACKNACK stage_next <= SEND_HEADER; @@ -1963,24 +1967,24 @@ begin end if; -- ACKNACK RESPONSE TIME when 5 => - assert stable(clk, check_mask(current_pmf, PMF_ACKNACK_RES_TIME_FLAG)) severity FAILURE; - assert stable(clk, mem_addr_base /= PARTICIPANT_MEMORY_MAX_ADDRESS) severity FAILURE; + assert stable(clk, check_mask(participant_data.field_flags, PMF_ACKNACK_RES_TIME_FLAG)) severity FAILURE; + assert stable(clk, participant_data.addr /= PARTICIPANT_MEMORY_MAX_ADDRESS) severity FAILURE; -- ACKNACK Response Time Passed if (participant_data.acknack_res_time /= TIME_INVALID and participant_data.acknack_res_time <= time) then -- Suppression Delay if (participant_data.acknack_res_time(1)(0) = '1') then - mem_op_start <= '1'; - mem_opcode <= UPDATE_PARTICIPANT; - mem_addr_update <= mem_addr_base; - mem_field_flags <= PMF_ACKNACK_RES_TIME_FLAG; - res_time <= TIME_INVALID; + mem_op_start <= '1'; + mem_opcode <= UPDATE_PARTICIPANT; + mem_r.addr <= participant_data.addr; + mem_r.field_flags <= PMF_ACKNACK_RES_TIME_FLAG; + mem_r.acknack_res_time <= TIME_INVALID; -- Response Delay else - mem_op_start <= '1'; - mem_opcode <= GET_PARTICIPANT; - mem_addr_update <= mem_addr_base; - mem_field_flags <= PMF_META_IPV4_ADDR_FLAG or PMF_UDP_PORT_FLAG or PMF_EXTRA_FLAGS_FLAG; + mem_op_start <= '1'; + mem_opcode <= GET_PARTICIPANT; + mem_r.addr <= participant_data.addr; + mem_r.field_flags <= PMF_META_IPV4_ADDR_FLAG or PMF_UDP_PORT_FLAG or PMF_EXTRA_FLAGS_FLAG; -- Send Requested Data stage_next <= SEND_HEADER; @@ -1996,35 +2000,36 @@ begin check_time_next <= participant_data.acknack_res_time; end if; end if; - -- HELPER STAGE (Lacthes Participant GUID for removal) + -- HELPER STAGE (Lacthes Participant GUID for participant Unmatching) when 6 => - assert stable(clk, check_mask(current_pmf, PMF_GUIDPREFIX_FLAG)) severity FAILURE; + assert stable(clk, check_mask(participant_data.field_flags, PMF_GUIDPREFIX_FLAG)) severity FAILURE; -- Latch GUID Prefix guid_next(0) <= participant_data.guid_prefix(0); guid_next(1) <= participant_data.guid_prefix(1); guid_next(2) <= participant_data.guid_prefix(2); + -- Remove Participant mem_op_start <= '1'; mem_opcode <= REMOVE_PARTICIPANT; - mem_addr_update <= mem_addr_base; + mem_r.addr <= mem_addr_base; stage_next <= INFORM_ENDPOINTS_PARTICIPANT_UNMATCH; cnt_next <= 0; -- POST-ACKNACK-SENT when 7 => - mem_op_start <= '1'; - mem_opcode <= UPDATE_PARTICIPANT; - mem_addr_update <= mem_addr_base; - mem_field_flags <= PMF_HEARTBEAT_RES_TIME_FLAG; + mem_op_start <= '1'; + mem_opcode <= UPDATE_PARTICIPANT; + mem_r.addr <= participant_data.addr; + mem_r.field_flags <= PMF_HEARTBEAT_RES_TIME_FLAG; if (PARTICIPANT_HEARTBEAT_SUPPRESSION_DELAY /= DURATION_ZERO and PARTICIPANT_HEARTBEAT_SUPPRESSION_DELAY /= DURATION_INFINITE) then -- Set Heartbeat Suppression Time - res_time <= time + PARTICIPANT_HEARTBEAT_SUPPRESSION_DELAY; + mem_r.heartbeat_res_time <= time + PARTICIPANT_HEARTBEAT_SUPPRESSION_DELAY; -- NOTE: Last Bit denotes if this is Response or Suppression Delay - res_time(1)(0) <= '1'; + mem_r.heartbeat_res_time(1)(0) <= '1'; else -- Reset - res_time <= TIME_INVALID; + mem_r.heartbeat_res_time <= TIME_INVALID; end if; -- NOTE: The HEARTBEAT Time is re-checked in order to update the check_time @@ -2032,21 +2037,21 @@ begin cnt_next <= 4; -- CHECK HERTBEAT Response Time -- POST-DATA-SENT when 8 => - assert stable(clk, check_mask(current_pmf, PMF_EXTRA_FLAGS_FLAG)) severity FAILURE; + assert stable(clk, check_mask(participant_data.field_flags, PMF_EXTRA_FLAGS_FLAG)) severity FAILURE; - mem_op_start <= '1'; - mem_opcode <= UPDATE_PARTICIPANT; - mem_addr_update <= mem_addr_base; - mem_field_flags <= PMF_ACKNACK_RES_TIME_FLAG or PMF_EXTRA_FLAGS_FLAG; - extra_flags <= participant_data.extra_flags and (not (EF_PUB_DATA_FLAG or EF_SUB_DATA_FLAG or EF_MES_DATA_FLAG)); + mem_op_start <= '1'; + mem_opcode <= UPDATE_PARTICIPANT; + mem_r.addr <= participant_data.addr; + mem_r.field_flags <= PMF_ACKNACK_RES_TIME_FLAG or PMF_EXTRA_FLAGS_FLAG; + mem_r.extra_flags <= participant_data.extra_flags and (not (EF_PUB_DATA_FLAG or EF_SUB_DATA_FLAG or EF_MES_DATA_FLAG)); if (PARTICIPANT_ACKNACK_SUPPRESSION_DELAY /= DURATION_ZERO and PARTICIPANT_ACKNACK_SUPPRESSION_DELAY /= DURATION_INFINITE) then -- Set Acknack Suppression Time - res_time <= time + PARTICIPANT_ACKNACK_SUPPRESSION_DELAY; + mem_r.acknack_res_time <= time + PARTICIPANT_ACKNACK_SUPPRESSION_DELAY; -- NOTE: Last Bit denotes if this is Response or Suppression Delay - res_time(1)(0) <= '1'; + mem_r.acknack_res_time(1)(0) <= '1'; else -- Reset - res_time <= TIME_INVALID; + mem_r.acknack_res_time <= TIME_INVALID; end if; -- NOTE: The ACKNACK Time is re-checked in order to update the check_time @@ -3057,14 +3062,21 @@ begin -- Wait for Participant Search to finish if (mem_op_done = '1') then -- Participant not in Buffer - if (mem_addr_base = PARTICIPANT_MEMORY_MAX_ADDRESS) then + if (participant_data.addr = PARTICIPANT_MEMORY_MAX_ADDRESS) then -- Participant Match if (message_type = PDP and participant_match = '1' and mem_empty_head /= PARTICIPANT_MEMORY_MAX_ADDRESS) then -- Add participant in buffer mem_op_start <= '1'; mem_opcode <= INSERT_PARTICIPANT; - tmp_dw := time + lease_duration; - deadline <= tmp_dw; + mem_r.guid_prefix <= GUIDPREFIX_TYPE(guid(0 to 2)); + mem_r.meta_addr <= meta_addr; + mem_r.def_addr <= def_addr; + mem_r.meta_port <= meta_port; + mem_r.def_port <= def_port; + mem_r.spdp_seq_nr <= next_seq_nr; + mem_r.lease_duration <= lease_duration; + tmp_dw := time + lease_duration; + mem_r.lease_deadline <= tmp_dw; -- XXX: Possible Worst Case Path (64-bit addition and comparison in same clock) -- Update Check Time if (tmp_dw < check_time) then @@ -3072,7 +3084,7 @@ begin end if; -- DONE - stage_next <= SKIP_PACKET; + stage_next <= SKIP_PACKET; else -- Ignore all other messages, since there is no corresponding participant in the buffer. stage_next <= SKIP_PACKET; @@ -3090,19 +3102,25 @@ begin -- Remove participant from buffer mem_op_start <= '1'; mem_opcode <= REMOVE_PARTICIPANT; - mem_addr_update <= mem_addr_base; + mem_r.addr <= participant_data.addr; -- Inform ENDPOINTS stage_next <= INFORM_ENDPOINTS_PARTICIPANT_UNMATCH; cnt_next <= 0; -- Participant remains matched else -- Update Participant Data and Lease - mem_op_start <= '1'; - mem_opcode <= UPDATE_PARTICIPANT; - mem_addr_update <= mem_addr_base; - mem_field_flags <= PMF_META_IPV4_ADDR_FLAG or PMF_DEFAULT_IPV4_ADDR_FLAG or PMF_UDP_PORT_FLAG or PMF_SPDP_SEQ_NR_FLAG or PMF_LEASE_DURATION_FLAG or PMF_LEASE_DEADLINE_FLAG; - tmp_dw := time + lease_duration; - deadline <= tmp_dw; + mem_op_start <= '1'; + mem_opcode <= UPDATE_PARTICIPANT; + mem_r.addr <= participant_data.addr; + mem_r.field_flags <= PMF_META_IPV4_ADDR_FLAG or PMF_DEFAULT_IPV4_ADDR_FLAG or PMF_UDP_PORT_FLAG or PMF_SPDP_SEQ_NR_FLAG or PMF_LEASE_DURATION_FLAG or PMF_LEASE_DEADLINE_FLAG; + mem_r.meta_addr <= meta_addr; + mem_r.def_addr <= def_addr; + mem_r.meta_port <= meta_port; + mem_r.def_port <= def_port; + mem_r.spdp_seq_nr <= next_seq_nr; + mem_r.lease_duration <= lease_duration; + tmp_dw := time + lease_duration; + mem_r.lease_deadline <= tmp_dw; -- XXX: Possible Worst Case Path (64-bit addition and comparison in same clock) -- Update Check Time if (tmp_dw < check_time) then @@ -3114,12 +3132,12 @@ begin -- Old Sequence Number else -- Update Lease - mem_op_start <= '1'; - mem_opcode <= UPDATE_PARTICIPANT; - mem_addr_update <= mem_addr_base; - mem_field_flags <= PMF_LEASE_DEADLINE_FLAG; - tmp_dw := time + lease_duration; - deadline <= tmp_dw; + mem_op_start <= '1'; + mem_opcode <= UPDATE_PARTICIPANT; + mem_r.addr <= participant_data.addr; + mem_r.field_flags <= PMF_LEASE_DEADLINE_FLAG; + tmp_dw := time + lease_duration; + mem_r.lease_deadline <= tmp_dw; -- XXX: Possible Worst Case Path (64-bit addition and comparison in same clock) -- Update Check Time if (tmp_dw < check_time) then @@ -3136,11 +3154,13 @@ begin -- Store new Sequence Number mem_op_start <= '1'; mem_opcode <= UPDATE_PARTICIPANT; - mem_addr_update <= mem_addr_base; + mem_r.addr <= participant_data.addr; if (is_subscriber = '0') then - mem_field_flags <= PMF_PUB_SEQ_NR_FLAG; + mem_r.field_flags <= PMF_PUB_SEQ_NR_FLAG; + mem_r.pub_seq_nr <= next_seq_nr; else - mem_field_flags <= PMF_SUB_SEQ_NR_FLAG; + mem_r.field_flags <= PMF_SUB_SEQ_NR_FLAG; + mem_r.sub_seq_nr <= next_seq_nr; end if; -- At least one local Endpoint match @@ -3165,8 +3185,8 @@ begin -- Wait for Participant Data if (mem_op_done = '1') then - assert stable(clk, mem_addr_base /= PARTICIPANT_MEMORY_MAX_ADDRESS) severity FAILURE; - assert stable(clk, check_mask(current_pmf, PMF_DEFAULT_IPV4_ADDR_FLAG or PMF_UDP_PORT_FLAG)) severity FAILURE; + assert stable(clk, participant_data.addr /= PARTICIPANT_MEMORY_MAX_ADDRESS) severity FAILURE; + assert stable(clk, check_mask(participant_data.field_flags, PMF_DEFAULT_IPV4_ADDR_FLAG or PMF_UDP_PORT_FLAG)) severity FAILURE; -- Output FIFO Guard if ((endpoint_mask and full_rtps) = (full_rtps'range => '0')) then @@ -3315,8 +3335,8 @@ begin -- Wait for Participant Data if (mem_op_done = '1') then if (return_stage /= SEND_PARTICIPANT_ANNOUNCEMENT) then - assert stable(clk, mem_addr_base /= PARTICIPANT_MEMORY_MAX_ADDRESS) severity FAILURE; - assert stable(clk, check_mask(current_pmf, PMF_META_IPV4_ADDR_FLAG or PMF_UDP_PORT_FLAG)) severity FAILURE; + assert stable(clk, participant_data.addr /= PARTICIPANT_MEMORY_MAX_ADDRESS) severity FAILURE; + assert stable(clk, check_mask(participant_data.field_flags, PMF_META_IPV4_ADDR_FLAG or PMF_UDP_PORT_FLAG)) severity FAILURE; end if; if (full_ro = '0') then @@ -3394,8 +3414,8 @@ begin -- Wait for Participant Data if (mem_op_done = '1') then - assert stable(clk, mem_addr_base /= PARTICIPANT_MEMORY_MAX_ADDRESS) severity FAILURE; - assert stable(clk, check_mask(current_pmf, PMF_PUB_SEQ_NR_FLAG or PMF_SUB_SEQ_NR_FLAG or PMF_MES_SEQ_NR_FLAG)) severity FAILURE; + assert stable(clk, participant_data.addr /= PARTICIPANT_MEMORY_MAX_ADDRESS) severity FAILURE; + assert stable(clk, check_mask(participant_data.field_flags, PMF_PUB_SEQ_NR_FLAG or PMF_SUB_SEQ_NR_FLAG or PMF_MES_SEQ_NR_FLAG)) severity FAILURE; if (full_ro = '0') then wr_sig <= '1'; @@ -3637,8 +3657,8 @@ begin -- Wait for Participant Data if (mem_op_done = '1') then - assert stable(clk, mem_addr_base /= PARTICIPANT_MEMORY_MAX_ADDRESS) severity FAILURE; - assert stable(clk, check_mask(current_pmf, PMF_EXTRA_FLAGS_FLAG)) severity FAILURE; + assert stable(clk, participant_data.addr /= PARTICIPANT_MEMORY_MAX_ADDRESS) severity FAILURE; + assert stable(clk, check_mask(participant_data.field_flags, PMF_EXTRA_FLAGS_FLAG)) severity FAILURE; -- If Publisher Data not scheduled for response or no Writers available, skip if (not check_mask(participant_data.extra_flags, EF_PUB_DATA_FLAG) or NUM_WRITERS = 0) then @@ -3676,8 +3696,8 @@ begin -- Wait for Participant Data if (mem_op_done = '1') then - assert stable(clk, mem_addr_base /= PARTICIPANT_MEMORY_MAX_ADDRESS) severity FAILURE; - assert stable(clk, check_mask(current_pmf, PMF_EXTRA_FLAGS_FLAG)) severity FAILURE; + assert stable(clk, participant_data.addr /= PARTICIPANT_MEMORY_MAX_ADDRESS) severity FAILURE; + assert stable(clk, check_mask(participant_data.field_flags, PMF_EXTRA_FLAGS_FLAG)) severity FAILURE; -- If Subscriber Data not scheduled for response or no Readers available, skip if (not check_mask(participant_data.extra_flags, EF_SUB_DATA_FLAG) or NUM_READERS = 0) then @@ -3882,13 +3902,13 @@ begin -- If we are in the middle of a liveliness assertion, find the next Participant destination if (is_live_assert = '1') then assert (mem_op_done = '1') severity FAILURE; - assert (mem_addr_base /= PARTICIPANT_MEMORY_MAX_ADDRESS) severity FAILURE; + assert (participant_data.addr /= PARTICIPANT_MEMORY_MAX_ADDRESS) severity FAILURE; - mem_op_start <= '1'; - mem_opcode <= GET_NEXT_PARTICIPANT; - mem_addr_update <= mem_addr_base; - mem_field_flags <= PMF_META_IPV4_ADDR_FLAG or PMF_UDP_PORT_FLAG; - stage_next <= FIND_PARTICIPANT_DEST; + mem_op_start <= '1'; + mem_opcode <= GET_NEXT_PARTICIPANT; + mem_r.addr <= participant_data.addr; + mem_r.field_flags <= PMF_META_IPV4_ADDR_FLAG or PMF_UDP_PORT_FLAG; + stage_next <= FIND_PARTICIPANT_DEST; -- Currently in Stale Check elsif (stale_check = '1') then stage_next <= PARTICIPANT_STALE_CHECK; @@ -4000,7 +4020,6 @@ begin mem_cnt_next <= mem_cnt; participant_data_next <= participant_data; participant_latch_data_next <= participant_latch_data; - current_pmf_next <= current_pmf; -- DEFAULT Unregistered mem_abort_read <= '0'; mem_ready_out <= '0'; @@ -4016,32 +4035,16 @@ begin mem_op_done <= '1'; if (mem_op_start = '1') then - -- Latch Signals needed for Mermory Operation (Use _next signals, because some signals are set in same clk) - participant_latch_data_next <= ( - guid_prefix => (guid_next(0), guid_next(1), guid_next(2)), - meta_addr => meta_addr, - def_addr => def_addr, - meta_port => meta_port, - def_port => def_port, - extra_flags => extra_flags, - lease_duration => lease_duration, - lease_deadline => deadline, - res_time => res_time, - seq_nr => next_seq_nr_next, - field_flags => mem_field_flags - ); + -- Latch Signals needed for Mermory Operation + participant_latch_data_next <= mem_r; case(mem_opcode) is when SEARCH_PARTICIPANT => -- Reset Data participant_data_next <= ZERO_PARTICIPANT_DATA; - current_pmf_next <= (others => '0'); - -- Memory Empty - if (mem_occupied_head = PARTICIPANT_MEMORY_MAX_ADDRESS) then - mem_addr_base_next <= PARTICIPANT_MEMORY_MAX_ADDRESS; - else + if (mem_occupied_head /= PARTICIPANT_MEMORY_MAX_ADDRESS) then mem_addr_base_next <= mem_occupied_head; mem_stage_next <= SEARCH_PARTICIPANT; mem_cnt_next <= 0; @@ -4051,48 +4054,46 @@ begin -- Reset Data participant_data_next <= ZERO_PARTICIPANT_DATA; - current_pmf_next <= (others => '0'); + participant_data_next.addr <= mem_empty_head; mem_addr_base_next <= mem_empty_head; mem_stage_next <= INSERT_PARTICIPANT; mem_cnt_next <= 0; when UPDATE_PARTICIPANT => - if (mem_addr_update = PARTICIPANT_MEMORY_MAX_ADDRESS) then + if (mem_r.addr = PARTICIPANT_MEMORY_MAX_ADDRESS) then -- Reset Data participant_data_next <= ZERO_PARTICIPANT_DATA; - current_pmf_next <= (others => '0'); - mem_addr_base_next <= PARTICIPANT_MEMORY_MAX_ADDRESS; else - if (mem_addr_update /= mem_addr_base) then + if (mem_r.addr /= participant_data.addr) then participant_data_next <= ZERO_PARTICIPANT_DATA; - current_pmf_next <= (others => '0'); end if; - mem_addr_base_next <= mem_addr_update; + participant_data_next.addr <= mem_r.addr; + mem_addr_base_next <= mem_r.addr; mem_stage_next <= UPDATE_PARTICIPANT; - if check_mask(mem_field_flags,PMF_META_IPV4_ADDR_FLAG) then + if check_mask(mem_r.field_flags,PMF_META_IPV4_ADDR_FLAG) then mem_cnt_next <= 0; - elsif check_mask(mem_field_flags,PMF_DEFAULT_IPV4_ADDR_FLAG) then + elsif check_mask(mem_r.field_flags,PMF_DEFAULT_IPV4_ADDR_FLAG) then mem_cnt_next <= 1; - elsif check_mask(mem_field_flags,PMF_UDP_PORT_FLAG) then + elsif check_mask(mem_r.field_flags,PMF_UDP_PORT_FLAG) then mem_cnt_next <= 2; - elsif check_mask(mem_field_flags,PMF_SPDP_SEQ_NR_FLAG) then + elsif check_mask(mem_r.field_flags,PMF_SPDP_SEQ_NR_FLAG) then mem_cnt_next <= 3; - elsif check_mask(mem_field_flags,PMF_LEASE_DURATION_FLAG) then + elsif check_mask(mem_r.field_flags,PMF_LEASE_DURATION_FLAG) then mem_cnt_next <= 5; - elsif check_mask(mem_field_flags,PMF_LEASE_DEADLINE_FLAG) then + elsif check_mask(mem_r.field_flags,PMF_LEASE_DEADLINE_FLAG) then mem_cnt_next <= 7; - elsif check_mask(mem_field_flags,PMF_EXTRA_FLAGS_FLAG) then + elsif check_mask(mem_r.field_flags,PMF_EXTRA_FLAGS_FLAG) then mem_cnt_next <= 9; - elsif check_mask(mem_field_flags,PMF_ACKNACK_RES_TIME_FLAG) then + elsif check_mask(mem_r.field_flags,PMF_ACKNACK_RES_TIME_FLAG) then mem_cnt_next <= 10; - elsif check_mask(mem_field_flags,PMF_HEARTBEAT_RES_TIME_FLAG) then + elsif check_mask(mem_r.field_flags,PMF_HEARTBEAT_RES_TIME_FLAG) then mem_cnt_next <= 12; - elsif check_mask(mem_field_flags,PMF_PUB_SEQ_NR_FLAG) then + elsif check_mask(mem_r.field_flags,PMF_PUB_SEQ_NR_FLAG) then mem_cnt_next <= 14; - elsif check_mask(mem_field_flags,PMF_SUB_SEQ_NR_FLAG) then + elsif check_mask(mem_r.field_flags,PMF_SUB_SEQ_NR_FLAG) then mem_cnt_next <= 16; - elsif check_mask(mem_field_flags,PMF_MES_SEQ_NR_FLAG) then + elsif check_mask(mem_r.field_flags,PMF_MES_SEQ_NR_FLAG) then mem_cnt_next <= 18; else -- DONE @@ -4102,66 +4103,58 @@ begin when REMOVE_PARTICIPANT => -- Reset participant_data_next <= ZERO_PARTICIPANT_DATA; - current_pmf_next <= (others => '0'); - if (mem_addr_update = PARTICIPANT_MEMORY_MAX_ADDRESS) then - mem_addr_base_next <= PARTICIPANT_MEMORY_MAX_ADDRESS; - else - mem_addr_base_next <= mem_addr_update; + if (mem_r.addr /= PARTICIPANT_MEMORY_MAX_ADDRESS) then + mem_addr_base_next <= mem_r.addr; mem_stage_next <= REMOVE_PARTICIPANT; mem_cnt_next <= 0; end if; when GET_NEXT_PARTICIPANT => -- Reset participant_data_next <= ZERO_PARTICIPANT_DATA; - current_pmf_next <= (others => '0'); - if (mem_addr_update = PARTICIPANT_MEMORY_MAX_ADDRESS) then - mem_addr_base_next <= PARTICIPANT_MEMORY_MAX_ADDRESS; - else - mem_addr_base_next <= mem_addr_update; + if (mem_r.addr /= PARTICIPANT_MEMORY_MAX_ADDRESS) then + mem_addr_base_next <= mem_r.addr; mem_stage_next <= GET_NEXT_PARTICIPANT; mem_cnt_next <= 0; end if; when GET_PARTICIPANT => - if (mem_addr_update = PARTICIPANT_MEMORY_MAX_ADDRESS) then + if (mem_r.addr = PARTICIPANT_MEMORY_MAX_ADDRESS) then -- Reset Data participant_data_next <= ZERO_PARTICIPANT_DATA; - current_pmf_next <= (others => '0'); - mem_addr_base_next <= PARTICIPANT_MEMORY_MAX_ADDRESS; else - if (mem_addr_update /= mem_addr_base) then + if (mem_r.addr /= participant_data.addr) then participant_data_next <= ZERO_PARTICIPANT_DATA; - current_pmf_next <= (others => '0'); end if; + participant_data_next.addr <= mem_r.addr; - mem_addr_base_next <= mem_addr_update; + mem_addr_base_next <= mem_r.addr; mem_stage_next <= GET_PARTICIPANT_DATA; - if check_mask(mem_field_flags,PMF_GUIDPREFIX_FLAG) then + if check_mask(mem_r.field_flags,PMF_GUIDPREFIX_FLAG) then mem_cnt_next <= 0; - elsif check_mask(mem_field_flags,PMF_META_IPV4_ADDR_FLAG) then + elsif check_mask(mem_r.field_flags,PMF_META_IPV4_ADDR_FLAG) then mem_cnt_next <= 3; - elsif check_mask(mem_field_flags,PMF_DEFAULT_IPV4_ADDR_FLAG) then + elsif check_mask(mem_r.field_flags,PMF_DEFAULT_IPV4_ADDR_FLAG) then mem_cnt_next <= 4; - elsif check_mask(mem_field_flags,PMF_UDP_PORT_FLAG) then + elsif check_mask(mem_r.field_flags,PMF_UDP_PORT_FLAG) then mem_cnt_next <= 5; - elsif check_mask(mem_field_flags,PMF_SPDP_SEQ_NR_FLAG) then + elsif check_mask(mem_r.field_flags,PMF_SPDP_SEQ_NR_FLAG) then mem_cnt_next <= 6; - elsif check_mask(mem_field_flags,PMF_LEASE_DURATION_FLAG) then + elsif check_mask(mem_r.field_flags,PMF_LEASE_DURATION_FLAG) then mem_cnt_next <= 8; - elsif check_mask(mem_field_flags,PMF_LEASE_DEADLINE_FLAG) then + elsif check_mask(mem_r.field_flags,PMF_LEASE_DEADLINE_FLAG) then mem_cnt_next <= 10; - elsif check_mask(mem_field_flags,PMF_EXTRA_FLAGS_FLAG) then + elsif check_mask(mem_r.field_flags,PMF_EXTRA_FLAGS_FLAG) then mem_cnt_next <= 12; - elsif check_mask(mem_field_flags,PMF_ACKNACK_RES_TIME_FLAG) then + elsif check_mask(mem_r.field_flags,PMF_ACKNACK_RES_TIME_FLAG) then mem_cnt_next <= 13; - elsif check_mask(mem_field_flags,PMF_HEARTBEAT_RES_TIME_FLAG) then + elsif check_mask(mem_r.field_flags,PMF_HEARTBEAT_RES_TIME_FLAG) then mem_cnt_next <= 15; - elsif check_mask(mem_field_flags,PMF_PUB_SEQ_NR_FLAG) then + elsif check_mask(mem_r.field_flags,PMF_PUB_SEQ_NR_FLAG) then mem_cnt_next <= 17; - elsif check_mask(mem_field_flags,PMF_SUB_SEQ_NR_FLAG) then + elsif check_mask(mem_r.field_flags,PMF_SUB_SEQ_NR_FLAG) then mem_cnt_next <= 19; - elsif check_mask(mem_field_flags,PMF_MES_SEQ_NR_FLAG) then + elsif check_mask(mem_r.field_flags,PMF_MES_SEQ_NR_FLAG) then mem_cnt_next <= 21; else -- DONE @@ -4244,7 +4237,7 @@ begin mem_abort_read <= '1'; mem_cnt_next <= 6; -- GET Next Participant else - mem_addr_base_next <= mem_addr_base; + participant_data_next.addr <= mem_addr_base; -- Get Participant Data mem_stage_next <= GET_PARTICIPANT_DATA; @@ -4296,7 +4289,7 @@ begin if (mem_valid_out = '1') then -- No more Endpoints if (resize(unsigned(mem_read_data),PARTICIPANT_MEMORY_ADDR_WIDTH) = PARTICIPANT_MEMORY_MAX_ADDRESS) then - mem_addr_base_next <= PARTICIPANT_MEMORY_MAX_ADDRESS; --No match + participant_data_next.addr <= PARTICIPANT_MEMORY_MAX_ADDRESS; --No match -- DONE mem_stage_next <= IDLE; else @@ -4327,13 +4320,14 @@ begin -- Memory Flow Control Guard if (mem_valid_out = '1') then if (resize(unsigned(mem_read_data),PARTICIPANT_MEMORY_ADDR_WIDTH) = PARTICIPANT_MEMORY_MAX_ADDRESS) then - mem_addr_base_next <= PARTICIPANT_MEMORY_MAX_ADDRESS; + participant_data_next.addr <= PARTICIPANT_MEMORY_MAX_ADDRESS; -- DONE mem_stage_next <= IDLE; else - mem_addr_base_next <= resize(unsigned(mem_read_data),PARTICIPANT_MEMORY_ADDR_WIDTH); + participant_data_next.addr <= resize(unsigned(mem_read_data),PARTICIPANT_MEMORY_ADDR_WIDTH); -- Get Instance Data + mem_addr_base_next <= resize(unsigned(mem_read_data),PARTICIPANT_MEMORY_ADDR_WIDTH); mem_stage_next <= GET_PARTICIPANT_DATA; if check_mask(participant_latch_data.field_flags,PMF_GUIDPREFIX_FLAG) then mem_cnt_next <= 0; @@ -4987,7 +4981,7 @@ begin -- Memory Flow Control Guard if (mem_valid_out = '1') then participant_data_next.guid_prefix(2) <= mem_read_data; - current_pmf_next <= current_pmf or PMF_GUIDPREFIX_FLAG; + participant_data_next.field_flags <= participant_data.field_flags or PMF_GUIDPREFIX_FLAG; if check_mask(participant_latch_data.field_flags,PMF_META_IPV4_ADDR_FLAG) then mem_cnt_next <= 26; @@ -5025,7 +5019,7 @@ begin -- Memory Flow Control Guard if (mem_valid_out = '1') then participant_data_next.meta_addr <= mem_read_data; - current_pmf_next <= current_pmf or PMF_META_IPV4_ADDR_FLAG; + participant_data_next.field_flags <= participant_data.field_flags or PMF_META_IPV4_ADDR_FLAG; if check_mask(participant_latch_data.field_flags,PMF_DEFAULT_IPV4_ADDR_FLAG) then mem_cnt_next <= 27; @@ -5061,7 +5055,7 @@ begin -- Memory Flow Control Guard if (mem_valid_out = '1') then participant_data_next.def_addr <= mem_read_data; - current_pmf_next <= current_pmf or PMF_DEFAULT_IPV4_ADDR_FLAG; + participant_data_next.field_flags <= participant_data.field_flags or PMF_DEFAULT_IPV4_ADDR_FLAG; if check_mask(participant_latch_data.field_flags,PMF_UDP_PORT_FLAG) then mem_cnt_next <= 28; @@ -5096,7 +5090,7 @@ begin if (mem_valid_out = '1') then participant_data_next.meta_port <= mem_read_data(WORD_WIDTH-1 downto UDP_PORT_WIDTH); participant_data_next.def_port <= mem_read_data(UDP_PORT_WIDTH-1 downto 0); - current_pmf_next <= current_pmf or PMF_UDP_PORT_FLAG; + participant_data_next.field_flags <= participant_data.field_flags or PMF_UDP_PORT_FLAG; if check_mask(participant_latch_data.field_flags,PMF_SPDP_SEQ_NR_FLAG) then mem_cnt_next <= 29; @@ -5137,7 +5131,7 @@ begin -- Memory Flow Control Guard if (mem_valid_out = '1') then participant_data_next.spdp_seq_nr(1) <= unsigned(mem_read_data); - current_pmf_next <= current_pmf or PMF_SPDP_SEQ_NR_FLAG; + participant_data_next.field_flags <= participant_data.field_flags or PMF_SPDP_SEQ_NR_FLAG; if check_mask(participant_latch_data.field_flags,PMF_LEASE_DURATION_FLAG) then mem_cnt_next <= 31; @@ -5176,7 +5170,7 @@ begin -- Memory Flow Control Guard if (mem_valid_out = '1') then participant_data_next.lease_duration(1) <= unsigned(mem_read_data); - current_pmf_next <= current_pmf or PMF_LEASE_DURATION_FLAG; + participant_data_next.field_flags <= participant_data.field_flags or PMF_LEASE_DURATION_FLAG; if check_mask(participant_latch_data.field_flags,PMF_LEASE_DEADLINE_FLAG) then mem_cnt_next <= 33; @@ -5213,7 +5207,7 @@ begin -- Memory Flow Control Guard if (mem_valid_out = '1') then participant_data_next.lease_deadline(1) <= unsigned(mem_read_data); - current_pmf_next <= current_pmf or PMF_LEASE_DEADLINE_FLAG; + participant_data_next.field_flags <= participant_data.field_flags or PMF_LEASE_DEADLINE_FLAG; if check_mask(participant_latch_data.field_flags,PMF_EXTRA_FLAGS_FLAG) then mem_cnt_next <= 35; @@ -5239,7 +5233,7 @@ begin -- Memory Flow Control Guard if (mem_valid_out = '1') then participant_data_next.extra_flags <= mem_read_data(EF_FLAG_WIDTH-1 downto 0); - current_pmf_next <= current_pmf or PMF_EXTRA_FLAGS_FLAG; + participant_data_next.field_flags <= participant_data.field_flags or PMF_EXTRA_FLAGS_FLAG; if check_mask(participant_latch_data.field_flags,PMF_ACKNACK_RES_TIME_FLAG) then mem_cnt_next <= 36; @@ -5272,7 +5266,7 @@ begin -- Memory Flow Control Guard if (mem_valid_out = '1') then participant_data_next.acknack_res_time(1) <= unsigned(mem_read_data); - current_pmf_next <= current_pmf or PMF_ACKNACK_RES_TIME_FLAG; + participant_data_next.field_flags <= participant_data.field_flags or PMF_ACKNACK_RES_TIME_FLAG; if check_mask(participant_latch_data.field_flags,PMF_HEARTBEAT_RES_TIME_FLAG) then mem_cnt_next <= 38; @@ -5303,7 +5297,7 @@ begin -- Memory Flow Control Guard if (mem_valid_out = '1') then participant_data_next.heartbeat_res_time(1) <= unsigned(mem_read_data); - current_pmf_next <= current_pmf or PMF_HEARTBEAT_RES_TIME_FLAG; + participant_data_next.field_flags <= participant_data.field_flags or PMF_HEARTBEAT_RES_TIME_FLAG; if check_mask(participant_latch_data.field_flags,PMF_PUB_SEQ_NR_FLAG) then mem_cnt_next <= 40; @@ -5332,7 +5326,7 @@ begin -- Memory Flow Control Guard if (mem_valid_out = '1') then participant_data_next.pub_seq_nr(1) <= unsigned(mem_read_data); - current_pmf_next <= current_pmf or PMF_PUB_SEQ_NR_FLAG; + participant_data_next.field_flags <= participant_data.field_flags or PMF_PUB_SEQ_NR_FLAG; if check_mask(participant_latch_data.field_flags,PMF_SUB_SEQ_NR_FLAG) then mem_cnt_next <= 42; @@ -5359,7 +5353,7 @@ begin -- Memory Flow Control Guard if (mem_valid_out = '1') then participant_data_next.sub_seq_nr(1) <= unsigned(mem_read_data); - current_pmf_next <= current_pmf or PMF_SUB_SEQ_NR_FLAG; + participant_data_next.field_flags <= participant_data.field_flags or PMF_SUB_SEQ_NR_FLAG; if check_mask(participant_latch_data.field_flags,PMF_MES_SEQ_NR_FLAG) then mem_cnt_next <= 44; @@ -5384,7 +5378,7 @@ begin -- Memory Flow Control Guard if (mem_valid_out = '1') then participant_data_next.mes_seq_nr(1) <= unsigned(mem_read_data); - current_pmf_next <= current_pmf or PMF_MES_SEQ_NR_FLAG; + participant_data_next.field_flags <= participant_data.field_flags or PMF_MES_SEQ_NR_FLAG; -- DONE mem_stage_next <= IDLE; @@ -5434,7 +5428,7 @@ begin mem_addr <= mem_addr_base + PMF_GUIDPREFIX_OFFSET + 2; mem_write_data <= participant_latch_data.guid_prefix(2); participant_data_next.guid_prefix(2) <= participant_latch_data.guid_prefix(2); - current_pmf_next <= current_pmf or PMF_GUIDPREFIX_FLAG; + participant_data_next.field_flags <= participant_data.field_flags or PMF_GUIDPREFIX_FLAG; -- Memory Flow Control Guard if (mem_ready_in = '1') then @@ -5446,7 +5440,7 @@ begin mem_addr <= mem_addr_base + PMF_META_IPV4_ADDR_OFFSET; mem_write_data <= participant_latch_data.meta_addr; participant_data_next.meta_addr <= participant_latch_data.meta_addr; - current_pmf_next <= current_pmf or PMF_META_IPV4_ADDR_FLAG; + participant_data_next.field_flags <= participant_data.field_flags or PMF_META_IPV4_ADDR_FLAG; -- Memory Flow Control Guard if (mem_ready_in = '1') then @@ -5458,7 +5452,7 @@ begin mem_addr <= mem_addr_base + PMF_DEFAULT_IPV4_ADDR_OFFSET; mem_write_data <= participant_latch_data.def_addr; participant_data_next.def_addr <= participant_latch_data.def_addr; - current_pmf_next <= current_pmf or PMF_DEFAULT_IPV4_ADDR_FLAG; + participant_data_next.field_flags <= participant_data.field_flags or PMF_DEFAULT_IPV4_ADDR_FLAG; -- Memory Flow Control Guard if (mem_ready_in = '1') then @@ -5471,7 +5465,7 @@ begin mem_write_data <= participant_latch_data.meta_port & participant_latch_data.def_port; participant_data_next.meta_port <= participant_latch_data.meta_port; participant_data_next.def_port <= participant_latch_data.def_port; - current_pmf_next <= current_pmf or PMF_UDP_PORT_FLAG; + participant_data_next.field_flags <= participant_data.field_flags or PMF_UDP_PORT_FLAG; -- Memory Flow Control Guard if (mem_ready_in = '1') then @@ -5481,8 +5475,8 @@ begin when 7 => mem_valid_in <= '1'; mem_addr <= mem_addr_base + PMF_SPDP_SEQ_NR_OFFSET; - mem_write_data <= std_logic_vector(participant_latch_data.seq_nr(0)); - participant_data_next.spdp_seq_nr(0) <= participant_latch_data.seq_nr(0); + mem_write_data <= std_logic_vector(participant_latch_data.spdp_seq_nr(0)); + participant_data_next.spdp_seq_nr(0) <= participant_latch_data.spdp_seq_nr(0); -- Memory Flow Control Guard if (mem_ready_in = '1') then @@ -5492,9 +5486,9 @@ begin when 8 => mem_valid_in <= '1'; mem_addr <= mem_addr_base + PMF_SPDP_SEQ_NR_OFFSET + 1; - mem_write_data <= std_logic_vector(participant_latch_data.seq_nr(1)); - participant_data_next.spdp_seq_nr(1) <= participant_latch_data.seq_nr(1); - current_pmf_next <= current_pmf or PMF_SPDP_SEQ_NR_FLAG; + mem_write_data <= std_logic_vector(participant_latch_data.spdp_seq_nr(1)); + participant_data_next.spdp_seq_nr(1) <= participant_latch_data.spdp_seq_nr(1); + participant_data_next.field_flags <= participant_data.field_flags or PMF_SPDP_SEQ_NR_FLAG; -- Memory Flow Control Guard if (mem_ready_in = '1') then @@ -5517,7 +5511,7 @@ begin mem_addr <= mem_addr_base + PMF_LEASE_DURATION_OFFSET + 1; mem_write_data <= std_logic_vector(participant_latch_data.lease_duration(1)); participant_data_next.lease_duration(1) <= participant_latch_data.lease_duration(1); - current_pmf_next <= current_pmf or PMF_LEASE_DURATION_FLAG; + participant_data_next.field_flags <= participant_data.field_flags or PMF_LEASE_DURATION_FLAG; -- Memory Flow Control Guard if (mem_ready_in = '1') then @@ -5540,7 +5534,7 @@ begin mem_addr <= mem_addr_base + PMF_LEASE_DEADLINE_OFFSET + 1; mem_write_data <= std_logic_vector(participant_latch_data.lease_deadline(1)); participant_data_next.lease_deadline(1) <= participant_latch_data.lease_deadline(1); - current_pmf_next <= current_pmf or PMF_LEASE_DEADLINE_FLAG; + participant_data_next.field_flags <= participant_data.field_flags or PMF_LEASE_DEADLINE_FLAG; -- Memory Flow Control Guard if (mem_ready_in = '1') then @@ -5550,10 +5544,9 @@ begin when 13 => mem_valid_in <= '1'; mem_addr <= mem_addr_base + PMF_EXTRA_FLAGS_OFFSET; - mem_write_data <= (others => '0'); - mem_write_data(EF_FLAG_WIDTH-1 downto 0) <= participant_latch_data.extra_flags; - participant_data_next.extra_flags <= participant_latch_data.extra_flags; - current_pmf_next <= current_pmf or PMF_EXTRA_FLAGS_FLAG; + mem_write_data <= (others => '0'); + participant_data_next.extra_flags <= (others => '0'); + participant_data_next.field_flags <= participant_data.field_flags or PMF_EXTRA_FLAGS_FLAG; -- Memory Flow Control Guard if (mem_ready_in = '1') then @@ -5575,7 +5568,7 @@ begin mem_addr <= mem_addr_base + PMF_ACKNACK_RES_TIME_OFFSET + 1; mem_write_data <= std_logic_vector(TIME_INVALID(1)); participant_data_next.acknack_res_time <= TIME_INVALID; - current_pmf_next <= current_pmf or PMF_ACKNACK_RES_TIME_FLAG; + participant_data_next.field_flags <= participant_data.field_flags or PMF_ACKNACK_RES_TIME_FLAG; -- Memory Flow Control Guard if (mem_ready_in = '1') then @@ -5597,7 +5590,7 @@ begin mem_addr <= mem_addr_base + PMF_HEARTBEAT_RES_TIME_OFFSET + 1; mem_write_data <= std_logic_vector(TIME_INVALID(1)); participant_data_next.heartbeat_res_time <= TIME_INVALID; - current_pmf_next <= current_pmf or PMF_HEARTBEAT_RES_TIME_FLAG; + participant_data_next.field_flags <= participant_data.field_flags or PMF_HEARTBEAT_RES_TIME_FLAG; -- Memory Flow Control Guard if (mem_ready_in = '1') then @@ -5619,7 +5612,7 @@ begin mem_addr <= mem_addr_base + PMF_PUB_SEQ_NR_OFFSET + 1; mem_write_data <= std_logic_vector(FIRST_SEQUENCENUMBER(1)); participant_data_next.pub_seq_nr <= FIRST_SEQUENCENUMBER; - current_pmf_next <= current_pmf or PMF_PUB_SEQ_NR_FLAG; + participant_data_next.field_flags <= participant_data.field_flags or PMF_PUB_SEQ_NR_FLAG; -- Memory Flow Control Guard if (mem_ready_in = '1') then @@ -5641,7 +5634,7 @@ begin mem_addr <= mem_addr_base + PMF_SUB_SEQ_NR_OFFSET + 1; mem_write_data <= std_logic_vector(FIRST_SEQUENCENUMBER(1)); participant_data_next.sub_seq_nr <= FIRST_SEQUENCENUMBER; - current_pmf_next <= current_pmf or PMF_SUB_SEQ_NR_FLAG; + participant_data_next.field_flags <= participant_data.field_flags or PMF_SUB_SEQ_NR_FLAG; -- Memory Flow Control Guard if (mem_ready_in = '1') then @@ -5663,7 +5656,7 @@ begin mem_addr <= mem_addr_base + PMF_MES_SEQ_NR_OFFSET + 1; mem_write_data <= std_logic_vector(FIRST_SEQUENCENUMBER(1)); participant_data_next.mes_seq_nr <= FIRST_SEQUENCENUMBER; - current_pmf_next <= current_pmf or PMF_MES_SEQ_NR_FLAG; + participant_data_next.field_flags <= participant_data.field_flags or PMF_MES_SEQ_NR_FLAG; -- Memory Flow Control Guard if (mem_ready_in = '1') then @@ -5725,7 +5718,7 @@ begin mem_addr <= mem_addr_base + PMF_META_IPV4_ADDR_OFFSET; mem_write_data <= participant_latch_data.meta_addr; participant_data_next.meta_addr <= participant_latch_data.meta_addr; - current_pmf_next <= current_pmf or PMF_META_IPV4_ADDR_FLAG; + participant_data_next.field_flags <= participant_data.field_flags or PMF_META_IPV4_ADDR_FLAG; -- Memory Flow Control Guard if (mem_ready_in = '1') then if check_mask(participant_latch_data.field_flags,PMF_DEFAULT_IPV4_ADDR_FLAG) then @@ -5761,7 +5754,7 @@ begin mem_addr <= mem_addr_base + PMF_DEFAULT_IPV4_ADDR_OFFSET; mem_write_data <= participant_latch_data.def_addr; participant_data_next.def_addr <= participant_latch_data.def_addr; - current_pmf_next <= current_pmf or PMF_DEFAULT_IPV4_ADDR_FLAG; + participant_data_next.field_flags <= participant_data.field_flags or PMF_DEFAULT_IPV4_ADDR_FLAG; -- Memory Flow Control Guard if (mem_ready_in = '1') then if check_mask(participant_latch_data.field_flags,PMF_UDP_PORT_FLAG) then @@ -5796,7 +5789,7 @@ begin mem_write_data <= participant_latch_data.meta_port & participant_latch_data.def_port; participant_data_next.meta_port <= participant_latch_data.meta_port; participant_data_next.def_port <= participant_latch_data.def_port; - current_pmf_next <= current_pmf or PMF_UDP_PORT_FLAG; + participant_data_next.field_flags <= participant_data.field_flags or PMF_UDP_PORT_FLAG; -- Memory Flow Control Guard if (mem_ready_in = '1') then if check_mask(participant_latch_data.field_flags,PMF_SPDP_SEQ_NR_FLAG) then @@ -5826,7 +5819,7 @@ begin when 3 => mem_valid_in <= '1'; mem_addr <= mem_addr_base + PMF_SPDP_SEQ_NR_OFFSET; - mem_write_data <= std_logic_vector(participant_latch_data.seq_nr(0)); + mem_write_data <= std_logic_vector(participant_latch_data.spdp_seq_nr(0)); -- Memory Flow Control Guard if (mem_ready_in = '1') then mem_cnt_next <= mem_cnt + 1; @@ -5835,9 +5828,9 @@ begin when 4 => mem_valid_in <= '1'; mem_addr <= mem_addr_base + PMF_SPDP_SEQ_NR_OFFSET + 1; - mem_write_data <= std_logic_vector(participant_latch_data.seq_nr(1)); - participant_data_next.spdp_seq_nr <= participant_latch_data.seq_nr; - current_pmf_next <= current_pmf or PMF_SPDP_SEQ_NR_FLAG; + mem_write_data <= std_logic_vector(participant_latch_data.spdp_seq_nr(1)); + participant_data_next.spdp_seq_nr <= participant_latch_data.spdp_seq_nr; + participant_data_next.field_flags <= participant_data.field_flags or PMF_SPDP_SEQ_NR_FLAG; -- Memory Flow Control Guard if (mem_ready_in = '1') then if check_mask(participant_latch_data.field_flags,PMF_LEASE_DURATION_FLAG) then @@ -5876,7 +5869,7 @@ begin mem_addr <= mem_addr_base + PMF_LEASE_DURATION_OFFSET + 1; mem_write_data <= std_logic_vector(participant_latch_data.lease_duration(1)); participant_data_next.lease_duration <= participant_latch_data.lease_duration; - current_pmf_next <= current_pmf or PMF_LEASE_DURATION_FLAG; + participant_data_next.field_flags <= participant_data.field_flags or PMF_LEASE_DURATION_FLAG; -- Memory Flow Control Guard if (mem_ready_in = '1') then if check_mask(participant_latch_data.field_flags,PMF_LEASE_DEADLINE_FLAG) then @@ -5913,7 +5906,7 @@ begin mem_addr <= mem_addr_base + PMF_LEASE_DEADLINE_OFFSET + 1; mem_write_data <= std_logic_vector(participant_latch_data.lease_deadline(1)); participant_data_next.lease_deadline <= participant_latch_data.lease_deadline; - current_pmf_next <= current_pmf or PMF_LEASE_DEADLINE_FLAG; + participant_data_next.field_flags <= participant_data.field_flags or PMF_LEASE_DEADLINE_FLAG; -- Memory Flow Control Guard if (mem_ready_in = '1') then if check_mask(participant_latch_data.field_flags,PMF_EXTRA_FLAGS_FLAG) then @@ -5940,7 +5933,7 @@ begin mem_write_data <= (others => '0'); mem_write_data(EF_FLAG_WIDTH-1 downto 0) <= participant_latch_data.extra_flags; participant_data_next.extra_flags <= participant_latch_data.extra_flags; - current_pmf_next <= current_pmf or PMF_EXTRA_FLAGS_FLAG; + participant_data_next.field_flags <= participant_data.field_flags or PMF_EXTRA_FLAGS_FLAG; -- Memory Flow Control Guard if (mem_ready_in = '1') then if check_mask(participant_latch_data.field_flags,PMF_ACKNACK_RES_TIME_FLAG) then @@ -5962,7 +5955,7 @@ begin when 10 => mem_valid_in <= '1'; mem_addr <= mem_addr_base + PMF_ACKNACK_RES_TIME_OFFSET; - mem_write_data <= std_logic_vector(participant_latch_data.res_time(0)); + mem_write_data <= std_logic_vector(participant_latch_data.acknack_res_time(0)); -- Memory Flow Control Guard if (mem_ready_in = '1') then mem_cnt_next <= mem_cnt + 1; @@ -5971,9 +5964,9 @@ begin when 11 => mem_valid_in <= '1'; mem_addr <= mem_addr_base + PMF_ACKNACK_RES_TIME_OFFSET + 1; - mem_write_data <= std_logic_vector(participant_latch_data.res_time(1)); - participant_data_next.acknack_res_time <= participant_latch_data.res_time; - current_pmf_next <= current_pmf or PMF_ACKNACK_RES_TIME_FLAG; + mem_write_data <= std_logic_vector(participant_latch_data.acknack_res_time(1)); + participant_data_next.acknack_res_time <= participant_latch_data.acknack_res_time; + participant_data_next.field_flags <= participant_data.field_flags or PMF_ACKNACK_RES_TIME_FLAG; -- Memory Flow Control Guard if (mem_ready_in = '1') then if check_mask(participant_latch_data.field_flags,PMF_HEARTBEAT_RES_TIME_FLAG) then @@ -5993,7 +5986,7 @@ begin when 12 => mem_valid_in <= '1'; mem_addr <= mem_addr_base + PMF_HEARTBEAT_RES_TIME_OFFSET; - mem_write_data <= std_logic_vector(participant_latch_data.res_time(0)); + mem_write_data <= std_logic_vector(participant_latch_data.heartbeat_res_time(0)); -- Memory Flow Control Guard if (mem_ready_in = '1') then mem_cnt_next <= mem_cnt + 1; @@ -6002,9 +5995,9 @@ begin when 13 => mem_valid_in <= '1'; mem_addr <= mem_addr_base + PMF_HEARTBEAT_RES_TIME_OFFSET + 1; - mem_write_data <= std_logic_vector(participant_latch_data.res_time(1)); - participant_data_next.heartbeat_res_time <= participant_latch_data.res_time; - current_pmf_next <= current_pmf or PMF_HEARTBEAT_RES_TIME_FLAG; + mem_write_data <= std_logic_vector(participant_latch_data.heartbeat_res_time(1)); + participant_data_next.heartbeat_res_time <= participant_latch_data.heartbeat_res_time; + participant_data_next.field_flags <= participant_data.field_flags or PMF_HEARTBEAT_RES_TIME_FLAG; -- Memory Flow Control Guard if (mem_ready_in = '1') then if check_mask(participant_latch_data.field_flags,PMF_PUB_SEQ_NR_FLAG) then @@ -6022,7 +6015,7 @@ begin when 14 => mem_valid_in <= '1'; mem_addr <= mem_addr_base + PMF_PUB_SEQ_NR_OFFSET; - mem_write_data <= std_logic_vector(participant_latch_data.seq_nr(0)); + mem_write_data <= std_logic_vector(participant_latch_data.pub_seq_nr(0)); -- Memory Flow Control Guard if (mem_ready_in = '1') then mem_cnt_next <= mem_cnt + 1; @@ -6031,9 +6024,9 @@ begin when 15 => mem_valid_in <= '1'; mem_addr <= mem_addr_base + PMF_PUB_SEQ_NR_OFFSET + 1; - mem_write_data <= std_logic_vector(participant_latch_data.seq_nr(1)); - participant_data_next.pub_seq_nr <= participant_latch_data.seq_nr; - current_pmf_next <= current_pmf or PMF_PUB_SEQ_NR_FLAG; + mem_write_data <= std_logic_vector(participant_latch_data.pub_seq_nr(1)); + participant_data_next.pub_seq_nr <= participant_latch_data.pub_seq_nr; + participant_data_next.field_flags <= participant_data.field_flags or PMF_PUB_SEQ_NR_FLAG; -- Memory Flow Control Guard if (mem_ready_in = '1') then if check_mask(participant_latch_data.field_flags,PMF_SUB_SEQ_NR_FLAG) then @@ -6049,7 +6042,7 @@ begin when 16 => mem_valid_in <= '1'; mem_addr <= mem_addr_base + PMF_SUB_SEQ_NR_OFFSET; - mem_write_data <= std_logic_vector(participant_latch_data.seq_nr(0)); + mem_write_data <= std_logic_vector(participant_latch_data.sub_seq_nr(0)); -- Memory Flow Control Guard if (mem_ready_in = '1') then mem_cnt_next <= mem_cnt + 1; @@ -6058,9 +6051,9 @@ begin when 17 => mem_valid_in <= '1'; mem_addr <= mem_addr_base + PMF_SUB_SEQ_NR_OFFSET + 1; - mem_write_data <= std_logic_vector(participant_latch_data.seq_nr(1)); - participant_data_next.sub_seq_nr <= participant_latch_data.seq_nr; - current_pmf_next <= current_pmf or PMF_SUB_SEQ_NR_FLAG; + mem_write_data <= std_logic_vector(participant_latch_data.sub_seq_nr(1)); + participant_data_next.sub_seq_nr <= participant_latch_data.sub_seq_nr; + participant_data_next.field_flags <= participant_data.field_flags or PMF_SUB_SEQ_NR_FLAG; -- Memory Flow Control Guard if (mem_ready_in = '1') then if check_mask(participant_latch_data.field_flags,PMF_MES_SEQ_NR_FLAG) then @@ -6074,7 +6067,7 @@ begin when 18 => mem_valid_in <= '1'; mem_addr <= mem_addr_base + PMF_MES_SEQ_NR_OFFSET; - mem_write_data <= std_logic_vector(participant_latch_data.seq_nr(0)); + mem_write_data <= std_logic_vector(participant_latch_data.mes_seq_nr(0)); -- Memory Flow Control Guard if (mem_ready_in = '1') then mem_cnt_next <= mem_cnt + 1; @@ -6083,9 +6076,9 @@ begin when 19 => mem_valid_in <= '1'; mem_addr <= mem_addr_base + PMF_MES_SEQ_NR_OFFSET + 1; - mem_write_data <= std_logic_vector(participant_latch_data.seq_nr(1)); - participant_data_next.mes_seq_nr <= participant_latch_data.seq_nr; - current_pmf_next <= current_pmf or PMF_MES_SEQ_NR_FLAG; + mem_write_data <= std_logic_vector(participant_latch_data.mes_seq_nr(1)); + participant_data_next.mes_seq_nr <= participant_latch_data.mes_seq_nr; + participant_data_next.field_flags <= participant_data.field_flags or PMF_MES_SEQ_NR_FLAG; -- Memory Flow Control Guard if (mem_ready_in = '1') then -- DONE @@ -6146,7 +6139,7 @@ begin -- RESET Occupied List Head mem_occupied_head_next <= PARTICIPANT_MEMORY_MAX_ADDRESS; - mem_addr_base_next <= PARTICIPANT_MEMORY_MAX_ADDRESS; + participant_data_next.addr <= PARTICIPANT_MEMORY_MAX_ADDRESS; -- DONE mem_stage_next <= IDLE; else @@ -6169,6 +6162,7 @@ begin if (mem_addr_latch = PARTICIPANT_MEMORY_MAX_ADDRESS) then -- Set New Occupied List Head mem_occupied_head_next <= mem_addr_base; + participant_data_next.addr <= mem_addr_base; -- DONE mem_stage_next <= IDLE; else @@ -6184,7 +6178,7 @@ begin mem_write_data <= std_logic_vector(resize(mem_addr_latch,WORD_WIDTH)); if (mem_ready_in = '1') then - mem_addr_base_next <= mem_addr_latch; + participant_data_next.addr <= mem_addr_latch; -- DONE mem_stage_next <= IDLE; end if; @@ -6292,7 +6286,7 @@ begin announcement_time <= time; heartbeat_time <= time + HEARTBEAT_PERIOD; participant_data <= ZERO_PARTICIPANT_DATA; - participant_latch_data <= ZERO_PARTICIPANT_LATCH_DATA; + participant_latch_data <= ZERO_PARTICIPANT_DATA; cnt <= 0; cnt2 <= 0; bitmap_pos <= 0; @@ -6319,7 +6313,6 @@ begin long_latch <= (others => '0'); rcvd <= (others => '0'); reader_flags <= (others => '0'); - current_pmf <= (others => '0'); bitmap_cnt <= (others => '0'); bitmap_latch <= (others => (others => '0')); else @@ -6387,7 +6380,6 @@ begin long_latch <= long_latch_next; rcvd <= rcvd_next; reader_flags <= reader_flags_next; - current_pmf <= current_pmf_next; bitmap_cnt <= bitmap_cnt_next; bitmap_latch <= bitmap_latch_next; end if; diff --git a/src/rtps_reader.vhd b/src/rtps_reader.vhd index bf7c9f3..aa282c4 100644 --- a/src/rtps_reader.vhd +++ b/src/rtps_reader.vhd @@ -146,60 +146,42 @@ architecture arch of rtps_reader is -- *Memory FSM Opcodes* -- OPCODE DESCRIPTION -- SEARCH_ENDPOINT Search memory for Endpoint with GUID equal to "guid" signal. - -- Set "mem_addr_base" to base Address of found Endpoint, or ENDPOINT_MEMORY_MAX_ADDRESS if nothing found. - -- "mem_endpoint_data" contains Endpoint Data according to "mem_field_flags". + -- Set "mem_endpoint_data.addr" to base Address of found Endpoint, or ENDPOINT_MEMORY_MAX_ADDRESS if nothing found. + -- "mem_endpoint_data" contains Endpoint Data according to "mem_r.field_flags". -- INSERT_ENDPOINT Insert Endpoint in memory - -- UPDATE_ENDPOINT Update Endpoint pointed by "mem_addr_update" according to "mem_field_flags". - -- REMOVE_ENDPOINT Remove Endpoint pointed by "mem_addr_update". - -- "mem_addr_base" is set to the next Endpoint (or ENDPOINT_MEMORY_MAX_ADDRESS if no next Endpoint exists) - -- GET_NEXT_ENDPOINT Get Endpoint Data of next Endpoint (from the Endpoint pointed by "mem_addr_update") according to "mem_field_flags". - -- Set "mem_addr_base" to Address of Endpoint, or ENDPOINT_MEMORY_MAX_ADDRESS if no other Endpoint in Memory. - -- GET_ENDPOINT Get Endpoint Data from Endpoint pointed by "mem_addr_update" according to "mem_field_flags". + -- UPDATE_ENDPOINT Update Endpoint pointed by "mem_r.addr" according to "mem_r.field_flags". + -- REMOVE_ENDPOINT Remove Endpoint pointed by "mem_r.addr". + -- "mem_endpoint_data.addr" is set to the next Endpoint (or ENDPOINT_MEMORY_MAX_ADDRESS if no next Endpoint exists) + -- GET_NEXT_ENDPOINT Get Endpoint Data of next Endpoint (from the Endpoint pointed by "mem_r.addr") according to "mem_r.field_flags". + -- Set "mem_endpoint_data.addr" to Address of Endpoint, or ENDPOINT_MEMORY_MAX_ADDRESS if no other Endpoint in Memory. + -- GET_ENDPOINT Get Endpoint Data from Endpoint pointed by "mem_r.addr" according to "mem_r.field_flags". -- Already fetched data of the same Endpoint is not modified. type MEM_OPCODE_TYPE is (NOP, SEARCH_ENDPOINT, INSERT_ENDPOINT, UPDATE_ENDPOINT, REMOVE_ENDPOINT, GET_NEXT_ENDPOINT, GET_ENDPOINT); -- Record of Endpoint Data type ENDPOINT_DATA_TYPE is record - guid : GUID_TYPE; - addr : std_logic_vector(IPv4_ADDRESS_WIDTH-1 downto 0); - portn : std_logic_vector(UDP_PORT_WIDTH-1 downto 0); - next_seq_nr : SEQUENCENUMBER_TYPE; - lease_deadline : TIME_TYPE; - lifespan : DURATION_TYPE; - res_time : TIME_TYPE; - writer_id : natural; + addr : unsigned(ENDPOINT_MEMORY_ADDR_WIDTH-1 downto 0); + guid : GUID_TYPE; + ip_addr : std_logic_vector(IPv4_ADDRESS_WIDTH-1 downto 0); + portn : std_logic_vector(UDP_PORT_WIDTH-1 downto 0); + next_seq_nr : SEQUENCENUMBER_TYPE; + lease_deadline : TIME_TYPE; + lifespan : DURATION_TYPE; + res_time : TIME_TYPE; + writer_id : natural; + field_flags : std_logic_vector(0 to EMF_FLAG_WIDTH-1); end record; -- Zero initialized Endpoint Data constant ZERO_ENDPOINT_DATA : ENDPOINT_DATA_TYPE := ( - guid => GUID_UNKNOWN, - addr => IPv4_ADDRESS_INVALID, - portn => UDP_PORT_INVALID, - next_seq_nr => SEQUENCENUMBER_UNKNOWN, - lease_deadline => TIME_INVALID, - lifespan => DURATION_INFINITE, - res_time => TIME_INVALID, - writer_id => 0 - ); - -- Endpoint Data Latch used as temporal cache by Memory Process - type ENDPOINT_LATCH_DATA_TYPE is record - guid : GUID_TYPE; - addr : std_logic_vector(IPv4_ADDRESS_WIDTH-1 downto 0); - portn : std_logic_vector(UDP_PORT_WIDTH-1 downto 0); - lease_deadline : TIME_TYPE; - lifespan : DURATION_TYPE; - res_time : TIME_TYPE; - next_seq_nr : SEQUENCENUMBER_TYPE; - field_flag : std_logic_vector(0 to EMF_FLAG_WIDTH-1); - end record; - -- Zero initialized Endpoint Data Latch - constant ZERO_ENDPOINT_LATCH_DATA : ENDPOINT_LATCH_DATA_TYPE := ( - guid => GUID_UNKNOWN, - addr => IPv4_ADDRESS_INVALID, - portn => UDP_PORT_INVALID, - lease_deadline => TIME_INVALID, - lifespan => DURATION_INFINITE, - res_time => TIME_INVALID, - next_seq_nr => SEQUENCENUMBER_UNKNOWN, - field_flag => (others => '0') + addr => ENDPOINT_MEMORY_MAX_ADDRESS, + guid => GUID_UNKNOWN, + ip_addr => IPv4_ADDRESS_INVALID, + portn => UDP_PORT_INVALID, + next_seq_nr => SEQUENCENUMBER_UNKNOWN, + lease_deadline => TIME_INVALID, + lifespan => DURATION_INFINITE, + res_time => TIME_INVALID, + writer_id => 0, + field_flags => (others => '0') ); @@ -277,16 +259,10 @@ architecture arch of rtps_reader is signal mem_opcode : MEM_OPCODE_TYPE; -- Signals the end of a Memory Operation signal mem_op_done : std_logic; - -- Signal containing the relevant Endpoint Memory Format Fields of the Memory Operation - signal mem_field_flags : std_logic_vector(0 to EMF_FLAG_WIDTH-1); - -- Signal used to pass Lease Deadlines from main to memory process - signal lease_deadline : TIME_TYPE; - -- Signal used to pass Response Deadlines from main to memory process - signal res_time : TIME_TYPE; + -- Signal used to pass data to memory process + signal mem_r : ENDPOINT_DATA_TYPE; -- Test signal used for testbench synchronisation signal idle_sig : std_logic; - -- Signal used to pass Endpoint Pointers to the Endpoint Memory Process - signal mem_addr_update : unsigned(ENDPOINT_MEMORY_ADDR_WIDTH-1 downto 0); -- Test signal used in testbenches for removal check signal empty_head_sig : natural; @@ -306,9 +282,7 @@ architecture arch of rtps_reader is -- Latch for Endpoint Data from Memory signal mem_endpoint_data, mem_endpoint_data_next : ENDPOINT_DATA_TYPE; -- Latch for Endpoint Data from main process - signal mem_endpoint_latch_data, mem_endpoint_latch_data_next : ENDPOINT_LATCH_DATA_TYPE; - -- Endpoint Memory Flag Array denoting which mem_endpoint_data Fields are up-to-date with the respective fields of the Endpoint (Pointed by mem_addr_base) - signal current_emf, current_emf_next : std_logic_vector(0 to EMF_FLAG_WIDTH-1); + signal mem_endpoint_latch_data, mem_endpoint_latch_data_next : ENDPOINT_DATA_TYPE; -- *MEMORY CONTROL CONNECTION SIGNALS* signal mem_addr : unsigned(ENDPOINT_MEMORY_ADDR_WIDTH-1 downto 0); @@ -467,8 +441,7 @@ begin -- DEFAULT Unregistered mem_opcode <= NOP; opcode_hc <= NOP; - lease_deadline <= TIME_INVALID; - res_time <= TIME_INVALID; + mem_r <= ZERO_ENDPOINT_DATA; reset_read_cnt <= '0'; rd_meta <= '0'; mem_op_start <= '0'; @@ -479,10 +452,8 @@ begin last_word_out_ro <= '0'; idle_sig <= '0'; rd_guard := '0'; - mem_field_flags <= (others => '0'); data_out_hc <= (others => '0'); data_out_ro <= (others => '0'); - mem_addr_update <= (others => '0'); @@ -511,8 +482,8 @@ begin cnt_next <= 2; -- CHECK Endpoint mem_op_start <= '1'; mem_opcode <= GET_ENDPOINT; - mem_addr_update <= mem_occupied_head; - mem_field_flags <= EMF_LEASE_DEADLINE_FLAG or EMF_RES_TIME_FLAG or EMF_WRITER_ID_FLAG; + mem_r.addr <= mem_occupied_head; + mem_r.field_flags <= EMF_LEASE_DEADLINE_FLAG or EMF_RES_TIME_FLAG or EMF_WRITER_ID_FLAG; -- Reset Timeout check_time_next <= TIME_INFINITE; end if; @@ -633,30 +604,31 @@ begin when EMO_ENDPOINT_MATCH => mem_op_start <= '1'; mem_opcode <= SEARCH_ENDPOINT; - mem_field_flags <= (others => '0'); + mem_r.guid <= guid; stage_next <= LATCH_ENDPOINT_DATA; cnt_next <= 0; when EMO_ENDPOINT_UNMATCH => - mem_op_start <= '1'; - mem_opcode <= SEARCH_ENDPOINT; - mem_field_flags <= EMF_WRITER_ID_FLAG; - stage_next <= METATRAFFIC_OPERATION; + mem_op_start <= '1'; + mem_opcode <= SEARCH_ENDPOINT; + mem_r.field_flags <= EMF_WRITER_ID_FLAG; + mem_r.guid <= guid; + stage_next <= METATRAFFIC_OPERATION; when EMO_PARTICIPANT_UNMATCH => - mem_op_start <= '1'; - mem_opcode <= GET_ENDPOINT; - mem_addr_update <= mem_occupied_head; - mem_field_flags <= EMF_GUIDPREFIX_FLAG or EMF_WRITER_ID_FLAG; - stage_next <= METATRAFFIC_OPERATION; - cnt_next <= 0; + mem_op_start <= '1'; + mem_opcode <= GET_ENDPOINT; + mem_r.addr <= mem_occupied_head; + mem_r.field_flags <= EMF_GUIDPREFIX_FLAG or EMF_WRITER_ID_FLAG; + stage_next <= METATRAFFIC_OPERATION; + cnt_next <= 0; when EMO_LIVELINESS_UPDATE => -- Synthesis Guard if (LIVELINESS_QOS /= MANUAL_BY_TOPIC_LIVELINESS_QOS) then - mem_op_start <= '1'; - mem_opcode <= GET_ENDPOINT; - mem_addr_update <= mem_occupied_head; - mem_field_flags <= EMF_GUIDPREFIX_FLAG; - stage_next <= METATRAFFIC_OPERATION; - cnt_next <= 0; + mem_op_start <= '1'; + mem_opcode <= GET_ENDPOINT; + mem_r.addr <= mem_occupied_head; + mem_r.field_flags <= EMF_GUIDPREFIX_FLAG; + stage_next <= METATRAFFIC_OPERATION; + cnt_next <= 0; end if; when others => null; @@ -664,20 +636,21 @@ begin else mem_op_start <= '1'; mem_opcode <= SEARCH_ENDPOINT; + mem_r.guid <= guid; case (opcode) is when SID_DATA => - stage_next <= LATCH_EXTRA_DATA; - mem_field_flags <= EMF_NEXT_SEQ_NR_FLAG or EMF_LIFESPAN_DURATION_FLAG or EMF_WRITER_ID_FLAG; - cnt_next <= 0; + mem_r.field_flags <= EMF_NEXT_SEQ_NR_FLAG or EMF_LIFESPAN_DURATION_FLAG or EMF_WRITER_ID_FLAG; + stage_next <= LATCH_EXTRA_DATA; + cnt_next <= 0; when SID_HEARTBEAT => - stage_next <= LATCH_HEARTBEAT; - mem_field_flags <= EMF_NEXT_SEQ_NR_FLAG or EMF_RES_TIME_FLAG; - cnt_next <= 0; + mem_r.field_flags <= EMF_NEXT_SEQ_NR_FLAG or EMF_RES_TIME_FLAG; + stage_next <= LATCH_HEARTBEAT; + cnt_next <= 0; when SID_GAP => - stage_next <= LATCH_GAP; - mem_field_flags <= EMF_NEXT_SEQ_NR_FLAG; - cnt_next <= 0; + mem_r.field_flags <= EMF_NEXT_SEQ_NR_FLAG; + stage_next <= LATCH_GAP; + cnt_next <= 0; when others => stage_next <= SKIP_PACKET; end case; @@ -720,17 +693,21 @@ begin case (meta_opcode) is when EMO_ENDPOINT_MATCH => -- Endpoint already in Memory - if (mem_addr_base /= ENDPOINT_MEMORY_MAX_ADDRESS) then + if (mem_endpoint_data.addr /= ENDPOINT_MEMORY_MAX_ADDRESS) then -- Update the Endpoint Data -- NOTE: The Lease Duration is NOT updated in case of an update. That is the responsibility of the Liveliness Update mem_op_start <= '1'; mem_opcode <= UPDATE_ENDPOINT; - mem_addr_update <= mem_addr_base; + mem_r.addr <= mem_endpoint_data.addr; -- Synthesis Guard if (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS) then - mem_field_flags <= EMF_IPV4_ADDR_FLAG or EMF_UDP_PORT_FLAG or EMF_LIFESPAN_DURATION_FLAG; + mem_r.field_flags <= EMF_IPV4_ADDR_FLAG or EMF_UDP_PORT_FLAG or EMF_LIFESPAN_DURATION_FLAG; + mem_r.ip_addr <= addr; + mem_r.portn <= portn; + mem_r.lifespan <= lifespan; else - mem_field_flags <= EMF_LIFESPAN_DURATION_FLAG; + mem_r.field_flags <= EMF_LIFESPAN_DURATION_FLAG; + mem_r.lifespan <= lifespan; end if; -- DONE stage_next <= IDLE; @@ -744,8 +721,13 @@ begin -- Insert Matched Remote Endpoint mem_op_start <= '1'; mem_opcode <= INSERT_ENDPOINT; + mem_r.guid <= guid; + mem_r.ip_addr <= addr; + mem_r.portn <= portn; + mem_r.lifespan <= lifespan; + if (LEASE_DURATION /= DURATION_INFINITE) then - lease_deadline <= time + LEASE_DURATION; + mem_r.lease_deadline <= time + LEASE_DURATION; -- XXX: Possible Worst Case Path (64-bit addition and comparison in same clock) -- Update Check Time @@ -753,18 +735,18 @@ begin check_time_next <= time + LEASE_DURATION; end if; else - lease_deadline <= TIME_INVALID; + mem_r.lease_deadline <= TIME_INVALID; end if; -- DONE stage_next <= IDLE; end if; when EMO_ENDPOINT_UNMATCH => -- Endpoint not in Memory - if (mem_addr_base = ENDPOINT_MEMORY_MAX_ADDRESS) then + if (mem_endpoint_data.addr = ENDPOINT_MEMORY_MAX_ADDRESS) then -- Ignore stage_next <= IDLE; else - assert stable(clk, check_mask(current_emf, EMF_WRITER_ID_FLAG)) severity FAILURE; + assert stable(clk, check_mask(mem_endpoint_data.field_flags, EMF_WRITER_ID_FLAG)) severity FAILURE; -- Propagate Removal (Sent Memory Position as ID) start_hc <= '1'; @@ -775,7 +757,7 @@ begin -- Remove Unmatched Remote Endpoint mem_op_start <= '1'; mem_opcode <= REMOVE_ENDPOINT; - mem_addr_update <= mem_addr_base; + mem_r.addr <= mem_endpoint_data.addr; -- DONE stage_next <= IDLE; end if; @@ -786,11 +768,11 @@ begin case (cnt) is when 0 => -- Reached End of Endpoints - if (mem_addr_base = ENDPOINT_MEMORY_MAX_ADDRESS) then + if (mem_endpoint_data.addr = ENDPOINT_MEMORY_MAX_ADDRESS) then -- DONE stage_next <= IDLE; else - assert stable(clk, check_mask(current_emf, EMF_GUIDPREFIX_FLAG or EMF_WRITER_ID_FLAG)) severity FAILURE; + assert stable(clk, check_mask(mem_endpoint_data.field_flags, EMF_GUIDPREFIX_FLAG or EMF_WRITER_ID_FLAG)) severity FAILURE; -- Participant Match if (guid(0) = mem_endpoint_data.guid(0) and guid(1) = mem_endpoint_data.guid(1) and guid(2) = mem_endpoint_data.guid(2)) then @@ -803,8 +785,8 @@ begin -- Remove Unmatched Remote Endpoint mem_op_start <= '1'; mem_opcode <= REMOVE_ENDPOINT; - mem_addr_update <= mem_addr_base; - -- NOTE: After removal, mem_addr_base is pointing to the next slot (or ENDPOINT_MEMORY_MAX_ADDRESS) + mem_r.addr <= mem_endpoint_data.addr; + -- NOTE: After removal, mem_endpoint_data.addr is pointing to the next slot (or ENDPOINT_MEMORY_MAX_ADDRESS) cnt_next <= 2; -- GET end if; else @@ -814,19 +796,19 @@ begin -- GET NEXT ENDPOINT when 1 => -- Continue Search - mem_op_start <= '1'; - mem_opcode <= GET_NEXT_ENDPOINT; - mem_addr_update <= mem_addr_base; - mem_field_flags <= EMF_GUIDPREFIX_FLAG or EMF_WRITER_ID_FLAG; - cnt_next <= 0; + mem_op_start <= '1'; + mem_opcode <= GET_NEXT_ENDPOINT; + mem_r.addr <= mem_endpoint_data.addr; + mem_r.field_flags <= EMF_GUIDPREFIX_FLAG or EMF_WRITER_ID_FLAG; + cnt_next <= 0; -- GET ENDPOINT when 2 => -- Continue Search - mem_op_start <= '1'; - mem_opcode <= GET_ENDPOINT; - mem_addr_update <= mem_addr_base; - mem_field_flags <= EMF_GUIDPREFIX_FLAG or EMF_WRITER_ID_FLAG; - cnt_next <= 0; + mem_op_start <= '1'; + mem_opcode <= GET_ENDPOINT; + mem_r.addr <= mem_endpoint_data.addr; + mem_r.field_flags <= EMF_GUIDPREFIX_FLAG or EMF_WRITER_ID_FLAG; + cnt_next <= 0; when others => null; end case; @@ -838,21 +820,21 @@ begin case (cnt) is when 0 => -- No matches in memory - if (mem_addr_base = ENDPOINT_MEMORY_MAX_ADDRESS) then + if (mem_endpoint_data.addr = ENDPOINT_MEMORY_MAX_ADDRESS) then -- DONE stage_next <= IDLE; else - assert stable(clk, check_mask(current_emf, EMF_GUIDPREFIX_FLAG)) severity FAILURE; + assert stable(clk, check_mask(mem_endpoint_data.field_flags, EMF_GUIDPREFIX_FLAG)) severity FAILURE; -- Participant Match if (guid(0) = mem_endpoint_data.guid(0) and guid(1) = mem_endpoint_data.guid(1) and guid(2) = mem_endpoint_data.guid(2)) then -- Renew Lease of Remote Endpoint - mem_op_start <= '1'; - mem_opcode <= UPDATE_ENDPOINT; - mem_addr_update <= mem_addr_base; - mem_field_flags <= EMF_LEASE_DEADLINE_FLAG; + mem_op_start <= '1'; + mem_opcode <= UPDATE_ENDPOINT; + mem_r.addr <= mem_endpoint_data.addr; + mem_r.field_flags <= EMF_LEASE_DEADLINE_FLAG; if (LEASE_DURATION /= DURATION_INFINITE) then - lease_deadline <= time + LEASE_DURATION; + mem_r.lease_deadline <= time + LEASE_DURATION; -- XXX: Possible Worst Case Path (64-bit addition and comparison in same clock) -- Update Check Time @@ -860,18 +842,18 @@ begin check_time_next <= time + LEASE_DURATION; end if; else - lease_deadline <= TIME_INVALID; + mem_r.lease_deadline <= TIME_INVALID; end if; end if; cnt_next <= 1; end if; when 1 => -- Continue Search - mem_op_start <= '1'; - mem_opcode <= GET_NEXT_ENDPOINT; - mem_addr_update <= mem_addr_base; - mem_field_flags <= EMF_GUIDPREFIX_FLAG; - cnt_next <= 0; + mem_op_start <= '1'; + mem_opcode <= GET_NEXT_ENDPOINT; + mem_r.addr <= mem_endpoint_data.addr; + mem_r.field_flags <= EMF_GUIDPREFIX_FLAG; + cnt_next <= 0; when others => null; end case; @@ -961,8 +943,8 @@ begin stage_next <= SKIP_PACKET; -- Endpoint in Buffer - if (mem_addr_base /= ENDPOINT_MEMORY_MAX_ADDRESS) then - assert stable(clk, check_mask(current_emf, EMF_RES_TIME_FLAG or EMF_NEXT_SEQ_NR_FLAG)) severity FAILURE; + if (mem_endpoint_data.addr /= ENDPOINT_MEMORY_MAX_ADDRESS) then + assert stable(clk, check_mask(mem_endpoint_data.field_flags, EMF_RES_TIME_FLAG or EMF_NEXT_SEQ_NR_FLAG)) severity FAILURE; -- Default tmp_flags := (others => '0'); @@ -972,13 +954,13 @@ begin if (liveliness_flag = '1') then mem_op_start <= '1'; mem_opcode <= UPDATE_ENDPOINT; - mem_addr_update <= mem_addr_base; + mem_r.addr <= mem_endpoint_data.addr; tmp_flags := tmp_flags or EMF_LEASE_DEADLINE_FLAG; if (LEASE_DURATION /= DURATION_INFINITE) then - lease_deadline <= time + LEASE_DURATION; - tmp_dw := time + LEASE_DURATION; + mem_r.lease_deadline <= time + LEASE_DURATION; + tmp_dw := time + LEASE_DURATION; else - lease_deadline <= TIME_INVALID; + mem_r.lease_deadline <= TIME_INVALID; end if; end if; @@ -986,62 +968,62 @@ begin if (mem_endpoint_data.res_time = TIME_INVALID) then -- If Reader is Volatile and we have not received anything from the writer yet if (DURABILITY_QOS = VOLATILE_DURABILITY_QOS and mem_endpoint_data.next_seq_nr = SEQUENCENUMBER_UNKNOWN) then - -- Mark last available SN as next expected (Ignore historical data) - if (first_seq_nr <= last_seq_nr) then - next_seq_nr_next <= last_seq_nr; - else - next_seq_nr_next <= first_seq_nr; - end if; mem_op_start <= '1'; mem_opcode <= UPDATE_ENDPOINT; - mem_addr_update <= mem_addr_base; + mem_r.addr <= mem_endpoint_data.addr; tmp_flags := tmp_flags or EMF_NEXT_SEQ_NR_FLAG or EMF_RES_TIME_FLAG; + -- Mark last available SN as next expected (Ignore historical data) + if (first_seq_nr <= last_seq_nr) then + mem_r.next_seq_nr <= last_seq_nr; + else + mem_r.next_seq_nr <= first_seq_nr; + end if; -- NOTE: Only response with ACKNACK if SN is available (Or no Final Flag) if (HEARTBEAT_RESPONSE_DELAY /= DURATION_INFINITE and (first_seq_nr <= last_seq_nr or final_flag = '0')) then - res_time <= time + HEARTBEAT_RESPONSE_DELAY; + mem_r.res_time <= time + HEARTBEAT_RESPONSE_DELAY; -- NOTE: Last Bit denotes if this is Response or Suppression Delay - res_time(1)(0) <= '0'; + mem_r.res_time(1)(0) <= '0'; if ((time + HEARTBEAT_RESPONSE_DELAY) < tmp_dw) then tmp_dw := time + HEARTBEAT_RESPONSE_DELAY; end if; else - res_time <= TIME_INVALID; + mem_r.res_time <= TIME_INVALID; end if; -- If current Sequence Number obsolete (removed from source history cache) elsif (first_seq_nr > mem_endpoint_data.next_seq_nr) then - -- Store new expected Sequence Number and set Response Delay - next_seq_nr_next <= first_seq_nr; mem_op_start <= '1'; mem_opcode <= UPDATE_ENDPOINT; - mem_addr_update <= mem_addr_base; + mem_r.addr <= mem_endpoint_data.addr; tmp_flags := tmp_flags or EMF_NEXT_SEQ_NR_FLAG or EMF_RES_TIME_FLAG; + -- Store new expected Sequence Number and set Response Delay + mem_r.next_seq_nr <= first_seq_nr; -- NOTE: Only response with ACKNACK if SN is available (Or no Final Flag) if (HEARTBEAT_RESPONSE_DELAY /= DURATION_INFINITE and (first_seq_nr <= last_seq_nr or final_flag = '0')) then - res_time <= time + HEARTBEAT_RESPONSE_DELAY; + mem_r.res_time <= time + HEARTBEAT_RESPONSE_DELAY; -- NOTE: Last Bit denotes if this is Response or Suppression Delay - res_time(1)(0) <= '0'; + mem_r.res_time(1)(0) <= '0'; if ((time + HEARTBEAT_RESPONSE_DELAY) < tmp_dw) then tmp_dw := time + HEARTBEAT_RESPONSE_DELAY; end if; else - res_time <= TIME_INVALID; + mem_r.res_time <= TIME_INVALID; end if; -- If new Sequence Number is available or Writer expects ACKNACK elsif (last_seq_nr >= mem_endpoint_data.next_seq_nr or final_flag = '0') then -- Set Response Delay mem_op_start <= '1'; mem_opcode <= UPDATE_ENDPOINT; - mem_addr_update <= mem_addr_base; + mem_r.addr <= mem_endpoint_data.addr; tmp_flags := tmp_flags or EMF_RES_TIME_FLAG; if (HEARTBEAT_RESPONSE_DELAY /= DURATION_INFINITE) then - res_time <= time + HEARTBEAT_RESPONSE_DELAY; + mem_r.res_time <= time + HEARTBEAT_RESPONSE_DELAY; -- NOTE: Last Bit denotes if this is Response or Suppression Delay - res_time(1)(0) <= '0'; + mem_r.res_time(1)(0) <= '0'; if ((time + HEARTBEAT_RESPONSE_DELAY) < tmp_dw) then tmp_dw := time + HEARTBEAT_RESPONSE_DELAY; end if; else - res_time <= TIME_INVALID; + mem_r.res_time <= TIME_INVALID; end if; end if; -- Currently in Heartbeat Response Delay @@ -1051,16 +1033,16 @@ begin -- NOTE: Even if first_seq_nr > last_seq_nr, meaning that the writer does not have any stored SNs -- we don't cancel the response, because it may have been initiated by the Final Flag. - -- Store new expected Sequence Number - next_seq_nr_next <= first_seq_nr; mem_op_start <= '1'; mem_opcode <= UPDATE_ENDPOINT; - mem_addr_update <= mem_addr_base; + mem_r.addr <= mem_endpoint_data.addr; tmp_flags := tmp_flags or EMF_NEXT_SEQ_NR_FLAG; + -- Store new expected Sequence Number + mem_r.next_seq_nr <= first_seq_nr; end if; end if; - mem_field_flags <= tmp_flags; + mem_r.field_flags <= tmp_flags; -- XXX: Possible Worst Case Path (MULTIPLE 64-bit addition and comparison in same clock) -- Update Check Time @@ -1121,8 +1103,8 @@ begin stage_next <= SKIP_PACKET; -- Known Remote Endpoint - if (mem_addr_base /= ENDPOINT_MEMORY_MAX_ADDRESS) then - assert stable(clk, check_mask(current_emf, EMF_NEXT_SEQ_NR_FLAG)) severity FAILURE; + if (mem_endpoint_data.addr /= ENDPOINT_MEMORY_MAX_ADDRESS) then + assert stable(clk, check_mask(mem_endpoint_data.field_flags, EMF_NEXT_SEQ_NR_FLAG)) severity FAILURE; -- GAP is relevant if (gap_start <= mem_endpoint_data.next_seq_nr and mem_endpoint_data.next_seq_nr <= gap_list_end) then @@ -1148,10 +1130,11 @@ begin -- First valid sequence number found if (tmp_bitmap(bitmap_pos) = '0') then -- Update next sequence number - mem_op_start <= '1'; - mem_opcode <= UPDATE_ENDPOINT; - mem_addr_update <= mem_addr_base; - mem_field_flags <= EMF_NEXT_SEQ_NR_FLAG; + mem_op_start <= '1'; + mem_opcode <= UPDATE_ENDPOINT; + mem_r.addr <= mem_endpoint_data.addr; + mem_r.field_flags <= EMF_NEXT_SEQ_NR_FLAG; + mem_r.next_seq_nr <= next_seq_nr; -- DONE stage_next <= SKIP_PACKET; else @@ -1303,11 +1286,11 @@ begin -- Wait for Endpoint Data if (mem_op_done = '1') then -- Unknown Endpoint - if (mem_addr_base = ENDPOINT_MEMORY_MAX_ADDRESS) then + if (mem_endpoint_data.addr = ENDPOINT_MEMORY_MAX_ADDRESS) then -- Ignore stage_next <= SKIP_PACKET; else - assert stable(clk, check_mask(current_emf, EMF_NEXT_SEQ_NR_FLAG or EMF_LIFESPAN_DURATION_FLAG)) severity FAILURE; + assert stable(clk, check_mask(mem_endpoint_data.field_flags, EMF_NEXT_SEQ_NR_FLAG or EMF_LIFESPAN_DURATION_FLAG)) severity FAILURE; -- Data is Next expected Sequence Number if ((RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and seq_nr = mem_endpoint_data.next_seq_nr) or (RELIABILITY_QOS = BEST_EFFORT_RELIABILITY_QOS and seq_nr >= mem_endpoint_data.next_seq_nr) or (DURABILITY_QOS = VOLATILE_DURABILITY_QOS and mem_endpoint_data.next_seq_nr = SEQUENCENUMBER_UNKNOWN)) then @@ -1424,8 +1407,8 @@ begin when 9 => -- Wait for Endpoint Search if (mem_op_done = '1') then - assert stable(clk, mem_addr_base /= ENDPOINT_MEMORY_MAX_ADDRESS) severity FAILURE; - assert stable(clk, check_mask(current_emf, EMF_WRITER_ID_FLAG)) severity FAILURE; + assert stable(clk, mem_endpoint_data.addr /= ENDPOINT_MEMORY_MAX_ADDRESS) severity FAILURE; + assert stable(clk, check_mask(mem_endpoint_data.field_flags, EMF_WRITER_ID_FLAG)) severity FAILURE; valid_out_hc <= '1'; data_out_hc <= std_logic_vector(to_unsigned(mem_endpoint_data.writer_id, WORD_WIDTH)); @@ -1475,12 +1458,12 @@ begin -- "correctness" of the Writer Liveliness Protocol until the reader has no pending request from the Writer. -- Update Endpoint - mem_op_start <= '1'; - mem_opcode <= UPDATE_ENDPOINT; - mem_addr_update <= mem_addr_base; - mem_field_flags <= EMF_LEASE_DEADLINE_FLAG; + mem_op_start <= '1'; + mem_opcode <= UPDATE_ENDPOINT; + mem_r.addr <= mem_endpoint_data.addr; + mem_r.field_flags <= EMF_LEASE_DEADLINE_FLAG; if (LEASE_DURATION /= DURATION_INFINITE) then - lease_deadline <= time + LEASE_DURATION; + mem_r.lease_deadline <= time + LEASE_DURATION; -- XXX: Possible Worst Case Path (64-bit addition and comparison in same clock) -- Update Check Time @@ -1488,7 +1471,7 @@ begin check_time_next <= time + LEASE_DURATION; end if; else - lease_deadline <= TIME_INVALID; + mem_r.lease_deadline <= TIME_INVALID; end if; -- NOTE: In case the operation was unsucessfull (e.g. reached Resource Limits), the Sequence Number is not updated @@ -1496,7 +1479,8 @@ begin -- Operation was Accepted if (ret_hc = OK) then -- Update also next sequence number - mem_field_flags <= EMF_NEXT_SEQ_NR_FLAG or EMF_LEASE_DEADLINE_FLAG; + mem_r.field_flags <= EMF_NEXT_SEQ_NR_FLAG or EMF_LEASE_DEADLINE_FLAG; + mem_r.next_seq_nr <= next_seq_nr; end if; -- DONE @@ -1510,29 +1494,29 @@ begin case (cnt) is -- GET Endpoint when 0 => - mem_op_start <= '1'; - mem_opcode <= GET_ENDPOINT; - mem_addr_update <= mem_addr_base; - mem_field_flags <= EMF_LEASE_DEADLINE_FLAG or EMF_RES_TIME_FLAG or EMF_WRITER_ID_FLAG; - cnt_next <= 2; -- CHECK Endpoint + mem_op_start <= '1'; + mem_opcode <= GET_ENDPOINT; + mem_r.addr <= mem_endpoint_data.addr; + mem_r.field_flags <= EMF_LEASE_DEADLINE_FLAG or EMF_RES_TIME_FLAG or EMF_WRITER_ID_FLAG; + cnt_next <= 2; -- CHECK Endpoint -- GET NEXT Endpoint when 1 => - mem_op_start <= '1'; - mem_opcode <= GET_NEXT_ENDPOINT; - mem_addr_update <= mem_addr_base; - mem_field_flags <= EMF_LEASE_DEADLINE_FLAG or EMF_RES_TIME_FLAG or EMF_WRITER_ID_FLAG; - cnt_next <= 2; -- CHECK Endpoint + mem_op_start <= '1'; + mem_opcode <= GET_NEXT_ENDPOINT; + mem_r.addr <= mem_endpoint_data.addr; + mem_r.field_flags <= EMF_LEASE_DEADLINE_FLAG or EMF_RES_TIME_FLAG or EMF_WRITER_ID_FLAG; + cnt_next <= 2; -- CHECK Endpoint -- CHECK Endpoint when 2 => -- End of Endpoints - if (mem_addr_base = ENDPOINT_MEMORY_MAX_ADDRESS) then + if (mem_endpoint_data.addr = ENDPOINT_MEMORY_MAX_ADDRESS) then -- Reset stale_check_next <= '0'; -- DONE stage_next <= IDLE; else - assert stable(clk, check_mask(current_emf, EMF_LEASE_DEADLINE_FLAG or EMF_RES_TIME_FLAG or EMF_WRITER_ID_FLAG)) severity FAILURE; + assert stable(clk, check_mask(mem_endpoint_data.field_flags, EMF_LEASE_DEADLINE_FLAG or EMF_RES_TIME_FLAG or EMF_WRITER_ID_FLAG)) severity FAILURE; -- Endpoint Lease Expired if (mem_endpoint_data.lease_deadline /= TIME_INVALID and mem_endpoint_data.lease_deadline <= time) then @@ -1545,7 +1529,7 @@ begin -- Remove Endpoint mem_op_start <= '1'; mem_opcode <= REMOVE_ENDPOINT; - mem_addr_update <= mem_addr_base; + mem_r.addr <= mem_endpoint_data.addr; -- Continue Search cnt_next <= 0; -- GET Endpoint end if; @@ -1554,22 +1538,21 @@ begin -- If Suppression Delay passed, zero the time if(mem_endpoint_data.res_time(1)(0) = '1') then -- Disable Suppression - mem_op_start <= '1'; - mem_opcode <= UPDATE_ENDPOINT; - mem_addr_update <= mem_addr_base; - res_time <= TIME_INVALID; - mem_field_flags <= EMF_RES_TIME_FLAG; + mem_op_start <= '1'; + mem_opcode <= UPDATE_ENDPOINT; + mem_r.addr <= mem_endpoint_data.addr; + mem_r.field_flags <= EMF_RES_TIME_FLAG; + mem_r.res_time <= TIME_INVALID; -- Continue Search cnt_next <= 1; -- GET NEXT Endpoint -- If Response Delay Passed else -- Get Additional Data - mem_op_start <= '1'; - mem_opcode <= GET_ENDPOINT; - mem_addr_update <= mem_addr_base; - mem_field_flags <= EMF_ENTITYID_FLAG or EMF_IPV4_ADDR_FLAG or EMF_UDP_PORT_FLAG or EMF_NEXT_SEQ_NR_FLAG; - mem_addr_update <= mem_addr_base; - cnt_next <= 3; -- UPDATE Endpoint + mem_op_start <= '1'; + mem_opcode <= GET_ENDPOINT; + mem_r.addr <= mem_endpoint_data.addr; + mem_r.field_flags <= EMF_ENTITYID_FLAG or EMF_IPV4_ADDR_FLAG or EMF_UDP_PORT_FLAG or EMF_NEXT_SEQ_NR_FLAG; + cnt_next <= 3; -- UPDATE Endpoint end if; -- Update Check Time @@ -1601,14 +1584,19 @@ begin -- Synthesis Guard if (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS) then assert (mem_op_done = '1') severity FAILURE; - assert (mem_addr_base /= ENDPOINT_MEMORY_MAX_ADDRESS) severity FAILURE; + assert (mem_endpoint_data.addr /= ENDPOINT_MEMORY_MAX_ADDRESS) severity FAILURE; + + mem_op_start <= '1'; + mem_opcode <= UPDATE_ENDPOINT; + mem_r.addr <= mem_endpoint_data.addr; + mem_r.field_flags <= EMF_RES_TIME_FLAG; -- Set Heartbeat Suppression Time if (HEARTBEAT_SUPPRESSION_DELAY /= DURATION_INFINITE and HEARTBEAT_SUPPRESSION_DELAY /= DURATION_ZERO) then -- Set Heartbeat Suppression Time - res_time <= time + HEARTBEAT_SUPPRESSION_DELAY; + mem_r.res_time <= time + HEARTBEAT_SUPPRESSION_DELAY; -- NOTE: Last Bit denotes if this is Response or Suppression Delay - res_time(1)(0) <= '1'; + mem_r.res_time(1)(0) <= '1'; -- XXX: Possible Worst Case Path (64-bit addition and comparison in same clock) -- Update Check Time @@ -1621,12 +1609,8 @@ begin end if; else -- Disable Suppression - res_time <= TIME_INVALID; + mem_r.res_time <= TIME_INVALID; end if; - mem_op_start <= '1'; - mem_opcode <= UPDATE_ENDPOINT; - mem_addr_update <= mem_addr_base; - mem_field_flags <= EMF_RES_TIME_FLAG; -- Send ACKNACK -- Increment Acknack Counter @@ -1644,8 +1628,8 @@ begin -- Synthesis Guard / Wait for Endpoint Data if (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and mem_op_done = '1') then - assert stable(clk, mem_addr_base /= ENDPOINT_MEMORY_MAX_ADDRESS) severity FAILURE; - assert stable(clk, check_mask(current_emf, EMF_IPV4_ADDR_FLAG or EMF_UDP_PORT_FLAG)) severity FAILURE; + assert stable(clk, mem_endpoint_data.addr /= ENDPOINT_MEMORY_MAX_ADDRESS) severity FAILURE; + assert stable(clk, check_mask(mem_endpoint_data.field_flags, EMF_IPV4_ADDR_FLAG or EMF_UDP_PORT_FLAG)) severity FAILURE; -- Output FIFO Guard if (full_ro = '0') then @@ -1659,7 +1643,7 @@ begin cnt_next <= cnt + 1; -- Dest IPv4 Address when 1 => - data_out_ro <= mem_endpoint_data.addr; + data_out_ro <= mem_endpoint_data.ip_addr; cnt_next <= cnt + 1; -- Src and Dest UDPv4 Ports when 2 => @@ -1694,8 +1678,8 @@ begin -- Synthesis Guard / Wait for Endpoint Data if (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and mem_op_done = '1') then - assert stable(clk, mem_addr_base /= ENDPOINT_MEMORY_MAX_ADDRESS) severity FAILURE; - assert stable(clk, check_mask(current_emf, EMF_ENTITYID_FLAG or EMF_NEXT_SEQ_NR_FLAG)) severity FAILURE; + assert stable(clk, mem_endpoint_data.addr /= ENDPOINT_MEMORY_MAX_ADDRESS) severity FAILURE; + assert stable(clk, check_mask(mem_endpoint_data.field_flags, EMF_ENTITYID_FLAG or EMF_NEXT_SEQ_NR_FLAG)) severity FAILURE; -- Output FIFO Guard if (full_ro = '0') then @@ -1858,7 +1842,6 @@ begin mem_addr_latch_next <= mem_addr_latch; mem_endpoint_data_next <= mem_endpoint_data; mem_endpoint_latch_data_next <= mem_endpoint_latch_data; - current_emf_next <= current_emf; -- DEFAULT Unregistered mem_addr <= (others => '0'); mem_write_data <= (others => '0'); @@ -1874,30 +1857,17 @@ begin mem_op_done <= '1'; if (mem_op_start = '1') then - -- Latch Signals needed for Mermory Operation (Use _next signals, because some signals are set in same clk) - mem_endpoint_latch_data_next <= ( - guid => guid_next, - addr => addr_next, - portn => portn_next, - lease_deadline => lease_deadline, - lifespan => lifespan_next, - res_time => res_time, - next_seq_nr => next_seq_nr_next, - field_flag => mem_field_flags - ); + -- Latch Signals needed for Mermory Operation + mem_endpoint_latch_data_next <= mem_r; case(mem_opcode) is when SEARCH_ENDPOINT => mem_endpoint_data_next <= ZERO_ENDPOINT_DATA; if (RELIABILITY_QOS /= RELIABLE_RELIABILITY_QOS) then - current_emf_next <= EMF_IPV4_ADDR_FLAG or EMF_UDP_PORT_FLAG or EMF_RES_TIME_FLAG; - else - current_emf_next <= (others => '0'); + mem_endpoint_data_next.field_flags <= EMF_IPV4_ADDR_FLAG or EMF_UDP_PORT_FLAG or EMF_RES_TIME_FLAG; end if; - if (mem_occupied_head = ENDPOINT_MEMORY_MAX_ADDRESS) then - mem_addr_base_next <= ENDPOINT_MEMORY_MAX_ADDRESS; - else + if (mem_occupied_head /= ENDPOINT_MEMORY_MAX_ADDRESS) then mem_addr_base_next <= mem_occupied_head; mem_stage_next <= SEARCH_ENDPOINT; mem_cnt_next <= 0; @@ -1907,35 +1877,42 @@ begin mem_endpoint_data_next <= ZERO_ENDPOINT_DATA; if (RELIABILITY_QOS /= RELIABLE_RELIABILITY_QOS) then - current_emf_next <= EMF_IPV4_ADDR_FLAG or EMF_UDP_PORT_FLAG or EMF_RES_TIME_FLAG; - else - current_emf_next <= (others => '0'); + mem_endpoint_data_next.field_flags <= EMF_IPV4_ADDR_FLAG or EMF_UDP_PORT_FLAG or EMF_RES_TIME_FLAG; end if; - mem_addr_base_next <= mem_empty_head; - mem_stage_next <= INSERT_ENDPOINT; - mem_cnt_next <= 0; + mem_endpoint_data_next.addr <= mem_empty_head; + mem_addr_base_next <= mem_empty_head; + mem_stage_next <= INSERT_ENDPOINT; + mem_cnt_next <= 0; when UPDATE_ENDPOINT => - if (mem_addr_update = ENDPOINT_MEMORY_MAX_ADDRESS) then + if (mem_r.addr = ENDPOINT_MEMORY_MAX_ADDRESS) then mem_endpoint_data_next <= ZERO_ENDPOINT_DATA; - current_emf_next <= (others => '0'); - mem_addr_base_next <= ENDPOINT_MEMORY_MAX_ADDRESS; + if (RELIABILITY_QOS /= RELIABLE_RELIABILITY_QOS) then + mem_endpoint_data_next.field_flags <= EMF_IPV4_ADDR_FLAG or EMF_UDP_PORT_FLAG or EMF_RES_TIME_FLAG; + end if; else - current_emf_next <= current_emf or mem_field_flags; + if (mem_endpoint_data.addr /= mem_r.addr) then + mem_endpoint_data_next <= ZERO_ENDPOINT_DATA; + if (RELIABILITY_QOS /= RELIABLE_RELIABILITY_QOS) then + mem_endpoint_data_next.field_flags <= EMF_IPV4_ADDR_FLAG or EMF_UDP_PORT_FLAG or EMF_RES_TIME_FLAG; + end if; + end if; - mem_addr_base_next <= mem_addr_update; + mem_endpoint_data_next.addr <= mem_r.addr; + + mem_addr_base_next <= mem_r.addr; mem_stage_next <= UPDATE_ENDPOINT; - if (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_field_flags,EMF_IPV4_ADDR_FLAG)) then + if (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_r.field_flags,EMF_IPV4_ADDR_FLAG)) then mem_cnt_next <= 0; - elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_field_flags,EMF_UDP_PORT_FLAG)) then + elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_r.field_flags,EMF_UDP_PORT_FLAG)) then mem_cnt_next <= 1; - elsif check_mask(mem_field_flags,EMF_NEXT_SEQ_NR_FLAG) then + elsif check_mask(mem_r.field_flags,EMF_NEXT_SEQ_NR_FLAG) then mem_cnt_next <= 2; - elsif check_mask(mem_field_flags,EMF_LEASE_DEADLINE_FLAG) then + elsif check_mask(mem_r.field_flags,EMF_LEASE_DEADLINE_FLAG) then mem_cnt_next <= 4; - elsif check_mask(mem_field_flags,EMF_LIFESPAN_DURATION_FLAG) then + elsif check_mask(mem_r.field_flags,EMF_LIFESPAN_DURATION_FLAG) then mem_cnt_next <= 6; - elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_field_flags,EMF_RES_TIME_FLAG)) then + elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_r.field_flags,EMF_RES_TIME_FLAG)) then mem_cnt_next <= 8; else -- DONE @@ -1944,67 +1921,62 @@ begin end if; when REMOVE_ENDPOINT => mem_endpoint_data_next <= ZERO_ENDPOINT_DATA; - current_emf_next <= (others => '0'); + if (RELIABILITY_QOS /= RELIABLE_RELIABILITY_QOS) then + mem_endpoint_data_next.field_flags <= EMF_IPV4_ADDR_FLAG or EMF_UDP_PORT_FLAG or EMF_RES_TIME_FLAG; + end if; - if (mem_addr_update = ENDPOINT_MEMORY_MAX_ADDRESS) then - mem_addr_base_next <= ENDPOINT_MEMORY_MAX_ADDRESS; - else - mem_addr_base_next <= mem_addr_update; + if (mem_r.addr /= ENDPOINT_MEMORY_MAX_ADDRESS) then + mem_addr_base_next <= mem_r.addr; mem_stage_next <= REMOVE_ENDPOINT; mem_cnt_next <= 0; end if; when GET_NEXT_ENDPOINT => mem_endpoint_data_next <= ZERO_ENDPOINT_DATA; if (RELIABILITY_QOS /= RELIABLE_RELIABILITY_QOS) then - current_emf_next <= EMF_IPV4_ADDR_FLAG or EMF_UDP_PORT_FLAG or EMF_RES_TIME_FLAG; - else - current_emf_next <= (others => '0'); + mem_endpoint_data_next.field_flags <= EMF_IPV4_ADDR_FLAG or EMF_UDP_PORT_FLAG or EMF_RES_TIME_FLAG; end if; - if (mem_addr_update = ENDPOINT_MEMORY_MAX_ADDRESS) then - mem_addr_base_next <= ENDPOINT_MEMORY_MAX_ADDRESS; - else - mem_addr_base_next <= mem_addr_update; + if (mem_r.addr /= ENDPOINT_MEMORY_MAX_ADDRESS) then + mem_addr_base_next <= mem_r.addr; mem_stage_next <= GET_NEXT_ENDPOINT; mem_cnt_next <= 0; end if; when GET_ENDPOINT => - if (mem_addr_update = ENDPOINT_MEMORY_MAX_ADDRESS) then + if (mem_r.addr = ENDPOINT_MEMORY_MAX_ADDRESS) then mem_endpoint_data_next <= ZERO_ENDPOINT_DATA; - current_emf_next <= (others => '0'); - mem_addr_base_next <= ENDPOINT_MEMORY_MAX_ADDRESS; + if (RELIABILITY_QOS /= RELIABLE_RELIABILITY_QOS) then + mem_endpoint_data_next.field_flags <= EMF_IPV4_ADDR_FLAG or EMF_UDP_PORT_FLAG or EMF_RES_TIME_FLAG; + end if; else - if (mem_addr_base /= mem_addr_update) then + if (mem_endpoint_data.addr /= mem_r.addr) then mem_endpoint_data_next <= ZERO_ENDPOINT_DATA; if (RELIABILITY_QOS /= RELIABLE_RELIABILITY_QOS) then - current_emf_next <= EMF_IPV4_ADDR_FLAG or EMF_UDP_PORT_FLAG or EMF_RES_TIME_FLAG; - else - current_emf_next <= (others => '0'); + mem_endpoint_data_next.field_flags <= EMF_IPV4_ADDR_FLAG or EMF_UDP_PORT_FLAG or EMF_RES_TIME_FLAG; end if; - else - current_emf_next <= current_emf or mem_field_flags; end if; + mem_endpoint_data_next.addr <= mem_r.addr; + -- Fetch Endpoint Data - mem_addr_base_next <= mem_addr_update; + mem_addr_base_next <= mem_r.addr; mem_stage_next <= GET_ENDPOINT_DATA; - if check_mask(mem_field_flags,EMF_ENTITYID_FLAG) then + if check_mask(mem_r.field_flags,EMF_ENTITYID_FLAG) then mem_cnt_next <= 0; - elsif check_mask(mem_field_flags,EMF_GUIDPREFIX_FLAG) then + elsif check_mask(mem_r.field_flags,EMF_GUIDPREFIX_FLAG) then mem_cnt_next <= 1; - elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_field_flags,EMF_IPV4_ADDR_FLAG)) then + elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_r.field_flags,EMF_IPV4_ADDR_FLAG)) then mem_cnt_next <= 4; - elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_field_flags,EMF_UDP_PORT_FLAG)) then + elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_r.field_flags,EMF_UDP_PORT_FLAG)) then mem_cnt_next <= 5; - elsif check_mask(mem_field_flags,EMF_NEXT_SEQ_NR_FLAG) then + elsif check_mask(mem_r.field_flags,EMF_NEXT_SEQ_NR_FLAG) then mem_cnt_next <= 6; - elsif check_mask(mem_field_flags,EMF_LEASE_DEADLINE_FLAG) then + elsif check_mask(mem_r.field_flags,EMF_LEASE_DEADLINE_FLAG) then mem_cnt_next <= 8; - elsif check_mask(mem_field_flags,EMF_LIFESPAN_DURATION_FLAG) then + elsif check_mask(mem_r.field_flags,EMF_LIFESPAN_DURATION_FLAG) then mem_cnt_next <= 10; - elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_field_flags,EMF_RES_TIME_FLAG)) then + elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_r.field_flags,EMF_RES_TIME_FLAG)) then mem_cnt_next <= 12; - elsif check_mask(mem_endpoint_latch_data.field_flag,EMF_WRITER_ID_FLAG) then + elsif check_mask(mem_endpoint_latch_data.field_flags,EMF_WRITER_ID_FLAG) then mem_cnt_next <= 14; else -- DONE @@ -2103,25 +2075,26 @@ begin mem_cnt_next <= 8; -- GET Next Addr -- Match else + mem_endpoint_data_next.addr <= mem_addr_base; -- Fetch Endpoint Data mem_stage_next <= GET_ENDPOINT_DATA; - if check_mask(mem_endpoint_latch_data.field_flag,EMF_ENTITYID_FLAG) then + if check_mask(mem_endpoint_latch_data.field_flags,EMF_ENTITYID_FLAG) then mem_cnt_next <= 0; - elsif check_mask(mem_endpoint_latch_data.field_flag,EMF_GUIDPREFIX_FLAG) then + elsif check_mask(mem_endpoint_latch_data.field_flags,EMF_GUIDPREFIX_FLAG) then mem_cnt_next <= 1; - elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_IPV4_ADDR_FLAG)) then + elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flags,EMF_IPV4_ADDR_FLAG)) then mem_cnt_next <= 4; - elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_UDP_PORT_FLAG)) then + elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flags,EMF_UDP_PORT_FLAG)) then mem_cnt_next <= 5; - elsif check_mask(mem_endpoint_latch_data.field_flag,EMF_NEXT_SEQ_NR_FLAG) then + elsif check_mask(mem_endpoint_latch_data.field_flags,EMF_NEXT_SEQ_NR_FLAG) then mem_cnt_next <= 6; - elsif check_mask(mem_endpoint_latch_data.field_flag,EMF_LEASE_DEADLINE_FLAG) then + elsif check_mask(mem_endpoint_latch_data.field_flags,EMF_LEASE_DEADLINE_FLAG) then mem_cnt_next <= 8; - elsif check_mask(mem_endpoint_latch_data.field_flag,EMF_LIFESPAN_DURATION_FLAG) then + elsif check_mask(mem_endpoint_latch_data.field_flags,EMF_LIFESPAN_DURATION_FLAG) then mem_cnt_next <= 10; - elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_RES_TIME_FLAG)) then + elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flags,EMF_RES_TIME_FLAG)) then mem_cnt_next <= 12; - elsif check_mask(mem_endpoint_latch_data.field_flag,EMF_WRITER_ID_FLAG) then + elsif check_mask(mem_endpoint_latch_data.field_flags,EMF_WRITER_ID_FLAG) then mem_cnt_next <= 14; else -- DONE @@ -2145,7 +2118,7 @@ begin if (mem_valid_out = '1') then -- No more Endpoints if (resize(unsigned(mem_read_data),ENDPOINT_MEMORY_ADDR_WIDTH) = ENDPOINT_MEMORY_MAX_ADDRESS) then - mem_addr_base_next <= ENDPOINT_MEMORY_MAX_ADDRESS; --No match + mem_endpoint_data_next.addr <= ENDPOINT_MEMORY_MAX_ADDRESS; --No match -- DONE mem_stage_next <= IDLE; else @@ -2167,21 +2140,21 @@ begin mem_read <= '1'; -- Memory Flow Control Guard if (mem_ready_in = '1') then - if check_mask(mem_endpoint_latch_data.field_flag,EMF_GUIDPREFIX_FLAG) then + if check_mask(mem_endpoint_latch_data.field_flags,EMF_GUIDPREFIX_FLAG) then mem_cnt_next <= 1; - elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_IPV4_ADDR_FLAG)) then + elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flags,EMF_IPV4_ADDR_FLAG)) then mem_cnt_next <= 4; - elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_UDP_PORT_FLAG)) then + elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flags,EMF_UDP_PORT_FLAG)) then mem_cnt_next <= 5; - elsif check_mask(mem_endpoint_latch_data.field_flag,EMF_NEXT_SEQ_NR_FLAG) then + elsif check_mask(mem_endpoint_latch_data.field_flags,EMF_NEXT_SEQ_NR_FLAG) then mem_cnt_next <= 6; - elsif check_mask(mem_endpoint_latch_data.field_flag,EMF_LEASE_DEADLINE_FLAG) then + elsif check_mask(mem_endpoint_latch_data.field_flags,EMF_LEASE_DEADLINE_FLAG) then mem_cnt_next <= 8; - elsif check_mask(mem_endpoint_latch_data.field_flag,EMF_LIFESPAN_DURATION_FLAG) then + elsif check_mask(mem_endpoint_latch_data.field_flags,EMF_LIFESPAN_DURATION_FLAG) then mem_cnt_next <= 10; - elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_RES_TIME_FLAG)) then + elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flags,EMF_RES_TIME_FLAG)) then mem_cnt_next <= 12; - elsif check_mask(mem_endpoint_latch_data.field_flag,EMF_WRITER_ID_FLAG) then + elsif check_mask(mem_endpoint_latch_data.field_flags,EMF_WRITER_ID_FLAG) then mem_cnt_next <= 14; else mem_cnt_next <= 15; @@ -2212,22 +2185,22 @@ begin mem_read <= '1'; -- Memory Flow Control Guard if (mem_ready_in = '1') then - if (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_IPV4_ADDR_FLAG)) then + if (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flags,EMF_IPV4_ADDR_FLAG)) then mem_cnt_next <= 4; - elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_UDP_PORT_FLAG)) then + elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flags,EMF_UDP_PORT_FLAG)) then mem_cnt_next <= 5; - elsif check_mask(mem_endpoint_latch_data.field_flag,EMF_NEXT_SEQ_NR_FLAG) then + elsif check_mask(mem_endpoint_latch_data.field_flags,EMF_NEXT_SEQ_NR_FLAG) then mem_cnt_next <= 6; - elsif check_mask(mem_endpoint_latch_data.field_flag,EMF_LEASE_DEADLINE_FLAG) then + elsif check_mask(mem_endpoint_latch_data.field_flags,EMF_LEASE_DEADLINE_FLAG) then mem_cnt_next <= 8; - elsif check_mask(mem_endpoint_latch_data.field_flag,EMF_LIFESPAN_DURATION_FLAG) then + elsif check_mask(mem_endpoint_latch_data.field_flags,EMF_LIFESPAN_DURATION_FLAG) then mem_cnt_next <= 10; - elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_RES_TIME_FLAG)) then + elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flags,EMF_RES_TIME_FLAG)) then mem_cnt_next <= 12; - elsif check_mask(mem_endpoint_latch_data.field_flag,EMF_WRITER_ID_FLAG) then + elsif check_mask(mem_endpoint_latch_data.field_flags,EMF_WRITER_ID_FLAG) then mem_cnt_next <= 14; else - if check_mask(mem_endpoint_latch_data.field_flag,EMF_ENTITYID_FLAG) then + if check_mask(mem_endpoint_latch_data.field_flags,EMF_ENTITYID_FLAG) then mem_cnt_next <= 15; else mem_cnt_next <= 16; @@ -2243,22 +2216,22 @@ begin mem_read <= '1'; -- Memory Flow Control Guard if (mem_ready_in = '1') then - if (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_UDP_PORT_FLAG)) then + if (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flags,EMF_UDP_PORT_FLAG)) then mem_cnt_next <= 5; - elsif check_mask(mem_endpoint_latch_data.field_flag,EMF_NEXT_SEQ_NR_FLAG) then + elsif check_mask(mem_endpoint_latch_data.field_flags,EMF_NEXT_SEQ_NR_FLAG) then mem_cnt_next <= 6; - elsif check_mask(mem_endpoint_latch_data.field_flag,EMF_LEASE_DEADLINE_FLAG) then + elsif check_mask(mem_endpoint_latch_data.field_flags,EMF_LEASE_DEADLINE_FLAG) then mem_cnt_next <= 8; - elsif check_mask(mem_endpoint_latch_data.field_flag,EMF_LIFESPAN_DURATION_FLAG) then + elsif check_mask(mem_endpoint_latch_data.field_flags,EMF_LIFESPAN_DURATION_FLAG) then mem_cnt_next <= 10; - elsif ((RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS) and check_mask(mem_endpoint_latch_data.field_flag,EMF_RES_TIME_FLAG)) then + elsif ((RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS) and check_mask(mem_endpoint_latch_data.field_flags,EMF_RES_TIME_FLAG)) then mem_cnt_next <= 12; - elsif check_mask(mem_endpoint_latch_data.field_flag,EMF_WRITER_ID_FLAG) then + elsif check_mask(mem_endpoint_latch_data.field_flags,EMF_WRITER_ID_FLAG) then mem_cnt_next <= 14; else - if check_mask(mem_endpoint_latch_data.field_flag,EMF_ENTITYID_FLAG) then + if check_mask(mem_endpoint_latch_data.field_flags,EMF_ENTITYID_FLAG) then mem_cnt_next <= 15; - elsif check_mask(mem_endpoint_latch_data.field_flag,EMF_GUIDPREFIX_FLAG) then + elsif check_mask(mem_endpoint_latch_data.field_flags,EMF_GUIDPREFIX_FLAG) then mem_cnt_next <= 16; else mem_cnt_next <= 19; @@ -2275,22 +2248,22 @@ begin mem_read <= '1'; -- Memory Flow Control Guard if (mem_ready_in = '1') then - if check_mask(mem_endpoint_latch_data.field_flag,EMF_NEXT_SEQ_NR_FLAG) then + if check_mask(mem_endpoint_latch_data.field_flags,EMF_NEXT_SEQ_NR_FLAG) then mem_cnt_next <= 6; - elsif check_mask(mem_endpoint_latch_data.field_flag,EMF_LEASE_DEADLINE_FLAG) then + elsif check_mask(mem_endpoint_latch_data.field_flags,EMF_LEASE_DEADLINE_FLAG) then mem_cnt_next <= 8; - elsif check_mask(mem_endpoint_latch_data.field_flag,EMF_LIFESPAN_DURATION_FLAG) then + elsif check_mask(mem_endpoint_latch_data.field_flags,EMF_LIFESPAN_DURATION_FLAG) then mem_cnt_next <= 10; - elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_RES_TIME_FLAG)) then + elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flags,EMF_RES_TIME_FLAG)) then mem_cnt_next <= 12; - elsif check_mask(mem_endpoint_latch_data.field_flag,EMF_WRITER_ID_FLAG) then + elsif check_mask(mem_endpoint_latch_data.field_flags,EMF_WRITER_ID_FLAG) then mem_cnt_next <= 14; else - if check_mask(mem_endpoint_latch_data.field_flag,EMF_ENTITYID_FLAG) then + if check_mask(mem_endpoint_latch_data.field_flags,EMF_ENTITYID_FLAG) then mem_cnt_next <= 15; - elsif check_mask(mem_endpoint_latch_data.field_flag,EMF_GUIDPREFIX_FLAG) then + elsif check_mask(mem_endpoint_latch_data.field_flags,EMF_GUIDPREFIX_FLAG) then mem_cnt_next <= 16; - elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_IPV4_ADDR_FLAG)) then + elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flags,EMF_IPV4_ADDR_FLAG)) then mem_cnt_next <= 19; else mem_cnt_next <= 20; @@ -2314,22 +2287,22 @@ begin mem_read <= '1'; -- Memory Flow Control Guard if (mem_ready_in = '1') then - if check_mask(mem_endpoint_latch_data.field_flag,EMF_LEASE_DEADLINE_FLAG) then + if check_mask(mem_endpoint_latch_data.field_flags,EMF_LEASE_DEADLINE_FLAG) then mem_cnt_next <= 8; - elsif check_mask(mem_endpoint_latch_data.field_flag,EMF_LIFESPAN_DURATION_FLAG) then + elsif check_mask(mem_endpoint_latch_data.field_flags,EMF_LIFESPAN_DURATION_FLAG) then mem_cnt_next <= 10; - elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_RES_TIME_FLAG)) then + elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flags,EMF_RES_TIME_FLAG)) then mem_cnt_next <= 12; - elsif check_mask(mem_endpoint_latch_data.field_flag,EMF_WRITER_ID_FLAG) then + elsif check_mask(mem_endpoint_latch_data.field_flags,EMF_WRITER_ID_FLAG) then mem_cnt_next <= 14; else - if check_mask(mem_endpoint_latch_data.field_flag,EMF_ENTITYID_FLAG) then + if check_mask(mem_endpoint_latch_data.field_flags,EMF_ENTITYID_FLAG) then mem_cnt_next <= 15; - elsif check_mask(mem_endpoint_latch_data.field_flag,EMF_GUIDPREFIX_FLAG) then + elsif check_mask(mem_endpoint_latch_data.field_flags,EMF_GUIDPREFIX_FLAG) then mem_cnt_next <= 16; - elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_IPV4_ADDR_FLAG)) then + elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flags,EMF_IPV4_ADDR_FLAG)) then mem_cnt_next <= 19; - elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_UDP_PORT_FLAG)) then + elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flags,EMF_UDP_PORT_FLAG)) then mem_cnt_next <= 20; else mem_cnt_next <= 21; @@ -2352,22 +2325,22 @@ begin mem_read <= '1'; -- Memory Flow Control Guard if (mem_ready_in = '1') then - if check_mask(mem_endpoint_latch_data.field_flag,EMF_LIFESPAN_DURATION_FLAG) then + if check_mask(mem_endpoint_latch_data.field_flags,EMF_LIFESPAN_DURATION_FLAG) then mem_cnt_next <= 10; - elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_RES_TIME_FLAG)) then + elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flags,EMF_RES_TIME_FLAG)) then mem_cnt_next <= 12; - elsif check_mask(mem_endpoint_latch_data.field_flag,EMF_WRITER_ID_FLAG) then + elsif check_mask(mem_endpoint_latch_data.field_flags,EMF_WRITER_ID_FLAG) then mem_cnt_next <= 14; else - if check_mask(mem_endpoint_latch_data.field_flag,EMF_ENTITYID_FLAG) then + if check_mask(mem_endpoint_latch_data.field_flags,EMF_ENTITYID_FLAG) then mem_cnt_next <= 15; - elsif check_mask(mem_endpoint_latch_data.field_flag,EMF_GUIDPREFIX_FLAG) then + elsif check_mask(mem_endpoint_latch_data.field_flags,EMF_GUIDPREFIX_FLAG) then mem_cnt_next <= 16; - elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_IPV4_ADDR_FLAG)) then + elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flags,EMF_IPV4_ADDR_FLAG)) then mem_cnt_next <= 19; - elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_UDP_PORT_FLAG)) then + elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flags,EMF_UDP_PORT_FLAG)) then mem_cnt_next <= 20; - elsif check_mask(mem_endpoint_latch_data.field_flag,EMF_NEXT_SEQ_NR_FLAG) then + elsif check_mask(mem_endpoint_latch_data.field_flags,EMF_NEXT_SEQ_NR_FLAG) then mem_cnt_next <= 21; else mem_cnt_next <= 23; @@ -2390,22 +2363,22 @@ begin mem_read <= '1'; -- Memory Flow Control Guard if (mem_ready_in = '1') then - if (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_RES_TIME_FLAG)) then + if (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flags,EMF_RES_TIME_FLAG)) then mem_cnt_next <= 12; - elsif check_mask(mem_endpoint_latch_data.field_flag,EMF_WRITER_ID_FLAG) then + elsif check_mask(mem_endpoint_latch_data.field_flags,EMF_WRITER_ID_FLAG) then mem_cnt_next <= 14; else - if check_mask(mem_endpoint_latch_data.field_flag,EMF_ENTITYID_FLAG) then + if check_mask(mem_endpoint_latch_data.field_flags,EMF_ENTITYID_FLAG) then mem_cnt_next <= 15; - elsif check_mask(mem_endpoint_latch_data.field_flag,EMF_GUIDPREFIX_FLAG) then + elsif check_mask(mem_endpoint_latch_data.field_flags,EMF_GUIDPREFIX_FLAG) then mem_cnt_next <= 16; - elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_IPV4_ADDR_FLAG)) then + elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flags,EMF_IPV4_ADDR_FLAG)) then mem_cnt_next <= 19; - elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_UDP_PORT_FLAG)) then + elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flags,EMF_UDP_PORT_FLAG)) then mem_cnt_next <= 20; - elsif check_mask(mem_endpoint_latch_data.field_flag,EMF_NEXT_SEQ_NR_FLAG) then + elsif check_mask(mem_endpoint_latch_data.field_flags,EMF_NEXT_SEQ_NR_FLAG) then mem_cnt_next <= 21; - elsif check_mask(mem_endpoint_latch_data.field_flag,EMF_LEASE_DEADLINE_FLAG) then + elsif check_mask(mem_endpoint_latch_data.field_flags,EMF_LEASE_DEADLINE_FLAG) then mem_cnt_next <= 23; else mem_cnt_next <= 25; @@ -2433,22 +2406,22 @@ begin mem_read <= '1'; -- Memory Flow Control Guard if (mem_ready_in = '1') then - if check_mask(mem_endpoint_latch_data.field_flag,EMF_WRITER_ID_FLAG) then + if check_mask(mem_endpoint_latch_data.field_flags,EMF_WRITER_ID_FLAG) then mem_cnt_next <= 14; else - if check_mask(mem_endpoint_latch_data.field_flag,EMF_ENTITYID_FLAG) then + if check_mask(mem_endpoint_latch_data.field_flags,EMF_ENTITYID_FLAG) then mem_cnt_next <= 15; - elsif check_mask(mem_endpoint_latch_data.field_flag,EMF_GUIDPREFIX_FLAG) then + elsif check_mask(mem_endpoint_latch_data.field_flags,EMF_GUIDPREFIX_FLAG) then mem_cnt_next <= 16; - elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_IPV4_ADDR_FLAG)) then + elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flags,EMF_IPV4_ADDR_FLAG)) then mem_cnt_next <= 19; - elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_UDP_PORT_FLAG)) then + elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flags,EMF_UDP_PORT_FLAG)) then mem_cnt_next <= 20; - elsif check_mask(mem_endpoint_latch_data.field_flag,EMF_NEXT_SEQ_NR_FLAG) then + elsif check_mask(mem_endpoint_latch_data.field_flags,EMF_NEXT_SEQ_NR_FLAG) then mem_cnt_next <= 21; - elsif check_mask(mem_endpoint_latch_data.field_flag,EMF_LEASE_DEADLINE_FLAG) then + elsif check_mask(mem_endpoint_latch_data.field_flags,EMF_LEASE_DEADLINE_FLAG) then mem_cnt_next <= 23; - elsif check_mask(mem_endpoint_latch_data.field_flag,EMF_LIFESPAN_DURATION_FLAG) then + elsif check_mask(mem_endpoint_latch_data.field_flags,EMF_LIFESPAN_DURATION_FLAG) then mem_cnt_next <= 25; else mem_cnt_next <= 27; @@ -2463,21 +2436,21 @@ begin mem_read <= '1'; -- Memory Flow Control Guard if (mem_ready_in = '1') then - if check_mask(mem_endpoint_latch_data.field_flag,EMF_ENTITYID_FLAG) then + if check_mask(mem_endpoint_latch_data.field_flags,EMF_ENTITYID_FLAG) then mem_cnt_next <= 15; - elsif check_mask(mem_endpoint_latch_data.field_flag,EMF_GUIDPREFIX_FLAG) then + elsif check_mask(mem_endpoint_latch_data.field_flags,EMF_GUIDPREFIX_FLAG) then mem_cnt_next <= 16; - elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_IPV4_ADDR_FLAG)) then + elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flags,EMF_IPV4_ADDR_FLAG)) then mem_cnt_next <= 19; - elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_UDP_PORT_FLAG)) then + elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flags,EMF_UDP_PORT_FLAG)) then mem_cnt_next <= 20; - elsif check_mask(mem_endpoint_latch_data.field_flag,EMF_NEXT_SEQ_NR_FLAG) then + elsif check_mask(mem_endpoint_latch_data.field_flags,EMF_NEXT_SEQ_NR_FLAG) then mem_cnt_next <= 21; - elsif check_mask(mem_endpoint_latch_data.field_flag,EMF_LEASE_DEADLINE_FLAG) then + elsif check_mask(mem_endpoint_latch_data.field_flags,EMF_LEASE_DEADLINE_FLAG) then mem_cnt_next <= 23; - elsif check_mask(mem_endpoint_latch_data.field_flag,EMF_LIFESPAN_DURATION_FLAG) then + elsif check_mask(mem_endpoint_latch_data.field_flags,EMF_LIFESPAN_DURATION_FLAG) then mem_cnt_next <= 25; - elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_RES_TIME_FLAG)) then + elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flags,EMF_RES_TIME_FLAG)) then mem_cnt_next <= 27; else mem_cnt_next <= 29; @@ -2489,23 +2462,23 @@ begin -- Memory Flow Control Guard if (mem_valid_out = '1') then mem_endpoint_data_next.guid(3) <= mem_read_data; - current_emf_next <= current_emf or EMF_ENTITYID_FLAG; + mem_endpoint_data_next.field_flags <= mem_endpoint_data.field_flags or EMF_ENTITYID_FLAG; - if check_mask(mem_endpoint_latch_data.field_flag,EMF_GUIDPREFIX_FLAG) then + if check_mask(mem_endpoint_latch_data.field_flags,EMF_GUIDPREFIX_FLAG) then mem_cnt_next <= 16; - elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_IPV4_ADDR_FLAG)) then + elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flags,EMF_IPV4_ADDR_FLAG)) then mem_cnt_next <= 19; - elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_UDP_PORT_FLAG)) then + elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flags,EMF_UDP_PORT_FLAG)) then mem_cnt_next <= 20; - elsif check_mask(mem_endpoint_latch_data.field_flag,EMF_NEXT_SEQ_NR_FLAG) then + elsif check_mask(mem_endpoint_latch_data.field_flags,EMF_NEXT_SEQ_NR_FLAG) then mem_cnt_next <= 21; - elsif check_mask(mem_endpoint_latch_data.field_flag,EMF_LEASE_DEADLINE_FLAG) then + elsif check_mask(mem_endpoint_latch_data.field_flags,EMF_LEASE_DEADLINE_FLAG) then mem_cnt_next <= 23; - elsif check_mask(mem_endpoint_latch_data.field_flag,EMF_LIFESPAN_DURATION_FLAG) then + elsif check_mask(mem_endpoint_latch_data.field_flags,EMF_LIFESPAN_DURATION_FLAG) then mem_cnt_next <= 25; - elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_RES_TIME_FLAG)) then + elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flags,EMF_RES_TIME_FLAG)) then mem_cnt_next <= 27; - elsif check_mask(mem_endpoint_latch_data.field_flag,EMF_WRITER_ID_FLAG) then + elsif check_mask(mem_endpoint_latch_data.field_flags,EMF_WRITER_ID_FLAG) then mem_cnt_next <= 29; else -- DONE @@ -2536,21 +2509,21 @@ begin -- Memory Flow Control Guard if (mem_valid_out = '1') then mem_endpoint_data_next.guid(2) <= mem_read_data; - current_emf_next <= current_emf or EMF_GUIDPREFIX_FLAG; + mem_endpoint_data_next.field_flags <= mem_endpoint_data.field_flags or EMF_GUIDPREFIX_FLAG; - if (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_IPV4_ADDR_FLAG)) then + if (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flags,EMF_IPV4_ADDR_FLAG)) then mem_cnt_next <= 19; - elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_UDP_PORT_FLAG)) then + elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flags,EMF_UDP_PORT_FLAG)) then mem_cnt_next <= 20; - elsif check_mask(mem_endpoint_latch_data.field_flag,EMF_NEXT_SEQ_NR_FLAG) then + elsif check_mask(mem_endpoint_latch_data.field_flags,EMF_NEXT_SEQ_NR_FLAG) then mem_cnt_next <= 21; - elsif check_mask(mem_endpoint_latch_data.field_flag,EMF_LEASE_DEADLINE_FLAG) then + elsif check_mask(mem_endpoint_latch_data.field_flags,EMF_LEASE_DEADLINE_FLAG) then mem_cnt_next <= 23; - elsif check_mask(mem_endpoint_latch_data.field_flag,EMF_LIFESPAN_DURATION_FLAG) then + elsif check_mask(mem_endpoint_latch_data.field_flags,EMF_LIFESPAN_DURATION_FLAG) then mem_cnt_next <= 25; - elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_RES_TIME_FLAG)) then + elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flags,EMF_RES_TIME_FLAG)) then mem_cnt_next <= 27; - elsif check_mask(mem_endpoint_latch_data.field_flag,EMF_WRITER_ID_FLAG) then + elsif check_mask(mem_endpoint_latch_data.field_flags,EMF_WRITER_ID_FLAG) then mem_cnt_next <= 29; else -- DONE @@ -2564,20 +2537,20 @@ begin mem_ready_out <= '1'; -- Memory Flow Control Guard if (mem_valid_out = '1') then - mem_endpoint_data_next.addr <= mem_read_data; - current_emf_next <= current_emf or EMF_IPV4_ADDR_FLAG; + mem_endpoint_data_next.ip_addr <= mem_read_data; + mem_endpoint_data_next.field_flags <= mem_endpoint_data.field_flags or EMF_IPV4_ADDR_FLAG; - if (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_UDP_PORT_FLAG)) then + if (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flags,EMF_UDP_PORT_FLAG)) then mem_cnt_next <= 20; - elsif check_mask(mem_endpoint_latch_data.field_flag,EMF_NEXT_SEQ_NR_FLAG) then + elsif check_mask(mem_endpoint_latch_data.field_flags,EMF_NEXT_SEQ_NR_FLAG) then mem_cnt_next <= 21; - elsif check_mask(mem_endpoint_latch_data.field_flag,EMF_LEASE_DEADLINE_FLAG) then + elsif check_mask(mem_endpoint_latch_data.field_flags,EMF_LEASE_DEADLINE_FLAG) then mem_cnt_next <= 23; - elsif check_mask(mem_endpoint_latch_data.field_flag,EMF_LIFESPAN_DURATION_FLAG) then + elsif check_mask(mem_endpoint_latch_data.field_flags,EMF_LIFESPAN_DURATION_FLAG) then mem_cnt_next <= 25; - elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_RES_TIME_FLAG)) then + elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flags,EMF_RES_TIME_FLAG)) then mem_cnt_next <= 27; - elsif check_mask(mem_endpoint_latch_data.field_flag,EMF_WRITER_ID_FLAG) then + elsif check_mask(mem_endpoint_latch_data.field_flags,EMF_WRITER_ID_FLAG) then mem_cnt_next <= 29; else -- DONE @@ -2593,17 +2566,17 @@ begin -- Memory Flow Control Guard if (mem_valid_out = '1') then mem_endpoint_data_next.portn <= mem_read_data(WORD_WIDTH-1 downto WORD_WIDTH-UDP_PORT_WIDTH); - current_emf_next <= current_emf or EMF_UDP_PORT_FLAG; + mem_endpoint_data_next.field_flags <= mem_endpoint_data.field_flags or EMF_UDP_PORT_FLAG; - if check_mask(mem_endpoint_latch_data.field_flag,EMF_NEXT_SEQ_NR_FLAG) then + if check_mask(mem_endpoint_latch_data.field_flags,EMF_NEXT_SEQ_NR_FLAG) then mem_cnt_next <= 21; - elsif check_mask(mem_endpoint_latch_data.field_flag,EMF_LEASE_DEADLINE_FLAG) then + elsif check_mask(mem_endpoint_latch_data.field_flags,EMF_LEASE_DEADLINE_FLAG) then mem_cnt_next <= 23; - elsif check_mask(mem_endpoint_latch_data.field_flag,EMF_LIFESPAN_DURATION_FLAG) then + elsif check_mask(mem_endpoint_latch_data.field_flags,EMF_LIFESPAN_DURATION_FLAG) then mem_cnt_next <= 25; - elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_RES_TIME_FLAG)) then + elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flags,EMF_RES_TIME_FLAG)) then mem_cnt_next <= 27; - elsif check_mask(mem_endpoint_latch_data.field_flag,EMF_WRITER_ID_FLAG) then + elsif check_mask(mem_endpoint_latch_data.field_flags,EMF_WRITER_ID_FLAG) then mem_cnt_next <= 29; else -- DONE @@ -2626,15 +2599,15 @@ begin -- Memory Flow Control Guard if (mem_valid_out = '1') then mem_endpoint_data_next.next_seq_nr(1) <= unsigned(mem_read_data); - current_emf_next <= current_emf or EMF_NEXT_SEQ_NR_FLAG; + mem_endpoint_data_next.field_flags <= mem_endpoint_data.field_flags or EMF_NEXT_SEQ_NR_FLAG; - if check_mask(mem_endpoint_latch_data.field_flag,EMF_LEASE_DEADLINE_FLAG) then + if check_mask(mem_endpoint_latch_data.field_flags,EMF_LEASE_DEADLINE_FLAG) then mem_cnt_next <= 23; - elsif check_mask(mem_endpoint_latch_data.field_flag,EMF_LIFESPAN_DURATION_FLAG) then + elsif check_mask(mem_endpoint_latch_data.field_flags,EMF_LIFESPAN_DURATION_FLAG) then mem_cnt_next <= 25; - elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_RES_TIME_FLAG)) then + elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flags,EMF_RES_TIME_FLAG)) then mem_cnt_next <= 27; - elsif check_mask(mem_endpoint_latch_data.field_flag,EMF_WRITER_ID_FLAG) then + elsif check_mask(mem_endpoint_latch_data.field_flags,EMF_WRITER_ID_FLAG) then mem_cnt_next <= 29; else -- DONE @@ -2656,13 +2629,13 @@ begin -- Memory Flow Control Guard if (mem_valid_out = '1') then mem_endpoint_data_next.lease_deadline(1) <= unsigned(mem_read_data); - current_emf_next <= current_emf or EMF_LEASE_DEADLINE_FLAG; + mem_endpoint_data_next.field_flags <= mem_endpoint_data.field_flags or EMF_LEASE_DEADLINE_FLAG; - if check_mask(mem_endpoint_latch_data.field_flag,EMF_LIFESPAN_DURATION_FLAG) then + if check_mask(mem_endpoint_latch_data.field_flags,EMF_LIFESPAN_DURATION_FLAG) then mem_cnt_next <= 25; - elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_RES_TIME_FLAG)) then + elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flags,EMF_RES_TIME_FLAG)) then mem_cnt_next <= 27; - elsif check_mask(mem_endpoint_latch_data.field_flag,EMF_WRITER_ID_FLAG) then + elsif check_mask(mem_endpoint_latch_data.field_flags,EMF_WRITER_ID_FLAG) then mem_cnt_next <= 29; else -- DONE @@ -2684,11 +2657,11 @@ begin -- Memory Flow Control Guard if (mem_valid_out = '1') then mem_endpoint_data_next.lifespan(1) <= unsigned(mem_read_data); - current_emf_next <= current_emf or EMF_LIFESPAN_DURATION_FLAG; + mem_endpoint_data_next.field_flags <= mem_endpoint_data.field_flags or EMF_LIFESPAN_DURATION_FLAG; - if (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_RES_TIME_FLAG)) then + if (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flags,EMF_RES_TIME_FLAG)) then mem_cnt_next <= 27; - elsif check_mask(mem_endpoint_latch_data.field_flag,EMF_WRITER_ID_FLAG) then + elsif check_mask(mem_endpoint_latch_data.field_flags,EMF_WRITER_ID_FLAG) then mem_cnt_next <= 29; else -- DONE @@ -2715,9 +2688,9 @@ begin -- Memory Flow Control Guard if (mem_valid_out = '1') then mem_endpoint_data_next.res_time(1) <= unsigned(mem_read_data); - current_emf_next <= current_emf or EMF_RES_TIME_FLAG; + mem_endpoint_data_next.field_flags <= mem_endpoint_data.field_flags or EMF_RES_TIME_FLAG; - if check_mask(mem_endpoint_latch_data.field_flag,EMF_WRITER_ID_FLAG) then + if check_mask(mem_endpoint_latch_data.field_flags,EMF_WRITER_ID_FLAG) then mem_cnt_next <= 29; else -- DONE @@ -2731,7 +2704,7 @@ begin -- Memory Flow Control Guard if (mem_valid_out = '1') then mem_endpoint_data_next.writer_id <= to_integer(unsigned(mem_read_data)); - current_emf_next <= current_emf or EMF_WRITER_ID_FLAG; + mem_endpoint_data_next.field_flags <= mem_endpoint_data.field_flags or EMF_WRITER_ID_FLAG; -- DONE mem_stage_next <= IDLE; @@ -2757,7 +2730,7 @@ begin mem_addr <= mem_addr_base + EMF_ENTITYID_OFFSET; mem_write_data <= mem_endpoint_latch_data.guid(3); mem_endpoint_data_next.guid(3) <= mem_endpoint_latch_data.guid(3); - current_emf_next <= current_emf or EMF_ENTITYID_FLAG; + mem_endpoint_data_next.field_flags <= mem_endpoint_data.field_flags or EMF_ENTITYID_FLAG; -- Memory Flow Control Guard if (mem_ready_in = '1') then @@ -2791,7 +2764,7 @@ begin mem_addr <= mem_addr_base + EMF_GUIDPREFIX_OFFSET + 2; mem_write_data <= mem_endpoint_latch_data.guid(2); mem_endpoint_data_next.guid(2) <= mem_endpoint_latch_data.guid(2); - current_emf_next <= current_emf or EMF_GUIDPREFIX_FLAG; + mem_endpoint_data_next.field_flags <= mem_endpoint_data.field_flags or EMF_GUIDPREFIX_FLAG; -- Memory Flow Control Guard if (mem_ready_in = '1') then @@ -2807,9 +2780,9 @@ begin if (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS) then mem_valid_in <= '1'; mem_addr <= mem_addr_base + EMF_IPV4_ADDR_OFFSET; - mem_write_data <= mem_endpoint_latch_data.addr; - mem_endpoint_data_next.addr <= mem_endpoint_latch_data.addr; - current_emf_next <= current_emf or EMF_IPV4_ADDR_FLAG; + mem_write_data <= mem_endpoint_latch_data.ip_addr; + mem_endpoint_data_next.ip_addr <= mem_endpoint_latch_data.ip_addr; + mem_endpoint_data_next.field_flags <= mem_endpoint_data.field_flags or EMF_IPV4_ADDR_FLAG; -- Memory Flow Control Guard if (mem_ready_in = '1') then @@ -2824,7 +2797,7 @@ begin mem_addr <= mem_addr_base + EMF_UDP_PORT_OFFSET; mem_write_data <= mem_endpoint_latch_data.portn & (0 to (mem_write_data'length-mem_endpoint_latch_data.portn'length-1) => '0'); mem_endpoint_data_next.portn <= mem_endpoint_latch_data.portn; - current_emf_next <= current_emf or EMF_UDP_PORT_FLAG; + mem_endpoint_data_next.field_flags <= mem_endpoint_data.field_flags or EMF_UDP_PORT_FLAG; -- Memory Flow Control Guard if (mem_ready_in = '1') then @@ -2857,7 +2830,7 @@ begin mem_write_data <= std_logic_vector(FIRST_SEQUENCENUMBER(1)); mem_endpoint_data_next.next_seq_nr <= FIRST_SEQUENCENUMBER; end if; - current_emf_next <= current_emf or EMF_NEXT_SEQ_NR_FLAG; + mem_endpoint_data_next.field_flags <= mem_endpoint_data.field_flags or EMF_NEXT_SEQ_NR_FLAG; -- Memory Flow Control Guard if (mem_ready_in = '1') then @@ -2879,7 +2852,7 @@ begin mem_addr <= mem_addr_base + EMF_LEASE_DEADLINE_OFFSET + 1; mem_write_data <= std_logic_vector(mem_endpoint_latch_data.lease_deadline(1)); mem_endpoint_data_next.lease_deadline <= mem_endpoint_latch_data.lease_deadline; - current_emf_next <= current_emf or EMF_LEASE_DEADLINE_FLAG; + mem_endpoint_data_next.field_flags <= mem_endpoint_data.field_flags or EMF_LEASE_DEADLINE_FLAG; -- Memory Flow Control Guard if (mem_ready_in = '1') then @@ -2901,7 +2874,7 @@ begin mem_addr <= mem_addr_base + EMF_LIFESPAN_DURATION_OFFSET + 1; mem_write_data <= std_logic_vector(mem_endpoint_latch_data.lifespan(1)); mem_endpoint_data_next.lifespan <= mem_endpoint_latch_data.lifespan; - current_emf_next <= current_emf or EMF_LIFESPAN_DURATION_FLAG; + mem_endpoint_data_next.field_flags <= mem_endpoint_data.field_flags or EMF_LIFESPAN_DURATION_FLAG; -- Memory Flow Control Guard if (mem_ready_in = '1') then @@ -2931,7 +2904,7 @@ begin mem_addr <= mem_addr_base + EMF_RES_TIME_OFFSET + 1; mem_write_data <= std_logic_vector(TIME_INVALID(1)); mem_endpoint_data_next.res_time <= TIME_INVALID; - current_emf_next <= current_emf or EMF_RES_TIME_FLAG; + mem_endpoint_data_next.field_flags <= mem_endpoint_data.field_flags or EMF_RES_TIME_FLAG; -- Memory Flow Control Guard if (mem_ready_in = '1') then @@ -2996,20 +2969,20 @@ begin if (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS) then mem_valid_in <= '1'; mem_addr <= mem_addr_base + EMF_IPV4_ADDR_OFFSET; - mem_write_data <= mem_endpoint_latch_data.addr; - mem_endpoint_data_next.addr <= mem_endpoint_latch_data.addr; - current_emf_next <= current_emf or EMF_IPV4_ADDR_FLAG; + mem_write_data <= mem_endpoint_latch_data.ip_addr; + mem_endpoint_data_next.ip_addr <= mem_endpoint_latch_data.ip_addr; + mem_endpoint_data_next.field_flags <= mem_endpoint_data.field_flags or EMF_IPV4_ADDR_FLAG; -- Memory Flow Control Guard if (mem_ready_in = '1') then - if (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_UDP_PORT_FLAG)) then + if (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flags,EMF_UDP_PORT_FLAG)) then mem_cnt_next <= 1; - elsif check_mask(mem_endpoint_latch_data.field_flag,EMF_NEXT_SEQ_NR_FLAG) then + elsif check_mask(mem_endpoint_latch_data.field_flags,EMF_NEXT_SEQ_NR_FLAG) then mem_cnt_next <= 2; - elsif check_mask(mem_endpoint_latch_data.field_flag,EMF_LEASE_DEADLINE_FLAG) then + elsif check_mask(mem_endpoint_latch_data.field_flags,EMF_LEASE_DEADLINE_FLAG) then mem_cnt_next <= 4; - elsif check_mask(mem_endpoint_latch_data.field_flag,EMF_LIFESPAN_DURATION_FLAG) then + elsif check_mask(mem_endpoint_latch_data.field_flags,EMF_LIFESPAN_DURATION_FLAG) then mem_cnt_next <= 6; - elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_RES_TIME_FLAG)) then + elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flags,EMF_RES_TIME_FLAG)) then mem_cnt_next <= 8; else -- DONE @@ -3025,17 +2998,17 @@ begin mem_addr <= mem_addr_base + EMF_UDP_PORT_OFFSET; mem_write_data <= mem_endpoint_latch_data.portn & (0 to (mem_write_data'length-mem_endpoint_latch_data.portn'length-1) => '0'); mem_endpoint_data_next.portn <= mem_endpoint_latch_data.portn; - current_emf_next <= current_emf or EMF_UDP_PORT_FLAG; + mem_endpoint_data_next.field_flags <= mem_endpoint_data.field_flags or EMF_UDP_PORT_FLAG; -- Memory Flow Control Guard if (mem_ready_in = '1') then - if check_mask(mem_endpoint_latch_data.field_flag,EMF_NEXT_SEQ_NR_FLAG) then + if check_mask(mem_endpoint_latch_data.field_flags,EMF_NEXT_SEQ_NR_FLAG) then mem_cnt_next <= 2; - elsif check_mask(mem_endpoint_latch_data.field_flag,EMF_LEASE_DEADLINE_FLAG) then + elsif check_mask(mem_endpoint_latch_data.field_flags,EMF_LEASE_DEADLINE_FLAG) then mem_cnt_next <= 4; - elsif check_mask(mem_endpoint_latch_data.field_flag,EMF_LIFESPAN_DURATION_FLAG) then + elsif check_mask(mem_endpoint_latch_data.field_flags,EMF_LIFESPAN_DURATION_FLAG) then mem_cnt_next <= 6; - elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_RES_TIME_FLAG)) then + elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flags,EMF_RES_TIME_FLAG)) then mem_cnt_next <= 8; else -- DONE @@ -3058,15 +3031,15 @@ begin mem_addr <= mem_addr_base + EMF_NEXT_SEQ_NR_OFFSET + 1; mem_write_data <= std_logic_vector(mem_endpoint_latch_data.next_seq_nr(1)); mem_endpoint_data_next.next_seq_nr <= mem_endpoint_latch_data.next_seq_nr; - current_emf_next <= current_emf or EMF_NEXT_SEQ_NR_FLAG; + mem_endpoint_data_next.field_flags <= mem_endpoint_data.field_flags or EMF_NEXT_SEQ_NR_FLAG; -- Memory Flow Control Guard if (mem_ready_in = '1') then - if check_mask(mem_endpoint_latch_data.field_flag,EMF_LEASE_DEADLINE_FLAG) then + if check_mask(mem_endpoint_latch_data.field_flags,EMF_LEASE_DEADLINE_FLAG) then mem_cnt_next <= 4; - elsif check_mask(mem_endpoint_latch_data.field_flag,EMF_LIFESPAN_DURATION_FLAG) then + elsif check_mask(mem_endpoint_latch_data.field_flags,EMF_LIFESPAN_DURATION_FLAG) then mem_cnt_next <= 6; - elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_RES_TIME_FLAG)) then + elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flags,EMF_RES_TIME_FLAG)) then mem_cnt_next <= 8; else -- DONE @@ -3088,12 +3061,12 @@ begin mem_addr <= mem_addr_base + EMF_LEASE_DEADLINE_OFFSET + 1; mem_write_data <= std_logic_vector(mem_endpoint_latch_data.lease_deadline(1)); mem_endpoint_data_next.lease_deadline <= mem_endpoint_latch_data.lease_deadline; - current_emf_next <= current_emf or EMF_LEASE_DEADLINE_FLAG; + mem_endpoint_data_next.field_flags <= mem_endpoint_data.field_flags or EMF_LEASE_DEADLINE_FLAG; -- Memory Flow Control Guard if (mem_ready_in = '1') then - if check_mask(mem_endpoint_latch_data.field_flag,EMF_LIFESPAN_DURATION_FLAG) then + if check_mask(mem_endpoint_latch_data.field_flags,EMF_LIFESPAN_DURATION_FLAG) then mem_cnt_next <= 6; - elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_RES_TIME_FLAG)) then + elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flags,EMF_RES_TIME_FLAG)) then mem_cnt_next <= 8; else -- DONE @@ -3115,10 +3088,10 @@ begin mem_addr <= mem_addr_base + EMF_LIFESPAN_DURATION_OFFSET + 1; mem_write_data <= std_logic_vector(mem_endpoint_latch_data.lifespan(1)); mem_endpoint_data_next.lifespan <= mem_endpoint_latch_data.lifespan; - current_emf_next <= current_emf or EMF_LIFESPAN_DURATION_FLAG; + mem_endpoint_data_next.field_flags <= mem_endpoint_data.field_flags or EMF_LIFESPAN_DURATION_FLAG; -- Memory Flow Control Guard if (mem_ready_in = '1') then - if (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_RES_TIME_FLAG)) then + if (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flags,EMF_RES_TIME_FLAG)) then mem_cnt_next <= 8; else -- DONE @@ -3145,7 +3118,7 @@ begin mem_addr <= mem_addr_base + EMF_RES_TIME_OFFSET + 1; mem_write_data <= std_logic_vector(mem_endpoint_latch_data.res_time(1)); mem_endpoint_data_next.res_time <= mem_endpoint_latch_data.res_time; - current_emf_next <= current_emf or EMF_RES_TIME_FLAG; + mem_endpoint_data_next.field_flags <= mem_endpoint_data.field_flags or EMF_RES_TIME_FLAG; -- Memory Flow Control Guard if (mem_ready_in = '1') then -- DONE @@ -3205,7 +3178,7 @@ begin -- RESET Occupied List Head mem_occupied_head_next <= ENDPOINT_MEMORY_MAX_ADDRESS; - mem_addr_base_next <= ENDPOINT_MEMORY_MAX_ADDRESS; + mem_endpoint_data_next.addr <= ENDPOINT_MEMORY_MAX_ADDRESS; -- DONE mem_stage_next <= IDLE; else @@ -3228,6 +3201,8 @@ begin if (mem_addr_latch = ENDPOINT_MEMORY_MAX_ADDRESS) then -- Set New Occupied List Head mem_occupied_head_next <= mem_addr_base; + + mem_endpoint_data_next.addr <= mem_addr_base; -- DONE mem_stage_next <= IDLE; else @@ -3243,7 +3218,7 @@ begin mem_write_data <= std_logic_vector(resize(mem_addr_latch,WORD_WIDTH)); if (mem_ready_in = '1') then - mem_addr_base_next <= mem_addr_latch; + mem_endpoint_data_next.addr <= mem_addr_latch; -- DONE mem_stage_next <= IDLE; end if; @@ -3269,31 +3244,32 @@ begin -- Memory Flow Control Guard if (mem_valid_out = '1') then if (resize(unsigned(mem_read_data),ENDPOINT_MEMORY_ADDR_WIDTH) = ENDPOINT_MEMORY_MAX_ADDRESS) then - mem_addr_base_next <= ENDPOINT_MEMORY_MAX_ADDRESS; + mem_endpoint_data_next.addr <= ENDPOINT_MEMORY_MAX_ADDRESS; -- DONE mem_stage_next <= IDLE; else + mem_endpoint_data_next.addr <= resize(unsigned(mem_read_data),ENDPOINT_MEMORY_ADDR_WIDTH); + -- Fetch Endpoint Data mem_addr_base_next <= resize(unsigned(mem_read_data),ENDPOINT_MEMORY_ADDR_WIDTH); - mem_stage_next <= GET_ENDPOINT_DATA; - if check_mask(mem_endpoint_latch_data.field_flag,EMF_ENTITYID_FLAG) then + if check_mask(mem_endpoint_latch_data.field_flags,EMF_ENTITYID_FLAG) then mem_cnt_next <= 0; - elsif check_mask(mem_endpoint_latch_data.field_flag,EMF_GUIDPREFIX_FLAG) then + elsif check_mask(mem_endpoint_latch_data.field_flags,EMF_GUIDPREFIX_FLAG) then mem_cnt_next <= 1; - elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_IPV4_ADDR_FLAG)) then + elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flags,EMF_IPV4_ADDR_FLAG)) then mem_cnt_next <= 4; - elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_UDP_PORT_FLAG)) then + elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flags,EMF_UDP_PORT_FLAG)) then mem_cnt_next <= 5; - elsif check_mask(mem_endpoint_latch_data.field_flag,EMF_NEXT_SEQ_NR_FLAG) then + elsif check_mask(mem_endpoint_latch_data.field_flags,EMF_NEXT_SEQ_NR_FLAG) then mem_cnt_next <= 6; - elsif check_mask(mem_endpoint_latch_data.field_flag,EMF_LEASE_DEADLINE_FLAG) then + elsif check_mask(mem_endpoint_latch_data.field_flags,EMF_LEASE_DEADLINE_FLAG) then mem_cnt_next <= 8; - elsif check_mask(mem_endpoint_latch_data.field_flag,EMF_LIFESPAN_DURATION_FLAG) then + elsif check_mask(mem_endpoint_latch_data.field_flags,EMF_LIFESPAN_DURATION_FLAG) then mem_cnt_next <= 10; - elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_RES_TIME_FLAG)) then + elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flags,EMF_RES_TIME_FLAG)) then mem_cnt_next <= 12; - elsif check_mask(mem_endpoint_latch_data.field_flag,EMF_WRITER_ID_FLAG) then + elsif check_mask(mem_endpoint_latch_data.field_flags,EMF_WRITER_ID_FLAG) then mem_cnt_next <= 14; else -- DONE @@ -3397,7 +3373,7 @@ begin addr <= IPv4_ADDRESS_INVALID; portn <= UDP_PORT_INVALID; mem_endpoint_data <= ZERO_ENDPOINT_DATA; - mem_endpoint_latch_data <= ZERO_ENDPOINT_LATCH_DATA; + mem_endpoint_latch_data <= ZERO_ENDPOINT_DATA; cnt <= 0; cnt2 <= 0; bitmap_pos <= 0; @@ -3417,7 +3393,6 @@ begin flags <= (others => '0'); opcode <= SID_PAD; count <= (others => '0'); - current_emf <= (others => '0'); key_hash <= KEY_HASH_NIL; bitmap_latch <= (others => (others => '0')); else @@ -3456,7 +3431,6 @@ begin flags <= flags_next; opcode <= opcode_next; count <= count_next; - current_emf <= current_emf_next; key_hash <= key_hash_next; bitmap_latch <= bitmap_latch_next; end if; diff --git a/src/rtps_writer.vhd b/src/rtps_writer.vhd index ac80d45..ece8561 100644 --- a/src/rtps_writer.vhd +++ b/src/rtps_writer.vhd @@ -152,69 +152,46 @@ architecture arch of rtps_writer is -- *Memory FSM Opcodes* -- OPCODE DESCRIPTION -- SEARCH_ENDPOINT Search memory for Endpoint with GUID equal to "guid" signal. - -- Set "mem_addr_base" to base Address of found Endpoint, or ENDPOINT_MEMORY_MAX_ADDRESS if nothing found. - -- "mem_endpoint_data" contains Endpoint Data according to "mem_field_flags". + -- Set "mem_endpoint_data.addr" to base Address of found Endpoint, or ENDPOINT_MEMORY_MAX_ADDRESS if nothing found. + -- "mem_endpoint_data" contains Endpoint Data according to "mem_r.field_flags". -- INSERT_ENDPOINT Insert Endpoint in memory - -- UPDATE_ENDPOINT Update Endpoint pointed by "mem_addr_update" according to "mem_field_flags". - -- REMOVE_ENDPOINT Remove Endpoint pointed by "mem_addr_update". - -- "mem_addr_base" is set to the next Endpoint (or ENDPOINT_MEMORY_MAX_ADDRESS if no next Endpoint exists) - -- GET_NEXT_ENDPOINT Get Endpoint Data of next Endpoint (from the Endpoint pointed by "mem_addr_update") according to "mem_field_flags". - -- Set "mem_addr_base" to Address of Endpoint, or ENDPOINT_MEMORY_MAX_ADDRESS if no other Endpoint in Memory. - -- GET_ENDPOINT Get Endpoint Data from Endpoint pointed by "mem_addr_update" according to "mem_field_flags". + -- UPDATE_ENDPOINT Update Endpoint pointed by "mem_r.addr" according to "mem_r.field_flags". + -- REMOVE_ENDPOINT Remove Endpoint pointed by "mem_r.addr". + -- "mem_endpoint_data.addr" is set to the next Endpoint (or ENDPOINT_MEMORY_MAX_ADDRESS if no next Endpoint exists) + -- GET_NEXT_ENDPOINT Get Endpoint Data of next Endpoint (from the Endpoint pointed by "mem_r.addr") according to "mem_r.field_flags". + -- Set "mem_endpoint_data.addr" to Address of Endpoint, or ENDPOINT_MEMORY_MAX_ADDRESS if no other Endpoint in Memory. + -- GET_ENDPOINT Get Endpoint Data from Endpoint pointed by "mem_r.addr" according to "mem_r.field_flags". -- Already fetched data of the same Endpoint is not modified. type MEM_OPCODE_TYPE is (NOP, SEARCH_ENDPOINT, INSERT_ENDPOINT, UPDATE_ENDPOINT, REMOVE_ENDPOINT, GET_NEXT_ENDPOINT, GET_ENDPOINT); -- Record of Endpoint Data type ENDPOINT_DATA_TYPE is record + addr : unsigned(ENDPOINT_MEMORY_ADDR_WIDTH-1 downto 0); guid : GUID_TYPE; - addr : std_logic_vector(IPv4_ADDRESS_WIDTH-1 downto 0); + ip_addr : std_logic_vector(IPv4_ADDRESS_WIDTH-1 downto 0); portn : std_logic_vector(UDP_PORT_WIDTH-1 downto 0); - flags : std_logic_vector(CDR_SHORT_WIDTH-1 downto 0); + reader_flags : std_logic_vector(CDR_SHORT_WIDTH-1 downto 0); lease_deadline : TIME_TYPE; res_time : TIME_TYPE; ack_seq_nr_base : SEQUENCENUMBER_TYPE; req_seq_nr_base : SEQUENCENUMBER_TYPE; req_seq_nr_bitmap : std_logic_vector(0 to WORD_WIDTH-1); + field_flags : std_logic_vector(0 to EMF_FLAG_WIDTH-1); end record; -- Zero initialized Endpoint Data constant ZERO_ENDPOINT_DATA : ENDPOINT_DATA_TYPE := ( + addr => ENDPOINT_MEMORY_MAX_ADDRESS, guid => GUID_UNKNOWN, - addr => IPv4_ADDRESS_INVALID, + ip_addr => IPv4_ADDRESS_INVALID, portn => UDP_PORT_INVALID, - flags => (others => '0'), - lease_deadline => TIME_INVALID, - res_time => TIME_INVALID, - ack_seq_nr_base => SEQUENCENUMBER_UNKNOWN, - req_seq_nr_base => SEQUENCENUMBER_UNKNOWN, - req_seq_nr_bitmap => (others => '0') - ); - -- Endpoint Data Latch used as temporal cache by Memory Process - type ENDPOINT_LATCH_DATA_TYPE is record - guid : GUID_TYPE; - addr : std_logic_vector(IPv4_ADDRESS_WIDTH-1 downto 0); - portn : std_logic_vector(UDP_PORT_WIDTH-1 downto 0); - flags : std_logic_vector(CDR_SHORT_WIDTH-1 downto 0); - lease_deadline : TIME_TYPE; - res_time : TIME_TYPE; - ack_seq_nr_base : SEQUENCENUMBER_TYPE; - req_seq_nr_base : SEQUENCENUMBER_TYPE; - req_seq_nr_bitmap : std_logic_vector(0 to WORD_WIDTH-1); - field_flag : std_logic_vector(0 to EMF_FLAG_WIDTH-1); - end record; - -- Zero initialized Endpoint Data Latch - constant ZERO_ENDPOINT_LATCH_DATA : ENDPOINT_LATCH_DATA_TYPE := ( - guid => GUID_UNKNOWN, - addr => IPv4_ADDRESS_INVALID, - portn => UDP_PORT_INVALID, - flags => (others => '0'), + reader_flags => (others => '0'), lease_deadline => TIME_INVALID, res_time => TIME_INVALID, ack_seq_nr_base => SEQUENCENUMBER_UNKNOWN, req_seq_nr_base => SEQUENCENUMBER_UNKNOWN, req_seq_nr_bitmap => (others => '0'), - field_flag => (others => '0') + field_flags => (others => '0') ); - --*****SIGNAL DECLARATION***** -- *MAIN PROCESS* -- FSM state @@ -289,20 +266,12 @@ architecture arch of rtps_writer is signal mem_opcode : MEM_OPCODE_TYPE; -- Signals the end of a Memory Operation signal mem_op_done : std_logic; - -- Signal containing the relevant Endpoint Memory Format Fields of the Memory Operation - signal mem_field_flags : std_logic_vector(0 to EMF_FLAG_WIDTH-1); - -- Signal used to pass Lease Deadlines from main to memory process - signal lease_deadline : TIME_TYPE; - -- Signal used to pass Response Deadlines from main to memory process - signal res_time : TIME_TYPE; - -- Signal used to pass Sequence Numbers from main to memory process - signal seq_nr : SEQUENCENUMBER_TYPE; + -- Signal used to pass data to memeory process + signal mem_r : ENDPOINT_DATA_TYPE; -- Signal used to pass the Request Sequence Number Bitmap from main to memory process signal req_seq_nr_bitmap, req_seq_nr_bitmap_next : std_logic_vector(0 to WORD_WIDTH-1); -- Signal used to iterate through Request Bitmaps signal req_bitmap_pos, req_bitmap_pos_next : natural range 0 to req_seq_nr_bitmap'length; - -- Signal used to pass Endpoint Pointers to the Endpoint Memory Process - signal mem_addr_update : unsigned(ENDPOINT_MEMORY_ADDR_WIDTH-1 downto 0); -- Test signal used for testbench synchronisation signal idle_sig : std_logic; -- Test signal used in testbenches for removal check @@ -324,9 +293,7 @@ architecture arch of rtps_writer is -- Latch for Endpoint Data from Memory signal mem_endpoint_data, mem_endpoint_data_next : ENDPOINT_DATA_TYPE; -- Latch for Endpoint Data from main process - signal mem_endpoint_latch_data, mem_endpoint_latch_data_next : ENDPOINT_LATCH_DATA_TYPE; - -- Endpoint Memory Flag Array denoting which mem_endpoint_data Fields are up-to-date with the respective fields of the Endpoint (Pointed by mem_addr_base) - signal current_emf, current_emf_next : std_logic_vector(0 to EMF_FLAG_WIDTH-1); + signal mem_endpoint_latch_data, mem_endpoint_latch_data_next : ENDPOINT_DATA_TYPE; -- *MEMORY CONTROL CONNECTION SIGNALS* signal mem_addr : unsigned(ENDPOINT_MEMORY_ADDR_WIDTH-1 downto 0); @@ -488,8 +455,7 @@ begin -- DEFAULT Unregistered mem_opcode <= NOP; opcode_hc <= NOP; - lease_deadline <= TIME_INVALID; - res_time <= TIME_INVALID; + mem_r <= ZERO_ENDPOINT_DATA; alive_sig <= '0'; rd_meta <= '0'; rd_user <= '0'; @@ -500,11 +466,8 @@ begin ready_in_hc <= '0'; get_data_hc <= '0'; idle_sig <= '0'; - seq_nr <= SEQUENCENUMBER_UNKNOWN; seq_nr_hc <= SEQUENCENUMBER_UNKNOWN; - mem_field_flags <= (others => '0'); data_out_ro <= (others => '0'); - mem_addr_update <= (others => '0'); -- Assert Liveliness Latch Setter if (liveliness_assertion = '1') then @@ -580,8 +543,8 @@ begin cnt_next <= 2; -- CHECK Endpoint mem_op_start <= '1'; mem_opcode <= GET_ENDPOINT; - mem_addr_update <= mem_occupied_head; - mem_field_flags <= EMF_LEASE_DEADLINE_FLAG or EMF_RES_TIME_FLAG; + mem_r.addr <= mem_occupied_head; + mem_r.field_flags <= EMF_LEASE_DEADLINE_FLAG or EMF_RES_TIME_FLAG; -- Reset Timeout check_time_next <= TIME_INFINITE; end if; @@ -700,23 +663,24 @@ begin case (meta_opcode) is when EMO_ENDPOINT_MATCH => - mem_op_start <= '1'; - mem_opcode <= SEARCH_ENDPOINT; - mem_field_flags <= (others => '0'); - stage_next <= LATCH_ENDPOINT_DATA; - cnt_next <= 0; + mem_op_start <= '1'; + mem_opcode <= SEARCH_ENDPOINT; + mem_r.guid <= guid; + stage_next <= LATCH_ENDPOINT_DATA; + cnt_next <= 0; when EMO_ENDPOINT_UNMATCH => - mem_op_start <= '1'; - mem_opcode <= SEARCH_ENDPOINT; - mem_field_flags <= EMF_ACK_SEQ_NR_BASE_FLAG; - stage_next <= METATRAFFIC_OPERATION; + mem_op_start <= '1'; + mem_opcode <= SEARCH_ENDPOINT; + mem_r.field_flags <= EMF_ACK_SEQ_NR_BASE_FLAG; + mem_r.guid <= guid; + stage_next <= METATRAFFIC_OPERATION; when EMO_PARTICIPANT_UNMATCH => - mem_op_start <= '1'; - mem_opcode <= GET_ENDPOINT; - mem_addr_update <= mem_occupied_head; - mem_field_flags <= EMF_GUIDPREFIX_FLAG; - stage_next <= METATRAFFIC_OPERATION; - cnt_next <= 0; + mem_op_start <= '1'; + mem_opcode <= GET_ENDPOINT; + mem_r.addr <= mem_occupied_head; + mem_r.field_flags <= EMF_GUIDPREFIX_FLAG; + stage_next <= METATRAFFIC_OPERATION; + cnt_next <= 0; when others => null; end case; @@ -725,11 +689,12 @@ begin if (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS) then case (opcode) is when SID_ACKNACK => - stage_next <= LATCH_ACKNACK; - cnt_next <= 0; - mem_op_start <= '1'; - mem_opcode <= SEARCH_ENDPOINT; - mem_field_flags <= EMF_ACK_SEQ_NR_BASE_FLAG or EMF_RES_TIME_FLAG; + stage_next <= LATCH_ACKNACK; + cnt_next <= 0; + mem_op_start <= '1'; + mem_opcode <= SEARCH_ENDPOINT; + mem_r.field_flags <= EMF_ACK_SEQ_NR_BASE_FLAG or EMF_RES_TIME_FLAG; + mem_r.guid <= guid; when others => stage_next <= SKIP_PACKET; end case; @@ -764,13 +729,16 @@ begin case (meta_opcode) is when EMO_ENDPOINT_MATCH => -- Endpoint already in Memory - if (mem_addr_base /= ENDPOINT_MEMORY_MAX_ADDRESS) then + if (mem_endpoint_data.addr /= ENDPOINT_MEMORY_MAX_ADDRESS) then -- Update the Endpoint Data -- NOTE: The Lease is NOT renewed in case of an update. That is the responsibility of the Liveliness Update - mem_op_start <= '1'; - mem_opcode <= UPDATE_ENDPOINT; - mem_addr_update <= mem_addr_base; - mem_field_flags <= EMF_IPV4_ADDR_FLAG or EMF_UDP_PORT_FLAG; + mem_op_start <= '1'; + mem_opcode <= UPDATE_ENDPOINT; + mem_r.addr <= mem_endpoint_data.addr; + mem_r.field_flags <= EMF_IPV4_ADDR_FLAG or EMF_UDP_PORT_FLAG; + mem_r.ip_addr <= addr; + mem_r.portn <= portn; + mem_r.reader_flags <= reader_flags; -- DONE stage_next <= IDLE; -- Endpoint Memory Full @@ -781,11 +749,15 @@ begin assert stable(clk, mem_empty_head /= ENDPOINT_MEMORY_MAX_ADDRESS) severity FAILURE; -- Insert Matched Remote Endpoint - mem_op_start <= '1'; - mem_opcode <= INSERT_ENDPOINT; + mem_op_start <= '1'; + mem_opcode <= INSERT_ENDPOINT; + mem_r.guid <= guid; + mem_r.ip_addr <= addr; + mem_r.portn <= portn; + mem_r.reader_flags <= reader_flags; if (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and LEASE_DURATION /= DURATION_INFINITE and reader_flags(READER_IS_BEST_EFFORT_FLAG) = '0') then - lease_deadline <= time + LEASE_DURATION; + mem_r.lease_deadline <= time + LEASE_DURATION; -- XXX: Possible Worst Case Path (64-bit addition and comparison in same clock) -- Update Check Time @@ -793,19 +765,19 @@ begin check_time_next <= time + LEASE_DURATION; end if; else - lease_deadline <= TIME_INVALID; + mem_r.lease_deadline <= TIME_INVALID; end if; -- Initialize ACK Sequence Number if (reader_flags(READER_IS_BEST_EFFORT_FLAG) = '1') then - seq_nr <= SEQUENCENUMBER_UNKNOWN; + mem_r.ack_seq_nr_base <= SEQUENCENUMBER_UNKNOWN; elsif (DURABILITY_QOS /= VOLATILE_DURABILITY_QOS and reader_flags(READER_EXPECTS_HISTORICAL_DATA_FLAG) = '1') then - seq_nr <= ZERO_SEQUENCENUMBER; + mem_r.ack_seq_nr_base <= ZERO_SEQUENCENUMBER; -- Initialize Global ACK if (global_ack_seq_nr_base = SEQUENCENUMBER_UNKNOWN) then global_ack_seq_nr_base_next <= ZERO_SEQUENCENUMBER; end if; else - seq_nr <= last_seq_nr; + mem_r.ack_seq_nr_base <= last_seq_nr; -- Initialize Global ACK if (global_ack_seq_nr_base = SEQUENCENUMBER_UNKNOWN) then global_ack_seq_nr_base_next <= last_seq_nr; @@ -832,16 +804,16 @@ begin when EMO_ENDPOINT_UNMATCH => -- Endpoint not in Memory - if (mem_addr_base = ENDPOINT_MEMORY_MAX_ADDRESS) then + if (mem_endpoint_data.addr = ENDPOINT_MEMORY_MAX_ADDRESS) then -- Ignore stage_next <= IDLE; else - assert stable(clk, check_mask(current_emf, EMF_ACK_SEQ_NR_BASE_FLAG)) severity FAILURE; + assert stable(clk, check_mask(mem_endpoint_data.field_flags, EMF_ACK_SEQ_NR_BASE_FLAG)) severity FAILURE; -- Remove Unmatched Remote Endpoint mem_op_start <= '1'; mem_opcode <= REMOVE_ENDPOINT; - mem_addr_update <= mem_addr_base; + mem_r.addr <= mem_endpoint_data.addr; -- Global ACK SN possibly changed if (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and global_ack_seq_nr_base /= SEQUENCENUMBER_UNKNOWN and global_ack_seq_nr_base = mem_endpoint_data.ack_seq_nr_base) then @@ -857,7 +829,7 @@ begin case (cnt) is when 0 => -- Reached End of Endpoints - if (mem_addr_base = ENDPOINT_MEMORY_MAX_ADDRESS) then + if (mem_endpoint_data.addr = ENDPOINT_MEMORY_MAX_ADDRESS) then -- Global ACK SN possibly changed if (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and global_ack_seq_nr_base /= SEQUENCENUMBER_UNKNOWN) then -- NOTE: We are triggering a Global ACK SN Update on each Participant Removal. This should not happen as often, and is therefore acceptable. @@ -870,15 +842,15 @@ begin stage_next <= IDLE; end if; else - assert stable(clk, check_mask(current_emf, EMF_GUIDPREFIX_FLAG)) severity FAILURE; + assert stable(clk, check_mask(mem_endpoint_data.field_flags, EMF_GUIDPREFIX_FLAG)) severity FAILURE; -- Participant Match if (guid(0) = mem_endpoint_data.guid(0) and guid(1) = mem_endpoint_data.guid(1) and guid(2) = mem_endpoint_data.guid(2)) then -- Remove Unmatched Remote Endpoint mem_op_start <= '1'; mem_opcode <= REMOVE_ENDPOINT; - mem_addr_update <= mem_addr_base; - -- NOTE: After removal, mem_addr_base is pointing to the next slot (or ENDPOINT_MEMORY_MAX_ADDRESS) + mem_r.addr <= mem_endpoint_data.addr; + -- NOTE: After removal, mem_endpoint_data.addr is pointing to the next slot (or ENDPOINT_MEMORY_MAX_ADDRESS) cnt_next <= 2; -- GET else cnt_next <= 1; -- GET NEXT @@ -888,19 +860,19 @@ begin -- GET NEXT ENDPOINT when 1 => -- Continue Search - mem_op_start <= '1'; - mem_opcode <= GET_NEXT_ENDPOINT; - mem_addr_update <= mem_addr_base; - mem_field_flags <= EMF_GUIDPREFIX_FLAG; - cnt_next <= 0; + mem_op_start <= '1'; + mem_opcode <= GET_NEXT_ENDPOINT; + mem_r.addr <= mem_endpoint_data.addr; + mem_r.field_flags <= EMF_GUIDPREFIX_FLAG; + cnt_next <= 0; -- GET ENDPOINT when 2 => -- Continue Search - mem_op_start <= '1'; - mem_opcode <= GET_ENDPOINT; - mem_addr_update <= mem_addr_base; - mem_field_flags <= EMF_GUIDPREFIX_FLAG; - cnt_next <= 0; + mem_op_start <= '1'; + mem_opcode <= GET_ENDPOINT; + mem_r.addr <= mem_endpoint_data.addr; + mem_r.field_flags <= EMF_GUIDPREFIX_FLAG; + cnt_next <= 0; when others => null; end case; @@ -1014,16 +986,16 @@ begin -- Wait for Endpoint Data if (mem_op_done = '1') then -- Known Remote Endpoint - if (mem_addr_base /= ENDPOINT_MEMORY_MAX_ADDRESS) then - assert stable(clk, check_mask(current_emf, EMF_RES_TIME_FLAG)) severity FAILURE; + if (mem_endpoint_data.addr /= ENDPOINT_MEMORY_MAX_ADDRESS) then + assert stable(clk, check_mask(mem_endpoint_data.field_flags, EMF_RES_TIME_FLAG)) severity FAILURE; -- Liveliness Assertion - mem_op_start <= '1'; - mem_opcode <= UPDATE_ENDPOINT; - mem_addr_update <= mem_addr_base; - mem_field_flags <= EMF_LEASE_DEADLINE_FLAG; + mem_op_start <= '1'; + mem_opcode <= UPDATE_ENDPOINT; + mem_r.addr <= mem_endpoint_data.addr; + mem_r.field_flags <= EMF_LEASE_DEADLINE_FLAG; if (LEASE_DURATION /= DURATION_INFINITE) then - lease_deadline <= time + LEASE_DURATION; + mem_r.lease_deadline <= time + LEASE_DURATION; -- XXX: Possible Worst Case Path (64-bit addition and comparison in same clock) -- Update Check Time @@ -1031,17 +1003,19 @@ begin check_time_next <= time + LEASE_DURATION; end if; else - lease_deadline <= TIME_INVALID; + mem_r.lease_deadline <= TIME_INVALID; end if; -- No Pending Response if (mem_endpoint_data.res_time = TIME_INVALID) then - mem_field_flags <= EMF_LEASE_DEADLINE_FLAG or EMF_REQ_SEQ_NR_BASE_FLAG or EMF_REQ_SEQ_NR_BITMAP_FLAG or EMF_RES_TIME_FLAG; - seq_nr <= nack_base; + mem_r.field_flags <= EMF_LEASE_DEADLINE_FLAG or EMF_REQ_SEQ_NR_BASE_FLAG or EMF_REQ_SEQ_NR_BITMAP_FLAG or EMF_RES_TIME_FLAG; + mem_r.req_seq_nr_base <= nack_base; + mem_r.req_seq_nr_bitmap <= req_seq_nr_bitmap; + if (ACKNACK_RESPONSE_DELAY /= DURATION_INFINITE) then - res_time <= time + ACKNACK_RESPONSE_DELAY; + mem_r.res_time <= time + ACKNACK_RESPONSE_DELAY; -- NOTE: Last Bit denotes if this is Response or Suppression Delay - res_time(1)(0) <= '0'; + mem_r.res_time(1)(0) <= '0'; -- XXX: Possible Worst Case Path (64-bit addition and comparison in same clock) -- Update Check Time @@ -1049,13 +1023,14 @@ begin check_time_next <= time + ACKNACK_RESPONSE_DELAY; end if; else - res_time <= TIME_INVALID; + mem_r.res_time <= TIME_INVALID; end if; -- Currently in Acknack Response Delay elsif (mem_endpoint_data.res_time(1)(0) = '0') then -- Overwrite previous Request - mem_field_flags <= EMF_LEASE_DEADLINE_FLAG or EMF_REQ_SEQ_NR_BASE_FLAG or EMF_REQ_SEQ_NR_BITMAP_FLAG; - seq_nr <= nack_base; + mem_r.field_flags <= EMF_LEASE_DEADLINE_FLAG or EMF_REQ_SEQ_NR_BASE_FLAG or EMF_REQ_SEQ_NR_BITMAP_FLAG; + mem_r.req_seq_nr_base <= nack_base; + mem_r.req_seq_nr_bitmap <= req_seq_nr_bitmap; end if; stage_next <= PROCESS_ACK; @@ -1078,17 +1053,17 @@ begin stage_next <= SKIP_PACKET; -- Known Remote Endpoint - if (mem_addr_base /= ENDPOINT_MEMORY_MAX_ADDRESS) then - assert stable(clk, check_mask(current_emf, EMF_ACK_SEQ_NR_BASE_FLAG)) severity FAILURE; + if (mem_endpoint_data.addr /= ENDPOINT_MEMORY_MAX_ADDRESS) then + assert stable(clk, check_mask(mem_endpoint_data.field_flags, EMF_ACK_SEQ_NR_BASE_FLAG)) severity FAILURE; -- New Sequence Numbers are ACKed if (ack_base > mem_endpoint_data.ack_seq_nr_base) then -- Update ACK Sequence Number Base - mem_op_start <= '1'; - mem_opcode <= UPDATE_ENDPOINT; - mem_addr_update <= mem_addr_base; - mem_field_flags <= EMF_ACK_SEQ_NR_BASE_FLAG; - seq_nr <= ack_base; + mem_op_start <= '1'; + mem_opcode <= UPDATE_ENDPOINT; + mem_r.addr <= mem_endpoint_data.addr; + mem_r.field_flags <= EMF_ACK_SEQ_NR_BASE_FLAG; + mem_r.ack_seq_nr_base <= ack_base; -- NOTE: The global_ack_seq_nr_base contains the lowest SN of all remote Endpoints. -- It only needs to be updated, if the remote Endpoint with the lowest ACKed SN is updated. -- This does not necesserily mean, that the Global ACK SN will change, as there can @@ -1112,14 +1087,14 @@ begin when 0 => mem_op_start <= '1'; mem_opcode <= GET_ENDPOINT; - mem_addr_update <= mem_occupied_head; - mem_field_flags <= EMF_ACK_SEQ_NR_BASE_FLAG; + mem_r.addr <= mem_occupied_head; + mem_r.field_flags <= EMF_ACK_SEQ_NR_BASE_FLAG; cnt_next <= 1; new_global_ack_next <= SEQUENCENUMBER_UNKNOWN; -- Find new global_ack_seq_nr_base when 1 => -- End of Endpoints - if (mem_addr_base = ENDPOINT_MEMORY_MAX_ADDRESS) then + if (mem_endpoint_data.addr = ENDPOINT_MEMORY_MAX_ADDRESS) then -- No Reliable Remote Endpoints if (new_global_ack = SEQUENCENUMBER_UNKNOWN) then -- Reset Global ACK SN @@ -1159,7 +1134,7 @@ begin end if; end if; else - assert stable(clk, check_mask(current_emf, EMF_ACK_SEQ_NR_BASE_FLAG)) severity FAILURE; + assert stable(clk, check_mask(mem_endpoint_data.field_flags, EMF_ACK_SEQ_NR_BASE_FLAG)) severity FAILURE; -- NOTE: Remote Endpoints with RELIABILITY BEST_EFFORT have a ack_seq_nr_base = SEQUENCENUMBER_UNKNOWN, since -- they cannot send ACKNACKs. @@ -1171,8 +1146,8 @@ begin mem_op_start <= '1'; mem_opcode <= GET_NEXT_ENDPOINT; - mem_addr_update <= mem_addr_base; - mem_field_flags <= EMF_ACK_SEQ_NR_BASE_FLAG; + mem_r.addr <= mem_endpoint_data.addr; + mem_r.field_flags <= EMF_ACK_SEQ_NR_BASE_FLAG; end if; -- ACK Sequence Numbers when 2 => @@ -1215,35 +1190,35 @@ begin case (cnt) is -- GET Endpoint when 0 => - mem_op_start <= '1'; - mem_opcode <= GET_ENDPOINT; - mem_addr_update <= mem_addr_base; - mem_field_flags <= EMF_LEASE_DEADLINE_FLAG or EMF_RES_TIME_FLAG; - cnt_next <= 2; -- CHECK Endpoint + mem_op_start <= '1'; + mem_opcode <= GET_ENDPOINT; + mem_r.addr <= mem_endpoint_data.addr; + mem_r.field_flags <= EMF_LEASE_DEADLINE_FLAG or EMF_RES_TIME_FLAG; + cnt_next <= 2; -- CHECK Endpoint -- GET NEXT Endpoint when 1 => - mem_op_start <= '1'; - mem_opcode <= GET_NEXT_ENDPOINT; - mem_addr_update <= mem_addr_base; - mem_field_flags <= EMF_LEASE_DEADLINE_FLAG or EMF_RES_TIME_FLAG; - cnt_next <= 2; -- CHECK Endpoint + mem_op_start <= '1'; + mem_opcode <= GET_NEXT_ENDPOINT; + mem_r.addr <= mem_endpoint_data.addr; + mem_r.field_flags <= EMF_LEASE_DEADLINE_FLAG or EMF_RES_TIME_FLAG; + cnt_next <= 2; -- CHECK Endpoint -- CHECK Endpoint when 2 => -- End of Endpoints - if (mem_addr_base = ENDPOINT_MEMORY_MAX_ADDRESS) then + if (mem_endpoint_data.addr = ENDPOINT_MEMORY_MAX_ADDRESS) then -- Reset stale_check_next <= '0'; -- DONE stage_next <= IDLE; else - assert stable(clk, check_mask(current_emf, EMF_LEASE_DEADLINE_FLAG or EMF_RES_TIME_FLAG)) severity FAILURE; + assert stable(clk, check_mask(mem_endpoint_data.field_flags, EMF_LEASE_DEADLINE_FLAG or EMF_RES_TIME_FLAG)) severity FAILURE; -- Endpoint Lease Expired if (mem_endpoint_data.lease_deadline /= TIME_INVALID and mem_endpoint_data.lease_deadline <= time) then -- Remove Participant mem_op_start <= '1'; mem_opcode <= REMOVE_ENDPOINT; - mem_addr_update <= mem_addr_base; + mem_r.addr <= mem_endpoint_data.addr; -- Continue Search cnt_next <= 0; -- GET Endpoint -- Synthesis Guard/Response Time Reached @@ -1251,20 +1226,21 @@ begin -- If Suppression Delay passed, zero the time if(mem_endpoint_data.res_time(1)(0) = '1') then -- Disable Suppression - mem_op_start <= '1'; - mem_opcode <= UPDATE_ENDPOINT; - mem_addr_update <= mem_addr_base; - res_time <= TIME_INVALID; - mem_field_flags <= EMF_RES_TIME_FLAG; + mem_op_start <= '1'; + mem_opcode <= UPDATE_ENDPOINT; + mem_r.addr <= mem_endpoint_data.addr; + mem_r.field_flags <= EMF_RES_TIME_FLAG; + mem_r.res_time <= TIME_INVALID; + -- Continue Search cnt_next <= 1; -- GET NEXT Endpoint -- If Response Delay Passed else -- Get Additional Data - mem_op_start <= '1'; - mem_opcode <= GET_ENDPOINT; - mem_addr_update <= mem_addr_base; - mem_field_flags <= EMF_IPV4_ADDR_FLAG or EMF_UDP_PORT_FLAG or EMF_REQ_SEQ_NR_BASE_FLAG or EMF_REQ_SEQ_NR_BITMAP_FLAG; + mem_op_start <= '1'; + mem_opcode <= GET_ENDPOINT; + mem_r.addr <= mem_endpoint_data.addr; + mem_r.field_flags <= EMF_IPV4_ADDR_FLAG or EMF_UDP_PORT_FLAG or EMF_REQ_SEQ_NR_BASE_FLAG or EMF_REQ_SEQ_NR_BITMAP_FLAG; -- Send Requests stage_next <= HANDLE_REQUESTS; @@ -1299,21 +1275,21 @@ begin when 3 => -- Synthesis Guard if (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS) then - mem_op_start <= '1'; - mem_opcode <= UPDATE_ENDPOINT; - mem_addr_update <= mem_addr_base; - mem_field_flags <= EMF_REQ_SEQ_NR_BASE_FLAG or EMF_REQ_SEQ_NR_BITMAP_FLAG or EMF_RES_TIME_FLAG; - + mem_op_start <= '1'; + mem_opcode <= UPDATE_ENDPOINT; + mem_r.addr <= mem_endpoint_data.addr; + mem_r.field_flags <= EMF_REQ_SEQ_NR_BASE_FLAG or EMF_REQ_SEQ_NR_BITMAP_FLAG or EMF_RES_TIME_FLAG; -- Reset Requests - req_seq_nr_bitmap_next <= (others => '0'); - seq_nr <= SEQUENCENUMBER_UNKNOWN; + mem_r.req_seq_nr_base <= SEQUENCENUMBER_UNKNOWN; + mem_r.req_seq_nr_bitmap <= (others => '0'); + -- Set Acknack Suppression Time if (ACKNACK_SUPPRESSION_DELAY /= DURATION_INFINITE and ACKNACK_SUPPRESSION_DELAY /= DURATION_ZERO) then tmp_dw := time + ACKNACK_SUPPRESSION_DELAY; -- Set Acknack Suppression Time - res_time <= tmp_dw; + mem_r.res_time <= tmp_dw; -- NOTE: Last Bit denotes if this is Response or Suppression Delay - res_time(1)(0) <= '1'; + mem_r.res_time(1)(0) <= '1'; -- XXX: Possible Worst Case Path (64-bit addition and comparison in same clock) -- Update Check Time @@ -1322,7 +1298,7 @@ begin end if; else -- Disable Suppression - res_time <= TIME_INVALID; + mem_r.res_time <= TIME_INVALID; end if; cnt_next <= 0; @@ -1381,8 +1357,8 @@ begin if (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS) then -- Wait for Endpoint Data if (mem_op_done = '1') then - assert stable(clk, check_mask(current_emf, EMF_REQ_SEQ_NR_BASE_FLAG or EMF_REQ_SEQ_NR_BITMAP_FLAG)) severity FAILURE; - assert stable(clk, mem_addr_base /= ENDPOINT_MEMORY_MAX_ADDRESS) severity FAILURE; + assert stable(clk, check_mask(mem_endpoint_data.field_flags, EMF_REQ_SEQ_NR_BASE_FLAG or EMF_REQ_SEQ_NR_BITMAP_FLAG)) severity FAILURE; + assert stable(clk, mem_endpoint_data.addr /= ENDPOINT_MEMORY_MAX_ADDRESS) severity FAILURE; case (cnt) is -- Next Bitmap Pos @@ -1500,11 +1476,11 @@ begin case (cnt) is -- Get FIRST Destination when 0 => - mem_op_start <= '1'; - mem_opcode <= GET_ENDPOINT; - mem_addr_update <= mem_occupied_head; - mem_field_flags <= EMF_IPV4_ADDR_FLAG or EMF_UDP_PORT_FLAG; - cnt_next <= cnt + 2; + mem_op_start <= '1'; + mem_opcode <= GET_ENDPOINT; + mem_r.addr <= mem_occupied_head; + mem_r.field_flags <= EMF_IPV4_ADDR_FLAG or EMF_UDP_PORT_FLAG; + cnt_next <= cnt + 2; -- HC Empty (No cache Changes Available) if (min_sn = SEQUENCENUMBER_UNKNOWN) then @@ -1513,15 +1489,15 @@ begin end if; -- Get NEXT Destination when 1 => - mem_op_start <= '1'; - mem_opcode <= GET_NEXT_ENDPOINT; - mem_addr_update <= mem_addr_base; - mem_field_flags <= EMF_IPV4_ADDR_FLAG or EMF_UDP_PORT_FLAG; - cnt_next <= cnt + 1; + mem_op_start <= '1'; + mem_opcode <= GET_NEXT_ENDPOINT; + mem_r.addr <= mem_endpoint_data.addr; + mem_r.field_flags <= EMF_IPV4_ADDR_FLAG or EMF_UDP_PORT_FLAG; + cnt_next <= cnt + 1; -- Initiate Heartbeat Sending when 2 => -- End of Endpoint - if (mem_addr_base = ENDPOINT_MEMORY_MAX_ADDRESS) then + if (mem_endpoint_data.addr = ENDPOINT_MEMORY_MAX_ADDRESS) then -- Assert Liveliness Resetter assert_liveliness_latch_next <= '0'; @@ -1558,18 +1534,18 @@ begin when 1 => -- Memory Operation Guard if (mem_op_done = '1') then - mem_op_start <= '1'; - mem_opcode <= GET_ENDPOINT; - mem_addr_update <= mem_occupied_head; - mem_field_flags <= EMF_IPV4_ADDR_FLAG or EMF_UDP_PORT_FLAG; - cnt_next <= cnt + 1; + mem_op_start <= '1'; + mem_opcode <= GET_ENDPOINT; + mem_r.addr <= mem_occupied_head; + mem_r.field_flags <= EMF_IPV4_ADDR_FLAG or EMF_UDP_PORT_FLAG; + cnt_next <= cnt + 1; end if; -- GET SN when 2 => -- Wait for Endpoint Data if (mem_op_done = '1') then -- End of Endpoints - if (mem_addr_base = ENDPOINT_MEMORY_MAX_ADDRESS) then + if (mem_endpoint_data.addr = ENDPOINT_MEMORY_MAX_ADDRESS) then -- ACK newly sent Cache Changes if Writer is BEST_EFFORT, or if all remore Readers are BEST_EFFORT if (RELIABILITY_QOS /= RELIABLE_RELIABILITY_QOS or global_ack_seq_nr_base = SEQUENCENUMBER_UNKNOWN) then @@ -1632,10 +1608,10 @@ begin when 4 => -- Memory Operation Guard if (mem_op_done = '1') then - mem_op_start <= '1'; - mem_opcode <= GET_NEXT_ENDPOINT; - mem_addr_update <= mem_addr_base; - mem_field_flags <= EMF_IPV4_ADDR_FLAG or EMF_UDP_PORT_FLAG; + mem_op_start <= '1'; + mem_opcode <= GET_NEXT_ENDPOINT; + mem_r.addr <= mem_endpoint_data.addr; + mem_r.field_flags <= EMF_IPV4_ADDR_FLAG or EMF_UDP_PORT_FLAG; -- Loop cnt_next <= 2; end if; @@ -1872,8 +1848,8 @@ begin -- Wait for Endpoint Data if (mem_op_done = '1') then - assert stable(clk, check_mask(current_emf, EMF_IPV4_ADDR_FLAG or EMF_UDP_PORT_FLAG)) severity FAILURE; - assert stable(clk, mem_addr_base /= ENDPOINT_MEMORY_MAX_ADDRESS) severity FAILURE; + assert stable(clk, check_mask(mem_endpoint_data.field_flags, EMF_IPV4_ADDR_FLAG or EMF_UDP_PORT_FLAG)) severity FAILURE; + assert stable(clk, mem_endpoint_data.addr /= ENDPOINT_MEMORY_MAX_ADDRESS) severity FAILURE; -- Output FIFO Guard if (full_ro = '0') then @@ -1887,7 +1863,7 @@ begin cnt_next <= cnt + 1; -- Dest IPv4 Address when 1 => - data_out_ro <= mem_endpoint_data.addr; + data_out_ro <= mem_endpoint_data.ip_addr; cnt_next <= cnt + 1; -- Src and Dest UDPv4 Ports when 2 => @@ -1947,8 +1923,8 @@ begin -- Wait for Endpoint Data if (mem_op_done = '1') then - assert stable(clk, check_mask(current_emf, EMF_UDP_PORT_FLAG)) severity FAILURE; - assert stable(clk, mem_addr_base /= ENDPOINT_MEMORY_MAX_ADDRESS) severity FAILURE; + assert stable(clk, check_mask(mem_endpoint_data.field_flags, EMF_UDP_PORT_FLAG)) severity FAILURE; + assert stable(clk, mem_endpoint_data.addr /= ENDPOINT_MEMORY_MAX_ADDRESS) severity FAILURE; -- Output FIFO Guard if (full_ro = '0') then @@ -1967,7 +1943,7 @@ begin else key_flag <= '0'; end if; - if (cc_kind /= ALIVE or WITH_KEY or mem_endpoint_data.flags(READER_EXPECTS_INLINE_QOS_FLAG) = '1') then + if (cc_kind /= ALIVE or WITH_KEY or mem_endpoint_data.reader_flags(READER_EXPECTS_INLINE_QOS_FLAG) = '1') then qos_flag <= '1'; else qos_flag <= '0'; @@ -2006,7 +1982,7 @@ begin elsif (cc_kind /= ALIVE) then cnt_next <= cnt + 6; -- Reader expect in-line QoS - elsif(mem_endpoint_data.flags(READER_EXPECTS_INLINE_QOS_FLAG) = '1') then + elsif(mem_endpoint_data.reader_flags(READER_EXPECTS_INLINE_QOS_FLAG) = '1') then stage_next <= SEND_INLINE_QOS; cnt3_next <= 0; -- Payload Available (DATA or Serialized Key) @@ -2072,7 +2048,7 @@ begin if (cc_kind /= ALIVE) then cnt_next <= cnt + 1; -- Reader expects in-line QoS - elsif (mem_endpoint_data.flags(READER_EXPECTS_INLINE_QOS_FLAG) = '1') then + elsif (mem_endpoint_data.reader_flags(READER_EXPECTS_INLINE_QOS_FLAG) = '1') then stage_next <= SEND_INLINE_QOS; cnt3_next <= 0; else @@ -2100,7 +2076,7 @@ begin end case; -- Reader expects in-line QoS - if (mem_endpoint_data.flags(READER_EXPECTS_INLINE_QOS_FLAG) = '1') then + if (mem_endpoint_data.reader_flags(READER_EXPECTS_INLINE_QOS_FLAG) = '1') then stage_next <= SEND_INLINE_QOS; cnt3_next <= 0; else @@ -2366,7 +2342,6 @@ begin mem_addr_latch_next <= mem_addr_latch; mem_endpoint_data_next <= mem_endpoint_data; mem_endpoint_latch_data_next <= mem_endpoint_latch_data; - current_emf_next <= current_emf; -- DEFAULT Unregistered mem_addr <= (others => '0'); mem_write_data <= (others => '0'); @@ -2379,35 +2354,20 @@ begin case (mem_stage) is when IDLE => - mem_op_done <= '1'; + mem_op_done <= '1'; if (mem_op_start = '1') then - -- Latch Signals needed for Mermory Operation (Use _next signals, because some signals are set in same clk) - mem_endpoint_latch_data_next <= ( - guid => guid_next, - addr => addr_next, - portn => portn_next, - flags => reader_flags_next, - lease_deadline => lease_deadline, - res_time => res_time, - ack_seq_nr_base => seq_nr, - req_seq_nr_base => seq_nr, - req_seq_nr_bitmap => req_seq_nr_bitmap, - field_flag => mem_field_flags - ); + -- Latch Signals needed for Mermory Operation + mem_endpoint_latch_data_next <= mem_r; case(mem_opcode) is when SEARCH_ENDPOINT => mem_endpoint_data_next <= ZERO_ENDPOINT_DATA; if (RELIABILITY_QOS /= RELIABLE_RELIABILITY_QOS) then - current_emf_next <= EMF_LEASE_DEADLINE_FLAG or EMF_RES_TIME_FLAG or EMF_ACK_SEQ_NR_BASE_FLAG or EMF_REQ_SEQ_NR_BASE_FLAG or EMF_REQ_SEQ_NR_BITMAP_FLAG; - else - current_emf_next <= (others => '0'); + mem_endpoint_data_next.field_flags <= EMF_LEASE_DEADLINE_FLAG or EMF_RES_TIME_FLAG or EMF_ACK_SEQ_NR_BASE_FLAG or EMF_REQ_SEQ_NR_BASE_FLAG or EMF_REQ_SEQ_NR_BITMAP_FLAG; end if; - if (mem_occupied_head = ENDPOINT_MEMORY_MAX_ADDRESS) then - mem_addr_base_next <= ENDPOINT_MEMORY_MAX_ADDRESS; - else + if (mem_occupied_head /= ENDPOINT_MEMORY_MAX_ADDRESS) then mem_addr_base_next <= mem_occupied_head; mem_stage_next <= SEARCH_ENDPOINT; mem_cnt_next <= 0; @@ -2417,37 +2377,43 @@ begin mem_endpoint_data_next <= ZERO_ENDPOINT_DATA; if (RELIABILITY_QOS /= RELIABLE_RELIABILITY_QOS) then - current_emf_next <= EMF_LEASE_DEADLINE_FLAG or EMF_RES_TIME_FLAG or EMF_ACK_SEQ_NR_BASE_FLAG or EMF_REQ_SEQ_NR_BASE_FLAG or EMF_REQ_SEQ_NR_BITMAP_FLAG; - else - current_emf_next <= (others => '0'); + mem_endpoint_data_next.field_flags <= EMF_LEASE_DEADLINE_FLAG or EMF_RES_TIME_FLAG or EMF_ACK_SEQ_NR_BASE_FLAG or EMF_REQ_SEQ_NR_BASE_FLAG or EMF_REQ_SEQ_NR_BITMAP_FLAG; end if; - mem_addr_base_next <= mem_empty_head; - mem_stage_next <= INSERT_ENDPOINT; - mem_cnt_next <= 0; + mem_endpoint_data_next.addr <= mem_empty_head; + mem_addr_base_next <= mem_empty_head; + mem_stage_next <= INSERT_ENDPOINT; + mem_cnt_next <= 0; when UPDATE_ENDPOINT => - if (mem_addr_update = ENDPOINT_MEMORY_MAX_ADDRESS) then + if (mem_r.addr = ENDPOINT_MEMORY_MAX_ADDRESS) then mem_endpoint_data_next <= ZERO_ENDPOINT_DATA; - current_emf_next <= (others => '0'); - mem_addr_base_next <= ENDPOINT_MEMORY_MAX_ADDRESS; + if (RELIABILITY_QOS /= RELIABLE_RELIABILITY_QOS) then + mem_endpoint_data_next.field_flags <= EMF_LEASE_DEADLINE_FLAG or EMF_RES_TIME_FLAG or EMF_ACK_SEQ_NR_BASE_FLAG or EMF_REQ_SEQ_NR_BASE_FLAG or EMF_REQ_SEQ_NR_BITMAP_FLAG; + end if; else - current_emf_next <= current_emf or mem_field_flags; + if (mem_r.addr /= mem_endpoint_data.addr) then + mem_endpoint_data_next <= ZERO_ENDPOINT_DATA; + if (RELIABILITY_QOS /= RELIABLE_RELIABILITY_QOS) then + mem_endpoint_data_next.field_flags <= EMF_LEASE_DEADLINE_FLAG or EMF_RES_TIME_FLAG or EMF_ACK_SEQ_NR_BASE_FLAG or EMF_REQ_SEQ_NR_BASE_FLAG or EMF_REQ_SEQ_NR_BITMAP_FLAG; + end if; + end if; - mem_addr_base_next <= mem_addr_update; - mem_stage_next <= UPDATE_ENDPOINT; - if check_mask(mem_field_flags,EMF_IPV4_ADDR_FLAG) then + mem_endpoint_data_next.addr <= mem_r.addr; + mem_addr_base_next <= mem_r.addr; + mem_stage_next <= UPDATE_ENDPOINT; + if check_mask(mem_r.field_flags,EMF_IPV4_ADDR_FLAG) then mem_cnt_next <= 0; - elsif check_mask(mem_field_flags,EMF_UDP_PORT_FLAG) then + elsif check_mask(mem_r.field_flags,EMF_UDP_PORT_FLAG) then mem_cnt_next <= 1; - elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_field_flags,EMF_LEASE_DEADLINE_FLAG)) then + elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_r.field_flags,EMF_LEASE_DEADLINE_FLAG)) then mem_cnt_next <= 2; - elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_field_flags,EMF_RES_TIME_FLAG)) then + elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_r.field_flags,EMF_RES_TIME_FLAG)) then mem_cnt_next <= 4; - elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_field_flags,EMF_ACK_SEQ_NR_BASE_FLAG)) then + elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_r.field_flags,EMF_ACK_SEQ_NR_BASE_FLAG)) then mem_cnt_next <= 6; - elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_field_flags,EMF_REQ_SEQ_NR_BASE_FLAG)) then + elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_r.field_flags,EMF_REQ_SEQ_NR_BASE_FLAG)) then mem_cnt_next <= 8; - elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_field_flags,EMF_REQ_SEQ_NR_BITMAP_FLAG)) then + elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_r.field_flags,EMF_REQ_SEQ_NR_BITMAP_FLAG)) then mem_cnt_next <= 10; else -- DONE @@ -2456,63 +2422,61 @@ begin end if; when REMOVE_ENDPOINT => mem_endpoint_data_next <= ZERO_ENDPOINT_DATA; - current_emf_next <= (others => '0'); + if (RELIABILITY_QOS /= RELIABLE_RELIABILITY_QOS) then + mem_endpoint_data_next.field_flags <= EMF_LEASE_DEADLINE_FLAG or EMF_RES_TIME_FLAG or EMF_ACK_SEQ_NR_BASE_FLAG or EMF_REQ_SEQ_NR_BASE_FLAG or EMF_REQ_SEQ_NR_BITMAP_FLAG; + end if; - if (mem_addr_update = ENDPOINT_MEMORY_MAX_ADDRESS) then - mem_addr_base_next <= ENDPOINT_MEMORY_MAX_ADDRESS; - else - mem_addr_base_next <= mem_addr_update; + if (mem_r.addr /= ENDPOINT_MEMORY_MAX_ADDRESS) then + mem_addr_base_next <= mem_r.addr; mem_stage_next <= REMOVE_ENDPOINT; mem_cnt_next <= 0; end if; when GET_NEXT_ENDPOINT => mem_endpoint_data_next <= ZERO_ENDPOINT_DATA; if (RELIABILITY_QOS /= RELIABLE_RELIABILITY_QOS) then - current_emf_next <= EMF_LEASE_DEADLINE_FLAG or EMF_RES_TIME_FLAG or EMF_ACK_SEQ_NR_BASE_FLAG or EMF_REQ_SEQ_NR_BASE_FLAG or EMF_REQ_SEQ_NR_BITMAP_FLAG; - else - current_emf_next <= (others => '0'); + mem_endpoint_data_next.field_flags <= EMF_LEASE_DEADLINE_FLAG or EMF_RES_TIME_FLAG or EMF_ACK_SEQ_NR_BASE_FLAG or EMF_REQ_SEQ_NR_BASE_FLAG or EMF_REQ_SEQ_NR_BITMAP_FLAG; end if; - if (mem_addr_update = ENDPOINT_MEMORY_MAX_ADDRESS) then - mem_addr_base_next <= ENDPOINT_MEMORY_MAX_ADDRESS; - else - mem_addr_base_next <= mem_addr_update; + if (mem_r.addr /= ENDPOINT_MEMORY_MAX_ADDRESS) then + mem_addr_base_next <= mem_r.addr; mem_stage_next <= GET_NEXT_ENDPOINT; mem_cnt_next <= 0; end if; when GET_ENDPOINT => - if (mem_addr_update = ENDPOINT_MEMORY_MAX_ADDRESS) then + if (mem_r.addr = ENDPOINT_MEMORY_MAX_ADDRESS) then mem_endpoint_data_next <= ZERO_ENDPOINT_DATA; - current_emf_next <= (others => '0'); - mem_addr_base_next <= ENDPOINT_MEMORY_MAX_ADDRESS; - else - if (mem_addr_base /= mem_addr_update) then - mem_endpoint_data_next <= ZERO_ENDPOINT_DATA; - current_emf_next <= mem_field_flags; - else - current_emf_next <= current_emf or mem_field_flags; + if (RELIABILITY_QOS /= RELIABLE_RELIABILITY_QOS) then + mem_endpoint_data_next.field_flags <= EMF_LEASE_DEADLINE_FLAG or EMF_RES_TIME_FLAG or EMF_ACK_SEQ_NR_BASE_FLAG or EMF_REQ_SEQ_NR_BASE_FLAG or EMF_REQ_SEQ_NR_BITMAP_FLAG; end if; + else + if (mem_endpoint_data.addr /= mem_r.addr) then + mem_endpoint_data_next <= ZERO_ENDPOINT_DATA; + if (RELIABILITY_QOS /= RELIABLE_RELIABILITY_QOS) then + mem_endpoint_data_next.field_flags <= EMF_LEASE_DEADLINE_FLAG or EMF_RES_TIME_FLAG or EMF_ACK_SEQ_NR_BASE_FLAG or EMF_REQ_SEQ_NR_BASE_FLAG or EMF_REQ_SEQ_NR_BITMAP_FLAG; + end if; + end if; + mem_endpoint_data_next.addr <= mem_r.addr; -- Fetch Endpoint Data - mem_addr_base_next <= mem_addr_update; + mem_addr_base_next <= mem_r.addr; mem_stage_next <= GET_ENDPOINT_DATA; - if check_mask(mem_field_flags,EMF_ENTITYID_FLAG) then + if check_mask(mem_r.field_flags,EMF_ENTITYID_FLAG) then mem_cnt_next <= 0; - elsif check_mask(mem_field_flags,EMF_GUIDPREFIX_FLAG) then + elsif check_mask(mem_r.field_flags,EMF_GUIDPREFIX_FLAG) then mem_cnt_next <= 1; - elsif check_mask(mem_field_flags,EMF_IPV4_ADDR_FLAG) then + elsif check_mask(mem_r.field_flags,EMF_IPV4_ADDR_FLAG) then mem_cnt_next <= 4; - elsif check_mask(mem_field_flags,EMF_UDP_PORT_FLAG) then + elsif check_mask(mem_r.field_flags,EMF_UDP_PORT_FLAG) then mem_cnt_next <= 5; - elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_field_flags,EMF_LEASE_DEADLINE_FLAG)) then + elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_r.field_flags,EMF_LEASE_DEADLINE_FLAG)) then mem_cnt_next <= 6; - elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_field_flags,EMF_RES_TIME_FLAG)) then + elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_r.field_flags,EMF_RES_TIME_FLAG)) then mem_cnt_next <= 8; - elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_field_flags,EMF_ACK_SEQ_NR_BASE_FLAG)) then + elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_r.field_flags,EMF_ACK_SEQ_NR_BASE_FLAG)) then mem_cnt_next <= 10; - elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_field_flags,EMF_REQ_SEQ_NR_BASE_FLAG)) then + elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_r.field_flags,EMF_REQ_SEQ_NR_BASE_FLAG)) then mem_cnt_next <= 12; - elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_field_flags,EMF_REQ_SEQ_NR_BITMAP_FLAG)) then + elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_r.field_flags,EMF_REQ_SEQ_NR_BITMAP_FLAG)) then mem_cnt_next <= 14; else -- DONE @@ -2611,26 +2575,26 @@ begin mem_cnt_next <= 8; -- GET Next Addr -- Match else - mem_addr_base_next <= mem_addr_base; + mem_endpoint_data_next.addr <= mem_addr_base; -- Fetch Endpoint Data mem_stage_next <= GET_ENDPOINT_DATA; - if check_mask(mem_endpoint_latch_data.field_flag,EMF_ENTITYID_FLAG) then + if check_mask(mem_endpoint_latch_data.field_flags,EMF_ENTITYID_FLAG) then mem_cnt_next <= 0; - elsif check_mask(mem_endpoint_latch_data.field_flag,EMF_GUIDPREFIX_FLAG) then + elsif check_mask(mem_endpoint_latch_data.field_flags,EMF_GUIDPREFIX_FLAG) then mem_cnt_next <= 1; - elsif check_mask(mem_endpoint_latch_data.field_flag,EMF_IPV4_ADDR_FLAG) then + elsif check_mask(mem_endpoint_latch_data.field_flags,EMF_IPV4_ADDR_FLAG) then mem_cnt_next <= 4; - elsif check_mask(mem_endpoint_latch_data.field_flag,EMF_UDP_PORT_FLAG) then + elsif check_mask(mem_endpoint_latch_data.field_flags,EMF_UDP_PORT_FLAG) then mem_cnt_next <= 5; - elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_LEASE_DEADLINE_FLAG)) then + elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flags,EMF_LEASE_DEADLINE_FLAG)) then mem_cnt_next <= 6; - elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_RES_TIME_FLAG)) then + elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flags,EMF_RES_TIME_FLAG)) then mem_cnt_next <= 8; - elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_ACK_SEQ_NR_BASE_FLAG)) then + elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flags,EMF_ACK_SEQ_NR_BASE_FLAG)) then mem_cnt_next <= 10; - elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_REQ_SEQ_NR_BASE_FLAG)) then + elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flags,EMF_REQ_SEQ_NR_BASE_FLAG)) then mem_cnt_next <= 12; - elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_REQ_SEQ_NR_BITMAP_FLAG)) then + elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flags,EMF_REQ_SEQ_NR_BITMAP_FLAG)) then mem_cnt_next <= 14; else -- DONE @@ -2654,7 +2618,7 @@ begin if (mem_valid_out = '1') then -- No more Endpoints if (resize(unsigned(mem_read_data),ENDPOINT_MEMORY_ADDR_WIDTH) = ENDPOINT_MEMORY_MAX_ADDRESS) then - mem_addr_base_next <= ENDPOINT_MEMORY_MAX_ADDRESS; --No match + mem_endpoint_data_next.addr <= ENDPOINT_MEMORY_MAX_ADDRESS; --No match -- DONE mem_stage_next <= IDLE; else @@ -2676,21 +2640,21 @@ begin mem_read <= '1'; -- Memory Flow Control Guard if (mem_ready_in = '1') then - if check_mask(mem_endpoint_latch_data.field_flag,EMF_GUIDPREFIX_FLAG) then + if check_mask(mem_endpoint_latch_data.field_flags,EMF_GUIDPREFIX_FLAG) then mem_cnt_next <= 1; - elsif check_mask(mem_endpoint_latch_data.field_flag,EMF_IPV4_ADDR_FLAG) then + elsif check_mask(mem_endpoint_latch_data.field_flags,EMF_IPV4_ADDR_FLAG) then mem_cnt_next <= 4; - elsif check_mask(mem_endpoint_latch_data.field_flag,EMF_UDP_PORT_FLAG) then + elsif check_mask(mem_endpoint_latch_data.field_flags,EMF_UDP_PORT_FLAG) then mem_cnt_next <= 5; - elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_LEASE_DEADLINE_FLAG)) then + elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flags,EMF_LEASE_DEADLINE_FLAG)) then mem_cnt_next <= 6; - elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_RES_TIME_FLAG)) then + elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flags,EMF_RES_TIME_FLAG)) then mem_cnt_next <= 8; - elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_ACK_SEQ_NR_BASE_FLAG)) then + elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flags,EMF_ACK_SEQ_NR_BASE_FLAG)) then mem_cnt_next <= 10; - elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_REQ_SEQ_NR_BASE_FLAG)) then + elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flags,EMF_REQ_SEQ_NR_BASE_FLAG)) then mem_cnt_next <= 12; - elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_REQ_SEQ_NR_BITMAP_FLAG)) then + elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flags,EMF_REQ_SEQ_NR_BITMAP_FLAG)) then mem_cnt_next <= 14; else mem_cnt_next <= 15; @@ -2721,22 +2685,22 @@ begin mem_read <= '1'; -- Memory Flow Control Guard if (mem_ready_in = '1') then - if check_mask(mem_endpoint_latch_data.field_flag,EMF_IPV4_ADDR_FLAG) then + if check_mask(mem_endpoint_latch_data.field_flags,EMF_IPV4_ADDR_FLAG) then mem_cnt_next <= 4; - elsif check_mask(mem_endpoint_latch_data.field_flag,EMF_UDP_PORT_FLAG) then + elsif check_mask(mem_endpoint_latch_data.field_flags,EMF_UDP_PORT_FLAG) then mem_cnt_next <= 5; - elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_LEASE_DEADLINE_FLAG)) then + elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flags,EMF_LEASE_DEADLINE_FLAG)) then mem_cnt_next <= 6; - elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_RES_TIME_FLAG)) then + elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flags,EMF_RES_TIME_FLAG)) then mem_cnt_next <= 8; - elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_ACK_SEQ_NR_BASE_FLAG)) then + elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flags,EMF_ACK_SEQ_NR_BASE_FLAG)) then mem_cnt_next <= 10; - elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_REQ_SEQ_NR_BASE_FLAG)) then + elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flags,EMF_REQ_SEQ_NR_BASE_FLAG)) then mem_cnt_next <= 12; - elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_REQ_SEQ_NR_BITMAP_FLAG)) then + elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flags,EMF_REQ_SEQ_NR_BITMAP_FLAG)) then mem_cnt_next <= 14; else - if check_mask(mem_endpoint_latch_data.field_flag,EMF_ENTITYID_FLAG) then + if check_mask(mem_endpoint_latch_data.field_flags,EMF_ENTITYID_FLAG) then mem_cnt_next <= 15; else mem_cnt_next <= 16; @@ -2750,22 +2714,22 @@ begin mem_read <= '1'; -- Memory Flow Control Guard if (mem_ready_in = '1') then - if check_mask(mem_endpoint_latch_data.field_flag,EMF_UDP_PORT_FLAG) then + if check_mask(mem_endpoint_latch_data.field_flags,EMF_UDP_PORT_FLAG) then mem_cnt_next <= 5; - elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_LEASE_DEADLINE_FLAG)) then + elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flags,EMF_LEASE_DEADLINE_FLAG)) then mem_cnt_next <= 6; - elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_RES_TIME_FLAG)) then + elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flags,EMF_RES_TIME_FLAG)) then mem_cnt_next <= 8; - elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_ACK_SEQ_NR_BASE_FLAG)) then + elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flags,EMF_ACK_SEQ_NR_BASE_FLAG)) then mem_cnt_next <= 10; - elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_REQ_SEQ_NR_BASE_FLAG)) then + elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flags,EMF_REQ_SEQ_NR_BASE_FLAG)) then mem_cnt_next <= 12; - elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_REQ_SEQ_NR_BITMAP_FLAG)) then + elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flags,EMF_REQ_SEQ_NR_BITMAP_FLAG)) then mem_cnt_next <= 14; else - if check_mask(mem_endpoint_latch_data.field_flag,EMF_ENTITYID_FLAG) then + if check_mask(mem_endpoint_latch_data.field_flags,EMF_ENTITYID_FLAG) then mem_cnt_next <= 15; - elsif check_mask(mem_endpoint_latch_data.field_flag,EMF_GUIDPREFIX_FLAG) then + elsif check_mask(mem_endpoint_latch_data.field_flags,EMF_GUIDPREFIX_FLAG) then mem_cnt_next <= 16; else mem_cnt_next <= 19; @@ -2779,22 +2743,22 @@ begin mem_read <= '1'; -- Memory Flow Control Guard if (mem_ready_in = '1') then - if (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_LEASE_DEADLINE_FLAG)) then + if (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flags,EMF_LEASE_DEADLINE_FLAG)) then mem_cnt_next <= 6; - elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_RES_TIME_FLAG)) then + elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flags,EMF_RES_TIME_FLAG)) then mem_cnt_next <= 8; - elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_ACK_SEQ_NR_BASE_FLAG)) then + elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flags,EMF_ACK_SEQ_NR_BASE_FLAG)) then mem_cnt_next <= 10; - elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_REQ_SEQ_NR_BASE_FLAG)) then + elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flags,EMF_REQ_SEQ_NR_BASE_FLAG)) then mem_cnt_next <= 12; - elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_REQ_SEQ_NR_BITMAP_FLAG)) then + elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flags,EMF_REQ_SEQ_NR_BITMAP_FLAG)) then mem_cnt_next <= 14; else - if check_mask(mem_endpoint_latch_data.field_flag,EMF_ENTITYID_FLAG) then + if check_mask(mem_endpoint_latch_data.field_flags,EMF_ENTITYID_FLAG) then mem_cnt_next <= 15; - elsif check_mask(mem_endpoint_latch_data.field_flag,EMF_GUIDPREFIX_FLAG) then + elsif check_mask(mem_endpoint_latch_data.field_flags,EMF_GUIDPREFIX_FLAG) then mem_cnt_next <= 16; - elsif check_mask(mem_endpoint_latch_data.field_flag,EMF_IPV4_ADDR_FLAG) then + elsif check_mask(mem_endpoint_latch_data.field_flags,EMF_IPV4_ADDR_FLAG) then mem_cnt_next <= 19; else mem_cnt_next <= 20; @@ -2822,22 +2786,22 @@ begin mem_read <= '1'; -- Memory Flow Control Guard if (mem_ready_in = '1') then - if (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_RES_TIME_FLAG)) then + if (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flags,EMF_RES_TIME_FLAG)) then mem_cnt_next <= 8; - elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_ACK_SEQ_NR_BASE_FLAG)) then + elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flags,EMF_ACK_SEQ_NR_BASE_FLAG)) then mem_cnt_next <= 10; - elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_REQ_SEQ_NR_BASE_FLAG)) then + elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flags,EMF_REQ_SEQ_NR_BASE_FLAG)) then mem_cnt_next <= 12; - elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_REQ_SEQ_NR_BITMAP_FLAG)) then + elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flags,EMF_REQ_SEQ_NR_BITMAP_FLAG)) then mem_cnt_next <= 14; else - if check_mask(mem_endpoint_latch_data.field_flag,EMF_ENTITYID_FLAG) then + if check_mask(mem_endpoint_latch_data.field_flags,EMF_ENTITYID_FLAG) then mem_cnt_next <= 15; - elsif check_mask(mem_endpoint_latch_data.field_flag,EMF_GUIDPREFIX_FLAG) then + elsif check_mask(mem_endpoint_latch_data.field_flags,EMF_GUIDPREFIX_FLAG) then mem_cnt_next <= 16; - elsif check_mask(mem_endpoint_latch_data.field_flag,EMF_IPV4_ADDR_FLAG) then + elsif check_mask(mem_endpoint_latch_data.field_flags,EMF_IPV4_ADDR_FLAG) then mem_cnt_next <= 19; - elsif check_mask(mem_endpoint_latch_data.field_flag,EMF_UDP_PORT_FLAG) then + elsif check_mask(mem_endpoint_latch_data.field_flags,EMF_UDP_PORT_FLAG) then mem_cnt_next <= 20; else mem_cnt_next <= 21; @@ -2866,22 +2830,22 @@ begin mem_read <= '1'; -- Memory Flow Control Guard if (mem_ready_in = '1') then - if (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_ACK_SEQ_NR_BASE_FLAG)) then + if (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flags,EMF_ACK_SEQ_NR_BASE_FLAG)) then mem_cnt_next <= 10; - elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_REQ_SEQ_NR_BASE_FLAG)) then + elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flags,EMF_REQ_SEQ_NR_BASE_FLAG)) then mem_cnt_next <= 12; - elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_REQ_SEQ_NR_BITMAP_FLAG)) then + elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flags,EMF_REQ_SEQ_NR_BITMAP_FLAG)) then mem_cnt_next <= 14; else - if check_mask(mem_endpoint_latch_data.field_flag,EMF_ENTITYID_FLAG) then + if check_mask(mem_endpoint_latch_data.field_flags,EMF_ENTITYID_FLAG) then mem_cnt_next <= 15; - elsif check_mask(mem_endpoint_latch_data.field_flag,EMF_GUIDPREFIX_FLAG) then + elsif check_mask(mem_endpoint_latch_data.field_flags,EMF_GUIDPREFIX_FLAG) then mem_cnt_next <= 16; - elsif check_mask(mem_endpoint_latch_data.field_flag,EMF_IPV4_ADDR_FLAG) then + elsif check_mask(mem_endpoint_latch_data.field_flags,EMF_IPV4_ADDR_FLAG) then mem_cnt_next <= 19; - elsif check_mask(mem_endpoint_latch_data.field_flag,EMF_UDP_PORT_FLAG) then + elsif check_mask(mem_endpoint_latch_data.field_flags,EMF_UDP_PORT_FLAG) then mem_cnt_next <= 20; - elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_LEASE_DEADLINE_FLAG)) then + elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flags,EMF_LEASE_DEADLINE_FLAG)) then mem_cnt_next <= 21; else mem_cnt_next <= 23; @@ -2910,22 +2874,22 @@ begin mem_read <= '1'; -- Memory Flow Control Guard if (mem_ready_in = '1') then - if (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_REQ_SEQ_NR_BASE_FLAG)) then + if (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flags,EMF_REQ_SEQ_NR_BASE_FLAG)) then mem_cnt_next <= 12; - elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_REQ_SEQ_NR_BITMAP_FLAG)) then + elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flags,EMF_REQ_SEQ_NR_BITMAP_FLAG)) then mem_cnt_next <= 14; else - if check_mask(mem_endpoint_latch_data.field_flag,EMF_ENTITYID_FLAG) then + if check_mask(mem_endpoint_latch_data.field_flags,EMF_ENTITYID_FLAG) then mem_cnt_next <= 15; - elsif check_mask(mem_endpoint_latch_data.field_flag,EMF_GUIDPREFIX_FLAG) then + elsif check_mask(mem_endpoint_latch_data.field_flags,EMF_GUIDPREFIX_FLAG) then mem_cnt_next <= 16; - elsif check_mask(mem_endpoint_latch_data.field_flag,EMF_IPV4_ADDR_FLAG) then + elsif check_mask(mem_endpoint_latch_data.field_flags,EMF_IPV4_ADDR_FLAG) then mem_cnt_next <= 19; - elsif check_mask(mem_endpoint_latch_data.field_flag,EMF_UDP_PORT_FLAG) then + elsif check_mask(mem_endpoint_latch_data.field_flags,EMF_UDP_PORT_FLAG) then mem_cnt_next <= 20; - elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_LEASE_DEADLINE_FLAG)) then + elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flags,EMF_LEASE_DEADLINE_FLAG)) then mem_cnt_next <= 21; - elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_RES_TIME_FLAG)) then + elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flags,EMF_RES_TIME_FLAG)) then mem_cnt_next <= 23; else mem_cnt_next <= 25; @@ -2954,22 +2918,22 @@ begin mem_read <= '1'; -- Memory Flow Control Guard if (mem_ready_in = '1') then - if (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_REQ_SEQ_NR_BITMAP_FLAG)) then + if (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flags,EMF_REQ_SEQ_NR_BITMAP_FLAG)) then mem_cnt_next <= 14; else - if check_mask(mem_endpoint_latch_data.field_flag,EMF_ENTITYID_FLAG) then + if check_mask(mem_endpoint_latch_data.field_flags,EMF_ENTITYID_FLAG) then mem_cnt_next <= 15; - elsif check_mask(mem_endpoint_latch_data.field_flag,EMF_GUIDPREFIX_FLAG) then + elsif check_mask(mem_endpoint_latch_data.field_flags,EMF_GUIDPREFIX_FLAG) then mem_cnt_next <= 16; - elsif check_mask(mem_endpoint_latch_data.field_flag,EMF_IPV4_ADDR_FLAG) then + elsif check_mask(mem_endpoint_latch_data.field_flags,EMF_IPV4_ADDR_FLAG) then mem_cnt_next <= 19; - elsif check_mask(mem_endpoint_latch_data.field_flag,EMF_UDP_PORT_FLAG) then + elsif check_mask(mem_endpoint_latch_data.field_flags,EMF_UDP_PORT_FLAG) then mem_cnt_next <= 20; - elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_LEASE_DEADLINE_FLAG)) then + elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flags,EMF_LEASE_DEADLINE_FLAG)) then mem_cnt_next <= 21; - elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_RES_TIME_FLAG)) then + elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flags,EMF_RES_TIME_FLAG)) then mem_cnt_next <= 23; - elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_ACK_SEQ_NR_BASE_FLAG)) then + elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flags,EMF_ACK_SEQ_NR_BASE_FLAG)) then mem_cnt_next <= 25; else mem_cnt_next <= 27; @@ -2986,21 +2950,21 @@ begin mem_read <= '1'; -- Memory Flow Control Guard if (mem_ready_in = '1') then - if check_mask(mem_endpoint_latch_data.field_flag,EMF_ENTITYID_FLAG) then + if check_mask(mem_endpoint_latch_data.field_flags,EMF_ENTITYID_FLAG) then mem_cnt_next <= 15; - elsif check_mask(mem_endpoint_latch_data.field_flag,EMF_GUIDPREFIX_FLAG) then + elsif check_mask(mem_endpoint_latch_data.field_flags,EMF_GUIDPREFIX_FLAG) then mem_cnt_next <= 16; - elsif check_mask(mem_endpoint_latch_data.field_flag,EMF_IPV4_ADDR_FLAG) then + elsif check_mask(mem_endpoint_latch_data.field_flags,EMF_IPV4_ADDR_FLAG) then mem_cnt_next <= 19; - elsif check_mask(mem_endpoint_latch_data.field_flag,EMF_UDP_PORT_FLAG) then + elsif check_mask(mem_endpoint_latch_data.field_flags,EMF_UDP_PORT_FLAG) then mem_cnt_next <= 20; - elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_LEASE_DEADLINE_FLAG)) then + elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flags,EMF_LEASE_DEADLINE_FLAG)) then mem_cnt_next <= 21; - elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_RES_TIME_FLAG)) then + elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flags,EMF_RES_TIME_FLAG)) then mem_cnt_next <= 23; - elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_ACK_SEQ_NR_BASE_FLAG)) then + elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flags,EMF_ACK_SEQ_NR_BASE_FLAG)) then mem_cnt_next <= 25; - elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_REQ_SEQ_NR_BASE_FLAG)) then + elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flags,EMF_REQ_SEQ_NR_BASE_FLAG)) then mem_cnt_next <= 27; else mem_cnt_next <= 29; @@ -3012,24 +2976,24 @@ begin mem_ready_out <= '1'; -- Memory Flow Control Guard if (mem_valid_out = '1') then - mem_endpoint_data_next.guid(3) <= mem_read_data; - current_emf_next <= current_emf or EMF_ENTITYID_FLAG; + mem_endpoint_data_next.guid(3) <= mem_read_data; + mem_endpoint_data_next.field_flags <= mem_endpoint_data.field_flags or EMF_ENTITYID_FLAG; - if check_mask(mem_endpoint_latch_data.field_flag,EMF_GUIDPREFIX_FLAG) then + if check_mask(mem_endpoint_latch_data.field_flags,EMF_GUIDPREFIX_FLAG) then mem_cnt_next <= 16; - elsif check_mask(mem_endpoint_latch_data.field_flag,EMF_IPV4_ADDR_FLAG) then + elsif check_mask(mem_endpoint_latch_data.field_flags,EMF_IPV4_ADDR_FLAG) then mem_cnt_next <= 19; - elsif check_mask(mem_endpoint_latch_data.field_flag,EMF_UDP_PORT_FLAG) then + elsif check_mask(mem_endpoint_latch_data.field_flags,EMF_UDP_PORT_FLAG) then mem_cnt_next <= 20; - elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_LEASE_DEADLINE_FLAG)) then + elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flags,EMF_LEASE_DEADLINE_FLAG)) then mem_cnt_next <= 21; - elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_RES_TIME_FLAG)) then + elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flags,EMF_RES_TIME_FLAG)) then mem_cnt_next <= 23; - elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_ACK_SEQ_NR_BASE_FLAG)) then + elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flags,EMF_ACK_SEQ_NR_BASE_FLAG)) then mem_cnt_next <= 25; - elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_REQ_SEQ_NR_BASE_FLAG)) then + elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flags,EMF_REQ_SEQ_NR_BASE_FLAG)) then mem_cnt_next <= 27; - elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_REQ_SEQ_NR_BITMAP_FLAG)) then + elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flags,EMF_REQ_SEQ_NR_BITMAP_FLAG)) then mem_cnt_next <= 29; else -- DONE @@ -3059,22 +3023,22 @@ begin mem_ready_out <= '1'; -- Memory Flow Control Guard if (mem_valid_out = '1') then - mem_endpoint_data_next.guid(2) <= mem_read_data; - current_emf_next <= current_emf or EMF_GUIDPREFIX_FLAG; + mem_endpoint_data_next.guid(2) <= mem_read_data; + mem_endpoint_data_next.field_flags <= mem_endpoint_data.field_flags or EMF_GUIDPREFIX_FLAG; - if check_mask(mem_endpoint_latch_data.field_flag,EMF_IPV4_ADDR_FLAG) then + if check_mask(mem_endpoint_latch_data.field_flags,EMF_IPV4_ADDR_FLAG) then mem_cnt_next <= 19; - elsif check_mask(mem_endpoint_latch_data.field_flag,EMF_UDP_PORT_FLAG) then + elsif check_mask(mem_endpoint_latch_data.field_flags,EMF_UDP_PORT_FLAG) then mem_cnt_next <= 20; - elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_LEASE_DEADLINE_FLAG)) then + elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flags,EMF_LEASE_DEADLINE_FLAG)) then mem_cnt_next <= 21; - elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_RES_TIME_FLAG)) then + elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flags,EMF_RES_TIME_FLAG)) then mem_cnt_next <= 23; - elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_ACK_SEQ_NR_BASE_FLAG)) then + elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flags,EMF_ACK_SEQ_NR_BASE_FLAG)) then mem_cnt_next <= 25; - elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_REQ_SEQ_NR_BASE_FLAG)) then + elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flags,EMF_REQ_SEQ_NR_BASE_FLAG)) then mem_cnt_next <= 27; - elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_REQ_SEQ_NR_BITMAP_FLAG)) then + elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flags,EMF_REQ_SEQ_NR_BITMAP_FLAG)) then mem_cnt_next <= 29; else -- DONE @@ -3086,20 +3050,20 @@ begin mem_ready_out <= '1'; -- Memory Flow Control Guard if (mem_valid_out = '1') then - mem_endpoint_data_next.addr <= mem_read_data; - current_emf_next <= current_emf or EMF_IPV4_ADDR_FLAG; + mem_endpoint_data_next.ip_addr <= mem_read_data; + mem_endpoint_data_next.field_flags <= mem_endpoint_data.field_flags or EMF_IPV4_ADDR_FLAG; - if check_mask(mem_endpoint_latch_data.field_flag,EMF_UDP_PORT_FLAG) then + if check_mask(mem_endpoint_latch_data.field_flags,EMF_UDP_PORT_FLAG) then mem_cnt_next <= 20; - elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_LEASE_DEADLINE_FLAG)) then + elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flags,EMF_LEASE_DEADLINE_FLAG)) then mem_cnt_next <= 21; - elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_RES_TIME_FLAG)) then + elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flags,EMF_RES_TIME_FLAG)) then mem_cnt_next <= 23; - elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_ACK_SEQ_NR_BASE_FLAG)) then + elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flags,EMF_ACK_SEQ_NR_BASE_FLAG)) then mem_cnt_next <= 25; - elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_REQ_SEQ_NR_BASE_FLAG)) then + elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flags,EMF_REQ_SEQ_NR_BASE_FLAG)) then mem_cnt_next <= 27; - elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_REQ_SEQ_NR_BITMAP_FLAG)) then + elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flags,EMF_REQ_SEQ_NR_BITMAP_FLAG)) then mem_cnt_next <= 29; else -- DONE @@ -3112,18 +3076,18 @@ begin -- Memory Flow Control Guard if (mem_valid_out = '1') then mem_endpoint_data_next.portn <= mem_read_data(WORD_WIDTH-1 downto WORD_WIDTH-UDP_PORT_WIDTH); - mem_endpoint_data_next.flags <= mem_read_data(CDR_SHORT_WIDTH-1 downto 0); - current_emf_next <= current_emf or EMF_UDP_PORT_FLAG; + mem_endpoint_data_next.reader_flags <= mem_read_data(CDR_SHORT_WIDTH-1 downto 0); + mem_endpoint_data_next.field_flags <= mem_endpoint_data.field_flags or EMF_UDP_PORT_FLAG; - if (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_LEASE_DEADLINE_FLAG)) then + if (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flags,EMF_LEASE_DEADLINE_FLAG)) then mem_cnt_next <= 21; - elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_RES_TIME_FLAG)) then + elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flags,EMF_RES_TIME_FLAG)) then mem_cnt_next <= 23; - elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_ACK_SEQ_NR_BASE_FLAG)) then + elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flags,EMF_ACK_SEQ_NR_BASE_FLAG)) then mem_cnt_next <= 25; - elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_REQ_SEQ_NR_BASE_FLAG)) then + elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flags,EMF_REQ_SEQ_NR_BASE_FLAG)) then mem_cnt_next <= 27; - elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_REQ_SEQ_NR_BITMAP_FLAG)) then + elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flags,EMF_REQ_SEQ_NR_BITMAP_FLAG)) then mem_cnt_next <= 29; else -- DONE @@ -3150,15 +3114,15 @@ begin -- Memory Flow Control Guard if (mem_valid_out = '1') then mem_endpoint_data_next.lease_deadline(1) <= unsigned(mem_read_data); - current_emf_next <= current_emf or EMF_LEASE_DEADLINE_FLAG; + mem_endpoint_data_next.field_flags <= mem_endpoint_data.field_flags or EMF_LEASE_DEADLINE_FLAG; - if (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_RES_TIME_FLAG)) then + if (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flags,EMF_RES_TIME_FLAG)) then mem_cnt_next <= 23; - elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_ACK_SEQ_NR_BASE_FLAG)) then + elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flags,EMF_ACK_SEQ_NR_BASE_FLAG)) then mem_cnt_next <= 25; - elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_REQ_SEQ_NR_BASE_FLAG)) then + elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flags,EMF_REQ_SEQ_NR_BASE_FLAG)) then mem_cnt_next <= 27; - elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_REQ_SEQ_NR_BITMAP_FLAG)) then + elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flags,EMF_REQ_SEQ_NR_BITMAP_FLAG)) then mem_cnt_next <= 29; else -- DONE @@ -3186,13 +3150,13 @@ begin -- Memory Flow Control Guard if (mem_valid_out = '1') then mem_endpoint_data_next.res_time(1) <= unsigned(mem_read_data); - current_emf_next <= current_emf or EMF_RES_TIME_FLAG; + mem_endpoint_data_next.field_flags <= mem_endpoint_data.field_flags or EMF_RES_TIME_FLAG; - if (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_ACK_SEQ_NR_BASE_FLAG)) then + if (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flags,EMF_ACK_SEQ_NR_BASE_FLAG)) then mem_cnt_next <= 25; - elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_REQ_SEQ_NR_BASE_FLAG)) then + elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flags,EMF_REQ_SEQ_NR_BASE_FLAG)) then mem_cnt_next <= 27; - elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_REQ_SEQ_NR_BITMAP_FLAG)) then + elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flags,EMF_REQ_SEQ_NR_BITMAP_FLAG)) then mem_cnt_next <= 29; else -- DONE @@ -3220,11 +3184,11 @@ begin -- Memory Flow Control Guard if (mem_valid_out = '1') then mem_endpoint_data_next.ack_seq_nr_base(1) <= unsigned(mem_read_data); - current_emf_next <= current_emf or EMF_ACK_SEQ_NR_BASE_FLAG; + mem_endpoint_data_next.field_flags <= mem_endpoint_data.field_flags or EMF_ACK_SEQ_NR_BASE_FLAG; - if (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_REQ_SEQ_NR_BASE_FLAG)) then + if (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flags,EMF_REQ_SEQ_NR_BASE_FLAG)) then mem_cnt_next <= 27; - elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_REQ_SEQ_NR_BITMAP_FLAG)) then + elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flags,EMF_REQ_SEQ_NR_BITMAP_FLAG)) then mem_cnt_next <= 29; else -- DONE @@ -3252,9 +3216,9 @@ begin -- Memory Flow Control Guard if (mem_valid_out = '1') then mem_endpoint_data_next.req_seq_nr_base(1) <= unsigned(mem_read_data); - current_emf_next <= current_emf or EMF_REQ_SEQ_NR_BASE_FLAG; + mem_endpoint_data_next.field_flags <= mem_endpoint_data.field_flags or EMF_REQ_SEQ_NR_BASE_FLAG; - if (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_REQ_SEQ_NR_BITMAP_FLAG)) then + if (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flags,EMF_REQ_SEQ_NR_BITMAP_FLAG)) then mem_cnt_next <= 29; else -- DONE @@ -3270,7 +3234,7 @@ begin -- Memory Flow Control Guard if (mem_valid_out = '1') then mem_endpoint_data_next.req_seq_nr_bitmap <= mem_read_data; - current_emf_next <= current_emf or EMF_REQ_SEQ_NR_BITMAP_FLAG; + mem_endpoint_data_next.field_flags <= mem_endpoint_data.field_flags or EMF_REQ_SEQ_NR_BITMAP_FLAG; -- DONE mem_stage_next <= IDLE; @@ -3296,7 +3260,7 @@ begin mem_addr <= mem_addr_base + EMF_ENTITYID_OFFSET; mem_write_data <= mem_endpoint_latch_data.guid(3); mem_endpoint_data_next.guid(3) <= mem_endpoint_latch_data.guid(3); - current_emf_next <= current_emf or EMF_ENTITYID_FLAG; + mem_endpoint_data_next.field_flags <= mem_endpoint_data.field_flags or EMF_ENTITYID_FLAG; if (mem_ready_in = '1') then mem_cnt_next <= mem_cnt + 1; end if; @@ -3324,7 +3288,7 @@ begin mem_addr <= mem_addr_base + EMF_GUIDPREFIX_OFFSET + 2; mem_write_data <= mem_endpoint_latch_data.guid(2); mem_endpoint_data_next.guid(2) <= mem_endpoint_latch_data.guid(2); - current_emf_next <= current_emf or EMF_GUIDPREFIX_FLAG; + mem_endpoint_data_next.field_flags <= mem_endpoint_data.field_flags or EMF_GUIDPREFIX_FLAG; if (mem_ready_in = '1') then mem_cnt_next <= mem_cnt + 1; end if; @@ -3332,9 +3296,9 @@ begin when 5 => mem_valid_in <= '1'; mem_addr <= mem_addr_base + EMF_IPV4_ADDR_OFFSET; - mem_write_data <= mem_endpoint_latch_data.addr; - mem_endpoint_data_next.addr <= mem_endpoint_latch_data.addr; - current_emf_next <= current_emf or EMF_IPV4_ADDR_FLAG; + mem_write_data <= mem_endpoint_latch_data.ip_addr; + mem_endpoint_data_next.ip_addr <= mem_endpoint_latch_data.ip_addr; + mem_endpoint_data_next.field_flags <= mem_endpoint_data.field_flags or EMF_IPV4_ADDR_FLAG; if (mem_ready_in = '1') then mem_cnt_next <= mem_cnt + 1; end if; @@ -3342,10 +3306,10 @@ begin when 6 => mem_valid_in <= '1'; mem_addr <= mem_addr_base + EMF_UDP_PORT_OFFSET; - mem_write_data <= mem_endpoint_latch_data.portn & mem_endpoint_latch_data.flags; + mem_write_data <= mem_endpoint_latch_data.portn & mem_endpoint_latch_data.reader_flags; mem_endpoint_data_next.portn <= mem_endpoint_latch_data.portn; - mem_endpoint_data_next.flags <= mem_endpoint_latch_data.flags; - current_emf_next <= current_emf or EMF_UDP_PORT_FLAG; + mem_endpoint_data_next.reader_flags <= mem_endpoint_latch_data.reader_flags; + mem_endpoint_data_next.field_flags <= mem_endpoint_data.field_flags or EMF_UDP_PORT_FLAG; if (mem_ready_in = '1') then if (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS) then mem_cnt_next <= mem_cnt + 1; @@ -3372,7 +3336,7 @@ begin mem_addr <= mem_addr_base + EMF_LEASE_DEADLINE_OFFSET + 1; mem_write_data <= std_logic_vector(mem_endpoint_latch_data.lease_deadline(1)); mem_endpoint_data_next.lease_deadline <= mem_endpoint_latch_data.lease_deadline; - current_emf_next <= current_emf or EMF_LEASE_DEADLINE_FLAG; + mem_endpoint_data_next.field_flags <= mem_endpoint_data.field_flags or EMF_LEASE_DEADLINE_FLAG; if (mem_ready_in = '1') then mem_cnt_next <= mem_cnt + 1; end if; @@ -3395,7 +3359,7 @@ begin mem_addr <= mem_addr_base + EMF_RES_TIME_OFFSET + 1; mem_write_data <= std_logic_vector(TIME_INVALID(1)); mem_endpoint_data_next.res_time <= TIME_INVALID; - current_emf_next <= current_emf or EMF_RES_TIME_FLAG; + mem_endpoint_data_next.field_flags <= mem_endpoint_data.field_flags or EMF_RES_TIME_FLAG; if (mem_ready_in = '1') then mem_cnt_next <= mem_cnt + 1; end if; @@ -3419,7 +3383,7 @@ begin mem_addr <= mem_addr_base + EMF_ACK_SEQ_NR_BASE_OFFSET + 1; mem_write_data <= std_logic_vector(mem_endpoint_latch_data.ack_seq_nr_base(1)); mem_endpoint_data_next.ack_seq_nr_base <= mem_endpoint_latch_data.ack_seq_nr_base; - current_emf_next <= current_emf or EMF_ACK_SEQ_NR_BASE_FLAG; + mem_endpoint_data_next.field_flags <= mem_endpoint_data.field_flags or EMF_ACK_SEQ_NR_BASE_FLAG; if (mem_ready_in = '1') then mem_cnt_next <= mem_cnt + 1; end if; @@ -3444,7 +3408,7 @@ begin mem_addr <= mem_addr_base + EMF_REQ_SEQ_NR_BASE_OFFSET + 1; mem_write_data <= std_logic_vector(SEQUENCENUMBER_UNKNOWN(1)); mem_endpoint_data_next.req_seq_nr_base <= SEQUENCENUMBER_UNKNOWN; - current_emf_next <= current_emf or EMF_REQ_SEQ_NR_BASE_FLAG; + mem_endpoint_data_next.field_flags <= mem_endpoint_data.field_flags or EMF_REQ_SEQ_NR_BASE_FLAG; if (mem_ready_in = '1') then mem_cnt_next <= mem_cnt + 1; end if; @@ -3457,7 +3421,7 @@ begin mem_addr <= mem_addr_base + EMF_REQ_SEQ_NR_BITMAP_OFFSET; mem_write_data <= (others => '0'); mem_endpoint_data_next.req_seq_nr_bitmap <= (others => '0'); - current_emf_next <= current_emf or EMF_REQ_SEQ_NR_BITMAP_FLAG; + mem_endpoint_data_next.field_flags <= mem_endpoint_data.field_flags or EMF_REQ_SEQ_NR_BITMAP_FLAG; if (mem_ready_in = '1') then mem_cnt_next <= mem_cnt + 1; end if; @@ -3515,22 +3479,22 @@ begin when 0 => mem_valid_in <= '1'; mem_addr <= mem_addr_base + EMF_IPV4_ADDR_OFFSET; - mem_write_data <= mem_endpoint_latch_data.addr; - mem_endpoint_data_next.addr <= mem_endpoint_latch_data.addr; - current_emf_next <= current_emf or EMF_IPV4_ADDR_FLAG; + mem_write_data <= mem_endpoint_latch_data.ip_addr; + mem_endpoint_data_next.ip_addr <= mem_endpoint_latch_data.ip_addr; + mem_endpoint_data_next.field_flags <= mem_endpoint_data.field_flags or EMF_IPV4_ADDR_FLAG; -- Memory Flow Control Guard if (mem_ready_in = '1') then - if check_mask(mem_endpoint_latch_data.field_flag,EMF_UDP_PORT_FLAG) then + if check_mask(mem_endpoint_latch_data.field_flags,EMF_UDP_PORT_FLAG) then mem_cnt_next <= 1; - elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_LEASE_DEADLINE_FLAG)) then + elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flags,EMF_LEASE_DEADLINE_FLAG)) then mem_cnt_next <= 2; - elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_RES_TIME_FLAG)) then + elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flags,EMF_RES_TIME_FLAG)) then mem_cnt_next <= 4; - elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_ACK_SEQ_NR_BASE_FLAG)) then + elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flags,EMF_ACK_SEQ_NR_BASE_FLAG)) then mem_cnt_next <= 6; - elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_REQ_SEQ_NR_BASE_FLAG)) then + elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flags,EMF_REQ_SEQ_NR_BASE_FLAG)) then mem_cnt_next <= 8; - elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_REQ_SEQ_NR_BITMAP_FLAG)) then + elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flags,EMF_REQ_SEQ_NR_BITMAP_FLAG)) then mem_cnt_next <= 10; else -- DONE @@ -3541,21 +3505,21 @@ begin when 1 => mem_valid_in <= '1'; mem_addr <= mem_addr_base + EMF_UDP_PORT_OFFSET; - mem_write_data <= mem_endpoint_latch_data.portn & mem_endpoint_latch_data.flags; + mem_write_data <= mem_endpoint_latch_data.portn & mem_endpoint_latch_data.reader_flags; mem_endpoint_data_next.portn <= mem_endpoint_latch_data.portn; - mem_endpoint_data_next.flags <= mem_endpoint_latch_data.flags; - current_emf_next <= current_emf or EMF_UDP_PORT_FLAG; + mem_endpoint_data_next.reader_flags <= mem_endpoint_latch_data.reader_flags; + mem_endpoint_data_next.field_flags <= mem_endpoint_data.field_flags or EMF_UDP_PORT_FLAG; -- Memory Flow Control Guard if (mem_ready_in = '1') then - if (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_LEASE_DEADLINE_FLAG)) then + if (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flags,EMF_LEASE_DEADLINE_FLAG)) then mem_cnt_next <= 2; - elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_RES_TIME_FLAG)) then + elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flags,EMF_RES_TIME_FLAG)) then mem_cnt_next <= 4; - elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_ACK_SEQ_NR_BASE_FLAG)) then + elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flags,EMF_ACK_SEQ_NR_BASE_FLAG)) then mem_cnt_next <= 6; - elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_REQ_SEQ_NR_BASE_FLAG)) then + elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flags,EMF_REQ_SEQ_NR_BASE_FLAG)) then mem_cnt_next <= 8; - elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_REQ_SEQ_NR_BITMAP_FLAG)) then + elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flags,EMF_REQ_SEQ_NR_BITMAP_FLAG)) then mem_cnt_next <= 10; else -- DONE @@ -3582,16 +3546,16 @@ begin mem_addr <= mem_addr_base + EMF_LEASE_DEADLINE_OFFSET + 1; mem_write_data <= std_logic_vector(mem_endpoint_latch_data.lease_deadline(1)); mem_endpoint_data_next.lease_deadline <= mem_endpoint_latch_data.lease_deadline; - current_emf_next <= current_emf or EMF_LEASE_DEADLINE_FLAG; + mem_endpoint_data_next.field_flags <= mem_endpoint_data.field_flags or EMF_LEASE_DEADLINE_FLAG; -- Memory Flow Control Guard if (mem_ready_in = '1') then - if (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_RES_TIME_FLAG)) then + if (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flags,EMF_RES_TIME_FLAG)) then mem_cnt_next <= 4; - elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_ACK_SEQ_NR_BASE_FLAG)) then + elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flags,EMF_ACK_SEQ_NR_BASE_FLAG)) then mem_cnt_next <= 6; - elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_REQ_SEQ_NR_BASE_FLAG)) then + elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flags,EMF_REQ_SEQ_NR_BASE_FLAG)) then mem_cnt_next <= 8; - elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_REQ_SEQ_NR_BITMAP_FLAG)) then + elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flags,EMF_REQ_SEQ_NR_BITMAP_FLAG)) then mem_cnt_next <= 10; else -- DONE @@ -3619,14 +3583,14 @@ begin mem_addr <= mem_addr_base + EMF_RES_TIME_OFFSET + 1; mem_write_data <= std_logic_vector(mem_endpoint_latch_data.res_time(1)); mem_endpoint_data_next.res_time <= mem_endpoint_latch_data.res_time; - current_emf_next <= current_emf or EMF_RES_TIME_FLAG; + mem_endpoint_data_next.field_flags <= mem_endpoint_data.field_flags or EMF_RES_TIME_FLAG; -- Memory Flow Control Guard if (mem_ready_in = '1') then - if (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_ACK_SEQ_NR_BASE_FLAG)) then + if (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flags,EMF_ACK_SEQ_NR_BASE_FLAG)) then mem_cnt_next <= 6; - elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_REQ_SEQ_NR_BASE_FLAG)) then + elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flags,EMF_REQ_SEQ_NR_BASE_FLAG)) then mem_cnt_next <= 8; - elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_REQ_SEQ_NR_BITMAP_FLAG)) then + elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flags,EMF_REQ_SEQ_NR_BITMAP_FLAG)) then mem_cnt_next <= 10; else -- DONE @@ -3654,12 +3618,12 @@ begin mem_addr <= mem_addr_base + EMF_ACK_SEQ_NR_BASE_OFFSET + 1; mem_write_data <= std_logic_vector(mem_endpoint_latch_data.ack_seq_nr_base(1)); mem_endpoint_data_next.ack_seq_nr_base <= mem_endpoint_latch_data.ack_seq_nr_base; - current_emf_next <= current_emf or EMF_ACK_SEQ_NR_BASE_FLAG; + mem_endpoint_data_next.field_flags <= mem_endpoint_data.field_flags or EMF_ACK_SEQ_NR_BASE_FLAG; -- Memory Flow Control Guard if (mem_ready_in = '1') then - if (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_REQ_SEQ_NR_BASE_FLAG)) then + if (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flags,EMF_REQ_SEQ_NR_BASE_FLAG)) then mem_cnt_next <= 8; - elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_REQ_SEQ_NR_BITMAP_FLAG)) then + elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flags,EMF_REQ_SEQ_NR_BITMAP_FLAG)) then mem_cnt_next <= 10; else -- DONE @@ -3687,10 +3651,10 @@ begin mem_addr <= mem_addr_base + EMF_REQ_SEQ_NR_BASE_OFFSET + 1; mem_write_data <= std_logic_vector(mem_endpoint_latch_data.req_seq_nr_base(1)); mem_endpoint_data_next.req_seq_nr_base <= mem_endpoint_latch_data.req_seq_nr_base; - current_emf_next <= current_emf or EMF_REQ_SEQ_NR_BASE_FLAG; + mem_endpoint_data_next.field_flags <= mem_endpoint_data.field_flags or EMF_REQ_SEQ_NR_BASE_FLAG; -- Memory Flow Control Guard if (mem_ready_in = '1') then - if (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_REQ_SEQ_NR_BITMAP_FLAG)) then + if (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flags,EMF_REQ_SEQ_NR_BITMAP_FLAG)) then mem_cnt_next <= 10; else -- DONE @@ -3706,7 +3670,7 @@ begin mem_addr <= mem_addr_base + EMF_REQ_SEQ_NR_BITMAP_OFFSET; mem_write_data <= mem_endpoint_latch_data.req_seq_nr_bitmap; mem_endpoint_data_next.req_seq_nr_bitmap <= mem_endpoint_latch_data.req_seq_nr_bitmap; - current_emf_next <= current_emf or EMF_REQ_SEQ_NR_BITMAP_FLAG; + mem_endpoint_data_next.field_flags <= mem_endpoint_data.field_flags or EMF_REQ_SEQ_NR_BITMAP_FLAG; -- Memory Flow Control Guard if (mem_ready_in = '1') then -- DONE @@ -3766,7 +3730,7 @@ begin -- RESET Occupied List Head mem_occupied_head_next <= ENDPOINT_MEMORY_MAX_ADDRESS; - mem_addr_base_next <= ENDPOINT_MEMORY_MAX_ADDRESS; + mem_endpoint_data_next.addr <= ENDPOINT_MEMORY_MAX_ADDRESS; -- DONE mem_stage_next <= IDLE; else @@ -3789,6 +3753,8 @@ begin if (mem_addr_latch = ENDPOINT_MEMORY_MAX_ADDRESS) then -- Set New Occupied List Head mem_occupied_head_next <= mem_addr_base; + + mem_endpoint_data_next.addr <= mem_addr_base; -- DONE mem_stage_next <= IDLE; else @@ -3804,7 +3770,7 @@ begin mem_write_data <= std_logic_vector(resize(mem_addr_latch,WORD_WIDTH)); if (mem_ready_in = '1') then - mem_addr_base_next <= mem_addr_latch; + mem_endpoint_data_next.addr <= mem_addr_latch; -- DONE mem_stage_next <= IDLE; end if; @@ -3830,31 +3796,32 @@ begin -- Memory Flow Control Guard if (mem_valid_out = '1') then if (resize(unsigned(mem_read_data),ENDPOINT_MEMORY_ADDR_WIDTH) = ENDPOINT_MEMORY_MAX_ADDRESS) then - mem_addr_base_next <= ENDPOINT_MEMORY_MAX_ADDRESS; + mem_endpoint_data_next.addr <= ENDPOINT_MEMORY_MAX_ADDRESS; -- DONE mem_stage_next <= IDLE; else + mem_endpoint_data_next.addr <= resize(unsigned(mem_read_data),ENDPOINT_MEMORY_ADDR_WIDTH); + -- Fetch Endpoint Data mem_addr_base_next <= resize(unsigned(mem_read_data),ENDPOINT_MEMORY_ADDR_WIDTH); - mem_stage_next <= GET_ENDPOINT_DATA; - if check_mask(mem_endpoint_latch_data.field_flag,EMF_ENTITYID_FLAG) then + if check_mask(mem_endpoint_latch_data.field_flags,EMF_ENTITYID_FLAG) then mem_cnt_next <= 0; - elsif check_mask(mem_endpoint_latch_data.field_flag,EMF_GUIDPREFIX_FLAG) then + elsif check_mask(mem_endpoint_latch_data.field_flags,EMF_GUIDPREFIX_FLAG) then mem_cnt_next <= 1; - elsif check_mask(mem_endpoint_latch_data.field_flag,EMF_IPV4_ADDR_FLAG) then + elsif check_mask(mem_endpoint_latch_data.field_flags,EMF_IPV4_ADDR_FLAG) then mem_cnt_next <= 4; - elsif check_mask(mem_endpoint_latch_data.field_flag,EMF_UDP_PORT_FLAG) then + elsif check_mask(mem_endpoint_latch_data.field_flags,EMF_UDP_PORT_FLAG) then mem_cnt_next <= 5; - elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_LEASE_DEADLINE_FLAG)) then + elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flags,EMF_LEASE_DEADLINE_FLAG)) then mem_cnt_next <= 6; - elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_RES_TIME_FLAG)) then + elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flags,EMF_RES_TIME_FLAG)) then mem_cnt_next <= 8; - elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_ACK_SEQ_NR_BASE_FLAG)) then + elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flags,EMF_ACK_SEQ_NR_BASE_FLAG)) then mem_cnt_next <= 10; - elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_REQ_SEQ_NR_BASE_FLAG)) then + elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flags,EMF_REQ_SEQ_NR_BASE_FLAG)) then mem_cnt_next <= 12; - elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_REQ_SEQ_NR_BITMAP_FLAG)) then + elsif (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flags,EMF_REQ_SEQ_NR_BITMAP_FLAG)) then mem_cnt_next <= 14; else -- DONE @@ -3924,7 +3891,7 @@ begin addr <= IPv4_ADDRESS_INVALID; portn <= UDP_PORT_INVALID; mem_endpoint_data <= ZERO_ENDPOINT_DATA; - mem_endpoint_latch_data <= ZERO_ENDPOINT_LATCH_DATA; + mem_endpoint_latch_data <= ZERO_ENDPOINT_DATA; cnt <= 0; cnt2 <= 0; cnt3 <= 0; @@ -3952,7 +3919,6 @@ begin mem_occupied_head <= ENDPOINT_MEMORY_MAX_ADDRESS; mem_empty_head <= ENDPOINT_MEMORY_MAX_ADDRESS; mem_addr_latch <= ENDPOINT_MEMORY_MAX_ADDRESS; - current_emf <= (others => '0'); global_ack_seq_nr_base <= SEQUENCENUMBER_UNKNOWN; last_seq_nr <= ZERO_SEQUENCENUMBER; bitmap_latch <= (others => (others => '0')); @@ -3997,7 +3963,6 @@ begin mem_occupied_head <= mem_occupied_head_next; mem_empty_head <= mem_empty_head_next; mem_addr_latch <= mem_addr_latch_next; - current_emf <= current_emf_next; global_ack_seq_nr_base <= global_ack_seq_nr_base_next; last_seq_nr <= last_seq_nr_next; bitmap_latch <= bitmap_latch_next;