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Add Test1 of RTPS Writer

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Test metatraffic behaviour of RTPS Writer.
Compiling and Passing.
This commit is contained in:
Greek 2021-02-25 13:50:05 +01:00
parent 268e166b4f
commit c9f0d70979
6 changed files with 1219 additions and 61 deletions
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64
sim/L0_rtps_writer_test1_vrkdp.do Normal file
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onerror {resume}
quietly WaveActivateNextPane {} 0
add wave -noupdate -divider SYSTEM
add wave -noupdate /l0_rtps_writer_test1_vrkdp/uut/clk
add wave -noupdate /l0_rtps_writer_test1_vrkdp/uut/reset
add wave -noupdate -divider INPUT
add wave -noupdate /l0_rtps_writer_test1_vrkdp/uut/empty_meta
add wave -noupdate /l0_rtps_writer_test1_vrkdp/uut/rd_meta
add wave -noupdate /l0_rtps_writer_test1_vrkdp/uut/last_word_in_meta
add wave -noupdate -radix hexadecimal /l0_rtps_writer_test1_vrkdp/uut/data_in_meta
add wave -noupdate -divider OUTPUT
add wave -noupdate /l0_rtps_writer_test1_vrkdp/uut/start_hc
add wave -noupdate /l0_rtps_writer_test1_vrkdp/uut/opcode_hc
add wave -noupdate /l0_rtps_writer_test1_vrkdp/uut/ack_hc
add wave -noupdate /l0_rtps_writer_test1_vrkdp/uut/done_hc
add wave -noupdate -radix hexadecimal /l0_rtps_writer_test1_vrkdp/uut/data_out_hc
add wave -noupdate -divider {MAIN FSM}
add wave -noupdate /l0_rtps_writer_test1_vrkdp/uut/stage
add wave -noupdate /l0_rtps_writer_test1_vrkdp/uut/stage_next
add wave -noupdate /l0_rtps_writer_test1_vrkdp/uut/cnt
add wave -noupdate -divider {MEMORY FSM}
add wave -noupdate /l0_rtps_writer_test1_vrkdp/uut/mem_op_done
add wave -noupdate /l0_rtps_writer_test1_vrkdp/uut/mem_op_start
add wave -noupdate /l0_rtps_writer_test1_vrkdp/uut/mem_opcode
add wave -noupdate /l0_rtps_writer_test1_vrkdp/uut/mem_stage
add wave -noupdate /l0_rtps_writer_test1_vrkdp/uut/mem_stage_next
add wave -noupdate /l0_rtps_writer_test1_vrkdp/uut/mem_cnt
add wave -noupdate /l0_rtps_writer_test1_vrkdp/uut/mem_pos
add wave -noupdate -radix unsigned /l0_rtps_writer_test1_vrkdp/uut/mem_addr_base
add wave -noupdate -expand -group MEM_CTRL -radix unsigned /l0_rtps_writer_test1_vrkdp/uut/mem_addr
add wave -noupdate -expand -group MEM_CTRL /l0_rtps_writer_test1_vrkdp/uut/mem_valid_in
add wave -noupdate -expand -group MEM_CTRL /l0_rtps_writer_test1_vrkdp/uut/mem_ready_in
add wave -noupdate -expand -group MEM_CTRL /l0_rtps_writer_test1_vrkdp/uut/mem_read
add wave -noupdate -expand -group MEM_CTRL -radix hexadecimal /l0_rtps_writer_test1_vrkdp/uut/mem_write_data
add wave -noupdate -expand -group MEM_CTRL /l0_rtps_writer_test1_vrkdp/uut/abort_read
add wave -noupdate -expand -group MEM_CTRL /l0_rtps_writer_test1_vrkdp/uut/mem_valid_out
add wave -noupdate -expand -group MEM_CTRL /l0_rtps_writer_test1_vrkdp/uut/mem_ready_out
add wave -noupdate -expand -group MEM_CTRL -radix hexadecimal /l0_rtps_writer_test1_vrkdp/uut/mem_read_data
add wave -noupdate -divider TESTBENCH
add wave -noupdate -group TESTBENCH /l0_rtps_writer_test1_vrkdp/start
add wave -noupdate -group TESTBENCH /l0_rtps_writer_test1_vrkdp/cnt_stim
add wave -noupdate -group TESTBENCH /l0_rtps_writer_test1_vrkdp/packet_sent
add wave -noupdate -group TESTBENCH /l0_rtps_writer_test1_vrkdp/mem_check_done
add wave -noupdate -group TESTBENCH /l0_rtps_writer_test1_vrkdp/stim_done
add wave -noupdate -group TESTBENCH /l0_rtps_writer_test1_vrkdp/test_done
add wave -noupdate -group TESTBENCH /l0_rtps_writer_test1_vrkdp/uut/idle_sig
TreeUpdate [SetDefaultTree]
WaveRestoreCursors {Begin {8325000 ps} 1} {Error {9725000 ps} 1} {Cursor {9175000 ps} 0}
quietly wave cursor active 3
configure wave -namecolwidth 150
configure wave -valuecolwidth 100
configure wave -justifyvalue left
configure wave -signalnamewidth 1
configure wave -snapdistance 10
configure wave -datasetprefix 0
configure wave -rowmargin 4
configure wave -childrowmargin 2
configure wave -gridoffset 0
configure wave -gridperiod 1
configure wave -griddelta 40
configure wave -timeline 0
configure wave -timelineunits ns
update
WaveRestoreZoom {8888200 ps} {9912200 ps}

474
src/Tests/Level_0/L0_rtps_writer_test1_vbkdp.vhd Normal file
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library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;
library osvvm; -- Utility Library
context osvvm.OsvvmContext;
use work.rtps_package.all;
use work.user_config.all;
use work.rtps_config_package.all;
use work.rtps_test_package.all;
-- This testbench tests the metatraffic operation behaviour of the RTPS Writer. (Remote Endpoint matching and Memory behaviour)
-- This testbench is using external names to access the memory of the rtps_reader directly and check the contents at the supposed locations.
-- This testbench covers following:
-- * Mathing Endpoint
-- * Memory Full Behaviour
-- * Unmatching Endpoint
-- * Unmatching Participant
-- * Updating previously matched Endpoint
-- * Unknown Metatraffic Operation
entity L0_rtps_writer_test1_vbkdp is
end entity;
architecture testbench of L0_rtps_writer_test1_vbkdp is
-- *CONSTANT DECLARATION*
constant MAX_REMOTE_ENDPOINTS : natural := 3;
-- *TYPE DECLARATION*
type TEST_STAGE_TYPE is (IDLE, BUSY);
type TEST_RAM_TYPE is array (0 to (MAX_REMOTE_ENDPOINTS*READER_ENDPOINT_FRAME_SIZE_B)-1) of std_logic_vector(WORD_WIDTH-1 downto 0);
-- *SIGNAL DECLARATION*
signal clk, empty_user, empty_meta, rd_meta, last_word_in_meta : std_logic := '0';
signal reset : std_logic := '1';
signal data_in_meta : std_logic_vector(WORD_WIDTH-1 downto 0) := (others => '0');
signal start_hc : std_logic := '0';
signal stim_stage : TEST_STAGE_TYPE := IDLE;
shared variable stimulus : TEST_PACKET_TYPE := EMPTY_TEST_PACKET;
signal packet_sent : std_logic := '0';
signal cnt_stim : natural := 0;
signal start : std_logic := '0';
shared variable SB_mem : work.ScoreBoardPkg_MemoryTest.ScoreBoardPType;
signal stim_done, mem_check_done, test_done : std_logic := '0';
-- *FUNCTION DECLARATION*
procedure wait_on_sent is
begin
wait until rising_edge(packet_sent);
end procedure;
procedure wait_on_mem_check is
begin
if (mem_check_done /= '1') then
wait until mem_check_done = '1';
end if;
end procedure;
procedure wait_on_completion is
begin
if (test_done /= '1') then
wait until test_done = '1';
end if;
end procedure;
begin
-- Unit Under Test
uut : entity work.rtps_writer(arch)
generic map (
RELIABILTY_QOS => BEST_EFFORT_RELIABILITY_QOS,
LIVELINESS_QOS => AUTOMATIC_LIVELINESS_QOS,
DURABILITY_QOS => VOLATILE_DURABILITY_QOS,
DESTINATION_ORDER_QOS => BY_RECEPTION_TIMESTAMP_DESTINATION_ORDER_QOS,
ACKNACK_RESPONSE_DELAY => DURATION_ZERO,
ACKNACK_SUPPRESSION_DELAY => DURATION_ZERO,
LEASE_DURATION => DURATION_INFINITE,
HEARTBEAT_PERIOD => DURATION_INFINITE,
ENTITYID => DEFAULT_WRITER_ENTITYID,
WITH_KEY => TRUE,
PUSH_MODE => TRUE,
INLINE_QOS => gen_inline_qos(NUM_READERS), -- TODO
MAX_REMOTE_ENDPOINTS => MAX_REMOTE_ENDPOINTS
)
port map (
clk => clk,
reset => reset,
time => TIME_ZERO,
empty_user => '1',
rd_user => open,
data_in_user => (others => '0'),
last_word_in_user => '0',
empty_meta => empty_meta or packet_sent,
rd_meta => rd_meta,
data_in_meta => data_in_meta,
last_word_in_meta => last_word_in_meta,
alive_sig => open,
wr_rtps => open,
full_rtps => '0',
last_word_out_rtps => open,
data_out_rtps => open,
assert_liveliness => '0',
data_available => '0',
start_hc => start_hc,
opcode_hc => open,
ack_hc => '0',
seq_nr_hc => open,
done_hc => '0',
ret_hc => ERROR,
get_data_hc => open,
data_in_hc => (others => '0'),
valid_in_hc => '0',
ready_in_hc => open,
last_word_in_hc => '0',
cc_instance_handle => HANDLE_NIL,
cc_kind => ALIVE,
cc_source_timestamp => TIME_INVALID
);
stimulus_prc : process
variable RV : RandomPType;
variable p0, p1, participant : PARTICIPANT_DATA_TYPE := DEFAULT_PARTICIPANT_DATA;
variable e0, e1, e2, e3, endpoint : ENDPOINT_DATA_TYPE := DEFAULT_ENDPOINT_DATA;
-- Wrapper to use procedure as function
impure function gen_rand_loc_2 return LOCATOR_TYPE is
variable ret : LOCATOR_TYPE := EMPTY_LOCATOR;
begin
gen_rand_loc(RV, ret);
return ret;
end function;
impure function gen_rand_guid_prefix return GUIDPREFIX_TYPE is
variable ret : GUIDPREFIX_TYPE;
begin
ret := (0 => RV.RandSlv(WORD_WIDTH), 1 => RV.RandSlv(WORD_WIDTH), 2 => RV.RandSlv(WORD_WIDTH));
return ret;
end function;
procedure start_test is
begin
start <= '1';
wait until rising_edge(clk);
start <= '0';
wait until rising_edge(clk);
end procedure;
begin
SetAlertLogName("rtps_writer - (Volatile, Best Effort, Keyed, By Reception Timestamp, Push Mode) - Level 0 - Metatraffic Handling");
SetAlertEnable(FAILURE, TRUE);
SetAlertEnable(ERROR, TRUE);
SetAlertEnable(WARNING, TRUE);
SetLogEnable(DEBUG, FALSE);
SetLogEnable(PASSED, FALSE);
SetLogEnable(INFO, TRUE);
RV.InitSeed(RV'instance_name);
p0.guidPrefix := gen_rand_guid_prefix;
p1.guidPrefix := gen_rand_guid_prefix;
-- Endpoint 1
e0 := DEFAULT_ENDPOINT_DATA;
e0.participant := p0;
e0.entityid := RV.RandSlv(ENTITYID_WIDTH);
e0.unicastLocatorList := (numLocators => int(1,CDR_LONG_WIDTH), locator => (0 => gen_rand_loc_2, others => EMPTY_LOCATOR));
-- Endpoint 2
e1 := DEFAULT_ENDPOINT_DATA;
e1.participant := p0;
e1.entityid := RV.RandSlv(ENTITYID_WIDTH);
e1.unicastLocatorList := (numLocators => int(1,CDR_LONG_WIDTH), locator => (0 => gen_rand_loc_2, others => EMPTY_LOCATOR));
e1.expectsInlineQoS(0) := '1';
-- Endpoint 3
e2 := DEFAULT_ENDPOINT_DATA;
e2.participant := p1;
e2.entityid := RV.RandSlv(ENTITYID_WIDTH);
e2.unicastLocatorList := (numLocators => int(1,CDR_LONG_WIDTH), locator => (0 => gen_rand_loc_2, others => EMPTY_LOCATOR));
e2.expectsInlineQoS(0) := '1';
e2.durability := TRANSIENT_LOCAL_DURABILITY_QOS;
e2.reliability := BEST_EFFORT_RELIABILITY_QOS;
-- Endpoint 4
e3 := DEFAULT_ENDPOINT_DATA;
e3.participant := p1;
e3.entityid := RV.RandSlv(ENTITYID_WIDTH);
e3.unicastLocatorList := (numLocators => int(1,CDR_LONG_WIDTH), locator => (0 => gen_rand_loc_2, others => EMPTY_LOCATOR));
e3.reliability := BEST_EFFORT_RELIABILITY_QOS;
Log("Initiating Test", INFO);
stim_done <= '0';
start <= '0';
reset <= '1';
wait until rising_edge(clk);
wait until rising_edge(clk);
reset <= '0';
Log("Insert Endpoint 0 Participant 0", INFO);
endpoint := e0;
endpoint.nr := 0;
endpoint.match := MATCH;
gen_endpoint_match_frame(endpoint, stimulus);
SB_mem.Push(gen_reader_endpoint_mem_frame_b(endpoint));
start_test;
wait_on_sent;
stimulus := EMPTY_TEST_PACKET;
wait_on_mem_check;
-- MEMORY STATE [p0e0,0,0]
Log("Insert Endpoint 1 Participant 0", INFO);
endpoint := e1;
endpoint.nr := 1;
endpoint.match := MATCH;
gen_endpoint_match_frame(endpoint, stimulus);
SB_mem.Push(gen_reader_endpoint_mem_frame_b(endpoint));
start_test;
wait_on_sent;
stimulus := EMPTY_TEST_PACKET;
wait_on_mem_check;
-- MEMORY STATE [p0e0,p0e1,0]
Log("Insert Endpoint 2 Participant 1", INFO);
endpoint := e2;
endpoint.nr := 2;
endpoint.match := MATCH;
gen_endpoint_match_frame(endpoint, stimulus);
SB_mem.Push(gen_reader_endpoint_mem_frame_b(endpoint));
start_test;
wait_on_sent;
stimulus := EMPTY_TEST_PACKET;
wait_on_mem_check;
-- MEMORY STATE [p0e0,p0e1,p1e2]
Log("Ignore Endpoint 3 Participant 1 [Memory Full]", INFO);
endpoint := e3;
endpoint.match := MATCH;
gen_endpoint_match_frame(endpoint, stimulus);
-- Re-check Mem-State
endpoint := e0;
endpoint.nr := 0;
endpoint.match := MATCH;
SB_mem.Push(gen_reader_endpoint_mem_frame_b(endpoint));
endpoint := e1;
endpoint.nr := 1;
endpoint.match := MATCH;
SB_mem.Push(gen_reader_endpoint_mem_frame_b(endpoint));
endpoint := e2;
endpoint.nr := 2;
endpoint.match := MATCH;
SB_mem.Push(gen_reader_endpoint_mem_frame_b(endpoint));
start_test;
wait_on_sent;
stimulus := EMPTY_TEST_PACKET;
wait_on_mem_check;
-- MEMORY STATE [p0e0,p0e1,p1e3]
Log("Remove Endpoint 2 Participant 1", INFO);
endpoint := e2;
endpoint.nr := 2;
endpoint.match := UNMATCH;
gen_endpoint_match_frame(endpoint, stimulus);
SB_mem.Push(gen_reader_endpoint_mem_frame_b(endpoint));
start_test;
wait_on_sent;
stimulus := EMPTY_TEST_PACKET;
wait_on_mem_check;
-- MEMORY STATE [p0e0,p0e1,0]
Log("Insert Endpoint 3 Participant 1", INFO);
endpoint := e3;
endpoint.nr := 2;
endpoint.match := MATCH;
gen_endpoint_match_frame(endpoint, stimulus);
SB_mem.Push(gen_reader_endpoint_mem_frame_b(endpoint));
start_test;
wait_on_sent;
stimulus := EMPTY_TEST_PACKET;
wait_on_mem_check;
-- MEMORY STATE [p0e0,p0e1,p1e3]
Log("Remove Participant 0", INFO);
participant := p0;
participant.match := UNMATCH;
gen_participant_match_frame(participant, stimulus);
-- Remove Endpoint 0
endpoint := e0;
endpoint.nr := 0;
endpoint.match := UNMATCH;
SB_mem.Push(gen_reader_endpoint_mem_frame_b(endpoint));
-- Remove Endpoint 1
endpoint := e1;
endpoint.nr := 1;
endpoint.match := UNMATCH;
SB_mem.Push(gen_reader_endpoint_mem_frame_b(endpoint));
start_test;
wait_on_sent;
stimulus := EMPTY_TEST_PACKET;
wait_on_mem_check;
-- MEMORY STATE [0,0,p1e3]
Log("Insert Endpoint 2 Participant 1", INFO);
endpoint := e2;
endpoint.nr := 0;
endpoint.match := MATCH;
gen_endpoint_match_frame(endpoint, stimulus);
SB_mem.Push(gen_reader_endpoint_mem_frame_b(endpoint));
start_test;
wait_on_sent;
stimulus := EMPTY_TEST_PACKET;
wait_on_mem_check;
-- MEMORY STATE [p1e2,0,p1e3]
Log("Unknown Metatraffic Operation followed by insertion of Enpoint 0 Participant 0", INFO);
for i in 0 to 9 loop
stimulus.data(i) := RV.RandSlv(WORD_WIDTH);
end loop;
stimulus.last(9) := '1';
stimulus.length := 10;
endpoint := e0;
endpoint.nr := 1;
endpoint.match := MATCH;
gen_endpoint_match_frame(endpoint, stimulus);
-- Re-check Mem-State
endpoint := e2;
endpoint.nr := 0;
endpoint.match := MATCH;
SB_mem.Push(gen_reader_endpoint_mem_frame_b(endpoint));
endpoint := e0;
endpoint.nr := 1;
endpoint.match := MATCH;
SB_mem.Push(gen_reader_endpoint_mem_frame_b(endpoint));
endpoint := e3;
endpoint.nr := 2;
endpoint.match := MATCH;
SB_mem.Push(gen_reader_endpoint_mem_frame_b(endpoint));
start_test;
wait_on_sent;
stimulus := EMPTY_TEST_PACKET;
wait_on_mem_check;
-- MEMORY STATE [p1e2,p0e0,p1e3]
Log("Update Endpoint 2 Participant 1", INFO);
endpoint := e2;
endpoint.nr := 0;
endpoint.match := MATCH;
endpoint.unicastLocatorList := (numLocators => int(1,CDR_LONG_WIDTH), locator => (0 => gen_rand_loc_2, others => EMPTY_LOCATOR));
gen_endpoint_match_frame(endpoint, stimulus);
SB_mem.Push(gen_reader_endpoint_mem_frame_b(endpoint));
start_test;
wait_on_sent;
stimulus := EMPTY_TEST_PACKET;
wait_on_mem_check;
-- MEMORY STATE [p1e2,p0e0,p1e3]
stim_done <= '1';
wait_on_completion;
TranscriptOpen(RESULTS_FILE, APPEND_MODE);
SetTranscriptMirror;
ReportAlerts;
TranscriptClose;
std.env.stop;
wait;
end process;
clock_prc : process
begin
clk <= '0';
wait for 25 ns;
clk <= '1';
wait for 25 ns;
end process;
in_empty_prc : process
begin
empty_meta <= '0';
wait until rd_meta = '1';
wait until rising_edge(clk);
empty_meta <= '1';
wait until rising_edge(clk);
end process;
alert_prc : process(all)
begin
if rising_edge(clk) then
alertif(empty_meta = '1' and rd_meta = '1', "Input FIFO read signal high while empty signal high", ERROR);
alertif(start_hc = '1', "Unexpected History Cache Operation initiated", ERROR);
end if;
end process;
input_prc : process(all)
begin
data_in_meta <= stimulus.data(cnt_stim);
last_word_in_meta <= stimulus.last(cnt_stim);
if rising_edge(clk) then
if (reset = '1') then
cnt_stim <= 0;
stim_stage <= IDLE;
packet_sent <= '1';
else
case (stim_stage) is
when IDLE =>
if (start = '1' and stimulus.length /= 0) then
stim_stage <= BUSY;
packet_sent <= '0';
end if;
when BUSY =>
if (rd_meta = '1') then
if (cnt_stim = stimulus.length-1) then
stim_stage <= IDLE;
packet_sent <= '1';
cnt_stim <= 0;
else
cnt_stim <= cnt_stim + 1;
end if;
end if;
end case;
end if;
end if;
end process;
done_proc : process(clk)
begin
if rising_edge(clk) then
if (stim_done = '1' and SB_mem.empty) then
test_done <= '1';
else
test_done <= '0';
end if;
end if;
end process;
mem_check_prc : process
alias mem is <<signal uut.mem_ctrl_inst.ram_inst.mem : TEST_RAM_TYPE>>;
alias mem_op_done is <<signal uut.mem_op_done : std_logic>>;
alias idle_sig is <<signal uut.idle_sig : std_logic>>;
variable reference : TEST_READER_ENDPOINT_MEMORY_FRAME_TYPE_B;
begin
mem_check_done <= '0';
-- SAFEGUARD: (Prevent Fall-through Behavior)
if (reset /= '0') then
wait until reset = '0';
end if;
-- Wait for Packet to be sent
wait until rising_edge(packet_sent);
-- Wait for UUT IDLE state
if (idle_sig /= '1') then
wait until idle_sig = '1';
end if;
-- Wait for ongoing memory operation
if (mem_op_done /= '1') then
wait until mem_op_done = '1';
end if;
while (not SB_mem.empty) loop
SB_mem.Pop(reference);
for i in 0 to reference'length-1 loop
AffirmIf(?? (mem(reference(i).addr) ?= reference(i).data), "Address: " & integer'image(reference(i).addr) & " Received: " & to_hstring(mem(reference(i).addr)) & " Expected: " & to_hstring(reference(i).data));
end loop;
end loop;
-- Toggle High for one clock cycle
mem_check_done <= '1';
wait until rising_edge(clk);
end process;
watchdog : process
begin
wait for 1 ms;
Alert("Test timeout", FAILURE);
std.env.stop;
end process;
end architecture;

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src/Tests/Level_0/L0_rtps_writer_test1_vrkdp.vhd Normal file
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library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;
library osvvm; -- Utility Library
context osvvm.OsvvmContext;
use work.rtps_package.all;
use work.user_config.all;
use work.rtps_config_package.all;
use work.rtps_test_package.all;
-- This testbench tests the metatraffic operation behaviour of the RTPS Writer. (Remote Endpoint matching and Memory behaviour)
-- This testbench is using external names to access the memory of the rtps_reader directly and check the contents at the supposed locations.
-- This testbench covers following:
-- * Mathing Endpoint
-- * Memory Full Behaviour
-- * Unmatching Endpoint
-- * Unmatching Participant
-- * Updating previously matched Endpoint
-- * Unknown Metatraffic Operation
entity L0_rtps_writer_test1_vrkdp is
end entity;
architecture testbench of L0_rtps_writer_test1_vrkdp is
-- *CONSTANT DECLARATION*
constant MAX_REMOTE_ENDPOINTS : natural := 3;
-- *TYPE DECLARATION*
type TEST_STAGE_TYPE is (IDLE, BUSY);
type TEST_RAM_TYPE is array (0 to (MAX_REMOTE_ENDPOINTS*READER_ENDPOINT_FRAME_SIZE_A)-1) of std_logic_vector(WORD_WIDTH-1 downto 0);
-- *SIGNAL DECLARATION*
signal clk, empty_user, empty_meta, rd_meta, last_word_in_meta : std_logic := '0';
signal reset : std_logic := '1';
signal data_in_meta : std_logic_vector(WORD_WIDTH-1 downto 0) := (others => '0');
signal start_hc : std_logic := '0';
signal stim_stage : TEST_STAGE_TYPE := IDLE;
shared variable stimulus : TEST_PACKET_TYPE := EMPTY_TEST_PACKET;
signal packet_sent : std_logic := '0';
signal cnt_stim : natural := 0;
signal start : std_logic := '0';
shared variable SB_mem : work.ScoreBoardPkg_MemoryTest.ScoreBoardPType;
signal stim_done, mem_check_done, test_done : std_logic := '0';
-- *FUNCTION DECLARATION*
procedure wait_on_sent is
begin
wait until rising_edge(packet_sent);
end procedure;
procedure wait_on_mem_check is
begin
if (mem_check_done /= '1') then
wait until mem_check_done = '1';
end if;
end procedure;
procedure wait_on_completion is
begin
if (test_done /= '1') then
wait until test_done = '1';
end if;
end procedure;
begin
-- Unit Under Test
uut : entity work.rtps_writer(arch)
generic map (
RELIABILTY_QOS => RELIABLE_RELIABILITY_QOS,
LIVELINESS_QOS => AUTOMATIC_LIVELINESS_QOS,
DURABILITY_QOS => VOLATILE_DURABILITY_QOS,
DESTINATION_ORDER_QOS => BY_RECEPTION_TIMESTAMP_DESTINATION_ORDER_QOS,
ACKNACK_RESPONSE_DELAY => DURATION_ZERO,
ACKNACK_SUPPRESSION_DELAY => DURATION_ZERO,
LEASE_DURATION => DURATION_INFINITE,
HEARTBEAT_PERIOD => DURATION_INFINITE,
ENTITYID => DEFAULT_WRITER_ENTITYID,
WITH_KEY => TRUE,
PUSH_MODE => TRUE,
INLINE_QOS => gen_inline_qos(NUM_READERS), -- TODO
MAX_REMOTE_ENDPOINTS => MAX_REMOTE_ENDPOINTS
)
port map (
clk => clk,
reset => reset,
time => TIME_ZERO,
empty_user => '1',
rd_user => open,
data_in_user => (others => '0'),
last_word_in_user => '0',
empty_meta => empty_meta or packet_sent,
rd_meta => rd_meta,
data_in_meta => data_in_meta,
last_word_in_meta => last_word_in_meta,
alive_sig => open,
wr_rtps => open,
full_rtps => '0',
last_word_out_rtps => open,
data_out_rtps => open,
assert_liveliness => '0',
data_available => '0',
start_hc => start_hc,
opcode_hc => open,
ack_hc => '0',
seq_nr_hc => open,
done_hc => '0',
ret_hc => ERROR,
get_data_hc => open,
data_in_hc => (others => '0'),
valid_in_hc => '0',
ready_in_hc => open,
last_word_in_hc => '0',
cc_instance_handle => HANDLE_NIL,
cc_kind => ALIVE,
cc_source_timestamp => TIME_INVALID
);
stimulus_prc : process
variable RV : RandomPType;
variable p0, p1, participant : PARTICIPANT_DATA_TYPE := DEFAULT_PARTICIPANT_DATA;
variable e0, e1, e2, e3, endpoint : ENDPOINT_DATA_TYPE := DEFAULT_ENDPOINT_DATA;
-- Wrapper to use procedure as function
impure function gen_rand_loc_2 return LOCATOR_TYPE is
variable ret : LOCATOR_TYPE := EMPTY_LOCATOR;
begin
gen_rand_loc(RV, ret);
return ret;
end function;
impure function gen_rand_guid_prefix return GUIDPREFIX_TYPE is
variable ret : GUIDPREFIX_TYPE;
begin
ret := (0 => RV.RandSlv(WORD_WIDTH), 1 => RV.RandSlv(WORD_WIDTH), 2 => RV.RandSlv(WORD_WIDTH));
return ret;
end function;
procedure start_test is
begin
start <= '1';
wait until rising_edge(clk);
start <= '0';
wait until rising_edge(clk);
end procedure;
begin
SetAlertLogName("rtps_writer - (Volatile, Reliable, Keyed, By Reception Timestamp, Push Mode) - Level 0 - Metatraffic Handling");
SetAlertEnable(FAILURE, TRUE);
SetAlertEnable(ERROR, TRUE);
SetAlertEnable(WARNING, TRUE);
SetLogEnable(DEBUG, FALSE);
SetLogEnable(PASSED, FALSE);
SetLogEnable(INFO, TRUE);
RV.InitSeed(RV'instance_name);
p0.guidPrefix := gen_rand_guid_prefix;
p1.guidPrefix := gen_rand_guid_prefix;
-- Endpoint 1
e0 := DEFAULT_ENDPOINT_DATA;
e0.participant := p0;
e0.entityid := RV.RandSlv(ENTITYID_WIDTH);
e0.unicastLocatorList := (numLocators => int(1,CDR_LONG_WIDTH), locator => (0 => gen_rand_loc_2, others => EMPTY_LOCATOR));
-- Endpoint 2
e1 := DEFAULT_ENDPOINT_DATA;
e1.participant := p0;
e1.entityid := RV.RandSlv(ENTITYID_WIDTH);
e1.unicastLocatorList := (numLocators => int(1,CDR_LONG_WIDTH), locator => (0 => gen_rand_loc_2, others => EMPTY_LOCATOR));
e1.expectsInlineQoS(0) := '1';
-- Endpoint 3
e2 := DEFAULT_ENDPOINT_DATA;
e2.participant := p1;
e2.entityid := RV.RandSlv(ENTITYID_WIDTH);
e2.unicastLocatorList := (numLocators => int(1,CDR_LONG_WIDTH), locator => (0 => gen_rand_loc_2, others => EMPTY_LOCATOR));
e2.expectsInlineQoS(0) := '1';
e2.durability := TRANSIENT_LOCAL_DURABILITY_QOS;
e2.reliability := BEST_EFFORT_RELIABILITY_QOS;
-- Endpoint 4
e3 := DEFAULT_ENDPOINT_DATA;
e3.participant := p1;
e3.entityid := RV.RandSlv(ENTITYID_WIDTH);
e3.unicastLocatorList := (numLocators => int(1,CDR_LONG_WIDTH), locator => (0 => gen_rand_loc_2, others => EMPTY_LOCATOR));
e3.reliability := BEST_EFFORT_RELIABILITY_QOS;
Log("Initiating Test", INFO);
stim_done <= '0';
start <= '0';
reset <= '1';
wait until rising_edge(clk);
wait until rising_edge(clk);
reset <= '0';
Log("Insert Endpoint 0 Participant 0", INFO);
endpoint := e0;
endpoint.nr := 0;
endpoint.match := MATCH;
gen_endpoint_match_frame(endpoint, stimulus);
SB_mem.Push(gen_reader_endpoint_mem_frame_a(endpoint));
start_test;
wait_on_sent;
stimulus := EMPTY_TEST_PACKET;
wait_on_mem_check;
-- MEMORY STATE [p0e0,0,0]
Log("Insert Endpoint 1 Participant 0", INFO);
endpoint := e1;
endpoint.nr := 1;
endpoint.match := MATCH;
gen_endpoint_match_frame(endpoint, stimulus);
SB_mem.Push(gen_reader_endpoint_mem_frame_a(endpoint));
start_test;
wait_on_sent;
stimulus := EMPTY_TEST_PACKET;
wait_on_mem_check;
-- MEMORY STATE [p0e0,p0e1,0]
Log("Insert Endpoint 2 Participant 1", INFO);
endpoint := e2;
endpoint.nr := 2;
endpoint.match := MATCH;
gen_endpoint_match_frame(endpoint, stimulus);
SB_mem.Push(gen_reader_endpoint_mem_frame_a(endpoint));
start_test;
wait_on_sent;
stimulus := EMPTY_TEST_PACKET;
wait_on_mem_check;
-- MEMORY STATE [p0e0,p0e1,p1e2]
Log("Ignore Endpoint 3 Participant 1 [Memory Full]", INFO);
endpoint := e3;
endpoint.match := MATCH;
gen_endpoint_match_frame(endpoint, stimulus);
-- Re-check Mem-State
endpoint := e0;
endpoint.nr := 0;
endpoint.match := MATCH;
SB_mem.Push(gen_reader_endpoint_mem_frame_a(endpoint));
endpoint := e1;
endpoint.nr := 1;
endpoint.match := MATCH;
SB_mem.Push(gen_reader_endpoint_mem_frame_a(endpoint));
endpoint := e2;
endpoint.nr := 2;
endpoint.match := MATCH;
SB_mem.Push(gen_reader_endpoint_mem_frame_a(endpoint));
start_test;
wait_on_sent;
stimulus := EMPTY_TEST_PACKET;
wait_on_mem_check;
-- MEMORY STATE [p0e0,p0e1,p1e3]
Log("Remove Endpoint 2 Participant 1", INFO);
endpoint := e2;
endpoint.nr := 2;
endpoint.match := UNMATCH;
gen_endpoint_match_frame(endpoint, stimulus);
SB_mem.Push(gen_reader_endpoint_mem_frame_a(endpoint));
start_test;
wait_on_sent;
stimulus := EMPTY_TEST_PACKET;
wait_on_mem_check;
-- MEMORY STATE [p0e0,p0e1,0]
Log("Insert Endpoint 3 Participant 1", INFO);
endpoint := e3;
endpoint.nr := 2;
endpoint.match := MATCH;
gen_endpoint_match_frame(endpoint, stimulus);
SB_mem.Push(gen_reader_endpoint_mem_frame_a(endpoint));
start_test;
wait_on_sent;
stimulus := EMPTY_TEST_PACKET;
wait_on_mem_check;
-- MEMORY STATE [p0e0,p0e1,p1e3]
Log("Remove Participant 0", INFO);
participant := p0;
participant.match := UNMATCH;
gen_participant_match_frame(participant, stimulus);
-- Remove Endpoint 0
endpoint := e0;
endpoint.nr := 0;
endpoint.match := UNMATCH;
SB_mem.Push(gen_reader_endpoint_mem_frame_a(endpoint));
-- Remove Endpoint 1
endpoint := e1;
endpoint.nr := 1;
endpoint.match := UNMATCH;
SB_mem.Push(gen_reader_endpoint_mem_frame_a(endpoint));
start_test;
wait_on_sent;
stimulus := EMPTY_TEST_PACKET;
wait_on_mem_check;
-- MEMORY STATE [0,0,p1e3]
Log("Insert Endpoint 2 Participant 1", INFO);
endpoint := e2;
endpoint.nr := 0;
endpoint.match := MATCH;
gen_endpoint_match_frame(endpoint, stimulus);
SB_mem.Push(gen_reader_endpoint_mem_frame_a(endpoint));
start_test;
wait_on_sent;
stimulus := EMPTY_TEST_PACKET;
wait_on_mem_check;
-- MEMORY STATE [p1e2,0,p1e3]
Log("Unknown Metatraffic Operation followed by insertion of Enpoint 0 Participant 0", INFO);
for i in 0 to 9 loop
stimulus.data(i) := RV.RandSlv(WORD_WIDTH);
end loop;
stimulus.last(9) := '1';
stimulus.length := 10;
endpoint := e0;
endpoint.nr := 1;
endpoint.match := MATCH;
gen_endpoint_match_frame(endpoint, stimulus);
-- Re-check Mem-State
endpoint := e2;
endpoint.nr := 0;
endpoint.match := MATCH;
SB_mem.Push(gen_reader_endpoint_mem_frame_a(endpoint));
endpoint := e0;
endpoint.nr := 1;
endpoint.match := MATCH;
SB_mem.Push(gen_reader_endpoint_mem_frame_a(endpoint));
endpoint := e3;
endpoint.nr := 2;
endpoint.match := MATCH;
SB_mem.Push(gen_reader_endpoint_mem_frame_a(endpoint));
start_test;
wait_on_sent;
stimulus := EMPTY_TEST_PACKET;
wait_on_mem_check;
-- MEMORY STATE [p1e2,p0e0,p1e3]
Log("Update Endpoint 2 Participant 1", INFO);
endpoint := e2;
endpoint.nr := 0;
endpoint.match := MATCH;
endpoint.unicastLocatorList := (numLocators => int(1,CDR_LONG_WIDTH), locator => (0 => gen_rand_loc_2, others => EMPTY_LOCATOR));
gen_endpoint_match_frame(endpoint, stimulus);
SB_mem.Push(gen_reader_endpoint_mem_frame_a(endpoint));
start_test;
wait_on_sent;
stimulus := EMPTY_TEST_PACKET;
wait_on_mem_check;
-- MEMORY STATE [p1e2,p0e0,p1e3]
stim_done <= '1';
wait_on_completion;
TranscriptOpen(RESULTS_FILE, APPEND_MODE);
SetTranscriptMirror;
ReportAlerts;
TranscriptClose;
std.env.stop;
wait;
end process;
clock_prc : process
begin
clk <= '0';
wait for 25 ns;
clk <= '1';
wait for 25 ns;
end process;
in_empty_prc : process
begin
empty_meta <= '0';
wait until rd_meta = '1';
wait until rising_edge(clk);
empty_meta <= '1';
wait until rising_edge(clk);
end process;
alert_prc : process(all)
begin
if rising_edge(clk) then
alertif(empty_meta = '1' and rd_meta = '1', "Input FIFO read signal high while empty signal high", ERROR);
alertif(start_hc = '1', "Unexpected History Cache Operation initiated", ERROR);
end if;
end process;
input_prc : process(all)
begin
data_in_meta <= stimulus.data(cnt_stim);
last_word_in_meta <= stimulus.last(cnt_stim);
if rising_edge(clk) then
if (reset = '1') then
cnt_stim <= 0;
stim_stage <= IDLE;
packet_sent <= '1';
else
case (stim_stage) is
when IDLE =>
if (start = '1' and stimulus.length /= 0) then
stim_stage <= BUSY;
packet_sent <= '0';
end if;
when BUSY =>
if (rd_meta = '1') then
if (cnt_stim = stimulus.length-1) then
stim_stage <= IDLE;
packet_sent <= '1';
cnt_stim <= 0;
else
cnt_stim <= cnt_stim + 1;
end if;
end if;
end case;
end if;
end if;
end process;
done_proc : process(clk)
begin
if rising_edge(clk) then
if (stim_done = '1' and SB_mem.empty) then
test_done <= '1';
else
test_done <= '0';
end if;
end if;
end process;
mem_check_prc : process
alias mem is <<signal uut.mem_ctrl_inst.ram_inst.mem : TEST_RAM_TYPE>>;
alias mem_op_done is <<signal uut.mem_op_done : std_logic>>;
alias idle_sig is <<signal uut.idle_sig : std_logic>>;
variable reference : TEST_READER_ENDPOINT_MEMORY_FRAME_TYPE_A;
begin
mem_check_done <= '0';
-- SAFEGUARD: (Prevent Fall-through Behavior)
if (reset /= '0') then
wait until reset = '0';
end if;
-- Wait for Packet to be sent
wait until rising_edge(packet_sent);
-- Wait for UUT IDLE state
if (idle_sig /= '1') then
wait until idle_sig = '1';
end if;
-- Wait for ongoing memory operation
if (mem_op_done /= '1') then
wait until mem_op_done = '1';
end if;
while (not SB_mem.empty) loop
SB_mem.Pop(reference);
for i in 0 to reference'length-1 loop
AffirmIf(?? (mem(reference(i).addr) ?= reference(i).data), "Address: " & integer'image(reference(i).addr) & " Received: " & to_hstring(mem(reference(i).addr)) & " Expected: " & to_hstring(reference(i).data));
end loop;
end loop;
-- Toggle High for one clock cycle
mem_check_done <= '1';
wait until rising_edge(clk);
end process;
watchdog : process
begin
wait for 1 ms;
Alert("Test timeout", FAILURE);
std.env.stop;
end process;
end architecture;

7
src/Tests/testbench.pro
View File

@ -17,6 +17,7 @@ analyze ../rtps_handler.vhd
analyze ../rtps_builtin_endpoint.vhd analyze ../rtps_builtin_endpoint.vhd
analyze ../rtps_out.vhd analyze ../rtps_out.vhd
analyze ../rtps_reader.vhd analyze ../rtps_reader.vhd
analyze ../rtps_writer.vhd
analyze Level_0/L0_rtps_handler_test1.vhd analyze Level_0/L0_rtps_handler_test1.vhd
analyze Level_0/L0_rtps_handler_test2.vhd analyze Level_0/L0_rtps_handler_test2.vhd
analyze Level_0/L0_rtps_builtin_endpoint_test1.vhd analyze Level_0/L0_rtps_builtin_endpoint_test1.vhd
@ -40,6 +41,8 @@ analyze Level_0/L0_rtps_reader_test3_a.vhd
analyze Level_0/L0_rtps_reader_test3_m.vhd analyze Level_0/L0_rtps_reader_test3_m.vhd
analyze Level_1/L1_rtps_reader_test1_vrk.vhd analyze Level_1/L1_rtps_reader_test1_vrk.vhd
analyze Level_1/L1_rtps_reader_test1_trk.vhd analyze Level_1/L1_rtps_reader_test1_trk.vhd
analyze Level_0/L0_rtps_writer_test1_vrkdp.vhd
analyze Level_0/L0_rtps_writer_test1_vbkdp.vhd
#simulate L0_rtps_handler_test1 #simulate L0_rtps_handler_test1
#simulate L0_rtps_handler_test2 #simulate L0_rtps_handler_test2
@ -63,4 +66,6 @@ analyze Level_1/L1_rtps_reader_test1_trk.vhd
#simulate L0_rtps_reader_test3_a #simulate L0_rtps_reader_test3_a
#simulate L0_rtps_reader_test3_m #simulate L0_rtps_reader_test3_m
#simulate L1_rtps_reader_test1_vrk #simulate L1_rtps_reader_test1_vrk
simulate L1_rtps_reader_test1_trk #simulate L1_rtps_reader_test1_trk
#simulate L0_rtps_writer_test1_vrkdp
simulate L0_rtps_writer_test1_vbkdp

143
src/rtps_test_package.vhd
View File

@ -17,6 +17,8 @@ package rtps_test_package is
constant PARTICIPANT_FRAME_SIZE : natural := 23; constant PARTICIPANT_FRAME_SIZE : natural := 23;
constant WRITER_ENDPOINT_FRAME_SIZE_A : natural := 12; constant WRITER_ENDPOINT_FRAME_SIZE_A : natural := 12;
constant WRITER_ENDPOINT_FRAME_SIZE_B : natural := 8; constant WRITER_ENDPOINT_FRAME_SIZE_B : natural := 8;
constant READER_ENDPOINT_FRAME_SIZE_A : natural := 15;
constant READER_ENDPOINT_FRAME_SIZE_B : natural := 6;
constant DEFAULT_GUIDPREFIX : GUIDPREFIX_TYPE; -- Deferred to Package Body constant DEFAULT_GUIDPREFIX : GUIDPREFIX_TYPE; -- Deferred to Package Body
constant DEFAULT_READER_ENTITYID : std_logic_vector(ENTITYID_WIDTH-1 downto 0); -- Deferred to Package Body constant DEFAULT_READER_ENTITYID : std_logic_vector(ENTITYID_WIDTH-1 downto 0); -- Deferred to Package Body
@ -43,6 +45,8 @@ package rtps_test_package is
subtype TEST_PARTICIPANT_MEMORY_FRAME_TYPE is TEST_MEMORY_TYPE(0 to PARTICIPANT_FRAME_SIZE-1); subtype TEST_PARTICIPANT_MEMORY_FRAME_TYPE is TEST_MEMORY_TYPE(0 to PARTICIPANT_FRAME_SIZE-1);
subtype TEST_WRITER_ENDPOINT_MEMORY_FRAME_TYPE_A is TEST_MEMORY_TYPE(0 to WRITER_ENDPOINT_FRAME_SIZE_A-1); subtype TEST_WRITER_ENDPOINT_MEMORY_FRAME_TYPE_A is TEST_MEMORY_TYPE(0 to WRITER_ENDPOINT_FRAME_SIZE_A-1);
subtype TEST_WRITER_ENDPOINT_MEMORY_FRAME_TYPE_B is TEST_MEMORY_TYPE(0 to WRITER_ENDPOINT_FRAME_SIZE_B-1); subtype TEST_WRITER_ENDPOINT_MEMORY_FRAME_TYPE_B is TEST_MEMORY_TYPE(0 to WRITER_ENDPOINT_FRAME_SIZE_B-1);
subtype TEST_READER_ENDPOINT_MEMORY_FRAME_TYPE_A is TEST_MEMORY_TYPE(0 to READER_ENDPOINT_FRAME_SIZE_A-1);
subtype TEST_READER_ENDPOINT_MEMORY_FRAME_TYPE_B is TEST_MEMORY_TYPE(0 to READER_ENDPOINT_FRAME_SIZE_B-1);
constant LOCATOR_PORT_WIDTH : natural := CDR_LONG_WIDTH; constant LOCATOR_PORT_WIDTH : natural := CDR_LONG_WIDTH;
constant LOCATOR_ADDR_WIDTH : natural := 4*CDR_LONG_WIDTH; constant LOCATOR_ADDR_WIDTH : natural := 4*CDR_LONG_WIDTH;
@ -245,6 +249,8 @@ package rtps_test_package is
function gen_participant_mem_frame (ref : PARTICIPANT_DATA_TYPE) return TEST_PARTICIPANT_MEMORY_FRAME_TYPE; function gen_participant_mem_frame (ref : PARTICIPANT_DATA_TYPE) return TEST_PARTICIPANT_MEMORY_FRAME_TYPE;
function gen_writer_endpoint_mem_frame_a (ref : ENDPOINT_DATA_TYPE) return TEST_WRITER_ENDPOINT_MEMORY_FRAME_TYPE_A; function gen_writer_endpoint_mem_frame_a (ref : ENDPOINT_DATA_TYPE) return TEST_WRITER_ENDPOINT_MEMORY_FRAME_TYPE_A;
function gen_writer_endpoint_mem_frame_b (ref : ENDPOINT_DATA_TYPE) return TEST_WRITER_ENDPOINT_MEMORY_FRAME_TYPE_B; function gen_writer_endpoint_mem_frame_b (ref : ENDPOINT_DATA_TYPE) return TEST_WRITER_ENDPOINT_MEMORY_FRAME_TYPE_B;
function gen_reader_endpoint_mem_frame_a (ref : ENDPOINT_DATA_TYPE) return TEST_READER_ENDPOINT_MEMORY_FRAME_TYPE_A;
function gen_reader_endpoint_mem_frame_b (ref : ENDPOINT_DATA_TYPE) return TEST_READER_ENDPOINT_MEMORY_FRAME_TYPE_B;
procedure gen_endpoint_data( ref : in ENDPOINT_DATA_TYPE; output : inout TEST_PACKET_TYPE); procedure gen_endpoint_data( ref : in ENDPOINT_DATA_TYPE; output : inout TEST_PACKET_TYPE);
procedure gen_endpoint_data( ref : in ENDPOINT_DATA_TYPE; output : inout TEST_PACKET_TYPE; pid : in std_logic_vector(PARAMETER_ID_WIDTH-1 downto 0); offset : in integer); procedure gen_endpoint_data( ref : in ENDPOINT_DATA_TYPE; output : inout TEST_PACKET_TYPE; pid : in std_logic_vector(PARAMETER_ID_WIDTH-1 downto 0); offset : in integer);
@ -1601,6 +1607,143 @@ package body rtps_test_package is
return ret; return ret;
end function; end function;
function gen_reader_endpoint_mem_frame_a (ref : ENDPOINT_DATA_TYPE) return TEST_READER_ENDPOINT_MEMORY_FRAME_TYPE_A is
variable ret : TEST_READER_ENDPOINT_MEMORY_FRAME_TYPE_A;
variable start : natural;
variable user_loc : LOCATOR_TYPE;
begin
ret := (others => (addr => 0, data => (others => '0')));
-- Calculate Start Address
start := READER_ENDPOINT_FRAME_SIZE_A * ref.nr;
-- Fetch relevant Locators
user_loc := get_loc (ref);
for i in 0 to READER_ENDPOINT_FRAME_SIZE_A-1 loop
ret(i).addr := start + i;
case (i) is
-- Entity ID
when 0 =>
if (ref.match = MATCH) then
ret(i).data := ref.entityId;
else
ret(i).data := (others => '0');
end if;
-- GUID Prefix 1/3
when 1 =>
if (ref.match = MATCH) then
ret(i).data := ref.participant.guidPrefix(0);
else
ret(i).data := (others => '-');
end if;
-- GUID Prefix 2/3
when 2 =>
if (ref.match = MATCH) then
ret(i).data := ref.participant.guidPrefix(1);
else
ret(i).data := (others => '-');
end if;
-- GUID Prefix 3/3
when 3 =>
if (ref.match = MATCH) then
ret(i).data := ref.participant.guidPrefix(2);
else
ret(i).data := (others => '-');
end if;
-- IPv4 Address
when 4 =>
if (ref.match = MATCH) then
ret(i).data := user_loc.addr(IPv4_ADDRESS_WIDTH-1 downto 0);
else
ret(i).data := (others => '-');
end if;
-- UDP Port
when 5 =>
if (ref.match = MATCH) then
ret(i).data := user_loc.portn(UDP_PORT_WIDTH-1 downto 0) & (UDP_PORT_WIDTH-1 downto 0 => '0');
ret(i).data(READER_EXPECTS_INLINE_QOS_FLAG) := ref.expectsInlineQoS(0);
ret(i).data(READER_EXPECTS_HISTORICAL_DATA_FLAG) := '1' when (ref.durability /= VOLATILE_DURABILITY_QOS) else '0';
ret(i).data(READER_IS_BEST_EFFORT_FLAG) := '1' when (ref.reliability = BEST_EFFORT_RELIABILITY_QOS) else '0';
else
ret(i).data := (others => '-');
end if;
-- Other Fields Ignored
when others =>
ret(i).data := (others => '-');
end case;
end loop;
return ret;
end function;
function gen_reader_endpoint_mem_frame_b (ref : ENDPOINT_DATA_TYPE) return TEST_READER_ENDPOINT_MEMORY_FRAME_TYPE_B is
variable ret : TEST_READER_ENDPOINT_MEMORY_FRAME_TYPE_B;
variable start : natural;
variable user_loc : LOCATOR_TYPE;
begin
ret := (others => (addr => 0, data => (others => '0')));
-- Calculate Start Address
start := READER_ENDPOINT_FRAME_SIZE_B * ref.nr;
-- Fetch relevant Locators
user_loc := get_loc (ref);
for i in 0 to READER_ENDPOINT_FRAME_SIZE_B-1 loop
ret(i).addr := start + i;
case (i) is
-- Entity ID
when 0 =>
if (ref.match = MATCH) then
ret(i).data := ref.entityId;
else
ret(i).data := (others => '0');
end if;
-- GUID Prefix 1/3
when 1 =>
if (ref.match = MATCH) then
ret(i).data := ref.participant.guidPrefix(0);
else
ret(i).data := (others => '-');
end if;
-- GUID Prefix 2/3
when 2 =>
if (ref.match = MATCH) then
ret(i).data := ref.participant.guidPrefix(1);
else
ret(i).data := (others => '-');
end if;
-- GUID Prefix 3/3
when 3 =>
if (ref.match = MATCH) then
ret(i).data := ref.participant.guidPrefix(2);
else
ret(i).data := (others => '-');
end if;
-- IPv4 Address
when 4 =>
if (ref.match = MATCH) then
ret(i).data := user_loc.addr(IPv4_ADDRESS_WIDTH-1 downto 0);
else
ret(i).data := (others => '-');
end if;
-- UDP Port
when 5 =>
if (ref.match = MATCH) then
ret(i).data := user_loc.portn(UDP_PORT_WIDTH-1 downto 0) & (UDP_PORT_WIDTH-1 downto 0 => '0');
ret(i).data(READER_EXPECTS_INLINE_QOS_FLAG) := ref.expectsInlineQoS(0);
ret(i).data(READER_EXPECTS_HISTORICAL_DATA_FLAG) := '1' when (ref.durability /= VOLATILE_DURABILITY_QOS) else '0';
ret(i).data(READER_IS_BEST_EFFORT_FLAG) := '1' when (ref.reliability = BEST_EFFORT_RELIABILITY_QOS) else '0';
else
ret(i).data := (others => '-');
end if;
-- Other Fields Ignored
when others =>
ret(i).data := (others => '-');
end case;
end loop;
return ret;
end function;
procedure gen_participant_match_frame( ref : in PARTICIPANT_DATA_TYPE; output : inout TEST_PACKET_TYPE) is procedure gen_participant_match_frame( ref : in PARTICIPANT_DATA_TYPE; output : inout TEST_PACKET_TYPE) is
begin begin

116
src/rtps_writer.vhd
View File

@ -271,6 +271,8 @@ architecture arch of rtps_writer is
signal req_seq_nr_bitmap, req_seq_nr_bitmap_next : std_logic_vector(WORD_WIDTH-1 downto 0) := (others => '0'); signal req_seq_nr_bitmap, req_seq_nr_bitmap_next : std_logic_vector(WORD_WIDTH-1 downto 0) := (others => '0');
-- Signal used to iterate through Request Bitmaps -- Signal used to iterate through Request Bitmaps
signal req_bitmap_pos, req_bitmap_pos_next : natural range 0 to req_seq_nr_bitmap'length-1 := 0; signal req_bitmap_pos, req_bitmap_pos_next : natural range 0 to req_seq_nr_bitmap'length-1 := 0;
-- Test signal used for testbench synchronisation
signal idle_sig : std_logic := '0';
-- *MEMORY PROCESS* -- *MEMORY PROCESS*
-- Memory FSM state -- Memory FSM state
@ -449,6 +451,7 @@ begin
start_hc <= '0'; start_hc <= '0';
ready_in_hc <= '0'; ready_in_hc <= '0';
get_data_hc <= '0'; get_data_hc <= '0';
idle_sig <= '0';
seq_nr <= SEQUENCENUMBER_UNKNOWN; seq_nr <= SEQUENCENUMBER_UNKNOWN;
seq_nr_hc <= SEQUENCENUMBER_UNKNOWN; seq_nr_hc <= SEQUENCENUMBER_UNKNOWN;
mem_field_flags <= (others => '0'); mem_field_flags <= (others => '0');
@ -466,6 +469,7 @@ begin
case (stage) is case (stage) is
when IDLE => when IDLE =>
idle_sig <= '1';
-- RESET -- RESET
addr_next <= (others => '0'); addr_next <= (others => '0');
portn_next <= (others => '0'); portn_next <= (others => '0');
@ -694,14 +698,11 @@ begin
when OPCODE_ENDPOINT_MATCH => when OPCODE_ENDPOINT_MATCH =>
-- Endpoint already in Memory -- Endpoint already in Memory
if (mem_addr_base /= ENDPOINT_MEMORY_MAX_ADDRESS) then if (mem_addr_base /= ENDPOINT_MEMORY_MAX_ADDRESS) then
-- Synthesis Guard -- Update the Endpoint Data
if (RELIABILTY_QOS = RELIABLE_RELIABILITY_QOS) then -- NOTE: The Lease Duration is NOT updated in case of an update. That is the responsibility of the Liveliness Update
-- Update the Endpoint Data mem_op_start <= '1';
-- NOTE: The Lease Duration is NOT updated in case of an update. That is the responsibility of the Liveliness Update mem_opcode <= UPDATE_ENDPOINT;
mem_op_start <= '1'; mem_field_flags <= EMF_IPV4_ADDR_FLAG or EMF_UDP_PORT_FLAG;
mem_opcode <= UPDATE_ENDPOINT;
mem_field_flags <= EMF_IPV4_ADDR_FLAG or EMF_UDP_PORT_FLAG;
end if;
-- DONE -- DONE
stage_next <= IDLE; stage_next <= IDLE;
else else
@ -1630,42 +1631,39 @@ begin
end case; end case;
end if; end if;
when SEND_HEADER => when SEND_HEADER =>
-- Synthesis Guard -- Output FIFO Guard
if (RELIABILTY_QOS = RELIABLE_RELIABILITY_QOS) then if (full_rtps = '0') then
-- Output FIFO Guard wr_rtps <= '1';
if (full_rtps = '0') then cnt_next <= cnt + 1;
wr_rtps <= '1';
cnt_next <= cnt + 1;
case (cnt) is case (cnt) is
-- OUTPUT HEADER -- OUTPUT HEADER
-- Src IPv4 Address -- Src IPv4 Address
when 0 => when 0 =>
data_out_rtps <= DEFAULT_IPv4_ADDRESS; data_out_rtps <= DEFAULT_IPv4_ADDRESS;
-- Dest IPv4 Address -- Dest IPv4 Address
when 1 => when 1 =>
data_out_rtps <= mem_endpoint_data.addr; data_out_rtps <= mem_endpoint_data.addr;
-- Src and Dest UDPv4 Ports -- Src and Dest UDPv4 Ports
when 2 => when 2 =>
data_out_rtps <= USER_IPv4_UNICAST_PORT & mem_endpoint_data.portn; data_out_rtps <= USER_IPv4_UNICAST_PORT & mem_endpoint_data.portn;
-- RTPS MESSAGE HEADER -- RTPS MESSAGE HEADER
when 3 => when 3 =>
data_out_rtps <= PROTOCOL_RTPS; data_out_rtps <= PROTOCOL_RTPS;
when 4 => when 4 =>
data_out_rtps <= PROTOCOLVERSION_2_4 & VENDORID; data_out_rtps <= PROTOCOLVERSION_2_4 & VENDORID;
when 5 => when 5 =>
data_out_rtps <= GUIDPREFIX(0); data_out_rtps <= GUIDPREFIX(0);
when 6 => when 6 =>
data_out_rtps <= GUIDPREFIX(1); data_out_rtps <= GUIDPREFIX(1);
when 7 => when 7 =>
data_out_rtps <= GUIDPREFIX(2); data_out_rtps <= GUIDPREFIX(2);
-- Continue with respective RTPS Submessage -- Continue with respective RTPS Submessage
stage_next <= return_stage; stage_next <= return_stage;
cnt_next <= 0; cnt_next <= 0;
when others => when others =>
null; null;
end case; end case;
end if;
end if; end if;
when SEND_INFO_TS => when SEND_INFO_TS =>
-- Output FIFO Guard -- Output FIFO Guard
@ -2115,19 +2113,19 @@ begin
mem_cnt_next <= 0; mem_cnt_next <= 0;
when UPDATE_ENDPOINT => when UPDATE_ENDPOINT =>
mem_stage_next <= UPDATE_ENDPOINT; mem_stage_next <= UPDATE_ENDPOINT;
if check_mask(mem_endpoint_latch_data.field_flag,EMF_IPV4_ADDR_FLAG) then if check_mask(mem_field_flags,EMF_IPV4_ADDR_FLAG) then
mem_cnt_next <= 0; mem_cnt_next <= 0;
elsif check_mask(mem_endpoint_latch_data.field_flag,EMF_UDP_PORT_FLAG) then elsif check_mask(mem_field_flags,EMF_UDP_PORT_FLAG) then
mem_cnt_next <= 1; mem_cnt_next <= 1;
elsif (RELIABILTY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_LEASE_DEADLINE_FLAG)) then elsif (RELIABILTY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_field_flags,EMF_LEASE_DEADLINE_FLAG)) then
mem_cnt_next <= 2; mem_cnt_next <= 2;
elsif (RELIABILTY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_RES_TIME_FLAG)) then elsif (RELIABILTY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_field_flags,EMF_RES_TIME_FLAG)) then
mem_cnt_next <= 4; mem_cnt_next <= 4;
elsif (RELIABILTY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_ACK_SEQ_NR_BASE_FLAG)) then elsif (RELIABILTY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_field_flags,EMF_ACK_SEQ_NR_BASE_FLAG)) then
mem_cnt_next <= 6; mem_cnt_next <= 6;
elsif (RELIABILTY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_REQ_SEQ_NR_BASE_FLAG)) then elsif (RELIABILTY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_field_flags,EMF_REQ_SEQ_NR_BASE_FLAG)) then
mem_cnt_next <= 8; mem_cnt_next <= 8;
elsif (RELIABILTY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_REQ_SEQ_NR_BITMAP_FLAG)) then elsif (RELIABILTY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_field_flags,EMF_REQ_SEQ_NR_BITMAP_FLAG)) then
mem_cnt_next <= 10; mem_cnt_next <= 10;
else else
-- DONE -- DONE
@ -2156,23 +2154,23 @@ begin
-- Fetch Endpoint Data -- Fetch Endpoint Data
mem_stage_next <= GET_ENDPOINT_DATA; mem_stage_next <= GET_ENDPOINT_DATA;
mem_endpoint_data_next <= ZERO_ENDPOINT_DATA; mem_endpoint_data_next <= ZERO_ENDPOINT_DATA;
if check_mask(mem_endpoint_latch_data.field_flag,EMF_ENTITYID_FLAG) then if check_mask(mem_field_flags,EMF_ENTITYID_FLAG) then
mem_cnt_next <= 0; mem_cnt_next <= 0;
elsif check_mask(mem_endpoint_latch_data.field_flag,EMF_GUIDPREFIX_FLAG) then elsif check_mask(mem_field_flags,EMF_GUIDPREFIX_FLAG) then
mem_cnt_next <= 1; mem_cnt_next <= 1;
elsif check_mask(mem_endpoint_latch_data.field_flag,EMF_IPV4_ADDR_FLAG) then elsif check_mask(mem_field_flags,EMF_IPV4_ADDR_FLAG) then
mem_cnt_next <= 4; mem_cnt_next <= 4;
elsif check_mask(mem_endpoint_latch_data.field_flag,EMF_UDP_PORT_FLAG) then elsif check_mask(mem_field_flags,EMF_UDP_PORT_FLAG) then
mem_cnt_next <= 5; mem_cnt_next <= 5;
elsif (RELIABILTY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_LEASE_DEADLINE_FLAG)) then elsif (RELIABILTY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_field_flags,EMF_LEASE_DEADLINE_FLAG)) then
mem_cnt_next <= 6; mem_cnt_next <= 6;
elsif (RELIABILTY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_RES_TIME_FLAG)) then elsif (RELIABILTY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_field_flags,EMF_RES_TIME_FLAG)) then
mem_cnt_next <= 8; mem_cnt_next <= 8;
elsif (RELIABILTY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_ACK_SEQ_NR_BASE_FLAG)) then elsif (RELIABILTY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_field_flags,EMF_ACK_SEQ_NR_BASE_FLAG)) then
mem_cnt_next <= 10; mem_cnt_next <= 10;
elsif (RELIABILTY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_REQ_SEQ_NR_BASE_FLAG)) then elsif (RELIABILTY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_field_flags,EMF_REQ_SEQ_NR_BASE_FLAG)) then
mem_cnt_next <= 12; mem_cnt_next <= 12;
elsif (RELIABILTY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_REQ_SEQ_NR_BITMAP_FLAG)) then elsif (RELIABILTY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_field_flags,EMF_REQ_SEQ_NR_BITMAP_FLAG)) then
mem_cnt_next <= 14; mem_cnt_next <= 14;
else else
-- DONE -- DONE