Support WITH_KEY=FALSE Topics in DDS and RTPS Reader

In the event of Keyless Topics less resources are used with the
help of "synthesis guards".
This commit is contained in:
Greek 2021-02-03 18:28:37 +01:00
parent d3fb1cc176
commit dc8746c463
2 changed files with 2231 additions and 2066 deletions

View File

@ -15,6 +15,7 @@ entity dds_reader is
DESTINATION_ORDER_QOS : std_logic_vector(CDR_ENUMERATION_WIDTH-1 downto 0) := DEFAULT_DESTINATION_ORDER_QOS; DESTINATION_ORDER_QOS : std_logic_vector(CDR_ENUMERATION_WIDTH-1 downto 0) := DEFAULT_DESTINATION_ORDER_QOS;
COHERENT_ACCESS : boolean := DEFAULT_COHERENT_ACCESS; COHERENT_ACCESS : boolean := DEFAULT_COHERENT_ACCESS;
ORDERED_ACCESS : boolean := DEFAULT_ORDERED_ACCESS; ORDERED_ACCESS : boolean := DEFAULT_ORDERED_ACCESS;
WITH_KEY : boolean := FALSE; -- TODO: Default
); );
port ( port (
-- SYSTEM -- SYSTEM
@ -473,6 +474,7 @@ begin
data_out => payload_read_data data_out => payload_read_data
); );
gen_instance_mem_ctrl_inst : if WITH_KEY generate
instance_mem_ctrl_inst : entity work.mem_ctrl(arch) instance_mem_ctrl_inst : entity work.mem_ctrl(arch)
generic map ( generic map (
ADDR_WIDTH => INSTANCE_MEMORY_ADDR_WIDTH, ADDR_WIDTH => INSTANCE_MEMORY_ADDR_WIDTH,
@ -493,7 +495,6 @@ begin
data_out => instance_read_data data_out => instance_read_data
); );
key_hash_generator_inst : entity work.key_hash_generator(arch) key_hash_generator_inst : entity work.key_hash_generator(arch)
port ( port (
clk => clk, clk => clk,
@ -507,6 +508,7 @@ begin
ready_out => khg_ready_out, ready_out => khg_ready_out,
last_word_out => khg_last_word_out last_word_out => khg_last_word_out
); );
end generate;
-- *Main State Machine* -- *Main State Machine*
-- STATE DESCRIPTION -- STATE DESCRIPTION
@ -660,8 +662,21 @@ begin
-- Reset Timeout -- Reset Timeout
deadline_time_next <= deadline_time + DEADLINE_QOS; deadline_time_next <= deadline_time + DEADLINE_QOS;
-- Synthesis Guard
if (WITH_KEY) then
stage_next <= CHECK_DEADLINE; stage_next <= CHECK_DEADLINE;
cnt_next <= 0; cnt_next <= 0;
else
if (inst_data.status_info(LIVELINESS_FLAG) = '1') then
-- Reset Liveliness Flag
inst_data_next.status_info(LIVELINESS_FLAG) <= '0';
else
-- Update Requested Deadline Missed Status
status_sig_next(REQUESTED_DEADLINE_MISSED_STATUS) <= '1';
deadline_miss_cnt_next <= deadline_miss_cnt + 1;
deadline_miss_cnt_change_next <= deadline_miss_cnt_change + 1;
end if;
end if;
-- LIFESPAN QoS -- LIFESPAN QoS
elsif (lifespan_time <= time) then elsif (lifespan_time <= time) then
-- Reset Timeout -- Reset Timeout
@ -687,20 +702,36 @@ begin
end if; end if;
when REMOVE_WRITER => when REMOVE_WRITER =>
-- Input and Memory Gurad -- Input and Memory Gurad
if (valid_in_rtps = '1' and inst_op_done = '1') then if (valid_in_rtps = '1') then
res_rtps <= ACK;
-- Synthesis Guard
if (WITH_KEY) then
-- Latch Writer Pos -- Latch Writer Pos
writer_pos_next <= to_integer(unsigned(data_in_rtps)); writer_pos_next <= to_integer(unsigned(data_in_rtps));
inst_op_start <= '1';
inst_opcode <= GET_FIRST_INSTANCE;
inst_mem_fields <= IMF_STATUS_FLAG or IMF_WRITER_BITMAP_FLAG;
stage_next <= REMOVE_WRITER; stage_next <= REMOVE_WRITER;
res_rtps <= ACK; cnt_next <= 2;
else
-- Convert Writer Bitmap to SLV
tmp_bitmap := to_endpoint_bitmap(inst_data.writer_bitmap);
-- Remove Writer
tmp_bitmap(to_integer(unsigned(data_in_rtps))) := '0';
-- Convert Back
inst_data_next.writer_bitmap <= from_endpoint_bitmap(tmp_bitmap);
-- NOT_ALIVE_NO_WRITERS Transition
if (tmp_bitmap = (tmp_bitmap'range => '0') and inst_data.status_info(NOT_ALIVE_DISPOSED_FLAG) = '0') then
inst_data_next.status_info(NOT_ALIVE_NO_WRITERS_FLAG) <= '1';
end if;
end if;
end if; end if;
when others => when others =>
null; null;
end case; end case;
-- Unmark Instances -- Unmark Instances
elsif (unmark_instances = '1') then elsif (WITH_KEY and unmark_instances = '1') then
-- Memory Operation Guard -- Memory Operation Guard
if (inst_op_done = '1') then if (inst_op_done = '1') then
inst_op_start <= '1'; inst_op_start <= '1';
@ -716,8 +747,8 @@ begin
max_samples_next <= unsigned(max_samples_in); max_samples_next <= unsigned(max_samples_in);
-- Reset -- Reset
single_instance_next <= '0'; single_sample_next <= '0';
single_instance_next <= '0'; single_instance_next <= '0' when WITH_KEY else '1';
collection_cnt_next <= 0; collection_cnt_next <= 0;
collection_cnt_max_next <= 0; collection_cnt_max_next <= 0;
is_first_instance_sample_next <= '1'; is_first_instance_sample_next <= '1';
@ -773,13 +804,21 @@ begin
stage_next <= GET_NEXT_SAMPLE; stage_next <= GET_NEXT_SAMPLE;
cnt_next <= 0; cnt_next <= 0;
when READ_INSTANCE => when READ_INSTANCE =>
-- Synthesis Guard
if (WITH_KEY) then
ack_dds <= '1'; ack_dds <= '1';
single_instance_next <= '1'; single_instance_next <= '1';
cur_sample_next <= oldest_sample; cur_sample_next <= oldest_sample;
key_hash_next <= instance_handle_in; key_hash_next <= instance_handle_in;
stage_next <= CHECK_INSTANCE; stage_next <= CHECK_INSTANCE;
cnt_next <= 0; cnt_next <= 0;
else
ack_dds <= '1';
stage_next <= UNKNOWN_OPERATION;
end if;
when TAKE_INSTANCE => when TAKE_INSTANCE =>
-- Synthesis Guard
if (WITH_KEY) then
ack_dds <= '1'; ack_dds <= '1';
is_take_next <= '1'; is_take_next <= '1';
single_instance_next <= '1'; single_instance_next <= '1';
@ -787,7 +826,13 @@ begin
key_hash_next <= instance_handle_in; key_hash_next <= instance_handle_in;
stage_next <= CHECK_INSTANCE; stage_next <= CHECK_INSTANCE;
cnt_next <= 0; cnt_next <= 0;
else
ack_dds <= '1';
stage_next <= UNKNOWN_OPERATION;
end if;
when READ_NEXT_INSTANCE => when READ_NEXT_INSTANCE =>
-- Synthesis Guard
if (WITH_KEY) then
ack_dds <= '1'; ack_dds <= '1';
single_instance_next <= '1'; single_instance_next <= '1';
dynamic_next_instance_next <= '1'; dynamic_next_instance_next <= '1';
@ -795,7 +840,13 @@ begin
key_hash_next <= instance_handle_in; key_hash_next <= instance_handle_in;
stage_next <= FIND_NEXT_INSTANCE; stage_next <= FIND_NEXT_INSTANCE;
cnt_next <= 0; cnt_next <= 0;
else
ack_dds <= '1';
stage_next <= UNKNOWN_OPERATION;
end if;
when TAKE_NEXT_INSTANCE => when TAKE_NEXT_INSTANCE =>
-- Synthesis Guard
if (WITH_KEY) then
ack_dds <= '1'; ack_dds <= '1';
is_take_next <= '1'; is_take_next <= '1';
single_instance_next <= '1'; single_instance_next <= '1';
@ -804,6 +855,10 @@ begin
key_hash_next <= instance_handle_in; key_hash_next <= instance_handle_in;
stage_next <= FIND_NEXT_INSTANCE; stage_next <= FIND_NEXT_INSTANCE;
cnt_next <= 0; cnt_next <= 0;
else
ack_dds <= '1';
stage_next <= UNKNOWN_OPERATION;
end if;
when GET_SAMPLE_REJECTED_STATUS => when GET_SAMPLE_REJECTED_STATUS =>
ack_dds <= '1'; ack_dds <= '1';
stage_next <= GET_SAMPLE_REJECTED_STATUS; stage_next <= GET_SAMPLE_REJECTED_STATUS;
@ -819,7 +874,7 @@ begin
end if; end if;
when UNKNOWN_OPERATION => when UNKNOWN_OPERATION =>
done_dds <= '1'; done_dds <= '1';
return_code_dds <= RETCODE_UNSUPPORTED; return_code_dds <= RETCODE_ILLEGAL_OPERATION;
-- DONE -- DONE
stage_next <= IDLE; stage_next <= IDLE;
@ -958,11 +1013,15 @@ begin
-- Memory Flow Control Guard -- Memory Flow Control Guard
if (sample_ready_in = '1') then if (sample_ready_in = '1') then
-- If Key Hash is available, start the Instance Search first -- If Key Hash is available, start the Instance Search first
if (has_key_hash = '1') then if (WITH_KEY and has_key_hash = '1') then
stage_next <= INITIATE_INSTANCE_SEARCH; stage_next <= INITIATE_INSTANCE_SEARCH;
else else
if (has_data = '1' or (WITH_KEY and has_key_hash = '0')) then
stage_next <= ADD_PAYLOAD; stage_next <= ADD_PAYLOAD;
cnt_next <= 0; cnt_next <= 0;
else
stage_next <= FILTER_STAGE;
end if;
end if; end if;
end if; end if;
when ADD_PAYLOAD => when ADD_PAYLOAD =>
@ -988,7 +1047,7 @@ begin
cnt2_next <= cnt2 + 1; cnt2_next <= cnt2 + 1;
-- Key Hash needs to be calculated -- Key Hash needs to be calculated
if (has_key_hash = '0') then if (WITH_KEY and has_key_hash = '0') then
cnt_next <= 1; cnt_next <= 1;
else else
ready_in_rtps <= '1'; ready_in_rtps <= '1';
@ -1015,6 +1074,8 @@ begin
end if; end if;
-- Push to KHG -- Push to KHG
when 1 => when 1 =>
-- Synthesis Guard
if (WITH_KEY) then
assert (valid_in_rtps = '1') severity FAILURE; assert (valid_in_rtps = '1') severity FAILURE;
khg_valid_in <= '1'; khg_valid_in <= '1';
@ -1056,6 +1117,7 @@ begin
end if; end if;
end if; end if;
end if; end if;
end if;
when others => when others =>
null; null;
end case; end case;
@ -1106,7 +1168,7 @@ begin
if (payload_ready_in = '1') then if (payload_ready_in = '1') then
-- Exit Condition -- Exit Condition
if (cnt2 = PAYLOAD_FRAME_SIZE-1) then if (cnt2 = PAYLOAD_FRAME_SIZE-1) then
if (has_key_hash = '0') then if (WITH_KEY and has_key_hash = '0') then
stage_next <= GET_KEY_HASH; stage_next <= GET_KEY_HASH;
cnt_next <= 0; cnt_next <= 0;
else else
@ -1115,7 +1177,8 @@ begin
end if; end if;
end if; end if;
when GET_KEY_HASH => when GET_KEY_HASH =>
-- Synthesis Guard
if (WITH_KEY) then
khg_ready_out <= '1'; khg_ready_out <= '1';
if (khg_valid_out = '1') then if (khg_valid_out = '1') then
@ -1130,7 +1193,10 @@ begin
stage_next <= INITIATE_INSTANCE_SEARCH; stage_next <= INITIATE_INSTANCE_SEARCH;
end if; end if;
end if; end if;
end if;
when INITIATE_INSTANCE_SEARCH => when INITIATE_INSTANCE_SEARCH =>
-- Synthesis Guard
if (WITH_KEY) then
-- Memory Operation Guard -- Memory Operation Guard
if (inst_op_done = '1') then if (inst_op_done = '1') then
inst_op_start <= '1'; inst_op_start <= '1';
@ -1145,17 +1211,18 @@ begin
stage_next <= FILTER_STAGE; stage_next <= FILTER_STAGE;
end if; end if;
end if; end if;
end if;
when FILTER_STAGE => when FILTER_STAGE =>
-- Precondition: cur_sample set -- Precondition: cur_sample set
-- Wait for Instance Search to finish -- Wait for Instance Search to finish
if (inst_op_done = '1') then if (not WITH_KEY or inst_op_done = '1') then
sample_valid_in <= '1'; sample_valid_in <= '1';
sample_addr <= cur_sample + SMF_INSTANCE_ADDR_OFFSET; sample_addr <= cur_sample + SMF_INSTANCE_ADDR_OFFSET;
cur_inst_next <= inst_addr_base; cur_inst_next <= inst_addr_base;
-- Instance Found -- Instance Found
if (inst_addr_base /= INSTANCE_MEMORY_MAX_ADDRESS) then if (not WITH_KEY or inst_addr_base /= INSTANCE_MEMORY_MAX_ADDRESS) then
-- Store Instance Address -- Store Instance Address
sample_write_data <= inst_addr_base; sample_write_data <= inst_addr_base;
@ -1167,7 +1234,7 @@ begin
res_rtps <= ACCEPTED; res_rtps <= ACCEPTED;
stage_next <= IDLE; stage_next <= IDLE;
-- RESOURCE_LIMITS_QOS (MAX_SAMPLES_PER_INSTANCE) -- RESOURCE_LIMITS_QOS (MAX_SAMPLES_PER_INSTANCE)
elsif (MAX_SAMPLES_PER_INSTANCE /= LENGTH_UNLIMITED and inst_data.sample_cnt = MAX_SAMPLES_PER_INSTANCE) then elsif (WITH_KEY and MAX_SAMPLES_PER_INSTANCE /= LENGTH_UNLIMITED and inst_data.sample_cnt = MAX_SAMPLES_PER_INSTANCE) then
if (HISTORY_QOS = KEEP_LAST_HISTORY_QOS and RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS) then if (HISTORY_QOS = KEEP_LAST_HISTORY_QOS and RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS) then
-- Reject Change -- Reject Change
res_rtps <= REJECTED; res_rtps <= REJECTED;
@ -1289,7 +1356,7 @@ begin
end if; end if;
when UPDATE_INSTANCE => when UPDATE_INSTANCE =>
-- Memory Operation Guard -- Memory Operation Guard
if (inst_op_done = '1') then if (not WITH_KEY or inst_op_done = '1') then
-- DEFAULT -- DEFAULT
tmp_update := (others => '0'); tmp_update := (others => '0');
@ -1298,20 +1365,17 @@ begin
-- ALIVE -> NOT_ALIVE_DISPOSED Transition -- ALIVE -> NOT_ALIVE_DISPOSED Transition
if (inst_data.status_info(NOT_ALIVE_DISPOSED_FLAG) /= '1' and inst_data.status_info(NOT_ALIVE_NO_WRITERS_FLAG) /= '1') then if (inst_data.status_info(NOT_ALIVE_DISPOSED_FLAG) /= '1' and inst_data.status_info(NOT_ALIVE_NO_WRITERS_FLAG) /= '1') then
-- STATUS INFO -- STATUS INFO
-- Synthesis Guard
if (WITH_KEY) then
tmp_update <= tmp_update or IMF_STATUS_FLAG; tmp_update <= tmp_update or IMF_STATUS_FLAG;
status_info_update <= inst_data.status; status_info_update <= inst_data.status;
status_info_update(NOT_ALIVE_DISPOSED_FLAG) <= '1'; status_info_update(NOT_ALIVE_DISPOSED_FLAG) <= '1';
status_info_update(NOT_ALIVE_NO_WRITERS_FLAG) <= '0';
status_info_update(LIVELINESS_FLAG) <= '1'; status_info_update(LIVELINESS_FLAG) <= '1';
else
inst_data_next.status_info(NOT_ALIVE_DISPOSED_FLAG) <= '1';
inst_data_next.status_info(LIVELINESS_FLAG) <= '1';
end if;
end if; end if;
-- WRITER BITMAP
-- Convert Writer Bitmap to SLV
tmp_bitmap := to_endpoint_bitmap(inst_data.writer_bitmap);
-- Remove Writer
tmp_bitmap(writer_pos) := '0';
-- Convert Back
writer_bitmap <= from_endpoint_bitmap(tmp_bitmap);
tmp_update := tmp_update or IMF_WRITER_BITMAP_FLAG;
-- Instance UNREGISTERED -- Instance UNREGISTERED
elsif (sample_status_info(UNREGISTERED_FLAG) = '1') then elsif (sample_status_info(UNREGISTERED_FLAG) = '1') then
-- WRITER BITMAP -- WRITER BITMAP
@ -1319,38 +1383,66 @@ begin
tmp_bitmap := to_endpoint_bitmap(inst_data.writer_bitmap); tmp_bitmap := to_endpoint_bitmap(inst_data.writer_bitmap);
-- Remove Writer -- Remove Writer
tmp_bitmap(writer_pos) := '0'; tmp_bitmap(writer_pos) := '0';
-- Convert Back -- Convert Back
-- Synthesis Guard
if (WITH_KEY) then
writer_bitmap <= from_endpoint_bitmap(tmp_bitmap); writer_bitmap <= from_endpoint_bitmap(tmp_bitmap);
tmp_update := tmp_update or IMF_WRITER_BITMAP_FLAG; tmp_update := tmp_update or IMF_WRITER_BITMAP_FLAG;
else
inst_data_next.writer_bitmap <= from_endpoint_bitmap(tmp_bitmap);
end if;
-- ALIVE -> NOT_ALIVE_NO_WRITERS Transition -- ALIVE -> NOT_ALIVE_NO_WRITERS Transition
if (inst_data.status_info(NOT_ALIVE_DISPOSED_FLAG) /= '1' and inst_data.status_info(NOT_ALIVE_NO_WRITERS_FLAG) /= '1' and tmp_bitmap = (tmp_bitmap => '0')) then if (inst_data.status_info(NOT_ALIVE_DISPOSED_FLAG) /= '1' and inst_data.status_info(NOT_ALIVE_NO_WRITERS_FLAG) /= '1' and tmp_bitmap = (tmp_bitmap => '0')) then
-- STATUS INFO -- STATUS INFO
-- Synthesis Guard
if (WITH_KEY) then
tmp_update <= tmp_update or IMF_STATUS_FLAG; tmp_update <= tmp_update or IMF_STATUS_FLAG;
status_info_update <= inst_data.status; status_info_update <= inst_data.status;
status_info_update(NOT_ALIVE_DISPOSED_FLAG) <= '0';
status_info_update(NOT_ALIVE_NO_WRITERS_FLAG) <= '1'; status_info_update(NOT_ALIVE_NO_WRITERS_FLAG) <= '1';
status_info_update(LIVELINESS_FLAG) <= '1'; status_info_update(LIVELINESS_FLAG) <= '1';
else
inst_data_next.status_info(NOT_ALIVE_NO_WRITERS_FLAG) <= '1';
inst_data_next.status_info(LIVELINESS_FLAG) <= '1';
end if;
end if; end if;
-- Instance ALIVE/FILTERED -- Instance ALIVE/FILTERED
else else
-- STATUS INFO -- STATUS INFO
-- Synthesis Guard
if (WITH_KEY) then
tmp_update <= tmp_update or IMF_STATUS_FLAG; tmp_update <= tmp_update or IMF_STATUS_FLAG;
status_info_update <= inst_data.status; status_info_update <= inst_data.status;
status_info_update(NOT_ALIVE_DISPOSED_FLAG) <= '0'; status_info_update(NOT_ALIVE_DISPOSED_FLAG) <= '0';
status_info_update(NOT_ALIVE_NO_WRITERS_FLAG) <= '0'; status_info_update(NOT_ALIVE_NO_WRITERS_FLAG) <= '0';
status_info_update(LIVELINESS_FLAG) <= '1'; status_info_update(LIVELINESS_FLAG) <= '1';
else
inst_data_next.status_info(NOT_ALIVE_DISPOSED_FLAG) <= '0';
inst_data_next.status_info(NOT_ALIVE_NO_WRITERS_FLAG) <= '0';
inst_data_next.status_info(LIVELINESS_FLAG) <= '1';
end if;
-- GENERATION COUNTERS -- GENERATION COUNTERS
-- NOT_ALIVE_DISPOSED -> ALIVE Transition -- NOT_ALIVE_DISPOSED -> ALIVE Transition
if (inst_data.status_info(NOT_ALIVE_DISPOSED_FLAG) = '1') then if (inst_data.status_info(NOT_ALIVE_DISPOSED_FLAG) = '1') then
-- Synthesis Guard
if (WITH_KEY) then
tmp_update := tmp_update or IMF_DISPOSED_CNT_FLAG; tmp_update := tmp_update or IMF_DISPOSED_CNT_FLAG;
gen_cnt <= inst_data.disposed_gen_cnt + 1; gen_cnt <= inst_data.disposed_gen_cnt + 1;
else
inst_data_next.disposed_gen_cnt <= inst_data.disposed_gen_cnt + 1;
end if;
-- NOT_ALIVE_NO_WRITERS -> ALIVE Transition -- NOT_ALIVE_NO_WRITERS -> ALIVE Transition
elsif (inst_data.status_info(NOT_ALIVE_NO_WRITERS_FLAG) = '1') then elsif (inst_data.status_info(NOT_ALIVE_NO_WRITERS_FLAG) = '1') then
-- Synthesis Guard
if (WITH_KEY) then
tmp_update := tmp_update or IMF_NO_WRITERS_CNT_FLAG; tmp_update := tmp_update or IMF_NO_WRITERS_CNT_FLAG;
gen_cnt <= inst_data.no_writers_gen_cnt + 1; gen_cnt <= inst_data.no_writers_gen_cnt + 1;
else
inst_data_next.no_writers_gen_cnt <= inst_data.no_writers_gen_cnt + 1;
end if;
end if; end if;
-- WRITER BITMAP -- WRITER BITMAP
@ -1358,28 +1450,48 @@ begin
tmp_bitmap := to_endpoint_bitmap(inst_data.writer_bitmap); tmp_bitmap := to_endpoint_bitmap(inst_data.writer_bitmap);
-- Write if Writer New for Instance -- Write if Writer New for Instance
if (tmp_bitmap(writer_pos) /= '1') then if (tmp_bitmap(writer_pos) /= '1') then
-- Remove Writer -- Insert Writer
tmp_bitmap(writer_pos) := '0'; tmp_bitmap(writer_pos) := '1';
-- Convert Back -- Convert Back
-- Synthesis Guard
if (WITH_KEY) then
writer_bitmap <= from_endpoint_bitmap(tmp_bitmap); writer_bitmap <= from_endpoint_bitmap(tmp_bitmap);
tmp_update := tmp_update or IMF_WRITER_BITMAP_FLAG; tmp_update := tmp_update or IMF_WRITER_BITMAP_FLAG;
else
inst_data_next.writer_bitmap <= from_endpoint_bitmap(tmp_bitmap);
end if;
end if; end if;
end if; end if;
-- INSTANCE SAMPLE COUNT -- INSTANCE SAMPLE COUNT
-- NOTE: Ignored when remove_oldest_inst_sample, since it will be decremented again. (Stays same) -- NOTE: Ignored when remove_oldest_inst_sample, since it will be decremented again. (Stays same)
if (remove_oldest_inst_sample = '0') then if (remove_oldest_inst_sample = '0') then
-- Synthesis Guard
if (WITH_KEY) then
tmp_update := tmp_update or IMF_SAMPLE_CNT_FLAG; tmp_update := tmp_update or IMF_SAMPLE_CNT_FLAG;
sample_cnt <= inst_data.sample_cnt + 1;
else
inst_data_next.sample_cnt <= inst_data.sample_cnt + 1;
end if; end if;
-- IGNORE DEADLINE
if (TIME_BASED_FILTER_QOS /= DURATION_ZERO) then
tmp_update := tmp_update or IMF_IGNORE_DEADLINE_FLAG;
deadline <= time + TIME_BASED_FILTER_QOS;
end if; end if;
-- IGNORE DEADLINE
if (TIME_BASED_FILTER_QOS /= DURATION_ZERO) then
-- Synthesis Guard
if (WITH_KEY) then
tmp_update := tmp_update or IMF_IGNORE_DEADLINE_FLAG;
deadline <= time + TIME_BASED_FILTER_QOS;
else
inst_data_next.ignore_deadline <= time + TIME_BASED_FILTER_QOS;
end if;
end if;
-- Synthesis Guard
if (WITH_KEY) then
inst_op_start <= '1'; inst_op_start <= '1';
inst_opcode <= UPDATE_INSTANCE; inst_opcode <= UPDATE_INSTANCE;
inst_mem_fields <= tmp_update; inst_mem_fields <= tmp_update;
end if;
if (has_data = '1') then if (has_data = '1') then
stage_next <= FINALIZE_PAYLOAD; stage_next <= FINALIZE_PAYLOAD;
@ -1432,18 +1544,16 @@ begin
when PRE_SAMPLE_FINALIZE => when PRE_SAMPLE_FINALIZE =>
-- Precondition: cur_sample set -- Precondition: cur_sample set
-- Wait for instance Update to Complete
if (not WITH_KEY or inst_op_done = '1') then
case (cnt) is case (cnt) is
-- Disposed Generation Counter -- Disposed Generation Counter
when 0 => when 0 =>
sample_valid_in <= '1'; sample_valid_in <= '1';
sample_addr <= cur_sample + SMF_DISPOSED_GEN_CNT_OFFSET; sample_addr <= cur_sample + SMF_DISPOSED_GEN_CNT_OFFSET;
-- NOT_ALIVE_DISPOSED -> ALIVE Transition sample_write_data <= inst_data.disposed_gen_cnt;
if (inst_data.status_info(NOT_ALIVE_DISPOSED_FLAG) = '1' and sample_status_info(NOT_ALIVE_DISPOSED_FLAG) = '0' and sample_status_info(NOT_ALIVE_NO_WRITERS_FLAG) = '0') then
sample_write_data <= gen_cnt + 1;
else
sample_write_data <= gen_cnt;
end if;
-- Memory Flow Control Guard -- Memory Flow Control Guard
if (sample_ready_in = '1') then if (sample_ready_in = '1') then
@ -1454,12 +1564,7 @@ begin
sample_valid_in <= '1'; sample_valid_in <= '1';
sample_addr <= cur_sample + SMF_NO_WRITERS_GEN_CNT_OFFSET; sample_addr <= cur_sample + SMF_NO_WRITERS_GEN_CNT_OFFSET;
-- NOT_ALIVE_NO_WRITERS -> ALIVE Transition sample_write_data <= inst_data.no_writers_gen_cnt;
if (inst_data.status_info(NOT_ALIVE_NO_WRITERS_FLAG) = '1' and sample_status_info(NOT_ALIVE_DISPOSED_FLAG) = '0' and sample_status_info(NOT_ALIVE_NO_WRITERS_FLAG) = '0') then
sample_write_data <= gen_cnt + 1;
else
sample_write_data <= gen_cnt;
end if;
-- Memory Flow Control Guard -- Memory Flow Control Guard
if (sample_ready_in = '1') then if (sample_ready_in = '1') then
@ -1487,6 +1592,7 @@ begin
when others => when others =>
null; null;
end case; end case;
end if;
when FIND_POS => when FIND_POS =>
-- Synthesis Guard -- Synthesis Guard
if (DESTINATION_ORDER_QOS /= BY_RECEPTION_TIMESTAMP_DESTINATION_ORDER_QOS) then if (DESTINATION_ORDER_QOS /= BY_RECEPTION_TIMESTAMP_DESTINATION_ORDER_QOS) then
@ -1676,7 +1782,7 @@ begin
-- NOTE: added_new_instance and remove_oldest_sample are NOT mutual exclusive, but Instance Removal takes precedence. -- NOTE: added_new_instance and remove_oldest_sample are NOT mutual exclusive, but Instance Removal takes precedence.
-- New Instance was added, and Instance Memory is Full -- New Instance was added, and Instance Memory is Full
if (added_new_instance = '1' and inst_empty_head = INSTANCE_MEMORY_MAX_ADDRESS) then if (WITH_KEY and added_new_instance = '1' and inst_empty_head = INSTANCE_MEMORY_MAX_ADDRESS) then
-- Memory Operation Guard -- Memory Operation Guard
if (inst_op_done = '1') then if (inst_op_done = '1') then
inst_op_start <= '1'; inst_op_start <= '1';
@ -1693,11 +1799,17 @@ begin
else else
cnt_next <= cnt; -- Keep State cnt_next <= cnt; -- Keep State
end if; end if;
elsif (remove_oldest_inst_sample = '1') then elsif (WITH_KEY and remove_oldest_inst_sample = '1') then
cur_sample <= oldest_sample; cur_sample <= oldest_sample;
stage_next <= FIND_OLDEST_INST_SAMPLE; stage_next <= FIND_OLDEST_INST_SAMPLE;
elsif (remove_oldest_sample = '1') then elsif (remove_oldest_sample = '1') then
-- Synthesis Guard
if (WITH_KEY) then
stage_next <= GET_OLDEST_SAMPLE_INSTANCE; stage_next <= GET_OLDEST_SAMPLE_INSTANCE;
else
cur_sample_next <= oldest_sample;
stage_next <= REMOVE_SAMPLE;
end if;
else else
-- DONE -- DONE
stage_next <= IDLE; stage_next <= IDLE;
@ -1705,7 +1817,8 @@ begin
end if; end if;
end case; end case;
when GET_OLDEST_SAMPLE_INSTANCE => when GET_OLDEST_SAMPLE_INSTANCE =>
-- Synthesis Guard
if (WITH_KEY) then
case (cnt) is case (cnt) is
-- GET Instance Pointer (Oldest Sample) -- GET Instance Pointer (Oldest Sample)
when 0 => when 0 =>
@ -1740,11 +1853,12 @@ begin
when others => when others =>
null; null;
end case; end case;
end if;
when FIND_OLDEST_INST_SAMPLE => when FIND_OLDEST_INST_SAMPLE =>
-- Precondition: cur_sample set -- Precondition: cur_sample set
cnt_next <= cnt + 1; -- Synthesis Guard
if (WITH_KEY) then
case (cnt) is case (cnt) is
-- GET Instance Pointer -- GET Instance Pointer
when 0 => when 0 =>
@ -1792,11 +1906,12 @@ begin
when others => when others =>
null; null;
end case; end case;
end if;
when REMOVE_SAMPLE => when REMOVE_SAMPLE =>
-- Precondition: cur_sample set, sample_addr (Previous Pointer of cur_sample) -- Precondition: cur_sample set, sample_addr (Previous Pointer of cur_sample)
-- Wait for Instance Search to finish -- Wait for Instance Search to finish
if (inst_op_done = '1') then if (not WITH_KEY or inst_op_done = '1') then
case (cnt) is case (cnt) is
-- GET Previous Sample -- GET Previous Sample
@ -1992,19 +2107,24 @@ begin
end if; end if;
when POST_SAMPLE_REMOVE => when POST_SAMPLE_REMOVE =>
-- Memory Operation Guard -- Memory Operation Guard
if (inst_op_done = '1') then if (not WITH_KEY or inst_op_done = '1') then
-- No Instance Change on remove_oldest_inst_sample -- No Instance Change on remove_oldest_inst_sample
if (remove_oldest_inst_sample /= '1') then if (not WITH_KEY or remove_oldest_inst_sample /= '1') then
tmp_bitmap := to_endpoint_bitmap(inst_data.writer_bitmap); tmp_bitmap := to_endpoint_bitmap(inst_data.writer_bitmap);
-- Instance obsolete and Instance Memory Full -- Instance obsolete and Instance Memory Full
if (inst_data.sample_cnt = 1 and tmp_bitmap = (tmp_bitmap'range => '0') and inst_empty_head = INSTANCE_MEMORY_MAX_ADDRESS) then if (WITH_KEY and inst_data.sample_cnt = 1 and tmp_bitmap = (tmp_bitmap'range => '0') and inst_empty_head = INSTANCE_MEMORY_MAX_ADDRESS) then
inst_op_start <= '1'; inst_op_start <= '1';
inst_opcode <= REMOVE_INSTANCE; inst_opcode <= REMOVE_INSTANCE;
else else
-- Synthesis Guard
if (WITH_KEY) then
inst_op_start <= '1'; inst_op_start <= '1';
inst_opcode <= UPDATE_INSTANCE; inst_opcode <= UPDATE_INSTANCE;
inst_mem_fields <= IMF_SAMPLE_CNT_FLAG; inst_mem_fields <= IMF_SAMPLE_CNT_FLAG;
sample_cnt <= inst_data.sample_cnt - 1; sample_cnt <= inst_data.sample_cnt - 1;
else
inst_data_nextsample_cnt <= inst_data.sample_cnt - 1;
end if;
end if; end if;
end if; end if;
@ -2069,6 +2189,8 @@ begin
null; null;
end case; end case;
when REMOVE_WRITER => when REMOVE_WRITER =>
-- Synthesis Guard
if (WITH_KEY) then
-- Memory Operation Guard -- Memory Operation Guard
if (inst_op_done = '1') then if (inst_op_done = '1') then
case (cnt) is case (cnt) is
@ -2089,12 +2211,10 @@ begin
-- Convert Back -- Convert Back
writer_bitmap <= from_endpoint_bitmap(tmp_bitmap); writer_bitmap <= from_endpoint_bitmap(tmp_bitmap);
-- No More Writers for Instance -- NOT_ALIVE_NO_WRITERS Transition
if (tmp_bitmap = (tmp_bitmap'range => '0')) then if (tmp_bitmap = (tmp_bitmap'range => '0') and inst_data.status(NOT_ALIVE_DISPOSED_FLAG) = '0') then
status_info_update <= inst_data.status; status_info_update <= inst_data.status;
status_info_update(NOT_ALIVE_DISPOSED_FLAG) <= '0';
status_info_update(NOT_ALIVE_NO_WRITERS_FLAG) <= '1'; status_info_update(NOT_ALIVE_NO_WRITERS_FLAG) <= '1';
status_info_update(LIVELINESS_FLAG) <= '1';
inst_op_start <= '1'; inst_op_start <= '1';
inst_opcode <= UPDATE_INSTANCE; inst_opcode <= UPDATE_INSTANCE;
inst_mem_fields <= IMF_STATUS_FLAG or IMF_WRITER_BITMAP_FLAG; inst_mem_fields <= IMF_STATUS_FLAG or IMF_WRITER_BITMAP_FLAG;
@ -2113,11 +2233,20 @@ begin
inst_mem_fields <= IMF_STATUS_FLAG or IMF_WRITER_BITMAP_FLAG; inst_mem_fields <= IMF_STATUS_FLAG or IMF_WRITER_BITMAP_FLAG;
stage_next <= REMOVE_WRITER; stage_next <= REMOVE_WRITER;
cnt_next <= 0; cnt_next <= 0;
when 2 =>
inst_op_start <= '1';
inst_opcode <= GET_FIRST_INSTANCE;
inst_mem_fields <= IMF_STATUS_FLAG or IMF_WRITER_BITMAP_FLAG;
stage_next <= REMOVE_WRITER;
cnt_next <= 0;
when others => when others =>
null; null;
end case; end case;
end if; end if;
end if;
when REMOVE_STALE_INSTANCE => when REMOVE_STALE_INSTANCE =>
-- Synthesis Guard
if (WITH_KEY) then
-- Wait for Instance Data -- Wait for Instance Data
if (inst_op_done = '1') then if (inst_op_done = '1') then
-- Iterated through all Instances -- Iterated through all Instances
@ -2154,6 +2283,7 @@ begin
end if; end if;
end if; end if;
end if; end if;
end if;
when GET_NEXT_SAMPLE => when GET_NEXT_SAMPLE =>
-- Precondition: cur_sample set, cur_inst set, si_sample_rank_sig set -- Precondition: cur_sample set, cur_inst set, si_sample_rank_sig set
@ -2246,7 +2376,7 @@ begin
-- Instance pre-selected -- Instance pre-selected
if (cur_inst /= INSTANCE_MEMORY_MAX_ADDRESS) then if (cur_inst /= INSTANCE_MEMORY_MAX_ADDRESS) then
-- Sample has different Instance -- Sample has different Instance
if (cur_inst /= sample_read_data) then if (WITH_KEY and cur_inst /= sample_read_data) then
-- Consecutive Instance Sample Order -- Consecutive Instance Sample Order
if (not ORDERED_ACCESS or PRESENTATION_QOS = INSTANCE_PRESENTATION_QOS) then if (not ORDERED_ACCESS or PRESENTATION_QOS = INSTANCE_PRESENTATION_QOS) then
-- Skip Sample -- Skip Sample
@ -2280,11 +2410,18 @@ begin
else else
-- Get Instance Data -- Get Instance Data
next_inst_next <= sample_read_data; next_inst_next <= sample_read_data;
-- Synthesis Guard
if (WITH_KEY) then
cnt_next <= cnt + 1; cnt_next <= cnt + 1;
else
cnt_next <= cnt + 2;
end if;
end if; end if;
end if; end if;
-- Get Instance Data -- Get Instance Data
when 5 => when 5 =>
-- Synthesis Guard
if (WITH_KEY) then
-- Memory Operation Guard -- Memory Operation Guard
if (inst_op_done = '1') then if (inst_op_done = '1') then
inst_op_start <= '1'; inst_op_start <= '1';
@ -2293,10 +2430,11 @@ begin
inst_addr_update <= next_inst; inst_addr_update <= next_inst;
cnt_next <= cnt + 1; cnt_next <= cnt + 1;
end if; end if;
end if;
-- Check Instance Data -- Check Instance Data
when 6 => when 6 =>
-- Wait for Instance Data -- Wait for Instance Data
if (inst_op_done = '1') then if (not WITH_KEY or inst_op_done = '1') then
-- DEFAULT -- DEFAULT
tmp_bool := TRUE; tmp_bool := TRUE;
@ -2488,7 +2626,7 @@ begin
-- Collection Empty -- Collection Empty
if (collection_cnt = 0) then if (collection_cnt = 0) then
-- READ_NEXT_INSTANCE/TAKE_NEXT_INSTANCE Operation -- READ_NEXT_INSTANCE/TAKE_NEXT_INSTANCE Operation
if (dynamic_next_instance = '1') then if (WITH_KEY and dynamic_next_instance = '1') then
-- NOTE: We selected a compatible instance, but the instance has no compatible samples. -- NOTE: We selected a compatible instance, but the instance has no compatible samples.
-- Find next compatible instance. -- Find next compatible instance.
stage_next <= FIND_NEXT_INSTANCE; stage_next <= FIND_NEXT_INSTANCE;
@ -2647,7 +2785,7 @@ begin
-- Memory Control Flow Guard -- Memory Control Flow Guard
if (sample_valid_out = '1') then if (sample_valid_out = '1') then
-- Same Instance -- Same Instance
if (sample_read_data = cur_inst) then if (not WITH_KEY or sample_read_data = cur_inst) then
-- Count Sample (No need to check Instance) -- Count Sample (No need to check Instance)
collection_cnt_max_next <= collection_cnt_max + 1; collection_cnt_max_next <= collection_cnt_max + 1;
si_sample_rank_sig_next <= si_sample_rank_sig + 1; si_sample_rank_sig_next <= si_sample_rank_sig + 1;
@ -2689,6 +2827,8 @@ begin
end if; end if;
-- Get Instance Data -- Get Instance Data
when 10 => when 10 =>
-- Synthesis Guard
if (WITH_KEY) then
-- Memory Operation Guard -- Memory Operation Guard
if (inst_op_done = '1') then if (inst_op_done = '1') then
inst_op_start <= '1'; inst_op_start <= '1';
@ -2697,8 +2837,11 @@ begin
inst_addr_update <= next_inst; inst_addr_update <= next_inst;
cnt_next <= cnt + 1; cnt_next <= cnt + 1;
end if; end if;
end if;
-- Check Instance Data -- Check Instance Data
when 11 => when 11 =>
-- Synthesis Guard
if (WITH_KEY) then
-- Wait for Instance Data -- Wait for Instance Data
if (inst_op_done = '1') then if (inst_op_done = '1') then
-- DEFAULT -- DEFAULT
@ -2757,6 +2900,7 @@ begin
end if; end if;
cnt_next <= cnt + 1; cnt_next <= cnt + 1;
end if; end if;
end if;
-- Exit State -- Exit State
when 12 => when 12 =>
-- Exit Condition (Reached End of Samples or Collection Fully Precalculated) -- Exit Condition (Reached End of Samples or Collection Fully Precalculated)
@ -2780,9 +2924,9 @@ begin
-- Finalize Sample Info Data -- Finalize Sample Info Data
when 0 => when 0 =>
-- Wait for Instance Data -- Wait for Instance Data
if (inst_op_done = '1') then if (not WITH_KEY or inst_op_done = '1') then
-- Instance Data valid -- Instance Data valid
if (inst_addr_base = cur_inst) then if (not WITH_KEY or inst_addr_base = cur_inst) then
-- Sample Info View State -- Sample Info View State
if (inst_data.status_info(VIEW_FLAG) = '1') then if (inst_data.status_info(VIEW_FLAG) = '1') then
si_view_state_sig_next <= NEW_VIEW_STATE; si_view_state_sig_next <= NEW_VIEW_STATE;
@ -2852,12 +2996,14 @@ begin
-- Post-Present Data -- Post-Present Data
when 2 => when 2 =>
-- Memory Operation Guard -- Memory Operation Guard
if (inst_op_done = '1') then if (not WITH_KEY or inst_op_done = '1') then
-- NOTE: If we have a presentation of consecutive same instance samples of multiple instances, we have to -- NOTE: If we have a presentation of consecutive same instance samples of multiple instances, we have to
-- mark the instances we have already handled, in order to prevent the GET_NEXT_SAMPLE state to -- mark the instances we have already handled, in order to prevent the GET_NEXT_SAMPLE state to
-- re-process them. -- re-process them.
-- Last Sample of Instance in Collection -- Last Sample of Instance in Collection
if (si_sample_rank_sig = 1) then if (si_sample_rank_sig = 1) then
-- Synthesis Guard
if (WITH_KEY) then
inst_op_start <= '1'; inst_op_start <= '1';
inst_opcode <= UPDATE_INSTANCE; inst_opcode <= UPDATE_INSTANCE;
inst_mem_fields <= IMF_STATUS_FLAG; inst_mem_fields <= IMF_STATUS_FLAG;
@ -2880,6 +3026,13 @@ begin
-- Mark Instance as VIEWED -- Mark Instance as VIEWED
status_info_update(VIEW_FLAG) <= '1'; status_info_update(VIEW_FLAG) <= '1';
end if; end if;
else
-- Instance is NOT_VIEWED and sample is from last generation of Instance
if (inst_data.status_info(VIEW_FLAG) = '0' and si_absolute_generation_count_sig = 0) then
-- Mark Instance as VIEWED
inst_data_next.status_info(VIEW_FLAG) <= '1';
end if;
end if;
end if; end if;
-- Collection Completed -- Collection Completed
@ -3020,6 +3173,8 @@ begin
cnt_next <= 2; cnt_next <= 2;
end if; end if;
when FIND_NEXT_INSTANCE => when FIND_NEXT_INSTANCE =>
-- Synthesis Guard
if (WITH_KEY) then
-- Wait for Instance Data -- Wait for Instance Data
if (inst_op_done = '1') then if (inst_op_done = '1') then
case (cnt) is case (cnt) is
@ -3107,7 +3262,10 @@ begin
null; null;
end case; end case;
end if; end if;
end if;
when CHECK_INSTANCE => when CHECK_INSTANCE =>
-- Synthesis Guard
if (WITH_KEY) then
-- Wait for Instance Data -- Wait for Instance Data
if (inst_op_done = '1') then if (inst_op_done = '1') then
case (cnt) is case (cnt) is
@ -3185,6 +3343,7 @@ begin
null; null;
end case; end case;
end if; end if;
end if;
when CHECK_LIFESPAN => when CHECK_LIFESPAN =>
-- Precondition: cur_sample set, -- Precondition: cur_sample set,
@ -3357,6 +3516,8 @@ begin
end case; end case;
end if; end if;
when CHECK_DEADLINE => when CHECK_DEADLINE =>
-- Synthesis Guard
if (WITH_KEY) then
-- Memory Operation Guard -- Memory Operation Guard
if (inst_op_done = '1') then if (inst_op_done = '1') then
case (cnt) is case (cnt) is
@ -3401,11 +3562,14 @@ begin
null; null;
end case; end case;
end if; end if;
end if;
when others => when others =>
null; null;
end case; end case;
end process; end process;
gen_inst_ctrl_prc : if WITH_KEY generate
-- *Instance Memory Process* -- *Instance Memory Process*
-- STATE DESCRIPTION -- STATE DESCRIPTION
-- IDLE Idle State. Done Signal is pulled high and Memory FSM accepts new memory operations -- IDLE Idle State. Done Signal is pulled high and Memory FSM accepts new memory operations
@ -4931,5 +5095,5 @@ begin
null; null;
end case; end case;
end process; end process;
end generate;
end architecture; end architecture;

View File

@ -21,6 +21,7 @@ entity rtps_reader is
HEARTBEAT_SUPPRESSION_DELAY : DURATION_TYPE := TODO; HEARTBEAT_SUPPRESSION_DELAY : DURATION_TYPE := TODO;
LEASE_DURATION : DURATION_TYPE := DEFAULT_LEASE_DURATION; LEASE_DURATION : DURATION_TYPE := DEFAULT_LEASE_DURATION;
ENTITYID : std_logic_vector(ENTITYID_WIDTH-1 downto 0) := ENTITYID_UNKNOWN; ENTITYID : std_logic_vector(ENTITYID_WIDTH-1 downto 0) := ENTITYID_UNKNOWN;
WITH_KEY : boolean := FALSE -- TODO: Default
); );
port ( port (
-- SYSTEM -- SYSTEM
@ -1158,7 +1159,7 @@ begin
when 4 => when 4 =>
dds_data_in <= lifespan(1); dds_data_in <= lifespan(1);
-- Skip Key Hash, if not received -- Skip Key Hash, if not received
if (key_hash_rcvd = '0') then if (not WITH_KEY or key_hash_rcvd = '0') then
cnt_next <= 9; cnt_next <= 9;
end if; end if;
-- Key hash 1/4 -- Key hash 1/4
@ -1182,7 +1183,7 @@ begin
dds_data_in <= std_logic_vector(to_unsigned(mem_pos, CDR_LONG_WIDTH)); dds_data_in <= std_logic_vector(to_unsigned(mem_pos, CDR_LONG_WIDTH));
-- Payload exists -- Payload exists
if (data_flag = '1' or key_flag = '1') then if (data_flag = '1' or (WITH_KEY and key_flag = '1')) then
stage_next <= PUSH_PAYLOAD; stage_next <= PUSH_PAYLOAD;
else else
-- DONE -- DONE