Add Test2 Level 2 testbench

A loopback is implemented between 2 seperate systems with one reader and
one writer each. Type1 Topic Type is used.
This commit is contained in:
Greek 2021-12-06 22:57:08 +01:00
parent 70549853d5
commit e0453657ba
10 changed files with 2535 additions and 5 deletions

151
sim/L2_Type1_test2.do Normal file
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@ -0,0 +1,151 @@
onerror {resume}
radix define DDS_RETCODE {
"10#0#" "RETCODE_OK",
"10#1#" "RETCODE_ERROR",
"10#2#" "RETCODE_UNSUPPORTED",
"10#3#" "RETCODE_BAD_PARAMETER",
"10#4#" "RETCODE_PRECONDITION_NOT_MET",
"10#5#" "RETCODE_OUT_OF_RESOURCES",
"10#6#" "RETCODE_NOT_ENABLED",
"10#7#" "RETCODE_IMMUTABLE_POLICY",
"10#8#" "RETCODE_INCONSISTENT_POLICY",
"10#9#" "RETCODE_ALREADY_DELETED",
"10#10#" "RETCODE_TIMEOUT",
"10#11#" "RETCODE_NO_DATA",
"10#12#" "RETCODE_ILLEGAL_OPERATION",
-default unsigned
}
radix define SAMPLE_STATE {
"16#00000001#" "READ_SAMPLE_STATE",
"16#00000002#" "NOT_READ_SAMPLE_STATE",
"16#FFFFFFFF#" "ANY_SAMPLE_STATE",
-default binary
}
radix define VIEW_STATE {
"16#00000001#" "NEW_VIEW_STATE",
"16#00000002#" "NOT_NEW_VIEW_STATE",
"16#FFFFFFFF#" "ANY_VIEW_STATE",
-default binary
}
radix define INSTANCE_STATE {
"16#00000001#" "ALIVE_INSTANCE_STATE",
"16#00000002#" "NOT_ALIVE_DISPOSED_INSTANCE_STATE",
"16#00000004#" "NOT_ALIVE_NO_WRITERS_INSTANCE_STATE",
"16#FFFFFFFF#" "ANY_INSTANCE_STATE",
-default binary
}
quietly WaveActivateNextPane {} 0
add wave -noupdate -divider SYSTEM
add wave -noupdate /l2_type1_test2/clk
add wave -noupdate /l2_type1_test2/reset
add wave -noupdate -radix unsigned /l2_type1_test2/time
add wave -noupdate -divider WRITER
add wave -noupdate /l2_type1_test2/Lib5_inst/start_w
add wave -noupdate /l2_type1_test2/Lib5_inst/ack_w
add wave -noupdate /l2_type1_test2/Lib5_inst/opcode_w
add wave -noupdate /l2_type1_test2/Lib5_inst/done_w
add wave -noupdate -radix DDS_RETCODE /l2_type1_test2/Lib5_inst/return_code_w
add wave -noupdate -group INTERNAL /l2_type1_test2/Lib5_inst/dds_endpoint_gen(1)/dds_endpoint_if/dds_writer_inst/stage
add wave -noupdate -group INTERNAL /l2_type1_test2/Lib5_inst/dds_endpoint_gen(1)/dds_endpoint_if/dds_writer_inst/cnt
add wave -noupdate -divider READER
add wave -noupdate /l2_type1_test2/Lib5_inst/start_r
add wave -noupdate /l2_type1_test2/Lib5_inst/opcode_r
add wave -noupdate /l2_type1_test2/Lib5_inst/ack_r
add wave -noupdate /l2_type1_test2/Lib5_inst/done_r
add wave -noupdate -radix DDS_RETCODE /l2_type1_test2/Lib5_inst/return_code_r
add wave -noupdate -divider LIB4
add wave -noupdate -group L4 -group RBE /l2_type1_test2/Lib4_inst/rtps_builtin_endpoint_inst/stage
add wave -noupdate -group L4 -group RBE -expand -group INPUT /l2_type1_test2/Lib4_inst/rtps_builtin_endpoint_inst/empty
add wave -noupdate -group L4 -group RBE -expand -group INPUT /l2_type1_test2/Lib4_inst/rtps_builtin_endpoint_inst/rd
add wave -noupdate -group L4 -group RBE -expand -group INPUT -radix hexadecimal /l2_type1_test2/Lib4_inst/rtps_builtin_endpoint_inst/data_in
add wave -noupdate -group L4 -group RBE -expand -group INPUT /l2_type1_test2/Lib4_inst/rtps_builtin_endpoint_inst/last_word_in
add wave -noupdate -group L4 -group RBE -group OUTPUT /l2_type1_test2/Lib4_inst/rtps_builtin_endpoint_inst/full_ro
add wave -noupdate -group L4 -group RBE -group OUTPUT /l2_type1_test2/Lib4_inst/rtps_builtin_endpoint_inst/wr_ro
add wave -noupdate -group L4 -group RBE -group OUTPUT -radix hexadecimal /l2_type1_test2/Lib4_inst/rtps_builtin_endpoint_inst/data_out_ro
add wave -noupdate -group L4 -group RBE -group OUTPUT /l2_type1_test2/Lib4_inst/rtps_builtin_endpoint_inst/last_word_out_ro
add wave -noupdate -group L4 -group RR /l2_type1_test2/Lib4_inst/rtps_endpoint_gen(0)/rtps_endpoint_if/rtps_reader_inst/stage
add wave -noupdate -group L4 -group RR /l2_type1_test2/Lib4_inst/rtps_endpoint_gen(0)/rtps_endpoint_if/rtps_reader_inst/cnt
add wave -noupdate -group L4 -group RR -expand -group META_INPUT /l2_type1_test2/Lib4_inst/rtps_endpoint_gen(0)/rtps_endpoint_if/rtps_reader_inst/empty_meta
add wave -noupdate -group L4 -group RR -expand -group META_INPUT /l2_type1_test2/Lib4_inst/rtps_endpoint_gen(0)/rtps_endpoint_if/rtps_reader_inst/rd_meta
add wave -noupdate -group L4 -group RR -expand -group META_INPUT -radix hexadecimal /l2_type1_test2/Lib4_inst/rtps_endpoint_gen(0)/rtps_endpoint_if/rtps_reader_inst/data_in_meta
add wave -noupdate -group L4 -group RR -expand -group META_INPUT /l2_type1_test2/Lib4_inst/rtps_endpoint_gen(0)/rtps_endpoint_if/rtps_reader_inst/last_word_in_meta
add wave -noupdate -group L4 -group RR -group OUTPUT /l2_type1_test2/Lib4_inst/rtps_endpoint_gen(0)/rtps_endpoint_if/rtps_reader_inst/full_ro
add wave -noupdate -group L4 -group RR -group OUTPUT /l2_type1_test2/Lib4_inst/rtps_endpoint_gen(0)/rtps_endpoint_if/rtps_reader_inst/wr_ro
add wave -noupdate -group L4 -group RR -group OUTPUT -radix hexadecimal /l2_type1_test2/Lib4_inst/rtps_endpoint_gen(0)/rtps_endpoint_if/rtps_reader_inst/data_out_ro
add wave -noupdate -group L4 -group RR -group OUTPUT /l2_type1_test2/Lib4_inst/rtps_endpoint_gen(0)/rtps_endpoint_if/rtps_reader_inst/last_word_out_ro
add wave -noupdate -group L4 -group RW /l2_type1_test2/Lib4_inst/rtps_endpoint_gen(1)/rtps_endpoint_if/rtps_writer_inst/stage
add wave -noupdate -group L4 -group RW /l2_type1_test2/Lib4_inst/rtps_endpoint_gen(1)/rtps_endpoint_if/rtps_writer_inst/cnt
add wave -noupdate -group L4 -group RW -group META_INPUT /l2_type1_test2/Lib4_inst/rtps_endpoint_gen(1)/rtps_endpoint_if/rtps_writer_inst/empty_meta
add wave -noupdate -group L4 -group RW -group META_INPUT /l2_type1_test2/Lib4_inst/rtps_endpoint_gen(1)/rtps_endpoint_if/rtps_writer_inst/rd_meta
add wave -noupdate -group L4 -group RW -group META_INPUT -radix hexadecimal /l2_type1_test2/Lib4_inst/rtps_endpoint_gen(1)/rtps_endpoint_if/rtps_writer_inst/data_in_meta
add wave -noupdate -group L4 -group RW -group META_INPUT /l2_type1_test2/Lib4_inst/rtps_endpoint_gen(1)/rtps_endpoint_if/rtps_writer_inst/last_word_in_meta
add wave -noupdate -group L4 -group RW -group OUTPUT /l2_type1_test2/Lib4_inst/rtps_endpoint_gen(1)/rtps_endpoint_if/rtps_writer_inst/full_ro
add wave -noupdate -group L4 -group RW -group OUTPUT /l2_type1_test2/Lib4_inst/rtps_endpoint_gen(1)/rtps_endpoint_if/rtps_writer_inst/wr_ro
add wave -noupdate -group L4 -group RW -group OUTPUT -radix hexadecimal /l2_type1_test2/Lib4_inst/rtps_endpoint_gen(1)/rtps_endpoint_if/rtps_writer_inst/data_out_ro
add wave -noupdate -group L4 -group RW -group OUTPUT /l2_type1_test2/Lib4_inst/rtps_endpoint_gen(1)/rtps_endpoint_if/rtps_writer_inst/last_word_out_ro
add wave -noupdate -divider LIB5
add wave -noupdate -group L5 -group RBE /l2_type1_test2/Lib5_inst/rtps_builtin_endpoint_inst/stage
add wave -noupdate -group L5 -group RBE -group INPUT /l2_type1_test2/Lib5_inst/rtps_builtin_endpoint_inst/empty
add wave -noupdate -group L5 -group RBE -group INPUT /l2_type1_test2/Lib5_inst/rtps_builtin_endpoint_inst/rd
add wave -noupdate -group L5 -group RBE -group INPUT -radix hexadecimal /l2_type1_test2/Lib5_inst/rtps_builtin_endpoint_inst/data_in
add wave -noupdate -group L5 -group RBE -group INPUT /l2_type1_test2/Lib5_inst/rtps_builtin_endpoint_inst/last_word_in
add wave -noupdate -group L5 -group RBE -group OUTPUT /l2_type1_test2/Lib5_inst/rtps_builtin_endpoint_inst/full_ro
add wave -noupdate -group L5 -group RBE -group OUTPUT /l2_type1_test2/Lib5_inst/rtps_builtin_endpoint_inst/wr_ro
add wave -noupdate -group L5 -group RBE -group OUTPUT -radix hexadecimal /l2_type1_test2/Lib5_inst/rtps_builtin_endpoint_inst/data_out_ro
add wave -noupdate -group L5 -group RBE -group OUTPUT /l2_type1_test2/Lib5_inst/rtps_builtin_endpoint_inst/last_word_out_ro
add wave -noupdate -group L5 -group RR /l2_type1_test2/Lib5_inst/rtps_endpoint_gen(0)/rtps_endpoint_if/rtps_reader_inst/stage
add wave -noupdate -group L5 -group RR /l2_type1_test2/Lib5_inst/rtps_endpoint_gen(0)/rtps_endpoint_if/rtps_reader_inst/cnt
add wave -noupdate -group L5 -group RR -group META_INPUT /l2_type1_test2/Lib5_inst/rtps_endpoint_gen(0)/rtps_endpoint_if/rtps_reader_inst/empty_meta
add wave -noupdate -group L5 -group RR -group META_INPUT /l2_type1_test2/Lib5_inst/rtps_endpoint_gen(0)/rtps_endpoint_if/rtps_reader_inst/rd_meta
add wave -noupdate -group L5 -group RR -group META_INPUT -radix hexadecimal /l2_type1_test2/Lib5_inst/rtps_endpoint_gen(0)/rtps_endpoint_if/rtps_reader_inst/data_in_meta
add wave -noupdate -group L5 -group RR -group META_INPUT /l2_type1_test2/Lib5_inst/rtps_endpoint_gen(0)/rtps_endpoint_if/rtps_reader_inst/last_word_in_meta
add wave -noupdate -group L5 -group RR -group OUTPUT /l2_type1_test2/Lib5_inst/rtps_endpoint_gen(0)/rtps_endpoint_if/rtps_reader_inst/full_ro
add wave -noupdate -group L5 -group RR -group OUTPUT /l2_type1_test2/Lib5_inst/rtps_endpoint_gen(0)/rtps_endpoint_if/rtps_reader_inst/wr_ro
add wave -noupdate -group L5 -group RR -group OUTPUT -radix hexadecimal /l2_type1_test2/Lib5_inst/rtps_endpoint_gen(0)/rtps_endpoint_if/rtps_reader_inst/data_out_ro
add wave -noupdate -group L5 -group RR -group OUTPUT /l2_type1_test2/Lib5_inst/rtps_endpoint_gen(0)/rtps_endpoint_if/rtps_reader_inst/last_word_out_ro
add wave -noupdate -group L5 -group RW /l2_type1_test2/Lib5_inst/rtps_endpoint_gen(1)/rtps_endpoint_if/rtps_writer_inst/stage
add wave -noupdate -group L5 -group RW /l2_type1_test2/Lib5_inst/rtps_endpoint_gen(1)/rtps_endpoint_if/rtps_writer_inst/cnt
add wave -noupdate -group L5 -group RW -group META_INPUT /l2_type1_test2/Lib5_inst/rtps_endpoint_gen(1)/rtps_endpoint_if/rtps_writer_inst/empty_meta
add wave -noupdate -group L5 -group RW -group META_INPUT /l2_type1_test2/Lib5_inst/rtps_endpoint_gen(1)/rtps_endpoint_if/rtps_writer_inst/rd_meta
add wave -noupdate -group L5 -group RW -group META_INPUT -radix hexadecimal /l2_type1_test2/Lib5_inst/rtps_endpoint_gen(1)/rtps_endpoint_if/rtps_writer_inst/data_in_meta
add wave -noupdate -group L5 -group RW -group META_INPUT /l2_type1_test2/Lib5_inst/rtps_endpoint_gen(1)/rtps_endpoint_if/rtps_writer_inst/last_word_in_meta
add wave -noupdate -group L5 -group RW -group OUTPUT /l2_type1_test2/Lib5_inst/rtps_endpoint_gen(1)/rtps_endpoint_if/rtps_writer_inst/full_ro
add wave -noupdate -group L5 -group RW -group OUTPUT /l2_type1_test2/Lib5_inst/rtps_endpoint_gen(1)/rtps_endpoint_if/rtps_writer_inst/wr_ro
add wave -noupdate -group L5 -group RW -group OUTPUT -radix hexadecimal /l2_type1_test2/Lib5_inst/rtps_endpoint_gen(1)/rtps_endpoint_if/rtps_writer_inst/data_out_ro
add wave -noupdate -group L5 -group RW -group OUTPUT /l2_type1_test2/Lib5_inst/rtps_endpoint_gen(1)/rtps_endpoint_if/rtps_writer_inst/last_word_out_ro
add wave -noupdate -divider LOOPBACK
add wave -noupdate /l2_type1_test2/Lib4_inst/test_loopback_inst/stage
add wave -noupdate /l2_type1_test2/Lib4_inst/test_loopback_inst/cnt
add wave -noupdate /l2_type1_test2/Lib4_inst/test_loopback_inst/status_r
add wave -noupdate -group READER /l2_type1_test2/Lib4_inst/test_loopback_inst/start_r
add wave -noupdate -group READER /l2_type1_test2/Lib4_inst/test_loopback_inst/opcode_r
add wave -noupdate -group READER /l2_type1_test2/Lib4_inst/test_loopback_inst/ack_r
add wave -noupdate -group READER /l2_type1_test2/Lib4_inst/test_loopback_inst/done_r
add wave -noupdate -group READER -radix DDS_RETCODE /l2_type1_test2/Lib4_inst/test_loopback_inst/return_code_r
add wave -noupdate -group READER /l2_type1_test2/Lib4_inst/test_loopback_inst/si_valid_r
add wave -noupdate -group READER /l2_type1_test2/Lib4_inst/test_loopback_inst/si_valid_data_r
add wave -noupdate -group READER -radix hexadecimal /l2_type1_test2/Lib4_inst/test_loopback_inst/si_instance_handle_r
add wave -noupdate -group WRITER /l2_type1_test2/Lib4_inst/test_loopback_inst/start_w
add wave -noupdate -group WRITER /l2_type1_test2/Lib4_inst/test_loopback_inst/opcode_w
add wave -noupdate -group WRITER /l2_type1_test2/Lib4_inst/test_loopback_inst/ack_w
add wave -noupdate -group WRITER /l2_type1_test2/Lib4_inst/test_loopback_inst/done_w
add wave -noupdate -group WRITER -radix DDS_RETCODE /l2_type1_test2/Lib4_inst/test_loopback_inst/return_code_w
add wave -noupdate -divider MISC
TreeUpdate [SetDefaultTree]
WaveRestoreCursors {{Cursor 1} {130725000 ps} 1} {{Cursor 2} {3803067 ps} 0}
quietly wave cursor active 2
configure wave -namecolwidth 150
configure wave -valuecolwidth 100
configure wave -justifyvalue left
configure wave -signalnamewidth 1
configure wave -snapdistance 10
configure wave -datasetprefix 0
configure wave -rowmargin 4
configure wave -childrowmargin 2
configure wave -gridoffset 0
configure wave -gridperiod 1
configure wave -griddelta 40
configure wave -timeline 0
configure wave -timelineunits ns
update
WaveRestoreZoom {3274312 ps} {4288072 ps}

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@ -16,15 +16,13 @@ others = $MODEL_TECH/../modelsim.ini
;
; Verilog Section
;
default = W:/HDL-SIM/OSVVM-Scripts/../sim/VHDL_LIBS/ModelSim-2020.02/default.lib
osvvm = W:/HDL-SIM/OSVVM-Scripts/../sim/VHDL_LIBS/ModelSim-2020.02/osvvm.lib
Testbench_Lib2 = W:/HDL-SIM/OSVVM-Scripts/../sim/VHDL_LIBS/ModelSim-2020.02/Testbench_Lib2.lib
Testbench_Lib3 = W:/HDL-SIM/OSVVM-Scripts/../sim/VHDL_LIBS/ModelSim-2020.02/Testbench_Lib3.lib
Testbench_Lib4 = W:/HDL-SIM/OSVVM-Scripts/../sim/VHDL_LIBS/ModelSim-2020.02/Testbench_Lib4.lib
Testbench_Lib5 = W:/HDL-SIM/OSVVM-Scripts/../sim/VHDL_LIBS/ModelSim-2020.02/Testbench_Lib5.lib
Testbench_Lib1 = W:/HDL-SIM/OSVVM-Scripts/../sim/VHDL_LIBS/ModelSim-2020.02/Testbench_Lib1.lib
Lib1 = W:/HDL-SIM/OSVVM-Scripts/../sim/VHDL_LIBS/QuestaSim-2021.04/Lib1.lib
Lib3 = W:/HDL-SIM/OSVVM-Scripts/../sim/VHDL_LIBS/QuestaSim-2021.04/Lib3.lib
Testbench-Lib1 = W:/HDL-SIM/OSVVM-Scripts/../sim/VHDL_LIBS/ModelSim-2020.02/Testbench-Lib1.lib
[vcom]
; VHDL93 variable selects language version as the default.
; Default is VHDL-2002.

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@ -529,7 +529,7 @@ begin
if (reset = '1') then
time <= TIME_ZERO;
else
time <= time + gen_duration(0,50); -- 50 ns
time <= time + CLOCK_DURATION;
end if;
end if;
end process;

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@ -0,0 +1,366 @@
library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;
library osvvm; -- Utility Library
context osvvm.OsvvmContext;
library Testbench_Lib4;
library Testbench_Lib5;
use work.rtps_package.all;
use work.user_config.all;
use work.rtps_config_package.all;
use work.rtps_test_package.all;
use work.Type1_package.all;
-- This testbench tests the general system operation by interconnecting two complete systems with a reader and a writer respectively, and perforing a loopback operation.
-- Libraries are used to allow to use systems with different configurations.
-- The testbench is interfacing with the readr and writer of Testbench_Lib5, and the loopback entity (test_loopback) is interfacing with the reader and writer of Testbench_Lib4.
-- The testbench->test_loopback communication uses a Type1 Instance with id=1, and the test_loopback->testbench communication uses a Type1 Instance with id=2.
-- The testbench performs a REGISTER_INSTANCE operation to get the Instance Handle of the response channel. The it sends 5 samples with content 1,2,3,4, and 5, respectively.
-- The test_loopback reads these Samples and responds with a x+1000 calculation on the Sample Contents (i.e. 1001,1002,1003,1004,1005).
-- The testbench reads only Samples with the correct instance and checks for the expected content.
entity L2_Type1_test2 is
end entity;
architecture testbench of L2_Type1_test2 is
signal clk, reset : std_logic := '0';
signal time : TIME_TYPE := TIME_ZERO;
signal empty_l4, full_l4, read_l4, write_l4 : std_logic := '0';
signal data_in_l4, data_out_l4 : std_logic_vector(WORD_WIDTH-1 downto 0) := (others => '0');
signal empty_l5, full_l5, read_l5, write_l5 : std_logic := '0';
signal data_in_l5, data_out_l5 : std_logic_vector(WORD_WIDTH-1 downto 0) := (others => '0');
signal start_w, ack_w, done_w, ready_out_w, valid_out_w, last_word_out_w, encode_done_w : std_logic := '0';
--signal opcode_w : Testbench_Lib5.rtps_config_package.DDS_WRITER_OPCODE_TYPE := Testbench_Lib5.rtps_config_package.DDS_WRITER_OPCODE_TYPE'(NOP);
signal opcode_w : DDS_WRITER_OPCODE_TYPE;
signal instance_handle_in_w : INSTANCE_HANDLE_TYPE := HANDLE_NIL;
signal instance_handle_out_w : Testbench_Lib5.rtps_package.INSTANCE_HANDLE_TYPE := Testbench_Lib5.rtps_package.HANDLE_NIL;
signal source_ts_w : TIME_TYPE := TIME_INVALID;
signal max_wait_w : DURATION_TYPE := DURATION_ZERO;
signal return_code_w : std_logic_vector(RETURN_CODE_WIDTH-1 downto 0) := RETCODE_OK;
signal data_out_w : std_logic_vector(WORD_WIDTH-1 downto 0) := (others => '0');
signal status_w : std_logic_vector(STATUS_KIND_WIDTH-1 downto 0) := (others => '0');
signal id_w, a_w : std_logic_vector(CDR_LONG_WIDTH-1 downto 0) := (others => '0');
signal start_r, ack_r, get_data_r, done_r, si_valid_data_r, si_valid_r, si_ack_r, eoc_r, valid_r, decode_error_r : std_logic := '0';
signal opcode_r : DDS_READER_OPCODE_TYPE;
signal instance_state_r, si_instance_state_r : std_logic_vector(INSTANCE_STATE_KIND_WIDTH-1 downto 0) := ANY_INSTANCE_STATE;
signal view_state_r, si_view_state_r : std_logic_vector(VIEW_STATE_KIND_WIDTH-1 downto 0) := ANY_VIEW_STATE;
signal sample_state_r, si_sample_state_r : std_logic_vector(SAMPLE_STATE_KIND_WIDTH-1 downto 0) := ANY_SAMPLE_STATE;
signal instance_handle_r : INSTANCE_HANDLE_TYPE := HANDLE_NIL;
signal si_instance_handle_r : Testbench_Lib5.rtps_package.INSTANCE_HANDLE_TYPE := Testbench_Lib5.rtps_package.HANDLE_NIL;
signal max_samples_r : std_logic_vector(MAX_SAMPLES_WIDTH-1 downto 0) := (others => '0');
signal return_code_r : std_logic_vector(RETURN_CODE_WIDTH-1 downto 0) := RETCODE_OK;
signal si_source_timestamp_r : Testbench_Lib5.rtps_package.TIME_TYPE := Testbench_Lib5.rtps_package.TIME_INVALID;
signal si_publication_handle_r : Testbench_Lib5.rtps_package.INSTANCE_HANDLE_TYPE := Testbench_Lib5.rtps_package.HANDLE_NIL;
signal si_disposed_generation_count_r : std_logic_vector(DISPOSED_GENERATION_COUNT_WIDTH-1 downto 0) := (others => '0');
signal si_no_writers_generation_count_r : std_logic_vector(NO_WRITERS_GENERATION_COUNT_WIDTH-1 downto 0) := (others => '0');
signal si_sample_rank_r : std_logic_vector(SAMPLE_RANK_WIDTH-1 downto 0) := (others => '0');
signal si_generation_rank_r : std_logic_vector(GENERATION_RANK_WIDTH-1 downto 0) := (others => '0');
signal si_absolute_generation_rank_r : std_logic_vector(ABSOLUTE_GENERATION_COUNT_WIDTH-1 downto 0) := (others => '0');
signal status_r : std_logic_vector(STATUS_KIND_WIDTH-1 downto 0) := (others => '0');
signal id_r, a_r : std_logic_vector(CDR_LONG_WIDTH-1 downto 0) := (others => '0');
signal inst : INSTANCE_HANDLE_TYPE := HANDLE_NIL;
-- HACK: For some reason (possibly Modelsim/Questasim Bug) I cannot declare the opcode signals from their respective Library sources,
-- because I cannot use a qualified expression to define an enumeration literal (and direct type casting cannot be done because
-- the types are not closely related). So I have to do define explicit type conversions between the types...
function to_Lib5(input : DDS_READER_OPCODE_TYPE) return Testbench_Lib5.rtps_config_package.DDS_READER_OPCODE_TYPE is
begin
return Testbench_Lib5.rtps_config_package.DDS_READER_OPCODE_TYPE'VAL(DDS_READER_OPCODE_TYPE'POS(input));
end function;
function to_Lib5(input : DDS_WRITER_OPCODE_TYPE) return Testbench_Lib5.rtps_config_package.DDS_WRITER_OPCODE_TYPE is
begin
return Testbench_Lib5.rtps_config_package.DDS_WRITER_OPCODE_TYPE'VAL(DDS_WRITER_OPCODE_TYPE'POS(input));
end function;
begin
Lib4_inst : entity Testbench_Lib4.L2_Testbench_Lib4(arch)
port map (
-- SYSTEM
clk => clk,
reset => reset,
time => Testbench_Lib4.rtps_package.TIME_TYPE(time),
-- INPUT
empty => empty_l4,
read => read_l4,
data_in => data_in_l4,
-- OUTPUT
full => full_l4,
write => write_l4,
data_out => data_out_l4
);
fifo_l4_l5_inst : configuration work.FWFT_FIFO_cfg
generic map (
FIFO_DEPTH => 65536/(WORD_WIDTH/BYTE_WIDTH),
DATA_WIDTH => WORD_WIDTH
)
port map
(
clk => clk,
reset => reset,
empty => empty_l5,
read => read_l5,
data_out => data_in_l5,
full => full_l4,
write => write_l4,
data_in => data_out_l4,
free => open
);
fifo_l5_l4_inst : configuration work.FWFT_FIFO_cfg
generic map (
FIFO_DEPTH => 65536/(WORD_WIDTH/BYTE_WIDTH),
DATA_WIDTH => WORD_WIDTH
)
port map
(
clk => clk,
reset => reset,
empty => empty_l4,
read => read_l4,
data_out => data_in_l4,
full => full_l5,
write => write_l5,
data_in => data_out_l5,
free => open
);
Lib5_inst : entity Testbench_Lib5.L2_Testbench_Lib5(arch)
port map (
-- SYSTEM
clk => clk,
reset => reset,
time => Testbench_Lib5.rtps_package.TIME_TYPE(time),
-- INPUT
empty => empty_l5,
read => read_l5,
data_in => data_in_l5,
-- OUTPUT
full => full_l5,
write => write_l5,
data_out => data_out_l5,
-- READER
start_r => start_r,
ack_r => ack_r,
opcode_r => to_Lib5(opcode_r),
instance_state_r => instance_state_r,
view_state_r => view_state_r,
sample_state_r => sample_state_r,
instance_handle_r => Testbench_Lib5.rtps_package.INSTANCE_HANDLE_TYPE(instance_handle_r),
max_samples_r => max_samples_r,
get_data_r => get_data_r,
done_r => done_r,
return_code_r => return_code_r,
si_sample_state_r => si_sample_state_r,
si_view_state_r => si_view_state_r,
si_instance_state_r => si_instance_state_r,
si_source_timestamp_r => si_source_timestamp_r,
si_instance_handle_r => si_instance_handle_r,
si_publication_handle_r => si_publication_handle_r,
si_disposed_generation_count_r => si_disposed_generation_count_r,
si_no_writers_generation_count_r => si_no_writers_generation_count_r,
si_sample_rank_r => si_sample_rank_r,
si_generation_rank_r => si_generation_rank_r,
si_absolute_generation_rank_r => si_absolute_generation_rank_r,
si_valid_data_r => si_valid_data_r,
si_valid_r => si_valid_r,
si_ack_r => si_ack_r,
eoc_r => eoc_r,
status_r => status_r,
decode_error_r => decode_error_r,
id_r => id_r,
a_r => a_r,
valid_r => valid_r,
-- WRITER
start_w => start_w,
ack_w => ack_w,
opcode_w => to_Lib5(opcode_w),
instance_handle_in_w => Testbench_Lib5.rtps_package.INSTANCE_HANDLE_TYPE(instance_handle_in_w),
source_ts_w => Testbench_Lib5.rtps_package.TIME_TYPE(source_ts_w),
max_wait_w => Testbench_Lib5.rtps_package.DURATION_TYPE(max_wait_w),
done_w => done_w,
return_code_w => return_code_w,
instance_handle_out_w => instance_handle_out_w,
status_w => status_w,
id_w => id_w,
a_w => a_w,
encode_done_w => encode_done_w
);
stimulus_prc : process
variable RV : RandomPType;
variable j : natural := 1;
-- Waits until signal toggles high for at least 1 ps
procedure wait_on_sig(signal sig : std_logic) is
begin
loop
if (sig /= '1') then
wait on sig until sig = '1';
end if;
-- Prevent triggering on glitches
wait for 1 ps;
if (sig = '1') then
exit;
end if;
end loop;
end procedure;
procedure wait_on_data(signal sig : std_logic_vector) is
begin
assert (sig'length = STATUS_KIND_WIDTH) severity FAILURE;
if ((sig and DATA_AVAILABLE_STATUS) = (sig'reverse_range => '0')) then
wait on sig until check_mask(sig, DATA_AVAILABLE_STATUS);
end if;
end procedure;
begin
SetAlertLogName("System - Level 2 - (Type1) - Loopback");
SetAlertEnable(FAILURE, TRUE);
SetAlertEnable(ERROR, TRUE);
SetAlertEnable(WARNING, TRUE);
SetLogEnable(DEBUG, FALSE);
SetLogEnable(PASSED, FALSE);
SetLogEnable(INFO, TRUE);
RV.InitSeed(RV'instance_name);
Log("Initial Reset", INFO);
reset <= '1';
wait until rising_edge(clk);
wait until rising_edge(clk);
reset <= '0';
Log("Register Target Instance (Get Instance Handle of Responce)", INFO);
start_w <= '1';
opcode_w <= REGISTER_INSTANCE;
id_w <= int(2,CDR_LONG_WIDTH);
a_w <= (others => '0');
wait_on_sig(ack_w);
wait until rising_edge(clk);
start_w <= '0';
wait_on_sig(done_w);
wait for 1 ps; -- Make sure all signals stable
inst <= INSTANCE_HANDLE_TYPE(instance_handle_out_w);
wait until rising_edge(clk);
Log("Writing Samples", INFO);
for i in 1 to 5 loop
Log("Write Sample " & integer'image(i), INFO);
start_w <= '1';
opcode_w <= WRITE;
source_ts_w <= TIME_INVALID;
instance_handle_in_w <= HANDLE_NIL;
id_w <= int(1,CDR_LONG_WIDTH);
a_w <= int(i,CDR_LONG_WIDTH);
wait_on_sig(ack_w);
wait until rising_edge(clk);
start_w <= '0';
wait_on_sig(done_w);
wait for 1 ps; -- Make sure all signals stable
AlertIf(return_code_w /= RETCODE_OK, "DDS Write Operation Failed", FAILURE);
wait until rising_edge(clk);
end loop;
-- NOTE: Because the Participant Announcement has not yet happened, the data written is considered historical
-- and will be sent immediately on Endpoint matching.
Log("Wait on Data Arrival", INFO);
wait_on_data(status_r);
wait until rising_edge(clk);
Log("Read Samples", INFO);
loop
if (j = 5) then
exit;
end if;
start_r <= '1';
opcode_r <= TAKE_NEXT_SAMPLE;
wait_on_sig(ack_r);
wait until rising_edge(clk);
start_r <= '0';
wait_on_sig(done_r);
wait for 1 ps; -- Make sure all signals stable
wait until rising_edge(clk);
case (return_code_r) is
when RETCODE_OK =>
wait_on_sig(si_valid_r);
wait for 1 ps; -- Make sure all signals stable
-- Check if Sample is from target Instance
if (si_valid_data_r = '1' and INSTANCE_HANDLE_TYPE(si_instance_handle_r) = inst) then
Log("Read Sample " & integer'image(j), INFO);
si_ack_r <= '1';
get_data_r <= '1';
wait until rising_edge(clk);
si_ack_r <= '0';
get_data_r <= '0';
wait_on_sig(valid_r);
wait for 1 ps; -- Make sure all signals stable
AffirmIfEqual(id_r, int(2,CDR_LONG_WIDTH));
AffirmIfEqual(a_r, int(j+1000,CDR_LONG_WIDTH));
wait_on_sig(eoc_r);
wait until rising_edge(clk);
j := j + 1;
else
Log("Read Unknown Sample", INFO);
-- Ignore Sample
si_ack_r <= '1';
wait until rising_edge(clk);
si_ack_r <= '0';
end if;
when RETCODE_NO_DATA =>
Log("No more Samples", INFO);
Log("Wait on Data Arrival", INFO);
wait_on_data(status_r);
wait until rising_edge(clk);
null;
when others =>
Alert("Unexpected DDS Reader Response", FAILURE);
end case;
end loop;
TranscriptOpen(RESULTS_FILE, APPEND_MODE);
SetTranscriptMirror;
ReportAlerts;
TranscriptClose;
std.env.stop;
wait;
end process;
clock_prc : process
begin
clk <= '0';
wait for TEST_CLOCK_PERIOD/2;
clk <= '1';
wait for TEST_CLOCK_PERIOD/2;
end process;
time_prc : process(clk)
begin
if rising_edge(clk) then
if (reset = '1') then
time <= TIME_ZERO;
else
time <= time + CLOCK_DURATION;
end if;
end if;
end process;
watchdog : process
begin
wait for 1 ms;
Alert("Test timeout", FAILURE);
std.env.stop;
end process;
end architecture;

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@ -0,0 +1,751 @@
-- altera vhdl_input_version vhdl_2008
-- XXX: QSYS Fix (https://www.intel.com/content/www/us/en/support/programmable/articles/000079458.html)
library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;
use work.rtps_package.all;
use work.user_config.all;
use work.rtps_config_package.all;
use work.rtps_test_package.all;
use work.Type1_package.all;
entity L2_Testbench_Lib4 is
port (
-- SYSTEM
clk : in std_logic;
reset : in std_logic;
time : in TIME_TYPE;
-- INPUT
empty : in std_logic;
read : out std_logic;
data_in : in std_logic_vector(WORD_WIDTH-1 downto 0);
-- OUTPUT
full : in std_logic;
write : out std_logic;
data_out : out std_logic_vector(WORD_WIDTH-1 downto 0)
);
end entity;
architecture arch of L2_Testbench_Lib4 is
-- TODO: Better Names?
type EARRAY_DATA_TYPE is array (0 to NUM_ENDPOINTS-1) of std_logic_vector(WORD_WIDTH downto 0);
type HISTORY_CACHE_OPCODE_RARRAY_TYPE is array (0 to NUM_READERS-1) of HISTORY_CACHE_OPCODE_TYPE;
type HISTORY_CACHE_OPCODE_WARRAY_TYPE is array (0 to NUM_WRITERS-1) of HISTORY_CACHE_OPCODE_TYPE;
type HISTORY_CACHE_RESPONSE_RARRAY_TYPE is array (0 to NUM_READERS-1) of HISTORY_CACHE_RESPONSE_TYPE;
type HISTORY_CACHE_RESPONSE_WARRAY_TYPE is array (0 to NUM_WRITERS-1) of HISTORY_CACHE_RESPONSE_TYPE;
type RARRAY_DATA_TYPE is array (0 to NUM_READERS-1) of std_logic_vector(WORD_WIDTH downto 0);
type WARRAY_DATA_TYPE is array (0 to NUM_WRITERS-1) of std_logic_vector(WORD_WIDTH downto 0);
type SEQUENCENUMBER_WARRAY_TYPE is array (0 to NUM_WRITERS-1) of SEQUENCENUMBER_TYPE;
type INSTANCE_HANDLE_RARRAY_TYPE is array (0 to NUM_READERS-1) of INSTANCE_HANDLE_TYPE;
type INSTANCE_HANDLE_WARRAY_TYPE is array (0 to NUM_WRITERS-1) of INSTANCE_HANDLE_TYPE;
type CACHE_CHANGE_KIND_WARRAY_TYPE is array (0 to NUM_WRITERS-1) of CACHE_CHANGE_KIND_TYPE;
type TIME_RARRAY_TYPE is array (0 to NUM_READERS-1) of TIME_TYPE;
type TIME_WARRAY_TYPE is array (0 to NUM_WRITERS-1) of TIME_TYPE;
type DDS_READER_OPCODE_RARRAY_TYPE is array (0 to NUM_READERS-1) of DDS_READER_OPCODE_TYPE;
type DDS_WRITER_OPCODE_WARRAY_TYPE is array (0 to NUM_WRITERS-1) of DDS_WRITER_OPCODE_TYPE;
type INSTANCE_STATE_RARRAY_TYPE is array (0 to NUM_READERS-1) of std_logic_vector(INSTANCE_STATE_KIND_WIDTH-1 downto 0);
type VIEW_STATE_RARRAY_TYPE is array (0 to NUM_READERS-1) of std_logic_vector(VIEW_STATE_KIND_WIDTH-1 downto 0);
type SAMPLE_STATE_RARRAY_TYPE is array (0 to NUM_READERS-1) of std_logic_vector(SAMPLE_STATE_KIND_WIDTH-1 downto 0);
type MAX_SAMPLES_RARRAY_TYPE is array (0 to NUM_READERS-1) of std_logic_vector(MAX_SAMPLES_WIDTH-1 downto 0);
type RETURN_CODE_RARRAY_TYPE is array (0 to NUM_READERS-1) of std_logic_vector(RETURN_CODE_WIDTH-1 downto 0);
type RETURN_CODE_WARRAY_TYPE is array (0 to NUM_WRITERS-1) of std_logic_vector(RETURN_CODE_WIDTH-1 downto 0);
type DISPOSED_GENERATION_COUNT_RARRAY_TYPE is array (0 to NUM_READERS-1) of std_logic_vector(DISPOSED_GENERATION_COUNT_WIDTH-1 downto 0);
type NO_WRITERS_GENERATION_COUNT_RARRAY_TYPE is array (0 to NUM_READERS-1) of std_logic_vector(NO_WRITERS_GENERATION_COUNT_WIDTH-1 downto 0);
type SAMPLE_RANK_RARRAY_TYPE is array (0 to NUM_READERS-1) of std_logic_vector(SAMPLE_RANK_WIDTH-1 downto 0);
type GENERATION_RANK_RARRAY_TYPE is array (0 to NUM_READERS-1) of std_logic_vector(GENERATION_RANK_WIDTH-1 downto 0);
type ABSOLUTE_GENERATION_RANK_RARRAY_TYPE is array (0 to NUM_READERS-1) of std_logic_vector(ABSOLUTE_GENERATION_COUNT_WIDTH-1 downto 0);
type STATUS_KIND_RARRAY_TYPE is array (0 to NUM_READERS-1) of std_logic_vector(STATUS_KIND_WIDTH-1 downto 0);
type STATUS_KIND_WARRAY_TYPE is array (0 to NUM_WRITERS-1) of std_logic_vector(STATUS_KIND_WIDTH-1 downto 0);
type DURATION_WARRAY_TYPE is array (0 to NUM_WRITERS-1) of DURATION_TYPE;
signal full_fire_rh, write_rh_fire : std_logic_vector(0 to NUM_ENDPOINTS-1);
signal data_rh_fire, data_rh_firb : std_logic_vector(WORD_WIDTH downto 0);
signal full_firb_rh, write_rh_firb : std_logic;
signal read_rb_firb, empty_firb_rb : std_logic;
signal data_firb_rb : std_logic_vector(WORD_WIDTH downto 0);
signal read_re_fire, empty_fire_re : std_logic_vector(0 to NUM_ENDPOINTS);
signal data_fire_re : EARRAY_DATA_TYPE;
signal alive_re_rb, full_frbre_re, write_rb_frbre : std_logic_vector(0 to NUM_ENDPOINTS-1);
signal data_rb_frbre , data_rb_firo : std_logic_vector(WORD_WIDTH downto 0);
signal full_firo_rb, write_rb_firo : std_logic;
signal empty_frbre_re, read_re_frbre : std_logic_vector(0 to NUM_ENDPOINTS-1);
signal data_frbre_re : EARRAY_DATA_TYPE;
signal full_firo_re, write_re_firo : std_logic_vector(0 to NUM_ENDPOINTS-1);
signal data_re_firo : EARRAY_DATA_TYPE;
signal start_rr_dr, ack_dr_rr, done_dr_rr, valid_rr_dr, ready_dr_rr : std_logic_vector(0 to NUM_READERS-1);
signal opcode_rr_dr : HISTORY_CACHE_OPCODE_RARRAY_TYPE;
signal ret_dr_rr : HISTORY_CACHE_RESPONSE_RARRAY_TYPE;
signal data_rr_dr : RARRAY_DATA_TYPE;
signal liveliness_assertion_dw_rw, data_available_dw_rw, start_rw_dw, ack_dw_rw, done_rw_dw, get_data_rw_dw, valid_dw_rw, ready_rw_dw : std_logic_vector(0 to NUM_WRITERS-1);
signal opcode_rw_dw : HISTORY_CACHE_OPCODE_WARRAY_TYPE;
signal seq_nr_rw_dw, cc_seq_nr_dw_rw : SEQUENCENUMBER_WARRAY_TYPE;
signal ret_dw_rw : HISTORY_CACHE_RESPONSE_WARRAY_TYPE;
signal data_dw_rw : WARRAY_DATA_TYPE;
signal cc_instance_handle_dw_rw : INSTANCE_HANDLE_WARRAY_TYPE;
signal cc_kind_dw_rw : CACHE_CHANGE_KIND_WARRAY_TYPE;
signal cc_source_timestamp_dw_rw : TIME_WARRAY_TYPE;
signal start_ri_dr, ack_dr_ri, get_data_ri_dr, done_dr_ri, ready_ri_dr, valid_dr_ri, si_valid_data_dr_ri, si_valid_dr_ri, si_ack_ri_dr, eoc_dr_ri : std_logic_vector(0 to NUM_READERS-1);
signal opcode_ri_dr : DDS_READER_OPCODE_RARRAY_TYPE;
signal instance_state_ri_dr, si_instance_state_dr_ri : INSTANCE_STATE_RARRAY_TYPE;
signal view_state_ri_dr, si_view_state_dr_ri : VIEW_STATE_RARRAY_TYPE;
signal sample_state_ri_dr, si_sample_state_dr_ri : SAMPLE_STATE_RARRAY_TYPE;
signal instance_handle_ri_dr, si_instance_handle_dr_ri, si_publication_handle_dr_ri : INSTANCE_HANDLE_RARRAY_TYPE;
signal max_samples_ri_dr : MAX_SAMPLES_RARRAY_TYPE;
signal return_code_dr_ri : RETURN_CODE_RARRAY_TYPE;
signal data_dr_ri : RARRAY_DATA_TYPE;
signal si_source_timestamp_dr_ri : TIME_RARRAY_TYPE;
signal si_disposed_generation_count_dr_ri : DISPOSED_GENERATION_COUNT_RARRAY_TYPE;
signal si_no_writers_generation_count_dr_ri : NO_WRITERS_GENERATION_COUNT_RARRAY_TYPE;
signal si_sample_rank_dr_ri : SAMPLE_RANK_RARRAY_TYPE;
signal si_generation_rank_dr_ri : GENERATION_RANK_RARRAY_TYPE;
signal si_absolute_generation_rank_dr_ri : ABSOLUTE_GENERATION_RANK_RARRAY_TYPE;
signal status_dr_ri : STATUS_KIND_RARRAY_TYPE;
signal start_wi_dw, ack_dw_wi, done_dw_wi, valid_wi_dw, valid_dw_wi, ready_wi_dw, ready_dw_wi : std_logic_vector(0 to NUM_WRITERS-1);
signal opcode_wi_dw : DDS_WRITER_OPCODE_WARRAY_TYPE;
signal instance_handle_wi_dw, instance_handle_dw_wi : INSTANCE_HANDLE_WARRAY_TYPE;
signal source_ts_wi_dw : TIME_WARRAY_TYPE;
signal max_wait_wi_dw : DURATION_WARRAY_TYPE;
signal return_code_dw_wi : RETURN_CODE_WARRAY_TYPE;
signal data_dw_wi, data_wi_dw : WARRAY_DATA_TYPE;
signal status_dw_wi : STATUS_KIND_WARRAY_TYPE;
signal empty_firo_ro, read_ro_firo, last_word_firo_ro : std_logic_vector(0 to NUM_ENDPOINTS);
signal data_firo_ro : RTPS_OUT_DATA_TYPE;
signal start_user_ri, ack_ri_user, get_data_user_ri, done_ri_user, si_valid_data_ri_user, si_valid_ri_user, si_ack_user_ri, eoc_ri_user, decode_error_ri_user, valid_ri_user : std_logic;
signal opcode_user_ri : DDS_READER_OPCODE_TYPE;
signal instance_state_user_ri, si_instance_state_ri_user : std_logic_vector(INSTANCE_STATE_KIND_WIDTH-1 downto 0);
signal view_state_user_ri, si_view_state_ri_user : std_logic_vector(VIEW_STATE_KIND_WIDTH-1 downto 0);
signal sample_state_user_ri, si_sample_state_ri_user : std_logic_vector(SAMPLE_STATE_KIND_WIDTH-1 downto 0);
signal max_samples_user_ri : std_logic_vector(MAX_SAMPLES_WIDTH-1 downto 0);
signal instance_handle_user_ri, si_instance_handle_ri_user, si_publication_handle_ri_user : INSTANCE_HANDLE_TYPE;
signal return_code_ri_user : std_logic_vector(RETURN_CODE_WIDTH-1 downto 0);
signal si_source_timestamp_ri_user : TIME_TYPE;
signal si_disposed_generation_count_ri_user : std_logic_vector(DISPOSED_GENERATION_COUNT_WIDTH-1 downto 0);
signal si_no_writers_generation_count_ri_user : std_logic_vector(NO_WRITERS_GENERATION_COUNT_WIDTH-1 downto 0);
signal si_sample_rank_ri_user : std_logic_vector(SAMPLE_RANK_WIDTH-1 downto 0);
signal si_generation_rank_ri_user : std_logic_vector(GENERATION_RANK_WIDTH-1 downto 0);
signal si_absolute_generation_rank_ri_user : std_logic_vector(ABSOLUTE_GENERATION_COUNT_WIDTH-1 downto 0);
signal status_ri_user : std_logic_vector(STATUS_KIND_WIDTH-1 downto 0);
signal id_ri_user, a_ri_user : std_logic_vector(CDR_LONG_WIDTH-1 downto 0);
signal start_user_wi, ack_wi_user, done_wi_user : std_logic;
signal opcode_user_wi : DDS_WRITER_OPCODE_TYPE;
signal instance_handle_user_wi, instance_handle_wi_user : INSTANCE_HANDLE_TYPE;
signal source_ts_user_wi : TIME_TYPE;
signal max_wait_user_wi : DURATION_TYPE;
signal return_code_wi_user : std_logic_vector(RETURN_CODE_WIDTH-1 downto 0);
signal status_wi_user : std_logic_vector(STATUS_KIND_WIDTH-1 downto 0);
signal id_user_wi, a_user_wi : std_logic_vector(CDR_LONG_WIDTH-1 downto 0);
signal encode_done_wi_user : std_logic;
begin
rtps_handler_inst : entity work.rtps_handler(arch)
port map (
-- SYSTEM
clk => clk,
reset => reset,
-- INPUT
empty => empty,
rd => read,
data_in => data_in,
-- TO BUILTIN ENDPOINT
full_be => full_firb_rh,
wr_be => write_rh_firb,
data_out_be => data_rh_firb(WORD_WIDTH-1 downto 0),
last_word_out_be => data_rh_firb(WORD_WIDTH),
-- TO USER ENDPOINTS
full_ue => full_fire_rh,
wr_ue => write_rh_fire,
data_out_ue => data_rh_fire(WORD_WIDTH-1 downto 0),
last_word_out_ue => data_rh_fire(WORD_WIDTH)
);
fifo_in_rb_inst : configuration work.FWFT_FIFO_cfg
generic map (
FIFO_DEPTH => 2,
DATA_WIDTH => WORD_WIDTH+1
)
port map (
-- SYSTEM
reset => reset,
clk => clk,
-- INPUT
full => full_firb_rh,
write => write_rh_firb,
data_in => data_rh_firb,
-- OUTPUT
empty => empty_firb_rb,
read => read_rb_firb,
data_out => data_firb_rb,
-- MISC
free => open
);
fifo_in_re_gen : for i in 0 to NUM_ENDPOINTS-1 generate
fifo_in_re_inst : configuration work.FWFT_FIFO_cfg
generic map (
FIFO_DEPTH => 2,
DATA_WIDTH => WORD_WIDTH+1
)
port map (
-- SYSTEM
reset => reset,
clk => clk,
-- INPUT
full => full_fire_rh(i),
write => write_rh_fire(i),
data_in => data_rh_fire, -- Multicast
-- OUTPUT
empty => empty_fire_re(i),
read => read_re_fire(i),
data_out => data_fire_re(i),
-- MISC
free => open
);
end generate;
rtps_builtin_endpoint_inst : entity work.rtps_builtin_endpoint(arch)
generic map (
MAX_REMOTE_PARTICIPANTS => MAX_REMOTE_PARTICIPANTS
)
port map (
clk => clk,
reset => reset,
time => time,
-- FROM RTPS HANDLER
empty => empty_firb_rb,
rd => read_rb_firb,
data_in => data_firb_rb(WORD_WIDTH-1 downto 0),
last_word_in => data_firb_rb(WORD_WIDTH),
-- FROM USER ENDPOINTS
alive => alive_re_rb,
-- TO USER ENDPOINTS
full_ue => full_frbre_re,
wr_ue => write_rb_frbre,
data_out_ue => data_rb_frbre(WORD_WIDTH-1 downto 0),
last_word_out_ue => data_rb_frbre(WORD_WIDTH),
-- TO RTPS OUT
full_ro => full_firo_rb,
wr_ro => write_rb_firo,
data_out_ro => data_rb_firo(WORD_WIDTH-1 downto 0),
last_word_out_ro => data_rb_firo(WORD_WIDTH)
);
fifo_rb_re_gen : for i in 0 to NUM_ENDPOINTS-1 generate
fifo_rb_re_inst : configuration work.FWFT_FIFO_cfg
generic map (
FIFO_DEPTH => 2,
DATA_WIDTH => WORD_WIDTH+1
)
port map (
-- SYSTEM
reset => reset,
clk => clk,
-- INPUT
full => full_frbre_re(i),
write => write_rb_frbre(i),
data_in => data_rb_frbre, -- Multicast
-- OUTPUT
empty => empty_frbre_re(i),
read => read_re_frbre(i),
data_out => data_frbre_re(i),
-- MISC
free => open
);
end generate;
rtps_endpoint_gen : for i in 0 to NUM_ENDPOINTS-1 generate
rtps_endpoint_if : if (i < NUM_READERS) generate
rtps_reader_inst : entity work.rtps_reader(arch)
generic map (
ENTITYID => ENTITYID(i),
RELIABILITY_QOS => ENDPOINT_RELIABILITY_QOS(i),
LIVELINESS_QOS => ENDPOINT_LIVELINESS_QOS(i),
DURABILITY_QOS => ENDPOINT_DURABILITY_QOS(i),
HEARTBEAT_RESPONSE_DELAY => ENDPOINT_HEARTBEAT_RESPONSE_DELAY(i),
HEARTBEAT_SUPPRESSION_DELAY => ENDPOINT_HEARTBEAT_SUPPRESSION_DELAY(i),
LEASE_DURATION => ENDPOINT_LEASE_DURATION(i),
WITH_KEY => ENDPOINT_WITH_KEY(i),
MAX_REMOTE_ENDPOINTS => MAX_REMOTE_ENDPOINTS
)
port map (
-- SYSTEM
clk => clk,
reset => reset,
time => time,
-- FROM RTPS_HANDLER (USER TRAFFIC)
empty_user => empty_fire_re(i),
rd_user => read_re_fire(i),
data_in_user => data_fire_re(i)(WORD_WIDTH-1 downto 0),
last_word_in_user => data_fire_re(i)(WORD_WIDTH),
-- FROM RTPS_BUILTIN_ENDPOINT (META TRAFFIC)
empty_meta => empty_frbre_re(i),
rd_meta => read_re_frbre(i),
data_in_meta => data_frbre_re(i)(WORD_WIDTH-1 downto 0),
last_word_in_meta => data_frbre_re(i)(WORD_WIDTH),
-- RTPS OUTPUT
full_ro => full_firo_re(i),
wr_ro => write_re_firo(i),
data_out_ro => data_re_firo(i)(WORD_WIDTH-1 downto 0),
last_word_out_ro => data_re_firo(i)(WORD_WIDTH),
-- TO HISTORY CACHE
start_hc => start_rr_dr(i),
opcode_hc => opcode_rr_dr(i),
ack_hc => ack_dr_rr(i),
done_hc => done_dr_rr(i),
ret_hc => ret_dr_rr(i),
valid_out_hc => valid_rr_dr(i),
ready_out_hc => ready_dr_rr(i),
data_out_hc => data_rr_dr(i)(WORD_WIDTH-1 downto 0),
last_word_out_hc => data_rr_dr(i)(WORD_WIDTH)
);
-- Set Alive Signals of Readers to Zero
alive_re_rb(i) <= ('0');
else generate
rtps_writer_inst : entity work.rtps_writer(arch)
generic map (
RELIABILITY_QOS => ENDPOINT_RELIABILITY_QOS(i),
LIVELINESS_QOS => ENDPOINT_LIVELINESS_QOS(i),
DURABILITY_QOS => ENDPOINT_DURABILITY_QOS(i),
DESTINATION_ORDER_QOS => ENDPOINT_DESTINATION_ORDER_QOS(i),
ACKNACK_RESPONSE_DELAY => ENDPOINT_ACKNACK_RESPONSE_DELAY(i),
ACKNACK_SUPPRESSION_DELAY => ENDPOINT_ACKNACK_SUPPRESSION_DELAY(i),
LEASE_DURATION => ENDPOINT_LEASE_DURATION(i),
HEARTBEAT_PERIOD => ENDPOINT_HEARTBEAT_PERIOD(i),
ENTITYID => ENTITYID(i),
WITH_KEY => ENDPOINT_WITH_KEY(i),
PUSH_MODE => ENDPOINT_PUSH_MODE(i),
INLINE_QOS => gen_inline_qos(i),
MAX_REMOTE_ENDPOINTS => MAX_REMOTE_ENDPOINTS
)
port map (
-- SYSTEM
clk => clk,
reset => reset,
time => time,
-- FROM RTPS_HANDLER (USER TRAFFIC)
empty_user => empty_fire_re(i),
rd_user => read_re_fire(i),
data_in_user => data_fire_re(i)(WORD_WIDTH-1 downto 0),
last_word_in_user => data_fire_re(i)(WORD_WIDTH),
-- FROM RTPS_BUILTIN_ENDPOINT (META TRAFFIC)
empty_meta => empty_frbre_re(i),
rd_meta => read_re_frbre(i),
data_in_meta => data_frbre_re(i)(WORD_WIDTH-1 downto 0),
last_word_in_meta => data_frbre_re(i)(WORD_WIDTH),
-- TO RTPS_BUILTIN_ENDPOINT (META TRAFFIC)
alive_sig => alive_re_rb(i),
-- RTPS OUTPUT
full_ro => full_firo_re(i),
wr_ro => write_re_firo(i),
data_out_ro => data_re_firo(i)(WORD_WIDTH-1 downto 0),
last_word_out_ro => data_re_firo(i)(WORD_WIDTH),
-- FROM HC
liveliness_assertion => liveliness_assertion_dw_rw(i-NUM_READERS),
data_available => data_available_dw_rw(i-NUM_READERS),
start_hc => start_rw_dw(i-NUM_READERS),
opcode_hc => opcode_rw_dw(i-NUM_READERS),
ack_hc => ack_dw_rw(i-NUM_READERS),
seq_nr_hc => seq_nr_rw_dw(i-NUM_READERS),
done_hc => done_rw_dw(i-NUM_READERS),
ret_hc => ret_dw_rw(i-NUM_READERS),
get_data_hc => get_data_rw_dw(i-NUM_READERS),
valid_in_hc => valid_dw_rw(i-NUM_READERS),
ready_in_hc => ready_rw_dw(i-NUM_READERS),
data_in_hc => data_dw_rw(i-NUM_READERS)(WORD_WIDTH-1 downto 0),
last_word_in_hc => data_dw_rw(i-NUM_READERS)(WORD_WIDTH),
cc_instance_handle => cc_instance_handle_dw_rw(i-NUM_READERS),
cc_kind => cc_kind_dw_rw(i-NUM_READERS),
cc_source_timestamp => cc_source_timestamp_dw_rw(i-NUM_READERS),
cc_seq_nr => cc_seq_nr_dw_rw(i-NUM_READERS)
);
end generate;
end generate;
dds_endpoint_gen : for i in 0 to NUM_ENDPOINTS-1 generate
dds_endpoint_if : if (i < NUM_READERS) generate
dds_reader_inst : entity work.dds_reader(arch)
generic map (
TIME_BASED_FILTER_QOS => ENDPOINT_TIME_BASED_FILTER_QOS(i),
DEADLINE_QOS => ENDPOINT_DEADLINE_QOS(i),
MAX_INSTANCES => ENDPOINT_MAX_INSTANCES(i),
MAX_SAMPLES_PER_INSTANCE => ENDPOINT_MAX_SAMPLES_PER_INSTANCE(i),
MAX_SAMPLES => ENDPOINT_MAX_SAMPLES(i),
HISTORY_QOS => ENDPOINT_HISTORY_QOS(i),
RELIABILITY_QOS => ENDPOINT_RELIABILITY_QOS(i),
PRESENTATION_QOS => ENDPOINT_PRESENTATION_QOS(i),
DESTINATION_ORDER_QOS => ENDPOINT_DESTINATION_ORDER_QOS(i),
COHERENT_ACCESS => ENDPOINT_COHERENT_ACCESS(i),
ORDERED_ACCESS => ENDPOINT_ORDERED_ACCESS(i),
WITH_KEY => ENDPOINT_WITH_KEY(i),
PAYLOAD_FRAME_SIZE => MAX_TYPE1_SIZE,
MAX_REMOTE_ENDPOINTS => MAX_REMOTE_ENDPOINTS
)
port map (
-- SYSTEM
clk => clk,
reset => reset,
time => time,
-- FROM RTPS ENDPOINT
start_rtps => start_rr_dr(i),
opcode_rtps => opcode_rr_dr(i),
ack_rtps => ack_dr_rr(i),
done_rtps => done_dr_rr(i),
ret_rtps => ret_dr_rr(i),
valid_in_rtps => valid_rr_dr(i),
ready_in_rtps => ready_dr_rr(i),
data_in_rtps => data_rr_dr(i)(WORD_WIDTH-1 downto 0),
last_word_in_rtps => data_rr_dr(i)(WORD_WIDTH),
-- TO USER ENTITY
start_dds => start_ri_dr(i),
ack_dds => ack_dr_ri(i),
opcode_dds => opcode_ri_dr(i),
instance_state_dds => instance_state_ri_dr(i),
view_state_dds => view_state_ri_dr(i),
sample_state_dds => sample_state_ri_dr(i),
instance_handle_dds => instance_handle_ri_dr(i),
max_samples_dds => max_samples_ri_dr(i),
get_data_dds => get_data_ri_dr(i),
done_dds => done_dr_ri(i),
return_code_dds => return_code_dr_ri(i),
valid_out_dds => valid_dr_ri(i),
ready_out_dds => ready_ri_dr(i),
data_out_dds => data_dr_ri(i)(WORD_WIDTH-1 downto 0),
last_word_out_dds => data_dr_ri(i)(WORD_WIDTH),
-- Sample Info
si_sample_state => si_sample_state_dr_ri(i),
si_view_state => si_view_state_dr_ri(i),
si_instance_state => si_instance_state_dr_ri(i),
si_source_timestamp => si_source_timestamp_dr_ri(i),
si_instance_handle => si_instance_handle_dr_ri(i),
si_publication_handle => si_publication_handle_dr_ri(i),
si_disposed_generation_count => si_disposed_generation_count_dr_ri(i),
si_no_writers_generation_count => si_no_writers_generation_count_dr_ri(i),
si_sample_rank => si_sample_rank_dr_ri(i),
si_generation_rank => si_generation_rank_dr_ri(i),
si_absolute_generation_rank => si_absolute_generation_rank_dr_ri(i),
si_valid_data => si_valid_data_dr_ri(i),
si_valid => si_valid_dr_ri(i),
si_ack => si_ack_ri_dr(i),
eoc => eoc_dr_ri(i),
-- Communication Status
status => status_dr_ri(i)
);
else generate
dds_writer_inst : entity work.dds_writer(arch)
generic map (
HISTORY_QOS => ENDPOINT_HISTORY_QOS(i),
DEADLINE_QOS => ENDPOINT_DEADLINE_QOS(i),
LIFESPAN_QOS => ENDPOINT_LIFESPAN_QOS(i),
LEASE_DURATION => ENDPOINT_LEASE_DURATION(i),
WITH_KEY => ENDPOINT_WITH_KEY(i),
MAX_SAMPLES => ENDPOINT_MAX_SAMPLES(i),
MAX_INSTANCES => ENDPOINT_MAX_INSTANCES(i),
MAX_SAMPLES_PER_INSTANCE => ENDPOINT_MAX_SAMPLES_PER_INSTANCE(i),
PAYLOAD_FRAME_SIZE => MAX_TYPE1_SIZE
)
port map (
-- SYSTEM
clk => clk,
reset => reset,
time => time,
-- TO/FROM RTPS ENDPOINT
start_rtps => start_rw_dw(i-NUM_READERS),
opcode_rtps => opcode_rw_dw(i-NUM_READERS),
ack_rtps => ack_dw_rw(i-NUM_READERS),
done_rtps => done_rw_dw(i-NUM_READERS),
ret_rtps => ret_dw_rw(i-NUM_READERS),
seq_nr_rtps => seq_nr_rw_dw(i-NUM_READERS),
get_data_rtps => get_data_rw_dw(i-NUM_READERS),
valid_out_rtps => valid_dw_rw(i-NUM_READERS),
ready_out_rtps => ready_rw_dw(i-NUM_READERS),
data_out_rtps => data_dw_rw(i-NUM_READERS)(WORD_WIDTH-1 downto 0),
last_word_out_rtps => data_dw_rw(i-NUM_READERS)(WORD_WIDTH),
liveliness_assertion => liveliness_assertion_dw_rw(i-NUM_READERS),
data_available => data_available_dw_rw(i-NUM_READERS),
-- Cache Change
cc_instance_handle => cc_instance_handle_dw_rw(i-NUM_READERS),
cc_kind => cc_kind_dw_rw(i-NUM_READERS),
cc_source_timestamp => cc_source_timestamp_dw_rw(i-NUM_READERS),
cc_seq_nr => cc_seq_nr_dw_rw(i-NUM_READERS),
-- TO/FROM USER ENTITY
start_dds => start_wi_dw(i-NUM_READERS),
ack_dds => ack_dw_wi(i-NUM_READERS),
opcode_dds => opcode_wi_dw(i-NUM_READERS),
instance_handle_in_dds => instance_handle_wi_dw(i-NUM_READERS),
source_ts_dds => source_ts_wi_dw(i-NUM_READERS),
max_wait_dds => max_wait_wi_dw(i-NUM_READERS),
done_dds => done_dw_wi(i-NUM_READERS),
return_code_dds => return_code_dw_wi(i-NUM_READERS),
instance_handle_out_dds => instance_handle_dw_wi(i-NUM_READERS),
valid_in_dds => valid_wi_dw(i-NUM_READERS),
ready_in_dds => ready_dw_wi(i-NUM_READERS),
data_in_dds => data_wi_dw(i-NUM_READERS)(WORD_WIDTH-1 downto 0),
last_word_in_dds => data_wi_dw(i-NUM_READERS)(WORD_WIDTH),
valid_out_dds => valid_dw_wi(i-NUM_READERS),
ready_out_dds => ready_wi_dw(i-NUM_READERS),
data_out_dds => data_dw_wi(i-NUM_READERS)(WORD_WIDTH-1 downto 0),
last_word_out_dds => data_dw_wi(i-NUM_READERS)(WORD_WIDTH),
-- Communication Status
status => status_dw_wi(i-NUM_READERS)
);
end generate;
end generate;
fifo_in_ro_gen : for i in 0 to NUM_ENDPOINTS generate
fifo_in_ro_if : if (i = NUM_ENDPOINTS) generate
fifo_in_ro_inst : configuration work.FWFT_FIFO_cfg
generic map (
FIFO_DEPTH => 2,
DATA_WIDTH => WORD_WIDTH+1
)
port map (
-- SYSTEM
reset => reset,
clk => clk,
-- INPUT
full => full_firo_rb,
write => write_rb_firo,
data_in => data_rb_firo,
-- OUTPUT
empty => empty_firo_ro(i),
read => read_ro_firo(i),
data_out(WORD_WIDTH) => last_word_firo_ro(i),
data_out(WORD_WIDTH-1 downto 0) => data_firo_ro(i),
-- MISC
free => open
);
else generate
fifo_in_ro_inst : configuration work.FWFT_FIFO_cfg
generic map (
FIFO_DEPTH => 2,
DATA_WIDTH => WORD_WIDTH+1
)
port map (
-- SYSTEM
reset => reset,
clk => clk,
-- INPUT
full => full_firo_re(i),
write => write_re_firo(i),
data_in => data_re_firo(i),
-- OUTPUT
empty => empty_firo_ro(i),
read => read_ro_firo(i),
data_out(WORD_WIDTH) => last_word_firo_ro(i),
data_out(WORD_WIDTH-1 downto 0) => data_firo_ro(i),
-- MISC
free => open
);
end generate;
end generate;
rtps_out_inst : entity work.rtps_out(arch)
port map (
-- SYSTEM
clk => clk,
reset => reset,
-- INPUT
empty => empty_firo_ro,
rd => read_ro_firo,
data_in => data_firo_ro,
last_word_in => last_word_firo_ro,
-- OUTPUT
full => full,
wr => write,
data_out => data_out
);
--#####################################################################
Type1_reader_wrapper_inst : entity work.Type1_reader_wrapper(arch)
port map (
-- SYSTEM
clk => clk,
reset => reset,
-- FROM DDS READER
start_dds => start_ri_dr(0),
ack_dds => ack_dr_ri(0),
opcode_dds => opcode_ri_dr(0),
instance_state_dds => instance_state_ri_dr(0),
view_state_dds => view_state_ri_dr(0),
sample_state_dds => sample_state_ri_dr(0),
instance_handle_dds => instance_handle_ri_dr(0),
max_samples_dds => max_samples_ri_dr(0),
get_data_dds => get_data_ri_dr(0),
done_dds => done_dr_ri(0),
return_code_dds => return_code_dr_ri(0),
valid_in_dds => valid_dr_ri(0),
ready_in_dds => ready_ri_dr(0),
data_in_dds => data_dr_ri(0)(WORD_WIDTH-1 downto 0),
last_word_in_dds => data_dr_ri(0)(WORD_WIDTH),
-- Sample Info
si_sample_state_dds => si_sample_state_dr_ri(0),
si_view_state_dds => si_view_state_dr_ri(0),
si_instance_state_dds => si_instance_state_dr_ri(0),
si_source_timestamp_dds => si_source_timestamp_dr_ri(0),
si_instance_handle_dds => si_instance_handle_dr_ri(0),
si_publication_handle_dds => si_publication_handle_dr_ri(0),
si_disposed_generation_count_dds => si_disposed_generation_count_dr_ri(0),
si_no_writers_generation_count_dds => si_no_writers_generation_count_dr_ri(0),
si_sample_rank_dds => si_sample_rank_dr_ri(0),
si_generation_rank_dds => si_generation_rank_dr_ri(0),
si_absolute_generation_rank_dds => si_absolute_generation_rank_dr_ri(0),
si_valid_data_dds => si_valid_data_dr_ri(0),
si_valid_dds => si_valid_dr_ri(0),
si_ack_dds => si_ack_ri_dr(0),
eoc_dds => eoc_dr_ri(0),
-- Communication Status
status_dds => status_dr_ri(0),
-- TO USER ENTITY
start_user => start_user_ri,
ack_user => ack_ri_user,
opcode_user => opcode_user_ri,
instance_state_user => instance_state_user_ri,
view_state_user => view_state_user_ri,
sample_state_user => sample_state_user_ri,
instance_handle_user => instance_handle_user_ri,
max_samples_user => max_samples_user_ri,
get_data_user => get_data_user_ri,
done_user => done_ri_user,
return_code_user => return_code_ri_user,
-- Sample Info
si_sample_state_user => si_sample_state_ri_user,
si_view_state_user => si_view_state_ri_user,
si_instance_state_user => si_instance_state_ri_user,
si_source_timestamp_user => si_source_timestamp_ri_user,
si_instance_handle_user => si_instance_handle_ri_user,
si_publication_handle_user => si_publication_handle_ri_user,
si_disposed_generation_count_user => si_disposed_generation_count_ri_user,
si_no_writers_generation_count_user => si_no_writers_generation_count_ri_user,
si_sample_rank_user => si_sample_rank_ri_user,
si_generation_rank_user => si_generation_rank_ri_user,
si_absolute_generation_rank_user => si_absolute_generation_rank_ri_user,
si_valid_data_user => si_valid_data_ri_user,
si_valid_user => si_valid_ri_user,
si_ack_user => si_ack_user_ri,
eoc_user => eoc_ri_user,
-- Communication Status
status_user => status_ri_user,
decode_error => decode_error_ri_user,
-- ###GENERATED START###
id => id_ri_user,
a => a_ri_user,
-- ###GENERATED END###
valid => valid_ri_user
);
Type1_writer_wrapper_inst : entity work.Type1_writer_wrapper(arch)
port map (
-- SYSTEM
clk => clk,
reset => reset,
-- FROM DDS WRITER
start_dds => start_wi_dw(0),
ack_dds => ack_dw_wi(0),
opcode_dds => opcode_wi_dw(0),
instance_handle_in_dds => instance_handle_dw_wi(0),
source_ts_dds => source_ts_wi_dw(0),
max_wait_dds => max_wait_wi_dw(0),
done_dds => done_dw_wi(0),
return_code_dds => return_code_dw_wi(0),
instance_handle_out_dds => instance_handle_wi_dw(0),
valid_out_dds => valid_wi_dw(0),
ready_out_dds => ready_dw_wi(0),
data_out_dds => data_wi_dw(0)(WORD_WIDTH-1 downto 0),
last_word_out_dds => data_wi_dw(0)(WORD_WIDTH),
valid_in_dds => valid_dw_wi(0),
ready_in_dds => ready_wi_dw(0),
data_in_dds => data_dw_wi(0)(WORD_WIDTH-1 downto 0),
last_word_in_dds => data_dw_wi(0)(WORD_WIDTH),
-- Communication Status
status_dds => status_dw_wi(0),
-- TO USER ENTITY
start_user => start_user_wi,
ack_user => ack_wi_user,
opcode_user => opcode_user_wi,
instance_handle_in_user => instance_handle_user_wi,
source_ts_user => source_ts_user_wi,
max_wait_user => max_wait_user_wi,
done_user => done_wi_user,
return_code_user => return_code_wi_user,
instance_handle_out_user => instance_handle_wi_user,
-- Communication Status
status_user => status_wi_user,
-- ###GENERATED START###
id => id_user_wi,
a => a_user_wi,
-- ###GENERATED END###
encode_done => encode_done_wi_user
);
test_loopback_inst : entity work.test_loopback(arch)
port map (
-- SYSTEM
clk => clk,
reset => reset,
-- READER
start_r => start_user_ri,
ack_r => ack_ri_user,
opcode_r => opcode_user_ri,
instance_state_r => instance_state_user_ri,
view_state_r => view_state_user_ri,
sample_state_r => sample_state_user_ri,
instance_handle_r => instance_handle_user_ri,
max_samples_r => max_samples_user_ri,
get_data_r => get_data_user_ri,
done_r => done_ri_user,
return_code_r => return_code_ri_user,
si_sample_state_r => si_sample_state_ri_user,
si_view_state_r => si_view_state_ri_user,
si_instance_state_r => si_instance_state_ri_user,
si_source_timestamp_r => si_source_timestamp_ri_user,
si_instance_handle_r => si_instance_handle_ri_user,
si_publication_handle_r => si_publication_handle_ri_user,
si_disposed_generation_count_r => si_disposed_generation_count_ri_user,
si_no_writers_generation_count_r => si_no_writers_generation_count_ri_user,
si_sample_rank_r => si_sample_rank_ri_user,
si_generation_rank_r => si_generation_rank_ri_user,
si_absolute_generation_rank_r => si_absolute_generation_rank_ri_user,
si_valid_data_r => si_valid_data_ri_user,
si_valid_r => si_valid_ri_user,
si_ack_r => si_ack_user_ri,
eoc_r => eoc_ri_user,
status_r => status_ri_user,
decode_error_r => decode_error_ri_user,
id_r => id_ri_user,
a_r => a_ri_user,
valid_r => valid_ri_user,
-- WRITER
start_w => start_user_wi,
ack_w => ack_wi_user,
opcode_w => opcode_user_wi,
instance_handle_out_w => instance_handle_user_wi,
source_ts_w => source_ts_user_wi,
max_wait_w => max_wait_user_wi,
done_w => done_wi_user,
return_code_w => return_code_wi_user,
instance_handle_in_w => instance_handle_wi_user,
status_w => status_wi_user,
id_w => id_user_wi,
a_w => a_user_wi,
encode_done_w => encode_done_wi_user
);
end architecture;

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@ -0,0 +1,130 @@
library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;
use work.rtps_package.all;
package user_config is
--*****USER CONFIG*****
-- NOTE: All strings have to be padded to 256 characters
-- Period of system clock
constant CLOCK_PERIOD : time := 50 ns;
-- Maximum number of supported remote Participants (Affects generated Memory Size)
constant MAX_REMOTE_PARTICIPANTS : natural := 50;
-- Maximum number of supported remote Endpoints (Affects generated Memory Size)
constant MAX_REMOTE_ENDPOINTS : natural := 50;
-- Unicast IPv4 Address used by all RTPS Entities [Default 192.168.0.90]
constant DEFAULT_IPv4_ADDRESS : std_logic_vector(IPv4_ADDRESS_WIDTH-1 downto 0) := x"C0A8005A";
-- Number of RTPS Writer Endpoints
constant NUM_WRITERS : natural := 1;
-- Number of RTPS Reader Endpoints
constant NUM_READERS : natural := 1;
-- Number of RTPS Endpoints (Do not modify)
constant NUM_ENDPOINTS : natural := NUM_READERS+NUM_WRITERS;
-- PB Value of Default Port Generation (see DDSI-RTPS 2.3 Section 9.6.1)
constant PORT_CONFIG_PB : natural := 7400;
-- DG Value of Default Port Generation (see DDSI-RTPS 2.3 Section 9.6.1)
constant PORT_CONFIG_DG : natural := 250;
-- PG Value of Default Port Generation (see DDSI-RTPS 2.3 Section 9.6.1)
constant PORT_CONFIG_PG : natural := 2;
-- D0 Value of Default Port Generation (see DDSI-RTPS 2.3 Section 9.6.1)
constant PORT_CONFIG_D0 : natural := 0;
-- D1 Value of Default Port Generation (see DDSI-RTPS 2.3 Section 9.6.1)
constant PORT_CONFIG_D1 : natural := 10;
-- D2 Value of Default Port Generation (see DDSI-RTPS 2.3 Section 9.6.1)
constant PORT_CONFIG_D2 : natural := 1;
-- D3 Value of Default Port Generation (see DDSI-RTPS 2.3 Section 9.6.1)
constant PORT_CONFIG_D3 : natural := 11;
-- MAC Address of underlying network stack (Used to generate GUIDs)
constant MAC_ADDRESS : std_logic_vector(47 downto 0) := x"897598452067";
-- Domain ID
constant USER_DOMAIN_ID : natural := 1;
-- Domain TAG
constant USER_DOMAIN_TAG : string(1 to 256) := (others => NUL); --""
--***RTPS ENDPOINTS***
-- Array denoting if Endpoints use Keyed Topics
constant ENDPOINT_WITH_KEY : USER_BOOLEAN_ARRAY_TYPE(0 to NUM_ENDPOINTS-1) := (others => TRUE);
-- Array denoting which mode the Endpoints are operating with
constant ENDPOINT_PUSH_MODE : USER_BOOLEAN_ARRAY_TYPE(0 to NUM_ENDPOINTS-1) := (others => TRUE);
-- Array mapping Topic Names to Endpoints
constant ENDPOINT_TOPIC_STRING : USER_STRING_ARRAY_TYPE(0 to NUM_ENDPOINTS-1) := (others => "Topic1" & (7 to 256 => NUL));
-- Array mapping Type Names to Endpoints
constant ENDPOINT_TYPE_STRING : USER_STRING_ARRAY_TYPE(0 to NUM_ENDPOINTS-1) := (others => "Type1" & (6 to 256 => NUL));
-- *TIMING CHARACTERISTICS*
-- Timing Characteristics for Participant
constant PARTICIPANT_ANNOUNCEMENT_PERIOD : DURATION_TYPE := gen_duration(0,50000); -- 50k ns
constant PARTICIPANT_LEASE_DURATION : DURATION_TYPE := DEFAULT_PARTICIPANT_LEASE_DURATION;
-- Denotes how much faster then the deadline/period we schedule in order to account for transport delay.
constant DURATION_DELTA : DURATION_TYPE := gen_duration(0, 100); -- 100 ns
-- Timing Characteristics for built-in Endpoints
constant PARTICIPANT_HEARTBEAT_PERIOD : DURATION_TYPE := gen_duration(0,40000); -- 40k ns
constant PARTICIPANT_HEARTBEAT_RESPONSE_DELAY : DURATION_TYPE := gen_duration(0,500); -- 500 ns
constant PARTICIPANT_HEARTBEAT_SUPPRESSION_DELAY : DURATION_TYPE := gen_duration(0,100); -- 100 ns
constant PARTICIPANT_ACKNACK_RESPONSE_DELAY : DURATION_TYPE := gen_duration(0,500); -- 500 ns
constant PARTICIPANT_ACKNACK_SUPPRESSION_DELAY : DURATION_TYPE := gen_duration(0,100); -- 100 ns
-- Array mapping Timing Characteristics to Endpoints
constant ENDPOINT_HEARTBEAT_PERIOD : USER_DURATION_ARRAY_TYPE(0 to NUM_ENDPOINTS-1) := (others => gen_duration(0,10000)); -- 10k ns
constant ENDPOINT_HEARTBEAT_RESPONSE_DELAY : USER_DURATION_ARRAY_TYPE(0 to NUM_ENDPOINTS-1) := (others => gen_duration(0,500)); -- 500 ns
constant ENDPOINT_HEARTBEAT_SUPPRESSION_DELAY : USER_DURATION_ARRAY_TYPE(0 to NUM_ENDPOINTS-1) := (others => gen_duration(0,100)); -- 100 ns
constant ENDPOINT_ACKNACK_RESPONSE_DELAY : USER_DURATION_ARRAY_TYPE(0 to NUM_ENDPOINTS-1) := (others => gen_duration(0,500)); -- 500 ns
constant ENDPOINT_ACKNACK_SUPPRESSION_DELAY : USER_DURATION_ARRAY_TYPE(0 to NUM_ENDPOINTS-1) := (others => gen_duration(0,100)); -- 100 ns
--***ENDPOINT DDS QOS***
-- Array mapping DURABILITY QoS to Endpoints
constant ENDPOINT_DURABILITY_QOS : USER_ENUMERATION_ARRAY_TYPE(0 to NUM_ENDPOINTS-1) := (others => TRANSIENT_LOCAL_DURABILITY_QOS);
-- Array mapping DURABILITY SERVICE QoS to Endpoints
constant ENDPOINT_DURABILITY_SERVICE_CLEANUP_DELAY : USER_DURATION_ARRAY_TYPE(0 to NUM_ENDPOINTS-1) := (others => DEFAULT_DURABILITY_SERVICE_CLEANUP_DELAY);
constant ENDPOINT_DURABILITY_SERVICE_HISTORY : USER_LONG_ARRAY_TYPE(0 to NUM_ENDPOINTS-1) := (others => DEFAULT_DURABILITY_SERVICE_HISTORY);
constant ENDPOINT_DURABILITY_SERVICE_HISTORY_DEPTH : USER_LONG_ARRAY_TYPE(0 to NUM_ENDPOINTS-1) := (others => DEFAULT_DURABILITY_SERVICE_HISTORY_DEPTH);
constant ENDPOINT_DURABILITY_SERVICE_MAX_SAMPLES : USER_LONG_ARRAY_TYPE(0 to NUM_ENDPOINTS-1) := (others => DEFAULT_DURABILITY_SERVICE_MAX_SAMPLES);
constant ENDPOINT_DURABILITY_SERVICE_MAX_INSTANCES : USER_LONG_ARRAY_TYPE(0 to NUM_ENDPOINTS-1) := (others => DEFAULT_DURABILITY_SERVICE_MAX_INSTANCES);
constant ENDPOINT_DURABILITY_SERVICE_MAX_SAMPLES_PER_INSTANCE : USER_LONG_ARRAY_TYPE(0 to NUM_ENDPOINTS-1) := (others => DEFAULT_DURABILITY_SERVICE_MAX_SAMPLES_PER_INSTANCE);
-- Array mapping PRESENTATION QoS to Endpoints
constant ENDPOINT_PRESENTATION_QOS : USER_ENUMERATION_ARRAY_TYPE(0 to NUM_ENDPOINTS-1) := (others => DEFAULT_PRESENTATION_QOS);
constant ENDPOINT_COHERENT_ACCESS : USER_BOOLEAN_ARRAY_TYPE(0 to NUM_ENDPOINTS-1) := (others => DEFAULT_COHERENT_ACCESS);
constant ENDPOINT_ORDERED_ACCESS : USER_BOOLEAN_ARRAY_TYPE(0 to NUM_ENDPOINTS-1) := (others => DEFAULT_ORDERED_ACCESS);
-- Array mapping DEADLINE QoS to Endpoints
constant ENDPOINT_DEADLINE_QOS : USER_DURATION_ARRAY_TYPE(0 to NUM_ENDPOINTS-1) := (others => DEFAULT_DEADLINE_QOS);
-- Array mapping LATENCY_BUDGET QoS to Endpoints
constant ENDPOINT_LATENCY_BUDGET_QOS : USER_DURATION_ARRAY_TYPE(0 to NUM_ENDPOINTS-1) := (others => DEFAULT_LATENCY_BUDGET_QOS);
-- Array mapping OWNERSHIP QoS to Endpoints
constant ENDPOINT_OWNERSHIP_QOS : USER_ENUMERATION_ARRAY_TYPE(0 to NUM_ENDPOINTS-1) := (others => DEFAULT_OWNERSHIP_QOS);
-- Array mapping OWNERSHIP_STRENGTH QoS to Endpoints (Only relevant to Writers)
constant ENDPOINT_OWNERSHIP_STRENGTH_QOS : USER_LONG_ARRAY_TYPE(0 to NUM_ENDPOINTS-1) := (others => DEFAULT_OWNERSHIP_STRENGTH_QOS);
-- Array mapping LIVELINESS QoS to Endpoints
constant ENDPOINT_LIVELINESS_QOS : USER_ENUMERATION_ARRAY_TYPE(0 to NUM_ENDPOINTS-1) := (others => DEFAULT_LIVELINESS_QOS);
constant ENDPOINT_LEASE_DURATION : USER_DURATION_ARRAY_TYPE(0 to NUM_ENDPOINTS-1) := (others => DEFAULT_LEASE_DURATION);
-- Array mapping TIME_BASED_FILTER QoS to Endpoints (Only relevant to Readers)
constant ENDPOINT_TIME_BASED_FILTER_QOS : USER_DURATION_ARRAY_TYPE(0 to NUM_ENDPOINTS-1) := (others => DEFAULT_TIME_BASED_FILTER_QOS);
-- XXX: PARTITION QoS Ignored
-- Array mapping RELIABILITY QoS to Endpoints
constant ENDPOINT_RELIABILITY_QOS : USER_ENUMERATION_ARRAY_TYPE(0 to NUM_ENDPOINTS-1) := (others => DEFAULT_RELIABILITY_QOS);
-- (Only relevant to Writers)
constant ENDPOINT_MAX_BLOCKING_TIME : USER_DURATION_ARRAY_TYPE(0 to NUM_ENDPOINTS-1) := (others => DEFAULT_MAX_BLOCKING_TIME);
-- Array mapping TRANSPORT_PRIORITY QoS to Endpoints (Only relevant to Writers)
constant ENDPOINT_TRANSPORT_PRIORITY_QOS : USER_LONG_ARRAY_TYPE(0 to NUM_ENDPOINTS-1) := (others => DEFAULT_TRANSPORT_PRIORITY_QOS);
-- Array mapping LIFESPAN QoS to Endpoints (Only relevant to Writers)
constant ENDPOINT_LIFESPAN_QOS : USER_DURATION_ARRAY_TYPE(0 to NUM_ENDPOINTS-1) := (others => DEFAULT_LIFESPAN_QOS);
-- Array mapping DESTINATION_ORDER QoS to Endpoints
constant ENDPOINT_DESTINATION_ORDER_QOS : USER_ENUMERATION_ARRAY_TYPE(0 to NUM_ENDPOINTS-1) := (others => DEFAULT_DESTINATION_ORDER_QOS);
-- Array mapping HISTORY QoS to Endpoints
constant ENDPOINT_HISTORY_QOS : USER_ENUMERATION_ARRAY_TYPE(0 to NUM_ENDPOINTS-1) := (others => DEFAULT_HISTORY_QOS);
constant ENDPOINT_HISTORY_DEPTH : USER_LONG_ARRAY_TYPE(0 to NUM_ENDPOINTS-1) := (others => std_logic_vector(to_unsigned(5, CDR_LONG_WIDTH)));
-- Array mapping RESOURCE_LIMITS QoS to Endpoints
constant ENDPOINT_MAX_SAMPLES : USER_LONG_ARRAY_TYPE(0 to NUM_ENDPOINTS-1) := (others => std_logic_vector(to_unsigned(20, CDR_LONG_WIDTH)));
constant ENDPOINT_MAX_INSTANCES : USER_LONG_ARRAY_TYPE(0 to NUM_ENDPOINTS-1) := (others => std_logic_vector(to_unsigned(5, CDR_LONG_WIDTH)));
constant ENDPOINT_MAX_SAMPLES_PER_INSTANCE : USER_LONG_ARRAY_TYPE(0 to NUM_ENDPOINTS-1) := (others => DEFAULT_MAX_SAMPLES_PER_INSTANCE);
-- XXX: ENTITY_FACTORY QoS Ignored
-- Array mapping WRITER_DATA_LIFECYCLE QoS to Endpoints (Only relevant to Writers)
constant ENDPOINT_AUTODISPOSE_UNREGISTERED_INSTANCES : USER_BOOLEAN_ARRAY_TYPE(0 to NUM_ENDPOINTS-1) := (others => DEFAULT_AUTODISPOSE_UNREGISTERED_INSTANCES);
-- Array mapping Reader_DATA_LIFECYCLE QoS to Endpoints (Only relevant to Readers)
constant ENDPOINT_AUTOPURGE_NOWRITER_SAMPLES_DELAY : USER_DURATION_ARRAY_TYPE(0 to NUM_ENDPOINTS-1) := (others => DEFAULT_AUTOPURGE_NOWRITER_SAMPLES_DELAY);
constant ENDPOINT_AUTOPURGE_DISPOSED_SAMPLES_DELAY : USER_DURATION_ARRAY_TYPE(0 to NUM_ENDPOINTS-1) := (others => DEFAULT_AUTOPURGE_DISPOSED_SAMPLES_DELAY);
-- Set to TRUE for Simulation Testing (Extra Code generated)
constant SIMULATION_FLAG : boolean := TRUE;
end package;

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@ -0,0 +1,718 @@
-- altera vhdl_input_version vhdl_2008
-- XXX: QSYS Fix (https://www.intel.com/content/www/us/en/support/programmable/articles/000079458.html)
library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;
use work.rtps_package.all;
use work.user_config.all;
use work.rtps_config_package.all;
use work.rtps_test_package.all;
use work.Type1_package.all;
entity L2_Testbench_Lib5 is
port (
-- SYSTEM
clk : in std_logic;
reset : in std_logic;
time : in TIME_TYPE;
-- INPUT
empty : in std_logic;
read : out std_logic;
data_in : in std_logic_vector(WORD_WIDTH-1 downto 0);
-- OUTPUT
full : in std_logic;
write : out std_logic;
data_out : out std_logic_vector(WORD_WIDTH-1 downto 0);
-- READER
start_r : in std_logic;
ack_r : out std_logic;
opcode_r : in DDS_READER_OPCODE_TYPE;
instance_state_r : in std_logic_vector(INSTANCE_STATE_KIND_WIDTH-1 downto 0);
view_state_r : in std_logic_vector(VIEW_STATE_KIND_WIDTH-1 downto 0);
sample_state_r : in std_logic_vector(SAMPLE_STATE_KIND_WIDTH-1 downto 0);
instance_handle_r : in INSTANCE_HANDLE_TYPE;
max_samples_r : in std_logic_vector(MAX_SAMPLES_WIDTH-1 downto 0);
get_data_r : in std_logic;
done_r : out std_logic;
return_code_r : out std_logic_vector(RETURN_CODE_WIDTH-1 downto 0);
si_sample_state_r : out std_logic_vector(SAMPLE_STATE_KIND_WIDTH-1 downto 0);
si_view_state_r : out std_logic_vector(VIEW_STATE_KIND_WIDTH-1 downto 0);
si_instance_state_r : out std_logic_vector(INSTANCE_STATE_KIND_WIDTH-1 downto 0);
si_source_timestamp_r : out TIME_TYPE;
si_instance_handle_r : out INSTANCE_HANDLE_TYPE;
si_publication_handle_r : out INSTANCE_HANDLE_TYPE;
si_disposed_generation_count_r : out std_logic_vector(DISPOSED_GENERATION_COUNT_WIDTH-1 downto 0);
si_no_writers_generation_count_r : out std_logic_vector(NO_WRITERS_GENERATION_COUNT_WIDTH-1 downto 0);
si_sample_rank_r : out std_logic_vector(SAMPLE_RANK_WIDTH-1 downto 0);
si_generation_rank_r : out std_logic_vector(GENERATION_RANK_WIDTH-1 downto 0);
si_absolute_generation_rank_r : out std_logic_vector(ABSOLUTE_GENERATION_COUNT_WIDTH-1 downto 0);
si_valid_data_r : out std_logic;
si_valid_r : out std_logic;
si_ack_r : in std_logic;
eoc_r : out std_logic;
status_r : out std_logic_vector(STATUS_KIND_WIDTH-1 downto 0);
decode_error_r : out std_logic;
id_r : out std_logic_vector(CDR_LONG_WIDTH-1 downto 0);
a_r : out std_logic_vector(CDR_LONG_WIDTH-1 downto 0);
valid_r : out std_logic;
-- WRITER
start_w : in std_logic;
ack_w : out std_logic;
opcode_w : in DDS_WRITER_OPCODE_TYPE;
instance_handle_in_w : in INSTANCE_HANDLE_TYPE;
source_ts_w : in TIME_TYPE;
max_wait_w : in DURATION_TYPE;
done_w : out std_logic;
return_code_w : out std_logic_vector(RETURN_CODE_WIDTH-1 downto 0);
instance_handle_out_w : out INSTANCE_HANDLE_TYPE;
status_w : out std_logic_vector(STATUS_KIND_WIDTH-1 downto 0);
id_w : in std_logic_vector(CDR_LONG_WIDTH-1 downto 0);
a_w : in std_logic_vector(CDR_LONG_WIDTH-1 downto 0);
encode_done_w : out std_logic
);
end entity;
architecture arch of L2_Testbench_Lib5 is
-- TODO: Better Names?
type EARRAY_DATA_TYPE is array (0 to NUM_ENDPOINTS-1) of std_logic_vector(WORD_WIDTH downto 0);
type HISTORY_CACHE_OPCODE_RARRAY_TYPE is array (0 to NUM_READERS-1) of HISTORY_CACHE_OPCODE_TYPE;
type HISTORY_CACHE_OPCODE_WARRAY_TYPE is array (0 to NUM_WRITERS-1) of HISTORY_CACHE_OPCODE_TYPE;
type HISTORY_CACHE_RESPONSE_RARRAY_TYPE is array (0 to NUM_READERS-1) of HISTORY_CACHE_RESPONSE_TYPE;
type HISTORY_CACHE_RESPONSE_WARRAY_TYPE is array (0 to NUM_WRITERS-1) of HISTORY_CACHE_RESPONSE_TYPE;
type RARRAY_DATA_TYPE is array (0 to NUM_READERS-1) of std_logic_vector(WORD_WIDTH downto 0);
type WARRAY_DATA_TYPE is array (0 to NUM_WRITERS-1) of std_logic_vector(WORD_WIDTH downto 0);
type SEQUENCENUMBER_WARRAY_TYPE is array (0 to NUM_WRITERS-1) of SEQUENCENUMBER_TYPE;
type INSTANCE_HANDLE_RARRAY_TYPE is array (0 to NUM_READERS-1) of INSTANCE_HANDLE_TYPE;
type INSTANCE_HANDLE_WARRAY_TYPE is array (0 to NUM_WRITERS-1) of INSTANCE_HANDLE_TYPE;
type CACHE_CHANGE_KIND_WARRAY_TYPE is array (0 to NUM_WRITERS-1) of CACHE_CHANGE_KIND_TYPE;
type TIME_RARRAY_TYPE is array (0 to NUM_READERS-1) of TIME_TYPE;
type TIME_WARRAY_TYPE is array (0 to NUM_WRITERS-1) of TIME_TYPE;
type DDS_READER_OPCODE_RARRAY_TYPE is array (0 to NUM_READERS-1) of DDS_READER_OPCODE_TYPE;
type DDS_WRITER_OPCODE_WARRAY_TYPE is array (0 to NUM_WRITERS-1) of DDS_WRITER_OPCODE_TYPE;
type INSTANCE_STATE_RARRAY_TYPE is array (0 to NUM_READERS-1) of std_logic_vector(INSTANCE_STATE_KIND_WIDTH-1 downto 0);
type VIEW_STATE_RARRAY_TYPE is array (0 to NUM_READERS-1) of std_logic_vector(VIEW_STATE_KIND_WIDTH-1 downto 0);
type SAMPLE_STATE_RARRAY_TYPE is array (0 to NUM_READERS-1) of std_logic_vector(SAMPLE_STATE_KIND_WIDTH-1 downto 0);
type MAX_SAMPLES_RARRAY_TYPE is array (0 to NUM_READERS-1) of std_logic_vector(MAX_SAMPLES_WIDTH-1 downto 0);
type RETURN_CODE_RARRAY_TYPE is array (0 to NUM_READERS-1) of std_logic_vector(RETURN_CODE_WIDTH-1 downto 0);
type RETURN_CODE_WARRAY_TYPE is array (0 to NUM_WRITERS-1) of std_logic_vector(RETURN_CODE_WIDTH-1 downto 0);
type DISPOSED_GENERATION_COUNT_RARRAY_TYPE is array (0 to NUM_READERS-1) of std_logic_vector(DISPOSED_GENERATION_COUNT_WIDTH-1 downto 0);
type NO_WRITERS_GENERATION_COUNT_RARRAY_TYPE is array (0 to NUM_READERS-1) of std_logic_vector(NO_WRITERS_GENERATION_COUNT_WIDTH-1 downto 0);
type SAMPLE_RANK_RARRAY_TYPE is array (0 to NUM_READERS-1) of std_logic_vector(SAMPLE_RANK_WIDTH-1 downto 0);
type GENERATION_RANK_RARRAY_TYPE is array (0 to NUM_READERS-1) of std_logic_vector(GENERATION_RANK_WIDTH-1 downto 0);
type ABSOLUTE_GENERATION_RANK_RARRAY_TYPE is array (0 to NUM_READERS-1) of std_logic_vector(ABSOLUTE_GENERATION_COUNT_WIDTH-1 downto 0);
type STATUS_KIND_RARRAY_TYPE is array (0 to NUM_READERS-1) of std_logic_vector(STATUS_KIND_WIDTH-1 downto 0);
type STATUS_KIND_WARRAY_TYPE is array (0 to NUM_WRITERS-1) of std_logic_vector(STATUS_KIND_WIDTH-1 downto 0);
type DURATION_WARRAY_TYPE is array (0 to NUM_WRITERS-1) of DURATION_TYPE;
signal full_fire_rh, write_rh_fire : std_logic_vector(0 to NUM_ENDPOINTS-1);
signal data_rh_fire, data_rh_firb : std_logic_vector(WORD_WIDTH downto 0);
signal full_firb_rh, write_rh_firb : std_logic;
signal read_rb_firb, empty_firb_rb : std_logic;
signal data_firb_rb : std_logic_vector(WORD_WIDTH downto 0);
signal read_re_fire, empty_fire_re : std_logic_vector(0 to NUM_ENDPOINTS);
signal data_fire_re : EARRAY_DATA_TYPE;
signal alive_re_rb, full_frbre_re, write_rb_frbre : std_logic_vector(0 to NUM_ENDPOINTS-1);
signal data_rb_frbre , data_rb_firo : std_logic_vector(WORD_WIDTH downto 0);
signal full_firo_rb, write_rb_firo : std_logic;
signal empty_frbre_re, read_re_frbre : std_logic_vector(0 to NUM_ENDPOINTS-1);
signal data_frbre_re : EARRAY_DATA_TYPE;
signal full_firo_re, write_re_firo : std_logic_vector(0 to NUM_ENDPOINTS-1);
signal data_re_firo : EARRAY_DATA_TYPE;
signal start_rr_dr, ack_dr_rr, done_dr_rr, valid_rr_dr, ready_dr_rr : std_logic_vector(0 to NUM_READERS-1);
signal opcode_rr_dr : HISTORY_CACHE_OPCODE_RARRAY_TYPE;
signal ret_dr_rr : HISTORY_CACHE_RESPONSE_RARRAY_TYPE;
signal data_rr_dr : RARRAY_DATA_TYPE;
signal liveliness_assertion_dw_rw, data_available_dw_rw, start_rw_dw, ack_dw_rw, done_rw_dw, get_data_rw_dw, valid_dw_rw, ready_rw_dw : std_logic_vector(0 to NUM_WRITERS-1);
signal opcode_rw_dw : HISTORY_CACHE_OPCODE_WARRAY_TYPE;
signal seq_nr_rw_dw, cc_seq_nr_dw_rw : SEQUENCENUMBER_WARRAY_TYPE;
signal ret_dw_rw : HISTORY_CACHE_RESPONSE_WARRAY_TYPE;
signal data_dw_rw : WARRAY_DATA_TYPE;
signal cc_instance_handle_dw_rw : INSTANCE_HANDLE_WARRAY_TYPE;
signal cc_kind_dw_rw : CACHE_CHANGE_KIND_WARRAY_TYPE;
signal cc_source_timestamp_dw_rw : TIME_WARRAY_TYPE;
signal start_ri_dr, ack_dr_ri, get_data_ri_dr, done_dr_ri, ready_ri_dr, valid_dr_ri, si_valid_data_dr_ri, si_valid_dr_ri, si_ack_ri_dr, eoc_dr_ri : std_logic_vector(0 to NUM_READERS-1);
signal opcode_ri_dr : DDS_READER_OPCODE_RARRAY_TYPE;
signal instance_state_ri_dr, si_instance_state_dr_ri : INSTANCE_STATE_RARRAY_TYPE;
signal view_state_ri_dr, si_view_state_dr_ri : VIEW_STATE_RARRAY_TYPE;
signal sample_state_ri_dr, si_sample_state_dr_ri : SAMPLE_STATE_RARRAY_TYPE;
signal instance_handle_ri_dr, si_instance_handle_dr_ri, si_publication_handle_dr_ri : INSTANCE_HANDLE_RARRAY_TYPE;
signal max_samples_ri_dr : MAX_SAMPLES_RARRAY_TYPE;
signal return_code_dr_ri : RETURN_CODE_RARRAY_TYPE;
signal data_dr_ri : RARRAY_DATA_TYPE;
signal si_source_timestamp_dr_ri : TIME_RARRAY_TYPE;
signal si_disposed_generation_count_dr_ri : DISPOSED_GENERATION_COUNT_RARRAY_TYPE;
signal si_no_writers_generation_count_dr_ri : NO_WRITERS_GENERATION_COUNT_RARRAY_TYPE;
signal si_sample_rank_dr_ri : SAMPLE_RANK_RARRAY_TYPE;
signal si_generation_rank_dr_ri : GENERATION_RANK_RARRAY_TYPE;
signal si_absolute_generation_rank_dr_ri : ABSOLUTE_GENERATION_RANK_RARRAY_TYPE;
signal status_dr_ri : STATUS_KIND_RARRAY_TYPE;
signal start_wi_dw, ack_dw_wi, done_dw_wi, valid_wi_dw, valid_dw_wi, ready_wi_dw, ready_dw_wi : std_logic_vector(0 to NUM_WRITERS-1);
signal opcode_wi_dw : DDS_WRITER_OPCODE_WARRAY_TYPE;
signal instance_handle_wi_dw, instance_handle_dw_wi : INSTANCE_HANDLE_WARRAY_TYPE;
signal source_ts_wi_dw : TIME_WARRAY_TYPE;
signal max_wait_wi_dw : DURATION_WARRAY_TYPE;
signal return_code_dw_wi : RETURN_CODE_WARRAY_TYPE;
signal data_dw_wi, data_wi_dw : WARRAY_DATA_TYPE;
signal status_dw_wi : STATUS_KIND_WARRAY_TYPE;
signal empty_firo_ro, read_ro_firo, last_word_firo_ro : std_logic_vector(0 to NUM_ENDPOINTS);
signal data_firo_ro : RTPS_OUT_DATA_TYPE;
begin
rtps_handler_inst : entity work.rtps_handler(arch)
port map (
-- SYSTEM
clk => clk,
reset => reset,
-- INPUT
empty => empty,
rd => read,
data_in => data_in,
-- TO BUILTIN ENDPOINT
full_be => full_firb_rh,
wr_be => write_rh_firb,
data_out_be => data_rh_firb(WORD_WIDTH-1 downto 0),
last_word_out_be => data_rh_firb(WORD_WIDTH),
-- TO USER ENDPOINTS
full_ue => full_fire_rh,
wr_ue => write_rh_fire,
data_out_ue => data_rh_fire(WORD_WIDTH-1 downto 0),
last_word_out_ue => data_rh_fire(WORD_WIDTH)
);
fifo_in_rb_inst : configuration work.FWFT_FIFO_cfg
generic map (
FIFO_DEPTH => 2,
DATA_WIDTH => WORD_WIDTH+1
)
port map (
-- SYSTEM
reset => reset,
clk => clk,
-- INPUT
full => full_firb_rh,
write => write_rh_firb,
data_in => data_rh_firb,
-- OUTPUT
empty => empty_firb_rb,
read => read_rb_firb,
data_out => data_firb_rb,
-- MISC
free => open
);
fifo_in_re_gen : for i in 0 to NUM_ENDPOINTS-1 generate
fifo_in_re_inst : configuration work.FWFT_FIFO_cfg
generic map (
FIFO_DEPTH => 2,
DATA_WIDTH => WORD_WIDTH+1
)
port map (
-- SYSTEM
reset => reset,
clk => clk,
-- INPUT
full => full_fire_rh(i),
write => write_rh_fire(i),
data_in => data_rh_fire, -- Multicast
-- OUTPUT
empty => empty_fire_re(i),
read => read_re_fire(i),
data_out => data_fire_re(i),
-- MISC
free => open
);
end generate;
rtps_builtin_endpoint_inst : entity work.rtps_builtin_endpoint(arch)
generic map (
MAX_REMOTE_PARTICIPANTS => MAX_REMOTE_PARTICIPANTS
)
port map (
clk => clk,
reset => reset,
time => time,
-- FROM RTPS HANDLER
empty => empty_firb_rb,
rd => read_rb_firb,
data_in => data_firb_rb(WORD_WIDTH-1 downto 0),
last_word_in => data_firb_rb(WORD_WIDTH),
-- FROM USER ENDPOINTS
alive => alive_re_rb,
-- TO USER ENDPOINTS
full_ue => full_frbre_re,
wr_ue => write_rb_frbre,
data_out_ue => data_rb_frbre(WORD_WIDTH-1 downto 0),
last_word_out_ue => data_rb_frbre(WORD_WIDTH),
-- TO RTPS OUT
full_ro => full_firo_rb,
wr_ro => write_rb_firo,
data_out_ro => data_rb_firo(WORD_WIDTH-1 downto 0),
last_word_out_ro => data_rb_firo(WORD_WIDTH)
);
fifo_rb_re_gen : for i in 0 to NUM_ENDPOINTS-1 generate
fifo_rb_re_inst : configuration work.FWFT_FIFO_cfg
generic map (
FIFO_DEPTH => 2,
DATA_WIDTH => WORD_WIDTH+1
)
port map (
-- SYSTEM
reset => reset,
clk => clk,
-- INPUT
full => full_frbre_re(i),
write => write_rb_frbre(i),
data_in => data_rb_frbre, -- Multicast
-- OUTPUT
empty => empty_frbre_re(i),
read => read_re_frbre(i),
data_out => data_frbre_re(i),
-- MISC
free => open
);
end generate;
rtps_endpoint_gen : for i in 0 to NUM_ENDPOINTS-1 generate
rtps_endpoint_if : if (i < NUM_READERS) generate
rtps_reader_inst : entity work.rtps_reader(arch)
generic map (
ENTITYID => ENTITYID(i),
RELIABILITY_QOS => ENDPOINT_RELIABILITY_QOS(i),
LIVELINESS_QOS => ENDPOINT_LIVELINESS_QOS(i),
DURABILITY_QOS => ENDPOINT_DURABILITY_QOS(i),
HEARTBEAT_RESPONSE_DELAY => ENDPOINT_HEARTBEAT_RESPONSE_DELAY(i),
HEARTBEAT_SUPPRESSION_DELAY => ENDPOINT_HEARTBEAT_SUPPRESSION_DELAY(i),
LEASE_DURATION => ENDPOINT_LEASE_DURATION(i),
WITH_KEY => ENDPOINT_WITH_KEY(i),
MAX_REMOTE_ENDPOINTS => MAX_REMOTE_ENDPOINTS
)
port map (
-- SYSTEM
clk => clk,
reset => reset,
time => time,
-- FROM RTPS_HANDLER (USER TRAFFIC)
empty_user => empty_fire_re(i),
rd_user => read_re_fire(i),
data_in_user => data_fire_re(i)(WORD_WIDTH-1 downto 0),
last_word_in_user => data_fire_re(i)(WORD_WIDTH),
-- FROM RTPS_BUILTIN_ENDPOINT (META TRAFFIC)
empty_meta => empty_frbre_re(i),
rd_meta => read_re_frbre(i),
data_in_meta => data_frbre_re(i)(WORD_WIDTH-1 downto 0),
last_word_in_meta => data_frbre_re(i)(WORD_WIDTH),
-- RTPS OUTPUT
full_ro => full_firo_re(i),
wr_ro => write_re_firo(i),
data_out_ro => data_re_firo(i)(WORD_WIDTH-1 downto 0),
last_word_out_ro => data_re_firo(i)(WORD_WIDTH),
-- TO HISTORY CACHE
start_hc => start_rr_dr(i),
opcode_hc => opcode_rr_dr(i),
ack_hc => ack_dr_rr(i),
done_hc => done_dr_rr(i),
ret_hc => ret_dr_rr(i),
valid_out_hc => valid_rr_dr(i),
ready_out_hc => ready_dr_rr(i),
data_out_hc => data_rr_dr(i)(WORD_WIDTH-1 downto 0),
last_word_out_hc => data_rr_dr(i)(WORD_WIDTH)
);
-- Set Alive Signals of Readers to Zero
alive_re_rb(i) <= ('0');
else generate
rtps_writer_inst : entity work.rtps_writer(arch)
generic map (
RELIABILITY_QOS => ENDPOINT_RELIABILITY_QOS(i),
LIVELINESS_QOS => ENDPOINT_LIVELINESS_QOS(i),
DURABILITY_QOS => ENDPOINT_DURABILITY_QOS(i),
DESTINATION_ORDER_QOS => ENDPOINT_DESTINATION_ORDER_QOS(i),
ACKNACK_RESPONSE_DELAY => ENDPOINT_ACKNACK_RESPONSE_DELAY(i),
ACKNACK_SUPPRESSION_DELAY => ENDPOINT_ACKNACK_SUPPRESSION_DELAY(i),
LEASE_DURATION => ENDPOINT_LEASE_DURATION(i),
HEARTBEAT_PERIOD => ENDPOINT_HEARTBEAT_PERIOD(i),
ENTITYID => ENTITYID(i),
WITH_KEY => ENDPOINT_WITH_KEY(i),
PUSH_MODE => ENDPOINT_PUSH_MODE(i),
INLINE_QOS => gen_inline_qos(i),
MAX_REMOTE_ENDPOINTS => MAX_REMOTE_ENDPOINTS
)
port map (
-- SYSTEM
clk => clk,
reset => reset,
time => time,
-- FROM RTPS_HANDLER (USER TRAFFIC)
empty_user => empty_fire_re(i),
rd_user => read_re_fire(i),
data_in_user => data_fire_re(i)(WORD_WIDTH-1 downto 0),
last_word_in_user => data_fire_re(i)(WORD_WIDTH),
-- FROM RTPS_BUILTIN_ENDPOINT (META TRAFFIC)
empty_meta => empty_frbre_re(i),
rd_meta => read_re_frbre(i),
data_in_meta => data_frbre_re(i)(WORD_WIDTH-1 downto 0),
last_word_in_meta => data_frbre_re(i)(WORD_WIDTH),
-- TO RTPS_BUILTIN_ENDPOINT (META TRAFFIC)
alive_sig => alive_re_rb(i),
-- RTPS OUTPUT
full_ro => full_firo_re(i),
wr_ro => write_re_firo(i),
data_out_ro => data_re_firo(i)(WORD_WIDTH-1 downto 0),
last_word_out_ro => data_re_firo(i)(WORD_WIDTH),
-- FROM HC
liveliness_assertion => liveliness_assertion_dw_rw(i-NUM_READERS),
data_available => data_available_dw_rw(i-NUM_READERS),
start_hc => start_rw_dw(i-NUM_READERS),
opcode_hc => opcode_rw_dw(i-NUM_READERS),
ack_hc => ack_dw_rw(i-NUM_READERS),
seq_nr_hc => seq_nr_rw_dw(i-NUM_READERS),
done_hc => done_rw_dw(i-NUM_READERS),
ret_hc => ret_dw_rw(i-NUM_READERS),
get_data_hc => get_data_rw_dw(i-NUM_READERS),
valid_in_hc => valid_dw_rw(i-NUM_READERS),
ready_in_hc => ready_rw_dw(i-NUM_READERS),
data_in_hc => data_dw_rw(i-NUM_READERS)(WORD_WIDTH-1 downto 0),
last_word_in_hc => data_dw_rw(i-NUM_READERS)(WORD_WIDTH),
cc_instance_handle => cc_instance_handle_dw_rw(i-NUM_READERS),
cc_kind => cc_kind_dw_rw(i-NUM_READERS),
cc_source_timestamp => cc_source_timestamp_dw_rw(i-NUM_READERS),
cc_seq_nr => cc_seq_nr_dw_rw(i-NUM_READERS)
);
end generate;
end generate;
dds_endpoint_gen : for i in 0 to NUM_ENDPOINTS-1 generate
dds_endpoint_if : if (i < NUM_READERS) generate
dds_reader_inst : entity work.dds_reader(arch)
generic map (
TIME_BASED_FILTER_QOS => ENDPOINT_TIME_BASED_FILTER_QOS(i),
DEADLINE_QOS => ENDPOINT_DEADLINE_QOS(i),
MAX_INSTANCES => ENDPOINT_MAX_INSTANCES(i),
MAX_SAMPLES_PER_INSTANCE => ENDPOINT_MAX_SAMPLES_PER_INSTANCE(i),
MAX_SAMPLES => ENDPOINT_MAX_SAMPLES(i),
HISTORY_QOS => ENDPOINT_HISTORY_QOS(i),
RELIABILITY_QOS => ENDPOINT_RELIABILITY_QOS(i),
PRESENTATION_QOS => ENDPOINT_PRESENTATION_QOS(i),
DESTINATION_ORDER_QOS => ENDPOINT_DESTINATION_ORDER_QOS(i),
COHERENT_ACCESS => ENDPOINT_COHERENT_ACCESS(i),
ORDERED_ACCESS => ENDPOINT_ORDERED_ACCESS(i),
WITH_KEY => ENDPOINT_WITH_KEY(i),
PAYLOAD_FRAME_SIZE => MAX_TYPE1_SIZE,
MAX_REMOTE_ENDPOINTS => MAX_REMOTE_ENDPOINTS
)
port map (
-- SYSTEM
clk => clk,
reset => reset,
time => time,
-- FROM RTPS ENDPOINT
start_rtps => start_rr_dr(i),
opcode_rtps => opcode_rr_dr(i),
ack_rtps => ack_dr_rr(i),
done_rtps => done_dr_rr(i),
ret_rtps => ret_dr_rr(i),
valid_in_rtps => valid_rr_dr(i),
ready_in_rtps => ready_dr_rr(i),
data_in_rtps => data_rr_dr(i)(WORD_WIDTH-1 downto 0),
last_word_in_rtps => data_rr_dr(i)(WORD_WIDTH),
-- TO USER ENTITY
start_dds => start_ri_dr(i),
ack_dds => ack_dr_ri(i),
opcode_dds => opcode_ri_dr(i),
instance_state_dds => instance_state_ri_dr(i),
view_state_dds => view_state_ri_dr(i),
sample_state_dds => sample_state_ri_dr(i),
instance_handle_dds => instance_handle_ri_dr(i),
max_samples_dds => max_samples_ri_dr(i),
get_data_dds => get_data_ri_dr(i),
done_dds => done_dr_ri(i),
return_code_dds => return_code_dr_ri(i),
valid_out_dds => valid_dr_ri(i),
ready_out_dds => ready_ri_dr(i),
data_out_dds => data_dr_ri(i)(WORD_WIDTH-1 downto 0),
last_word_out_dds => data_dr_ri(i)(WORD_WIDTH),
-- Sample Info
si_sample_state => si_sample_state_dr_ri(i),
si_view_state => si_view_state_dr_ri(i),
si_instance_state => si_instance_state_dr_ri(i),
si_source_timestamp => si_source_timestamp_dr_ri(i),
si_instance_handle => si_instance_handle_dr_ri(i),
si_publication_handle => si_publication_handle_dr_ri(i),
si_disposed_generation_count => si_disposed_generation_count_dr_ri(i),
si_no_writers_generation_count => si_no_writers_generation_count_dr_ri(i),
si_sample_rank => si_sample_rank_dr_ri(i),
si_generation_rank => si_generation_rank_dr_ri(i),
si_absolute_generation_rank => si_absolute_generation_rank_dr_ri(i),
si_valid_data => si_valid_data_dr_ri(i),
si_valid => si_valid_dr_ri(i),
si_ack => si_ack_ri_dr(i),
eoc => eoc_dr_ri(i),
-- Communication Status
status => status_dr_ri(i)
);
else generate
dds_writer_inst : entity work.dds_writer(arch)
generic map (
HISTORY_QOS => ENDPOINT_HISTORY_QOS(i),
DEADLINE_QOS => ENDPOINT_DEADLINE_QOS(i),
LIFESPAN_QOS => ENDPOINT_LIFESPAN_QOS(i),
LEASE_DURATION => ENDPOINT_LEASE_DURATION(i),
WITH_KEY => ENDPOINT_WITH_KEY(i),
MAX_SAMPLES => ENDPOINT_MAX_SAMPLES(i),
MAX_INSTANCES => ENDPOINT_MAX_INSTANCES(i),
MAX_SAMPLES_PER_INSTANCE => ENDPOINT_MAX_SAMPLES_PER_INSTANCE(i),
PAYLOAD_FRAME_SIZE => MAX_TYPE1_SIZE
)
port map (
-- SYSTEM
clk => clk,
reset => reset,
time => time,
-- TO/FROM RTPS ENDPOINT
start_rtps => start_rw_dw(i-NUM_READERS),
opcode_rtps => opcode_rw_dw(i-NUM_READERS),
ack_rtps => ack_dw_rw(i-NUM_READERS),
done_rtps => done_rw_dw(i-NUM_READERS),
ret_rtps => ret_dw_rw(i-NUM_READERS),
seq_nr_rtps => seq_nr_rw_dw(i-NUM_READERS),
get_data_rtps => get_data_rw_dw(i-NUM_READERS),
valid_out_rtps => valid_dw_rw(i-NUM_READERS),
ready_out_rtps => ready_rw_dw(i-NUM_READERS),
data_out_rtps => data_dw_rw(i-NUM_READERS)(WORD_WIDTH-1 downto 0),
last_word_out_rtps => data_dw_rw(i-NUM_READERS)(WORD_WIDTH),
liveliness_assertion => liveliness_assertion_dw_rw(i-NUM_READERS),
data_available => data_available_dw_rw(i-NUM_READERS),
-- Cache Change
cc_instance_handle => cc_instance_handle_dw_rw(i-NUM_READERS),
cc_kind => cc_kind_dw_rw(i-NUM_READERS),
cc_source_timestamp => cc_source_timestamp_dw_rw(i-NUM_READERS),
cc_seq_nr => cc_seq_nr_dw_rw(i-NUM_READERS),
-- TO/FROM USER ENTITY
start_dds => start_wi_dw(i-NUM_READERS),
ack_dds => ack_dw_wi(i-NUM_READERS),
opcode_dds => opcode_wi_dw(i-NUM_READERS),
instance_handle_in_dds => instance_handle_wi_dw(i-NUM_READERS),
source_ts_dds => source_ts_wi_dw(i-NUM_READERS),
max_wait_dds => max_wait_wi_dw(i-NUM_READERS),
done_dds => done_dw_wi(i-NUM_READERS),
return_code_dds => return_code_dw_wi(i-NUM_READERS),
instance_handle_out_dds => instance_handle_dw_wi(i-NUM_READERS),
valid_in_dds => valid_wi_dw(i-NUM_READERS),
ready_in_dds => ready_dw_wi(i-NUM_READERS),
data_in_dds => data_wi_dw(i-NUM_READERS)(WORD_WIDTH-1 downto 0),
last_word_in_dds => data_wi_dw(i-NUM_READERS)(WORD_WIDTH),
valid_out_dds => valid_dw_wi(i-NUM_READERS),
ready_out_dds => ready_wi_dw(i-NUM_READERS),
data_out_dds => data_dw_wi(i-NUM_READERS)(WORD_WIDTH-1 downto 0),
last_word_out_dds => data_dw_wi(i-NUM_READERS)(WORD_WIDTH),
-- Communication Status
status => status_dw_wi(i-NUM_READERS)
);
end generate;
end generate;
fifo_in_ro_gen : for i in 0 to NUM_ENDPOINTS generate
fifo_in_ro_if : if (i = NUM_ENDPOINTS) generate
fifo_in_ro_inst : configuration work.FWFT_FIFO_cfg
generic map (
FIFO_DEPTH => 2,
DATA_WIDTH => WORD_WIDTH+1
)
port map (
-- SYSTEM
reset => reset,
clk => clk,
-- INPUT
full => full_firo_rb,
write => write_rb_firo,
data_in => data_rb_firo,
-- OUTPUT
empty => empty_firo_ro(i),
read => read_ro_firo(i),
data_out(WORD_WIDTH) => last_word_firo_ro(i),
data_out(WORD_WIDTH-1 downto 0) => data_firo_ro(i),
-- MISC
free => open
);
else generate
fifo_in_ro_inst : configuration work.FWFT_FIFO_cfg
generic map (
FIFO_DEPTH => 2,
DATA_WIDTH => WORD_WIDTH+1
)
port map (
-- SYSTEM
reset => reset,
clk => clk,
-- INPUT
full => full_firo_re(i),
write => write_re_firo(i),
data_in => data_re_firo(i),
-- OUTPUT
empty => empty_firo_ro(i),
read => read_ro_firo(i),
data_out(WORD_WIDTH) => last_word_firo_ro(i),
data_out(WORD_WIDTH-1 downto 0) => data_firo_ro(i),
-- MISC
free => open
);
end generate;
end generate;
rtps_out_inst : entity work.rtps_out(arch)
port map (
-- SYSTEM
clk => clk,
reset => reset,
-- INPUT
empty => empty_firo_ro,
rd => read_ro_firo,
data_in => data_firo_ro,
last_word_in => last_word_firo_ro,
-- OUTPUT
full => full,
wr => write,
data_out => data_out
);
--#####################################################################
Type1_reader_wrapper_inst : entity work.Type1_reader_wrapper(arch)
port map (
-- SYSTEM
clk => clk,
reset => reset,
-- FROM DDS READER
start_dds => start_ri_dr(0),
ack_dds => ack_dr_ri(0),
opcode_dds => opcode_ri_dr(0),
instance_state_dds => instance_state_ri_dr(0),
view_state_dds => view_state_ri_dr(0),
sample_state_dds => sample_state_ri_dr(0),
instance_handle_dds => instance_handle_ri_dr(0),
max_samples_dds => max_samples_ri_dr(0),
get_data_dds => get_data_ri_dr(0),
done_dds => done_dr_ri(0),
return_code_dds => return_code_dr_ri(0),
valid_in_dds => valid_dr_ri(0),
ready_in_dds => ready_ri_dr(0),
data_in_dds => data_dr_ri(0)(WORD_WIDTH-1 downto 0),
last_word_in_dds => data_dr_ri(0)(WORD_WIDTH),
-- Sample Info
si_sample_state_dds => si_sample_state_dr_ri(0),
si_view_state_dds => si_view_state_dr_ri(0),
si_instance_state_dds => si_instance_state_dr_ri(0),
si_source_timestamp_dds => si_source_timestamp_dr_ri(0),
si_instance_handle_dds => si_instance_handle_dr_ri(0),
si_publication_handle_dds => si_publication_handle_dr_ri(0),
si_disposed_generation_count_dds => si_disposed_generation_count_dr_ri(0),
si_no_writers_generation_count_dds => si_no_writers_generation_count_dr_ri(0),
si_sample_rank_dds => si_sample_rank_dr_ri(0),
si_generation_rank_dds => si_generation_rank_dr_ri(0),
si_absolute_generation_rank_dds => si_absolute_generation_rank_dr_ri(0),
si_valid_data_dds => si_valid_data_dr_ri(0),
si_valid_dds => si_valid_dr_ri(0),
si_ack_dds => si_ack_ri_dr(0),
eoc_dds => eoc_dr_ri(0),
-- Communication Status
status_dds => status_dr_ri(0),
-- TO USER ENTITY
start_user => start_r,
ack_user => ack_r,
opcode_user => opcode_r,
instance_state_user => instance_state_r,
view_state_user => view_state_r,
sample_state_user => sample_state_r,
instance_handle_user => instance_handle_r,
max_samples_user => max_samples_r,
get_data_user => get_data_r,
done_user => done_r,
return_code_user => return_code_r,
-- Sample Info
si_sample_state_user => si_sample_state_r,
si_view_state_user => si_view_state_r,
si_instance_state_user => si_instance_state_r,
si_source_timestamp_user => si_source_timestamp_r,
si_instance_handle_user => si_instance_handle_r,
si_publication_handle_user => si_publication_handle_r,
si_disposed_generation_count_user => si_disposed_generation_count_r,
si_no_writers_generation_count_user => si_no_writers_generation_count_r,
si_sample_rank_user => si_sample_rank_r,
si_generation_rank_user => si_generation_rank_r,
si_absolute_generation_rank_user => si_absolute_generation_rank_r,
si_valid_data_user => si_valid_data_r,
si_valid_user => si_valid_r,
si_ack_user => si_ack_r,
eoc_user => eoc_r,
-- Communication Status
status_user => status_r,
decode_error => decode_error_r,
-- ###GENERATED START###
id => id_r,
a => a_r,
-- ###GENERATED END###
valid => valid_r
);
Type1_writer_wrapper_inst : entity work.Type1_writer_wrapper(arch)
port map (
-- SYSTEM
clk => clk,
reset => reset,
-- FROM DDS WRITER
start_dds => start_wi_dw(0),
ack_dds => ack_dw_wi(0),
opcode_dds => opcode_wi_dw(0),
instance_handle_in_dds => instance_handle_dw_wi(0),
source_ts_dds => source_ts_wi_dw(0),
max_wait_dds => max_wait_wi_dw(0),
done_dds => done_dw_wi(0),
return_code_dds => return_code_dw_wi(0),
instance_handle_out_dds => instance_handle_wi_dw(0),
valid_out_dds => valid_wi_dw(0),
ready_out_dds => ready_dw_wi(0),
data_out_dds => data_wi_dw(0)(WORD_WIDTH-1 downto 0),
last_word_out_dds => data_wi_dw(0)(WORD_WIDTH),
valid_in_dds => valid_dw_wi(0),
ready_in_dds => ready_wi_dw(0),
data_in_dds => data_dw_wi(0)(WORD_WIDTH-1 downto 0),
last_word_in_dds => data_dw_wi(0)(WORD_WIDTH),
-- Communication Status
status_dds => status_dw_wi(0),
-- TO USER ENTITY
start_user => start_w,
ack_user => ack_w,
opcode_user => opcode_w,
instance_handle_in_user => instance_handle_in_w,
source_ts_user => source_ts_w,
max_wait_user => max_wait_w,
done_user => done_w,
return_code_user => return_code_w,
instance_handle_out_user => instance_handle_out_w,
-- Communication Status
status_user => status_w,
-- ###GENERATED START###
id => id_w,
a => a_w,
-- ###GENERATED END###
encode_done => encode_done_w
);
end architecture;

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@ -0,0 +1,130 @@
library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;
use work.rtps_package.all;
package user_config is
--*****USER CONFIG*****
-- NOTE: All strings have to be padded to 256 characters
-- Period of system clock
constant CLOCK_PERIOD : time := 50 ns;
-- Maximum number of supported remote Participants (Affects generated Memory Size)
constant MAX_REMOTE_PARTICIPANTS : natural := 50;
-- Maximum number of supported remote Endpoints (Affects generated Memory Size)
constant MAX_REMOTE_ENDPOINTS : natural := 50;
-- Unicast IPv4 Address used by all RTPS Entities [Default 192.168.0.91]
constant DEFAULT_IPv4_ADDRESS : std_logic_vector(IPv4_ADDRESS_WIDTH-1 downto 0) := x"C0A8005B";
-- Number of RTPS Writer Endpoints
constant NUM_WRITERS : natural := 1;
-- Number of RTPS Reader Endpoints
constant NUM_READERS : natural := 1;
-- Number of RTPS Endpoints (Do not modify)
constant NUM_ENDPOINTS : natural := NUM_READERS+NUM_WRITERS;
-- PB Value of Default Port Generation (see DDSI-RTPS 2.3 Section 9.6.1)
constant PORT_CONFIG_PB : natural := 7400;
-- DG Value of Default Port Generation (see DDSI-RTPS 2.3 Section 9.6.1)
constant PORT_CONFIG_DG : natural := 250;
-- PG Value of Default Port Generation (see DDSI-RTPS 2.3 Section 9.6.1)
constant PORT_CONFIG_PG : natural := 2;
-- D0 Value of Default Port Generation (see DDSI-RTPS 2.3 Section 9.6.1)
constant PORT_CONFIG_D0 : natural := 0;
-- D1 Value of Default Port Generation (see DDSI-RTPS 2.3 Section 9.6.1)
constant PORT_CONFIG_D1 : natural := 10;
-- D2 Value of Default Port Generation (see DDSI-RTPS 2.3 Section 9.6.1)
constant PORT_CONFIG_D2 : natural := 1;
-- D3 Value of Default Port Generation (see DDSI-RTPS 2.3 Section 9.6.1)
constant PORT_CONFIG_D3 : natural := 11;
-- MAC Address of underlying network stack (Used to generate GUIDs)
constant MAC_ADDRESS : std_logic_vector(47 downto 0) := x"639C8EBE5C20";
-- Domain ID
constant USER_DOMAIN_ID : natural := 1;
-- Domain TAG
constant USER_DOMAIN_TAG : string(1 to 256) := (others => NUL); --""
--***RTPS ENDPOINTS***
-- Array denoting if Endpoints use Keyed Topics
constant ENDPOINT_WITH_KEY : USER_BOOLEAN_ARRAY_TYPE(0 to NUM_ENDPOINTS-1) := (others => TRUE);
-- Array denoting which mode the Endpoints are operating with
constant ENDPOINT_PUSH_MODE : USER_BOOLEAN_ARRAY_TYPE(0 to NUM_ENDPOINTS-1) := (others => TRUE);
-- Array mapping Topic Names to Endpoints
constant ENDPOINT_TOPIC_STRING : USER_STRING_ARRAY_TYPE(0 to NUM_ENDPOINTS-1) := (others => "Topic1" & (7 to 256 => NUL));
-- Array mapping Type Names to Endpoints
constant ENDPOINT_TYPE_STRING : USER_STRING_ARRAY_TYPE(0 to NUM_ENDPOINTS-1) := (others => "Type1" & (6 to 256 => NUL));
-- *TIMING CHARACTERISTICS*
-- Timing Characteristics for Participant
constant PARTICIPANT_ANNOUNCEMENT_PERIOD : DURATION_TYPE := gen_duration(0,50000); -- 50k ns
constant PARTICIPANT_LEASE_DURATION : DURATION_TYPE := DEFAULT_PARTICIPANT_LEASE_DURATION;
-- Denotes how much faster then the deadline/period we schedule in order to account for transport delay.
constant DURATION_DELTA : DURATION_TYPE := gen_duration(0, 100); -- 100 ns
-- Timing Characteristics for built-in Endpoints
constant PARTICIPANT_HEARTBEAT_PERIOD : DURATION_TYPE := gen_duration(0,40000); -- 40k ns
constant PARTICIPANT_HEARTBEAT_RESPONSE_DELAY : DURATION_TYPE := gen_duration(0,500); -- 500 ns
constant PARTICIPANT_HEARTBEAT_SUPPRESSION_DELAY : DURATION_TYPE := gen_duration(0,100); -- 100 ns
constant PARTICIPANT_ACKNACK_RESPONSE_DELAY : DURATION_TYPE := gen_duration(0,500); -- 500 ns
constant PARTICIPANT_ACKNACK_SUPPRESSION_DELAY : DURATION_TYPE := gen_duration(0,100); -- 100 ns
-- Array mapping Timing Characteristics to Endpoints
constant ENDPOINT_HEARTBEAT_PERIOD : USER_DURATION_ARRAY_TYPE(0 to NUM_ENDPOINTS-1) := (others => gen_duration(0,10000)); -- 10k ns
constant ENDPOINT_HEARTBEAT_RESPONSE_DELAY : USER_DURATION_ARRAY_TYPE(0 to NUM_ENDPOINTS-1) := (others => gen_duration(0,500)); -- 500 ns
constant ENDPOINT_HEARTBEAT_SUPPRESSION_DELAY : USER_DURATION_ARRAY_TYPE(0 to NUM_ENDPOINTS-1) := (others => gen_duration(0,100)); -- 100 ns
constant ENDPOINT_ACKNACK_RESPONSE_DELAY : USER_DURATION_ARRAY_TYPE(0 to NUM_ENDPOINTS-1) := (others => gen_duration(0,500)); -- 500 ns
constant ENDPOINT_ACKNACK_SUPPRESSION_DELAY : USER_DURATION_ARRAY_TYPE(0 to NUM_ENDPOINTS-1) := (others => gen_duration(0,100)); -- 100 ns
--***ENDPOINT DDS QOS***
-- Array mapping DURABILITY QoS to Endpoints
constant ENDPOINT_DURABILITY_QOS : USER_ENUMERATION_ARRAY_TYPE(0 to NUM_ENDPOINTS-1) := (others => TRANSIENT_LOCAL_DURABILITY_QOS);
-- Array mapping DURABILITY SERVICE QoS to Endpoints
constant ENDPOINT_DURABILITY_SERVICE_CLEANUP_DELAY : USER_DURATION_ARRAY_TYPE(0 to NUM_ENDPOINTS-1) := (others => DEFAULT_DURABILITY_SERVICE_CLEANUP_DELAY);
constant ENDPOINT_DURABILITY_SERVICE_HISTORY : USER_LONG_ARRAY_TYPE(0 to NUM_ENDPOINTS-1) := (others => DEFAULT_DURABILITY_SERVICE_HISTORY);
constant ENDPOINT_DURABILITY_SERVICE_HISTORY_DEPTH : USER_LONG_ARRAY_TYPE(0 to NUM_ENDPOINTS-1) := (others => DEFAULT_DURABILITY_SERVICE_HISTORY_DEPTH);
constant ENDPOINT_DURABILITY_SERVICE_MAX_SAMPLES : USER_LONG_ARRAY_TYPE(0 to NUM_ENDPOINTS-1) := (others => DEFAULT_DURABILITY_SERVICE_MAX_SAMPLES);
constant ENDPOINT_DURABILITY_SERVICE_MAX_INSTANCES : USER_LONG_ARRAY_TYPE(0 to NUM_ENDPOINTS-1) := (others => DEFAULT_DURABILITY_SERVICE_MAX_INSTANCES);
constant ENDPOINT_DURABILITY_SERVICE_MAX_SAMPLES_PER_INSTANCE : USER_LONG_ARRAY_TYPE(0 to NUM_ENDPOINTS-1) := (others => DEFAULT_DURABILITY_SERVICE_MAX_SAMPLES_PER_INSTANCE);
-- Array mapping PRESENTATION QoS to Endpoints
constant ENDPOINT_PRESENTATION_QOS : USER_ENUMERATION_ARRAY_TYPE(0 to NUM_ENDPOINTS-1) := (others => DEFAULT_PRESENTATION_QOS);
constant ENDPOINT_COHERENT_ACCESS : USER_BOOLEAN_ARRAY_TYPE(0 to NUM_ENDPOINTS-1) := (others => DEFAULT_COHERENT_ACCESS);
constant ENDPOINT_ORDERED_ACCESS : USER_BOOLEAN_ARRAY_TYPE(0 to NUM_ENDPOINTS-1) := (others => DEFAULT_ORDERED_ACCESS);
-- Array mapping DEADLINE QoS to Endpoints
constant ENDPOINT_DEADLINE_QOS : USER_DURATION_ARRAY_TYPE(0 to NUM_ENDPOINTS-1) := (others => DEFAULT_DEADLINE_QOS);
-- Array mapping LATENCY_BUDGET QoS to Endpoints
constant ENDPOINT_LATENCY_BUDGET_QOS : USER_DURATION_ARRAY_TYPE(0 to NUM_ENDPOINTS-1) := (others => DEFAULT_LATENCY_BUDGET_QOS);
-- Array mapping OWNERSHIP QoS to Endpoints
constant ENDPOINT_OWNERSHIP_QOS : USER_ENUMERATION_ARRAY_TYPE(0 to NUM_ENDPOINTS-1) := (others => DEFAULT_OWNERSHIP_QOS);
-- Array mapping OWNERSHIP_STRENGTH QoS to Endpoints (Only relevant to Writers)
constant ENDPOINT_OWNERSHIP_STRENGTH_QOS : USER_LONG_ARRAY_TYPE(0 to NUM_ENDPOINTS-1) := (others => DEFAULT_OWNERSHIP_STRENGTH_QOS);
-- Array mapping LIVELINESS QoS to Endpoints
constant ENDPOINT_LIVELINESS_QOS : USER_ENUMERATION_ARRAY_TYPE(0 to NUM_ENDPOINTS-1) := (others => DEFAULT_LIVELINESS_QOS);
constant ENDPOINT_LEASE_DURATION : USER_DURATION_ARRAY_TYPE(0 to NUM_ENDPOINTS-1) := (others => DEFAULT_LEASE_DURATION);
-- Array mapping TIME_BASED_FILTER QoS to Endpoints (Only relevant to Readers)
constant ENDPOINT_TIME_BASED_FILTER_QOS : USER_DURATION_ARRAY_TYPE(0 to NUM_ENDPOINTS-1) := (others => DEFAULT_TIME_BASED_FILTER_QOS);
-- XXX: PARTITION QoS Ignored
-- Array mapping RELIABILITY QoS to Endpoints
constant ENDPOINT_RELIABILITY_QOS : USER_ENUMERATION_ARRAY_TYPE(0 to NUM_ENDPOINTS-1) := (others => DEFAULT_RELIABILITY_QOS);
-- (Only relevant to Writers)
constant ENDPOINT_MAX_BLOCKING_TIME : USER_DURATION_ARRAY_TYPE(0 to NUM_ENDPOINTS-1) := (others => DEFAULT_MAX_BLOCKING_TIME);
-- Array mapping TRANSPORT_PRIORITY QoS to Endpoints (Only relevant to Writers)
constant ENDPOINT_TRANSPORT_PRIORITY_QOS : USER_LONG_ARRAY_TYPE(0 to NUM_ENDPOINTS-1) := (others => DEFAULT_TRANSPORT_PRIORITY_QOS);
-- Array mapping LIFESPAN QoS to Endpoints (Only relevant to Writers)
constant ENDPOINT_LIFESPAN_QOS : USER_DURATION_ARRAY_TYPE(0 to NUM_ENDPOINTS-1) := (others => DEFAULT_LIFESPAN_QOS);
-- Array mapping DESTINATION_ORDER QoS to Endpoints
constant ENDPOINT_DESTINATION_ORDER_QOS : USER_ENUMERATION_ARRAY_TYPE(0 to NUM_ENDPOINTS-1) := (others => DEFAULT_DESTINATION_ORDER_QOS);
-- Array mapping HISTORY QoS to Endpoints
constant ENDPOINT_HISTORY_QOS : USER_ENUMERATION_ARRAY_TYPE(0 to NUM_ENDPOINTS-1) := (others => DEFAULT_HISTORY_QOS);
constant ENDPOINT_HISTORY_DEPTH : USER_LONG_ARRAY_TYPE(0 to NUM_ENDPOINTS-1) := (others => std_logic_vector(to_unsigned(5, CDR_LONG_WIDTH)));
-- Array mapping RESOURCE_LIMITS QoS to Endpoints
constant ENDPOINT_MAX_SAMPLES : USER_LONG_ARRAY_TYPE(0 to NUM_ENDPOINTS-1) := (others => std_logic_vector(to_unsigned(20, CDR_LONG_WIDTH)));
constant ENDPOINT_MAX_INSTANCES : USER_LONG_ARRAY_TYPE(0 to NUM_ENDPOINTS-1) := (others => std_logic_vector(to_unsigned(5, CDR_LONG_WIDTH)));
constant ENDPOINT_MAX_SAMPLES_PER_INSTANCE : USER_LONG_ARRAY_TYPE(0 to NUM_ENDPOINTS-1) := (others => DEFAULT_MAX_SAMPLES_PER_INSTANCE);
-- XXX: ENTITY_FACTORY QoS Ignored
-- Array mapping WRITER_DATA_LIFECYCLE QoS to Endpoints (Only relevant to Writers)
constant ENDPOINT_AUTODISPOSE_UNREGISTERED_INSTANCES : USER_BOOLEAN_ARRAY_TYPE(0 to NUM_ENDPOINTS-1) := (others => DEFAULT_AUTODISPOSE_UNREGISTERED_INSTANCES);
-- Array mapping Reader_DATA_LIFECYCLE QoS to Endpoints (Only relevant to Readers)
constant ENDPOINT_AUTOPURGE_NOWRITER_SAMPLES_DELAY : USER_DURATION_ARRAY_TYPE(0 to NUM_ENDPOINTS-1) := (others => DEFAULT_AUTOPURGE_NOWRITER_SAMPLES_DELAY);
constant ENDPOINT_AUTOPURGE_DISPOSED_SAMPLES_DELAY : USER_DURATION_ARRAY_TYPE(0 to NUM_ENDPOINTS-1) := (others => DEFAULT_AUTOPURGE_DISPOSED_SAMPLES_DELAY);
-- Set to TRUE for Simulation Testing (Extra Code generated)
constant SIMULATION_FLAG : boolean := TRUE;
end package;

222
src/Tests/test_loopback.vhd Normal file
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@ -0,0 +1,222 @@
-- altera vhdl_input_version vhdl_2008
-- XXX: QSYS Fix (https://www.intel.com/content/www/us/en/support/programmable/articles/000079458.html)
library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;
use work.rtps_package.all;
use work.rtps_config_package.all;
use work.rtps_test_package.all;
entity test_loopback is
port (
-- SYSTEM
clk : in std_logic;
reset : in std_logic;
-- READER
start_r : out std_logic;
ack_r : in std_logic;
opcode_r : out DDS_READER_OPCODE_TYPE;
instance_state_r : out std_logic_vector(INSTANCE_STATE_KIND_WIDTH-1 downto 0);
view_state_r : out std_logic_vector(VIEW_STATE_KIND_WIDTH-1 downto 0);
sample_state_r : out std_logic_vector(SAMPLE_STATE_KIND_WIDTH-1 downto 0);
instance_handle_r : out INSTANCE_HANDLE_TYPE;
max_samples_r : out std_logic_vector(MAX_SAMPLES_WIDTH-1 downto 0);
get_data_r : out std_logic;
done_r : in std_logic;
return_code_r : in std_logic_vector(RETURN_CODE_WIDTH-1 downto 0);
si_sample_state_r : in std_logic_vector(SAMPLE_STATE_KIND_WIDTH-1 downto 0);
si_view_state_r : in std_logic_vector(VIEW_STATE_KIND_WIDTH-1 downto 0);
si_instance_state_r : in std_logic_vector(INSTANCE_STATE_KIND_WIDTH-1 downto 0);
si_source_timestamp_r : in TIME_TYPE;
si_instance_handle_r : in INSTANCE_HANDLE_TYPE;
si_publication_handle_r : in INSTANCE_HANDLE_TYPE;
si_disposed_generation_count_r : in std_logic_vector(DISPOSED_GENERATION_COUNT_WIDTH-1 downto 0);
si_no_writers_generation_count_r : in std_logic_vector(NO_WRITERS_GENERATION_COUNT_WIDTH-1 downto 0);
si_sample_rank_r : in std_logic_vector(SAMPLE_RANK_WIDTH-1 downto 0);
si_generation_rank_r : in std_logic_vector(GENERATION_RANK_WIDTH-1 downto 0);
si_absolute_generation_rank_r : in std_logic_vector(ABSOLUTE_GENERATION_COUNT_WIDTH-1 downto 0);
si_valid_data_r : in std_logic;
si_valid_r : in std_logic;
si_ack_r : out std_logic;
eoc_r : in std_logic;
status_r : in std_logic_vector(STATUS_KIND_WIDTH-1 downto 0);
decode_error_r : in std_logic;
id_r : in std_logic_vector(CDR_LONG_WIDTH-1 downto 0);
a_r : in std_logic_vector(CDR_LONG_WIDTH-1 downto 0);
valid_r : in std_logic;
-- WRITER
start_w : out std_logic;
ack_w : in std_logic;
opcode_w : out DDS_WRITER_OPCODE_TYPE;
instance_handle_out_w : out INSTANCE_HANDLE_TYPE;
source_ts_w : out TIME_TYPE;
max_wait_w : out DURATION_TYPE;
done_w : in std_logic;
return_code_w : in std_logic_vector(RETURN_CODE_WIDTH-1 downto 0);
instance_handle_in_w : in INSTANCE_HANDLE_TYPE;
status_w : in std_logic_vector(STATUS_KIND_WIDTH-1 downto 0);
id_w : out std_logic_vector(CDR_LONG_WIDTH-1 downto 0);
a_w : out std_logic_vector(CDR_LONG_WIDTH-1 downto 0);
encode_done_w : in std_logic
);
end entity;
architecture arch of test_loopback is
--*****TYPE DECLARATION*****
type STAGE_TYPE is (INITIALIZE, IDLE, READ, PROCESS_MESSAGE, WRITE);
--*****SIGNAL DECLARATION*****
signal stage, stage_next : STAGE_TYPE;
signal cnt, cnt_next : natural range 0 to 3;
signal inst, inst_next : INSTANCE_HANDLE_TYPE;
signal long, long_next : std_logic_vector(CDR_LONG_WIDTH-1 downto 0);
begin
main_prc : process(all)
begin
-- DEFAULT
stage_next <= stage;
cnt_next <= cnt;
inst_next <= inst;
long_next <= long;
-- DEFAULT Unregistered
start_r <= '0';
opcode_r <= NOP;
instance_state_r <= ANY_INSTANCE_STATE;
view_state_r <= ANY_VIEW_STATE;
sample_state_r <= ANY_SAMPLE_STATE;
instance_handle_r <= HANDLE_NIL;
max_samples_r <= (others => '0');
get_data_r <= '0';
si_ack_r <= '0';
start_w <= '0';
opcode_w <= NOP;
instance_handle_out_w <= HANDLE_NIL;
source_ts_w <= TIME_INVALID;
max_wait_w <= DURATION_ZERO;
id_w <= (others => '0');
a_w <= (others => '0');
case (stage) is
-- Get the Instance Handle for the target Topic Instance
when INITIALIZE =>
id_w <= int(1, CDR_LONG_WIDTH);
case (cnt) is
when 0 =>
start_w <= '1';
opcode_w <= REGISTER_INSTANCE;
if (ack_w = '1') then
cnt_next <= cnt + 1;
end if;
when 1 =>
if (done_w = '1') then
inst_next <= instance_handle_in_w;
stage_next <= IDLE;
end if;
when others =>
null;
end case;
when IDLE =>
-- Reader has Available Data
if (check_mask(status_r,DATA_AVAILABLE_STATUS)) then
stage_next <= READ;
cnt_next <= 0;
end if;
when READ =>
case (cnt) is
when 0 =>
start_r <= '1';
opcode_r <= TAKE_NEXT_SAMPLE;
if (ack_r = '1') then
cnt_next <= cnt + 1;
end if;
when 1 =>
if (done_r = '1') then
case (return_code_r) is
when RETCODE_OK =>
cnt_next <= cnt + 1;
when RETCODE_NO_DATA =>
stage_next <= IDLE;
when others =>
assert FALSE report "Unexpected DDS Reader Return Code" severity FAILURE;
end case;
end if;
when 2 =>
if (si_valid_r = '1') then
si_ack_r <= '1';
-- Target Instance with Data
if (si_instance_handle_r = inst and si_valid_data_r = '1') then
cnt_next <= cnt + 1;
get_data_r <= '1';
else
-- Read next Sample
cnt_next <= 0;
end if;
end if;
when 3 =>
if (valid_r = '1') then
assert (id_r = int(1,CDR_LONG_WIDTH)) severity FAILURE;
long_next <= a_r;
stage_next <= PROCESS_MESSAGE;
end if;
when others =>
null;
end case;
when PROCESS_MESSAGE =>
-- Add 1k to Message
long_next <= std_logic_vector(unsigned(long) + unsigned(int(1000, CDR_LONG_WIDTH)));
stage_next <= WRITE;
cnt_next <= 0;
when WRITE =>
id_w <= int(2, CDR_LONG_WIDTH);
a_w <= long;
case (cnt) is
when 0 =>
start_w <= '1';
opcode_w <= WRITE;
if (ack_w = '1') then
cnt_next <= cnt + 1;
end if;
when 1 =>
if (done_w = '1') then
case (return_code_w) is
when RETCODE_OK =>
stage_next <= READ;
cnt_next <= 0;
when RETCODE_OUT_OF_RESOURCES =>
-- Retry
cnt_next <= 0;
when others =>
assert FALSE report "Unexpected DDS Writer Return Code" severity FAILURE;
end case;
end if;
when others =>
null;
end case;
end case;
end process;
sync_prc : process(clk)
begin
if rising_edge(clk) then
if (reset = '1') then
stage <= INITIALIZE;
inst <= HANDLE_NIL;
cnt <= 0;
long <= (others => '0');
else
stage <= stage_next;
inst <= inst_next;
cnt <= cnt_next;
long <= long_next;
end if;
end if;
end process;
end architecture;

View File

@ -61,6 +61,67 @@ analyze Type1_key_holder.vhd
analyze Level_2/L2_Testbench_Lib3.vhd
analyze Type1_config.vhd
library Testbench_Lib4
analyze ../math_pkg.vhd
analyze ../rtps_package.vhd
analyze Level_2/L2_Testbench_Lib4_config.vhd
analyze ../rtps_config_package.vhd
analyze ../rtps_test_package.vhd
analyze ../single_port_ram.vhd
analyze ../single_port_ram_Altera.vhd
analyze single_port_ram_cfg.vhd
analyze ../FWFT_FIFO.vhd
analyze ../FWFT_FIFO_Altera.vhd
analyze FWFT_FIFO_cfg.vhd
analyze ../mem_ctrl.vhd
analyze ../rtps_handler.vhd
analyze ../rtps_builtin_endpoint.vhd
analyze ../rtps_out.vhd
analyze ../rtps_reader.vhd
analyze ../rtps_writer.vhd
analyze ../dds_writer.vhd
analyze ../dds_reader.vhd
analyze ../key_holder.vhd
analyze ../key_hash_generator.vhd
analyze test_key_hash_generator.vhd
analyze Type1_package.vhd
analyze Type1_reader_wrapper.vhd
analyze Type1_writer_wrapper.vhd
analyze Type1_key_holder.vhd
analyze test_loopback.vhd
analyze Level_2/L2_Testbench_Lib4.vhd
analyze Type1_config.vhd
library Testbench_Lib5
analyze ../math_pkg.vhd
analyze ../rtps_package.vhd
analyze Level_2/L2_Testbench_Lib5_config.vhd
analyze ../rtps_config_package.vhd
analyze ../rtps_test_package.vhd
analyze ../single_port_ram.vhd
analyze ../single_port_ram_Altera.vhd
analyze single_port_ram_cfg.vhd
analyze ../FWFT_FIFO.vhd
analyze ../FWFT_FIFO_Altera.vhd
analyze FWFT_FIFO_cfg.vhd
analyze ../mem_ctrl.vhd
analyze ../rtps_handler.vhd
analyze ../rtps_builtin_endpoint.vhd
analyze ../rtps_out.vhd
analyze ../rtps_reader.vhd
analyze ../rtps_writer.vhd
analyze ../dds_writer.vhd
analyze ../dds_reader.vhd
analyze ../key_holder.vhd
analyze ../key_hash_generator.vhd
analyze test_key_hash_generator.vhd
analyze Type1_package.vhd
analyze Type1_reader_wrapper.vhd
analyze Type1_writer_wrapper.vhd
analyze Type1_key_holder.vhd
analyze test_loopback.vhd
analyze Level_2/L2_Testbench_Lib5.vhd
analyze Type1_config.vhd
# Compile
library Testbench_Lib1
@ -167,8 +228,10 @@ analyze Level_1/L1_Type2_wrapper_test2.vhd
analyze Level_1/L1_Type2_key_holder_test1.vhd
analyze Level_1/L1_Type2_key_holder_test2.vhd
analyze Level_2/L2_Type1_test1.vhd
analyze Level_2/L2_Type1_test2.vhd
analyze test_config.vhd
simulate L0_rtps_handler_test1
simulate L0_rtps_handler_test2
simulate L0_rtps_out_test1
@ -239,3 +302,4 @@ simulate L1_Type2_wrapper_test2
simulate L1_Type2_key_holder_test1
simulate L1_Type2_key_holder_test2
simulate L2_Type1_test1
simulate L2_Type1_test2