Various fixes in RTPS Reader
Ignore unknown Metatraffic Operations. Drop payload if not necessary (i.e. do not push payload if payload contains serialized Key, but Key Hash is already provided). Added Memory Reset State. Misc fixes
This commit is contained in:
Greek
parent
6488918ede
commit
f0cc1e5432
@ -6,12 +6,7 @@ use work.rtps_package.all;
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use work.user_config.all;
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use work.rtps_config_package.all;
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-- TODO: Use TIME_INVALID instead of zero. (Backport to builtin_endpoint) [Pay atention to (0) bit of ACKNACK and HEARTBEAT Deadlines, if compatible]
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-- TODO: Check for special values of time/duration?
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-- TODO: Remove last_word flag from metattraffic operations
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-- TODO: Replace all ('range => 0) checks with defined constants, where possible
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-- TODO: Adding LIFESPAN Duration in the stored Endpoint Metatraffic Data would allow us to not expect in-line QoS (Which could be a significant overhead)
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-- TODO: Is mem_addr_base needed? Isn't it a direct mirror of addr_mem_base? mem_addr_base is only used in the same clock cycle as mem_op_done is pulled high.
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entity rtps_reader is
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@ -31,12 +26,13 @@ entity rtps_reader is
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-- FROM RTPS_HANDLER (USER TRAFFIC)
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empty_user : in std_logic;
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rd_user : out std_logic;
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last_word_in_user : in std_logic;
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data_in_user : in std_logic_vector(WORD_WIDTH-1 downto 0);
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last_word_in_user : in std_logic;
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-- FROM RTPS_BUILTIN_ENDPOINT (META TRAFFIC)
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empty_meta : in std_logic;
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data_in_meta : in std_logic_vector(WORD_WIDTH-1 downto 0);
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rd_meta : out std_logic;
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data_in_meta : in std_logic_vector(WORD_WIDTH-1 downto 0);
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last_word_in_meta : in std_logic;
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-- RTPS OUTPUT
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wr_rtps : out std_logic;
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full_rtps : in std_logic;
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@ -95,10 +91,10 @@ architecture arch of rtps_reader is
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type STAGE_TYPE is (IDLE, LATCH_GUIDPREFIX, LATCH_ENTITYID, INITIATE_ENDPOINT_SEARCH, LATCH_ENDPOINT_DATA, METATRAFFIC_OPERATION, LATCH_SRC_ADDR,
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LATCH_EXTRA_DATA, LATCH_HEARTBEAT, PROCESS_HEARTBEAT, LATCH_GAP, PROCESS_GAP, FIND_NEXT_VALID_IN_BITMAP, PROCESS_INLINE_QOS, LATCH_LIFESPAN,
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LATCH_KEY_HASH, LATCH_STATUS_INFO, INITIATE_ADD_CACHE_CHANGE_REQUEST, ADD_CACHE_CHANGE, PUSH_PAYLOAD, FINALIZE_ADD_CACHE_CHANGE_REQUEST,
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ENDPOINT_STALE_CHECK, SEND_HEADER, SEND_ACKNACK, SKIP_PARAMETER, SKIP_PACKET);
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ENDPOINT_STALE_CHECK, SEND_HEADER, SEND_ACKNACK, SKIP_PARAMETER, SKIP_PACKET, SKIP_META_OPERATION);
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-- Memory FSM states. Explained below in detail
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type MEM_STAGE_TYPE is (IDLE, SEARCH_ENDPOINT, GET_ENDPOINT_DATA, INSERT_ENDPOINT, UPDATE_ENDPOINT, REMOVE_ENDPOINT, FIND_EMPTY_SLOT,
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RESET_MAX_POINTER, GET_NEXT_ENDPOINT);
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RESET_MAX_POINTER, GET_NEXT_ENDPOINT, RESET_MEMORY);
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-- *Memory FSM Opcodes*
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-- OPCODE DESCRIPTION
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-- SEARCH_ENDPOINT Find Endpoint with specified GUID in memory
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@ -320,10 +316,10 @@ begin
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read => mem_read,
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ready_in => mem_ready_in,
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valid_in => mem_valid_in,
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data_in_user => mem_write_data,
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data_in => mem_write_data,
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ready_out => mem_ready_out,
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valid_out => mem_valid_out,
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data_out_rtps => mem_read_data
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data_out => mem_read_data
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);
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-- Big Endian Representation
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@ -357,6 +353,7 @@ begin
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-- SEND_ACKNACK Send ACKNACK Submessage
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-- SKIP_PARAMETER Skip rest of Parameter
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-- SKIP_PACKET Skip rest of Packet
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-- SKIP_META_OPERATION Skip Metatraffic Operation
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parse_prc : process(all)
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variable tmp_dw : DOUBLE_WORD_ARRAY := (others => (others => '0'));
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-- NOTE: We convert the bitamp to a slv to make operations easier (The tool should handle both cases equally)
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@ -364,14 +361,14 @@ begin
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variable rd_guard : std_logic := '0';
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variable tmp_flags : std_logic_vector(0 to EMF_FLAG_WIDTH-1) := (others => '0');
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begin
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-- DEFAULT Registerd
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-- DEFAULT Registered
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stage_next <= stage;
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meta_opcode_next <= meta_opcode;
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cnt_next <= cnt;
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cnt2_next <= cnt2;
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guid_next <= guid;
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addr_next <= addr;
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portn_next <= portn;
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expects_inline_qos_next <= expects_inline_qos;
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is_meta_next <= is_meta;
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opcode_next <= opcode;
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flags_next <= flags;
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@ -399,9 +396,8 @@ begin
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rd_user <= '0';
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mem_op_start <= '0';
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start_dds <= '0';
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ready_out_dds <= '0';
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valid_out_dds <= '0';
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last_word_out_dds <= '0';
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last_word_out_dds <= '0';
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rd_guard := '0';
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mem_field_flags <= (others => '0');
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data_out_dds <= (others => '0');
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@ -446,8 +442,22 @@ begin
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-- Latch Endpoint Metatraffic Opcode
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meta_opcode_next <= data_in_meta;
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stage_next <= LATCH_GUIDPREFIX;
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cnt_next <= 0;
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case (data_in_meta) is
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when OPCODE_ENDPOINT_MATCH =>
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stage_next <= LATCH_GUIDPREFIX;
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cnt_next <= 0;
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when OPCODE_ENDPOINT_UNMATCH =>
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stage_next <= LATCH_GUIDPREFIX;
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cnt_next <= 0;
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when OPCODE_PARTICIPANT_UNMATCH =>
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stage_next <= LATCH_GUIDPREFIX;
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cnt_next <= 0;
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when OPCODE_LIVELINESS_UPDATE =>
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stage_next <= LATCH_GUIDPREFIX;
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cnt_next <= 0;
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when others =>
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stage_next <= SKIP_META_OPERATION;
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end case;
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-- Input FIFO Guard
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elsif (empty_user = '0') then
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rd_guard := '1';
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@ -499,6 +509,7 @@ begin
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end if;
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if (is_meta = '1' and (meta_opcode = OPCODE_PARTICIPANT_UNMATCH or meta_opcode = OPCODE_LIVELINESS_UPDATE)) then
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assert (last_word_in_meta = '1') report "last_word_in_meta not set" severity FAILURE;
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-- DONE Parsing
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stage_next <= INITIATE_ENDPOINT_SEARCH;
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else
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@ -510,6 +521,7 @@ begin
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-- Input FIFO Guard
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if ((is_meta = '1' and empty_meta = '0') or (is_meta = '0' and empty_user = '0')) then
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if (is_meta = '1') then
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assert (meta_opcode /= OPCODE_ENDPOINT_UNMATCH or (meta_opcode = OPCODE_ENDPOINT_UNMATCH and last_word_in_meta = '1')) "last_word_in_meta not set" severity FAILURE;
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rd_meta <= '1';
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guid_next(3) <= data_in_meta;
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-- Memory Operation Guard
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@ -555,7 +567,6 @@ begin
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stage_next <= METATRAFFIC_OPERATION;
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cnt_next <= 0;
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when others =>
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assert FALSE report "Uknown metatraffic endpoint frame opcode." severity FAILURE;
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null;
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end case;
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else
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@ -569,7 +580,7 @@ begin
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cnt_next <= 0;
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when SID_HEARTBEAT =>
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stage_next <= LATCH_HEARTBEAT;
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mem_field_flags <= EMF_NEXT_SEQ_NR_FLAG;
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mem_field_flags <= EMF_NEXT_SEQ_NR_FLAG or EMF_RES_TIME_FLAG;
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cnt_next <= 0;
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when SID_GAP =>
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stage_next <= LATCH_GAP;
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@ -594,6 +605,8 @@ begin
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addr_next <= data_in_meta;
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-- UDP Port
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when 1 =>
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assert (last_word_in_meta = '1') report "last_word_in_meta not set" severity FAILURE;
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portn_next <= data_in_meta(WORD_WIDTH-1 downto WORD_WIDTH-UDP_PORT_WIDTH-1);
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stage_next <= METATRAFFIC_OPERATION;
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@ -724,7 +737,6 @@ begin
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null;
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end case;
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when others =>
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assert FALSE report "Uknown metatraffic endpoint frame opcode." severity FAILURE;
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null;
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end case;
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end if;
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@ -823,7 +835,7 @@ begin
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end if;
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-- No scheduled Heartbeat Response
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if (mem_endpoint_data.res_time = 0) then
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if (mem_endpoint_data.res_time = TIME_INVALID) then
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-- If current Sequence Number obsolete (removed from source history cache)
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if (first_seq_nr > mem_endpoint_data.next_seq_nr and first_seq_nr <= last_seq_nr) then
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-- Store new expected Sequence Number and set Response Dealy
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@ -894,18 +906,18 @@ begin
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-- GapList.Base 2/2
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when 3 =>
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gap_list_base_next(1) <= unsigned(data_in_user);
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-- ReaderSNState.NumBits
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-- GapList.NumBits
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when 4 =>
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gap_list_end_next <= gap_list_base + to_integer(unsigned(data_in_user));
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bitmap_cnt_next <= unsigned(round_slv(data_in_user(log2c(MAX_BITMAP_WIDTH)-1 downto 0),bitmap_cnt'length));
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cnt2_next <= 0;
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-- ReaderSNState.Bitmap
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-- GapList.Bitmap
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when 5 =>
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-- Read Bitmap
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if (cnt2 < bitmap_cnt) then
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cnt2_next <= cnt2 + 1;
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bitmap_latch_next(cnt2) <= data_in_swapped;
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bitmap_latch_next(cnt2) <= data_in_user;
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-- Keep Sub-State
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cnt_next <= cnt;
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@ -1120,12 +1132,17 @@ begin
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stage_next <= SKIP_PARAMETER;
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end if;
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when INITIATE_ADD_CACHE_CHANGE_REQUEST =>
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start_dds <= '1';
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opcode_dds <= ADD_CACHE_CHANGE;
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-- Wait until History Cache acknowledges request
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if (res_dds = ACK) then
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stage_next <= ADD_CACHE_CHANGE;
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cnt_next <= 0;
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-- SANITY CHECK: Skip if no Hash Key and no payload
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if (WITH_KEY and key_hash_rcvd = '0' and data_flag = '0' and key_flag = '0') then
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stage_next <= SKIP_PACKET;
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else
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start_dds <= '1';
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opcode_dds <= ADD_CACHE_CHANGE;
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-- Wait until History Cache acknowledges request
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if (res_dds = ACK) then
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stage_next <= ADD_CACHE_CHANGE;
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cnt_next <= 0;
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end if;
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end if;
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when ADD_CACHE_CHANGE =>
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case (cnt) is
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@ -1218,8 +1235,10 @@ begin
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-- Output Guard
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if (ready_out_dds = '1') then
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-- NOTE: We only push the Payload if there is Data, or if the Key Hash was not received and we need to push
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-- the serialized Key.
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-- Payload exists
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if (data_flag = '1' or (WITH_KEY and key_flag = '1')) then
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if (data_flag = '1' or (WITH_KEY and key_hash_rcvd = '0')) then
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stage_next <= PUSH_PAYLOAD;
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else
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-- DONE
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@ -1331,7 +1350,7 @@ begin
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end if;
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else
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-- Update Check Time
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if (mem_endpoint_data.res_time /= TIME_INVALID and mem_endpoint_data.lease_deadline /= TIME_INVALID and mem_endpoint_data.res_time < mem_endpoint_data.lease_deadline) then
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if (RELIABILTY_QOS = RELIABLE_RELIABILITY_QOS and mem_endpoint_data.res_time /= TIME_INVALID and mem_endpoint_data.lease_deadline /= TIME_INVALID and mem_endpoint_data.res_time < mem_endpoint_data.lease_deadline) then
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if (mem_endpoint_data.res_time < check_time) then
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check_time_next <= mem_endpoint_data.res_time;
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end if;
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@ -1369,7 +1388,7 @@ begin
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mem_field_flags <= RES_TIME_FLAG;
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-- Send ACKNACK
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-- Increment Heartbeat/Acknack Counter
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-- Increment Acknack Counter
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count_next <= count + 1;
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stage_next <= SEND_HEADER;
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return_stage_next <= SEND_ACKNACK;
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@ -1510,6 +1529,14 @@ begin
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-- Skip-Read
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rd_guard := '1';
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end if;
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when SKIP_META_OPERATION =>
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-- Skip-Read
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rd_meta <= '1';
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-- Exit Condition
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if (last_word_in_meta = '1') then
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stage_next <= IDLE;
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end if;
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when others =>
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null;
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end case;
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@ -1556,6 +1583,7 @@ begin
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-- FIND_EMPTY_SLOT Find first empty_user slot in memory.
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-- RESET_MAX_POINTER Reset the max_endpoint_addr pointer to last occupied slot in memory.
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-- GET_NEXT_ENDPOINT See Memory OPCODE Description
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-- RESET_MEMORY Reset Endpoint Memory to Empty State
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mem_ctrl_prc : process(all)
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begin
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-- DEFAULT Registered
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@ -1669,8 +1697,7 @@ begin
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end if;
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when SEARCH_ENDPOINT =>
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case (mem_cnt) is
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-- *READ ADDRESS*
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-- Entity ID
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-- GET Entity ID
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when 0 =>
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mem_addr <= mem_addr_base + EMF_ENTITYID_OFFSET;
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mem_read <= '1';
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@ -1679,7 +1706,7 @@ begin
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if (mem_ready_in = '1') then
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mem_cnt_next <= mem_cnt + 1;
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end if;
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-- GUID Prefix 1/3
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-- GET GUID Prefix 1/3
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when 1 =>
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mem_addr <= mem_addr_base + EMF_GUIDPREFIX_OFFSET;
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mem_read <= '1';
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@ -1688,7 +1715,7 @@ begin
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if (mem_ready_in = '1') then
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mem_cnt_next <= mem_cnt + 1;
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end if;
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-- GUID Prefix 2/3
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-- GET GUID Prefix 2/3
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when 2 =>
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mem_addr <= mem_addr_base + EMF_GUIDPREFIX_OFFSET + 1;
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mem_read <= '1';
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@ -1697,7 +1724,7 @@ begin
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if (mem_ready_in = '1') then
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mem_cnt_next <= mem_cnt + 1;
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end if;
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-- GUID Prefix 3/3
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-- GET GUID Prefix 3/3
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when 3 =>
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mem_addr <= mem_addr_base + EMF_GUIDPREFIX_OFFSET + 2;
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mem_read <= '1';
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@ -1706,8 +1733,7 @@ begin
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if (mem_ready_in = '1') then
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mem_cnt_next <= mem_cnt + 1;
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end if;
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-- *READ DATA*
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-- Entity ID
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-- READ Entity ID
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when 4 =>
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mem_ready_out <= '1';
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-- Memory Flow Control Guard
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@ -1730,7 +1756,7 @@ begin
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mem_cnt_next <= mem_cnt + 1;
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end if;
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end if;
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-- GUID Prefix 1/3
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-- READ GUID Prefix 1/3
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when 5 =>
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mem_ready_out <= '1';
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-- Memory Flow Control Guard
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@ -1753,7 +1779,7 @@ begin
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mem_cnt_next <= mem_cnt + 1;
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end if;
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end if;
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-- GUID Prefix 2/3
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-- READ GUID Prefix 2/3
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when 6 =>
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mem_ready_out <= '1';
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-- Memory Flow Control Guard
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@ -1776,7 +1802,7 @@ begin
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mem_cnt_next <= mem_cnt + 1;
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end if;
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end if;
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-- GUID Prefix 3/3
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-- READ GUID Prefix 3/3
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when 7 =>
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mem_ready_out <= '1';
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-- Memory Flow Control Guard
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@ -1827,8 +1853,7 @@ begin
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when GET_ENDPOINT_DATA =>
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case (mem_cnt) is
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-- *READ ADDR*
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-- Entity ID
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-- GET Entity ID
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when 0 =>
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mem_valid_in <= '1';
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mem_addr <= mem_addr_base + EMF_ENTITYID_OFFSET;
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@ -1851,7 +1876,7 @@ begin
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mem_cnt_next <= 12;
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end if;
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end if;
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-- GUID Prefix 1/3
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-- GET GUID Prefix 1/3
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when 1 =>
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mem_valid_in <= '1';
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mem_addr <= mem_addr_base + EMF_GUIDPREFIX_OFFSET;
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@ -1860,7 +1885,7 @@ begin
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if (mem_ready_in = '1') then
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mem_cnt_next <= mem_cnt + 1;
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end if;
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-- GUID Prefix 2/3
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-- GET GUID Prefix 2/3
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when 2 =>
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mem_valid_in <= '1';
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mem_addr <= mem_addr_base + EMF_GUIDPREFIX_OFFSET + 1;
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@ -1869,7 +1894,7 @@ begin
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if (mem_ready_in = '1') then
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mem_cnt_next <= mem_cnt + 1;
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end if;
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-- GUID Prefix 3/3
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-- GET GUID Prefix 3/3
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when 3 =>
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mem_valid_in <= '1';
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mem_addr <= mem_addr_base + EMF_GUIDPREFIX_OFFSET + 2;
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@ -1894,7 +1919,7 @@ begin
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end if;
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end if;
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end if;
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-- IPv4 Address
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-- GET IPv4 Address
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when 4 =>
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-- Synthesis Guard
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if (RELIABILTY_QOS = RELIABLE_RELIABILITY_QOS) then
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@ -1922,7 +1947,7 @@ begin
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end if;
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end if;
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end if;
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-- UDP Port/ Flags
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-- GET UDP Port/ Flags
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when 5 =>
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-- Synthesis Guard
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if (RELIABILTY_QOS = RELIABLE_RELIABILITY_QOS) then
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@ -1950,7 +1975,7 @@ begin
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end if;
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end if;
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end if;
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-- Next Sequence Number 1/2
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-- GET Next Sequence Number 1/2
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when 6 =>
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mem_valid_in <= '1';
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mem_addr <= mem_addr_base + EMF_NEXT_SEQ_NR_OFFSET;
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@ -1959,7 +1984,7 @@ begin
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if (mem_ready_in = '1') then
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mem_cnt_next <= mem_cnt + 1;
|
||||
end if;
|
||||
-- Next Sequence Number 2/2
|
||||
-- GET Next Sequence Number 2/2
|
||||
when 7 =>
|
||||
mem_valid_in <= '1';
|
||||
mem_addr <= mem_addr_base + EMF_NEXT_SEQ_NR_OFFSET + 1;
|
||||
@ -1984,7 +2009,7 @@ begin
|
||||
end if;
|
||||
end if;
|
||||
end if;
|
||||
-- Lease Deadline 1/2
|
||||
-- GET Lease Deadline 1/2
|
||||
when 8 =>
|
||||
mem_valid_in <= '1';
|
||||
mem_addr <= mem_addr_base + EMF_LEASE_DEADLINE_OFFSET;
|
||||
@ -1993,7 +2018,7 @@ begin
|
||||
if (mem_ready_in = '1') then
|
||||
mem_cnt_next <= mem_cnt + 1;
|
||||
end if;
|
||||
-- Lease Deadline 2/2
|
||||
-- GET Lease Deadline 2/2
|
||||
when 9 =>
|
||||
mem_valid_in <= '1';
|
||||
mem_addr <= mem_addr_base + EMF_LEASE_DEADLINE_OFFSET + 1;
|
||||
@ -2018,7 +2043,7 @@ begin
|
||||
end if;
|
||||
end if;
|
||||
end if;
|
||||
-- Response Time 1/2
|
||||
-- GET Response Time 1/2
|
||||
when 10 =>
|
||||
-- Synthesis Guard
|
||||
if (RELIABILTY_QOS = RELIABLE_RELIABILITY_QOS) then
|
||||
@ -2030,7 +2055,7 @@ begin
|
||||
mem_cnt_next <= mem_cnt + 1;
|
||||
end if;
|
||||
end if;
|
||||
-- Response Time 2/2
|
||||
-- GET Response Time 2/2
|
||||
when 11 =>
|
||||
-- Synthesis Guard
|
||||
if (RELIABILTY_QOS = RELIABLE_RELIABILITY_QOS) then
|
||||
@ -2056,8 +2081,7 @@ begin
|
||||
end if;
|
||||
end if;
|
||||
end if;
|
||||
-- *READ DATA*
|
||||
-- Entity ID
|
||||
-- READ Entity ID
|
||||
when 12 =>
|
||||
mem_ready_out <= '1';
|
||||
-- Memory Flow Control Guard
|
||||
@ -2081,7 +2105,7 @@ begin
|
||||
mem_stage_next <= IDLE;
|
||||
end if;
|
||||
end if;
|
||||
-- GUID Prefix 1/3
|
||||
-- READ GUID Prefix 1/3
|
||||
when 13 =>
|
||||
mem_ready_out <= '1';
|
||||
-- Memory Flow Control Guard
|
||||
@ -2090,7 +2114,7 @@ begin
|
||||
|
||||
mem_cnt_next <= mem_cnt + 1;
|
||||
end if;
|
||||
-- GUID Prefix 2/3
|
||||
-- READ GUID Prefix 2/3
|
||||
when 14 =>
|
||||
mem_ready_out <= '1';
|
||||
-- Memory Flow Control Guard
|
||||
@ -2099,7 +2123,7 @@ begin
|
||||
|
||||
mem_cnt_next <= mem_cnt + 1;
|
||||
end if;
|
||||
-- GUID Prefix 3/3
|
||||
-- READ GUID Prefix 3/3
|
||||
when 15 =>
|
||||
mem_ready_out <= '1';
|
||||
-- Memory Flow Control Guard
|
||||
@ -2121,7 +2145,7 @@ begin
|
||||
mem_stage_next <= IDLE;
|
||||
end if;
|
||||
end if;
|
||||
-- IPv4 Address
|
||||
-- READ IPv4 Address
|
||||
when 16 =>
|
||||
-- Synthesis Guard
|
||||
if (RELIABILTY_QOS = RELIABLE_RELIABILITY_QOS) then
|
||||
@ -2144,7 +2168,7 @@ begin
|
||||
end if;
|
||||
end if;
|
||||
end if;
|
||||
-- UDP Port
|
||||
-- READ UDP Port
|
||||
when 17 =>
|
||||
-- Synthesis Guard
|
||||
if (RELIABILTY_QOS = RELIABLE_RELIABILITY_QOS) then
|
||||
@ -2165,7 +2189,7 @@ begin
|
||||
end if;
|
||||
end if;
|
||||
end if;
|
||||
-- Next Sequence Number 1/2
|
||||
-- READ Next Sequence Number 1/2
|
||||
when 18 =>
|
||||
mem_ready_out <= '1';
|
||||
-- Memory Flow Control Guard
|
||||
@ -2174,7 +2198,7 @@ begin
|
||||
|
||||
mem_cnt_next <= mem_cnt + 1;
|
||||
end if;
|
||||
-- Next Sequence Number 2/2
|
||||
-- READ Next Sequence Number 2/2
|
||||
when 19 =>
|
||||
mem_ready_out <= '1';
|
||||
-- Memory Flow Control Guard
|
||||
@ -2190,7 +2214,7 @@ begin
|
||||
mem_stage_next <= IDLE;
|
||||
end if;
|
||||
end if;
|
||||
-- Lease Deadline 1/2
|
||||
-- READ Lease Deadline 1/2
|
||||
when 20 =>
|
||||
mem_ready_out <= '1';
|
||||
-- Memory Flow Control Guard
|
||||
@ -2199,7 +2223,7 @@ begin
|
||||
|
||||
mem_cnt_next <= mem_cnt + 1;
|
||||
end if;
|
||||
-- Lease Deadline 2/2
|
||||
-- READ Lease Deadline 2/2
|
||||
when 21 =>
|
||||
mem_ready_out <= '1';
|
||||
-- Memory Flow Control Guard
|
||||
@ -2213,7 +2237,7 @@ begin
|
||||
mem_stage_next <= IDLE;
|
||||
end if;
|
||||
end if;
|
||||
-- Response Time 1/2
|
||||
-- READ Response Time 1/2
|
||||
when 22 =>
|
||||
-- Synthesis Guard
|
||||
if (RELIABILTY_QOS = RELIABLE_RELIABILITY_QOS) then
|
||||
@ -2225,7 +2249,7 @@ begin
|
||||
mem_cnt_next <= mem_cnt + 1;
|
||||
end if;
|
||||
end if;
|
||||
-- Response Time 2/2
|
||||
-- READ Response Time 2/2
|
||||
when 23 =>
|
||||
-- Synthesis Guard
|
||||
if (RELIABILTY_QOS = RELIABLE_RELIABILITY_QOS) then
|
||||
@ -2415,7 +2439,8 @@ begin
|
||||
mem_write_data <= std_logic_vector(mem_endpoint_latch_data.next_seq_nr(0));
|
||||
-- Memory Flow Control Guard
|
||||
if (mem_ready_in = '1')
|
||||
mem_cnt_next <= mem_cnt + 1;
|
||||
mem_cnt_next <= mem_cnt + 1;
|
||||
end if;
|
||||
-- Next Sequence Number 2/2
|
||||
when 3 =>
|
||||
mem_valid_in <= '1';
|
||||
@ -2561,8 +2586,7 @@ begin
|
||||
end case;
|
||||
when RESET_MAX_POINTER =>
|
||||
case (mem_cnt) is
|
||||
-- *READ ADDRESS*
|
||||
-- Entity ID
|
||||
-- GET Entity ID
|
||||
when 0 =>
|
||||
mem_addr <= mem_addr_base + EMF_ENTITYID_OFFSET;
|
||||
mem_read <= '1';
|
||||
@ -2572,8 +2596,7 @@ begin
|
||||
if (mem_ready_in = '1') then
|
||||
mem_cnt_next <= 1;
|
||||
end if;
|
||||
-- *READ DATA*
|
||||
-- Entity ID
|
||||
-- READ Entity ID
|
||||
when 1 =>
|
||||
mem_ready_out <= '1';
|
||||
|
||||
@ -2618,8 +2641,7 @@ begin
|
||||
end case;
|
||||
when GET_NEXT_ENDPOINT =>
|
||||
case (mem_cnt) is
|
||||
-- *READ ADDRESS*
|
||||
-- Entity ID
|
||||
-- GET Entity ID
|
||||
when 0 =>
|
||||
mem_valid_in <= '1';
|
||||
mem_read <= '1';
|
||||
@ -2629,8 +2651,7 @@ begin
|
||||
if (mem_ready_in = '1') then
|
||||
mem_cnt_next <= 1;
|
||||
end if;
|
||||
-- *READ DATA*
|
||||
-- Entity ID
|
||||
-- READ Entity ID
|
||||
when 1 =>
|
||||
mem_ready_out <= '1';
|
||||
|
||||
@ -2677,6 +2698,32 @@ begin
|
||||
when others =>
|
||||
null;
|
||||
end case;
|
||||
when RESET_MEMORY =>
|
||||
case (mem_cnt) is
|
||||
-- Initiate Reset
|
||||
when 0 =>
|
||||
mem_addr_base_next <= FIRST_ENDPOINT_ADDRESS;
|
||||
mem_cnt_next <= mem_cnt + 1;
|
||||
-- Reset Memory
|
||||
when 1 =>
|
||||
mem_valid_in <= '1';
|
||||
mem_addr <= mem_addr_base + EMF_ENTITYID_OFFSET;
|
||||
mem_write_data <= ENTITYID_UNKNOWN;
|
||||
|
||||
-- Memory Flow Control Guard
|
||||
if (mem_ready_in = '1') then
|
||||
-- End of Memory
|
||||
if (mem_addr_base = MAX_ENDPOINT_ADDRESS) then
|
||||
-- DONE
|
||||
mem_stage_next <= IDLE;
|
||||
else
|
||||
-- Next Endpoint Frame
|
||||
mem_addr_base_next <= mem_addr_base + ENDPOINT_FRAME_SIZE;
|
||||
end if;
|
||||
end if;
|
||||
when others =>
|
||||
null;
|
||||
end case;
|
||||
when others =>
|
||||
null;
|
||||
end case;
|
||||
|
||||
Loading…
Reference in New Issue
Block a user