Remove GENERATION_COUNTERS Option
Generation Counters are always needed (e.g. for the calculation of the view_state, since they are dependent on the reading of samples of the last generation). As such, the Generation Counters were "converted" to mandatory fields.
This commit is contained in:
parent
bdb397ae7d
commit
f152abc373
16
src/REF.txt
16
src/REF.txt
@ -354,9 +354,9 @@ READER
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+-------------------------------------------------------------+
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+-------------------------------------------------------------+
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06| INSTANCE_ADDRESS | {A}
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06| INSTANCE_ADDRESS | {A}
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+-------------------------------------------------------------+
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+-------------------------------------------------------------+
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07| DISPOSED_GENERATION_COUNT | {A} [only GENERATION_COUNTERS]
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07| DISPOSED_GENERATION_COUNT | {A}
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+-------------------------------------------------------------+
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+-------------------------------------------------------------+
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08| NO_WRITERS_GENERATION_COUNT | {A} [only GENERATION_COUNTERS]
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08| NO_WRITERS_GENERATION_COUNT | {A}
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+-------------------------------------------------------------+
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+-------------------------------------------------------------+
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09| PREV_ADDRESS | {A}
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09| PREV_ADDRESS | {A}
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+-------------------------------------------------------------+
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+-------------------------------------------------------------+
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@ -441,9 +441,9 @@ INSTANCE MEMORY
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+-------------------------------------------------------------+
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+-------------------------------------------------------------+
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06| SAMPLE_COUNT | {A/B}
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06| SAMPLE_COUNT | {A/B}
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+-------------------------------------------------------------+
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+-------------------------------------------------------------+
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07| DISPOSED_GENERATION_COUNT | {A} [only GENERATION_COUNTERS]
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07| DISPOSED_GENERATION_COUNT | {A}
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+-------------------------------------------------------------+
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+-------------------------------------------------------------+
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08| NO_WRITERS_GENERATION_COUNT | {A} [only GENERATION_COUNTERS]
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08| NO_WRITERS_GENERATION_COUNT | {A}
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+-------------------------------------------------------------+
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+-------------------------------------------------------------+
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09| |
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09| |
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+ IGNORE_DEADLINE + {A} [only TIME_BASED_FILTER]
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+ IGNORE_DEADLINE + {A} [only TIME_BASED_FILTER]
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@ -600,6 +600,14 @@ Scenario 2: With SHARED ownership and destination order by SOURCE timestamp, re
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associated with the instance would forget the source timestamp when the deletion occurs and if a different
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associated with the instance would forget the source timestamp when the deletion occurs and if a different
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DataWriter where to write the instance with an earlier timestamp the update would be incorrectly accepted.
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DataWriter where to write the instance with an earlier timestamp the update would be incorrectly accepted.
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2.2.2.5.3.8 read (DDS)
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Samples that contain no data do not count towards the limits imposed by the RESOURCE_LIMITS QoS policy.
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2.2.2.5.3.8 read (DDS)
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The act of reading a sample sets its sample_state to READ. If the sample belongs to the most recent
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generation of the instance, it will also set the view_state of the instance to NOT_NEW. It will not
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affect the instance_state of the instance.
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INVALIDATION
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INVALIDATION
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============
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============
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@ -11,7 +11,6 @@ entity history_cache is
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MAX_SAMPLES_PER_INSTANCE : natural := DEFAULT_MAX_SAMPLES_PER_INSTANCE;
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MAX_SAMPLES_PER_INSTANCE : natural := DEFAULT_MAX_SAMPLES_PER_INSTANCE;
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HISTORY_QOS : std_logic_vector(CDR_ENUMERATION_WIDTH-1 downto 0) := DEFAULT_HISTORY_QOS;
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HISTORY_QOS : std_logic_vector(CDR_ENUMERATION_WIDTH-1 downto 0) := DEFAULT_HISTORY_QOS;
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RELIABILITY_QOS : std_logic_vector(CDR_ENUMERATION_WIDTH-1 downto 0) := DEFAULT_RELIABILTY_QOS;
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RELIABILITY_QOS : std_logic_vector(CDR_ENUMERATION_WIDTH-1 downto 0) := DEFAULT_RELIABILTY_QOS;
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GENERATION_COUNTERS : boolean := TRUE;
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);
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);
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port (
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port (
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clk : in std_logic;
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clk : in std_logic;
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@ -30,6 +29,9 @@ entity history_cache is
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res_b : out HISTORY_CACHE_RESPOSNE_TYPE;
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res_b : out HISTORY_CACHE_RESPOSNE_TYPE;
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data_out_b : out std_logic_vector(WORD_WIDTH-1 downto 0);
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data_out_b : out std_logic_vector(WORD_WIDTH-1 downto 0);
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last_word_out_b : in std_logic;
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last_word_out_b : in std_logic;
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instance_state : in INSTANCE_STATE_TYPE;
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view_state : in VIEW_STATE_TYPE;
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sample_state : in SAMPLE_STATE;
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);
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);
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end entity;
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end entity;
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@ -82,7 +84,7 @@ architecture arch of history_cache is
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constant SMF_INSTANCE_ADDR_OFFSET : natural := 6;
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constant SMF_INSTANCE_ADDR_OFFSET : natural := 6;
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constant SMF_DISPOSED_GEN_CNT_OFFSET : natural := 7;
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constant SMF_DISPOSED_GEN_CNT_OFFSET : natural := 7;
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constant SMF_NO_WRITERS_GEN_CNT_OFFSET : natural := 8;
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constant SMF_NO_WRITERS_GEN_CNT_OFFSET : natural := 8;
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constant SMF_PREV_ADDR_OFFSET : natural := SMF_NO_WRITERS_GEN_CNT_OFFSET+1 when GENERATION_COUNTERS else SMF_INSTANCE_ADDR_OFFSET+1;
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constant SMF_PREV_ADDR_OFFSET : natural := SMF_NO_WRITERS_GEN_CNT_OFFSET+1;
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constant SMF_NEXT_ADDR_OFFSET : natural := SMF_PREV_ADDR_OFFSET+1;
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constant SMF_NEXT_ADDR_OFFSET : natural := SMF_PREV_ADDR_OFFSET+1;
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-- *PAYLOAD MEMORY FRAME FORMAT*
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-- *PAYLOAD MEMORY FRAME FORMAT*
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constant PMF_NEXT_ADDR_OFFSET : natural := 0;
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constant PMF_NEXT_ADDR_OFFSET : natural := 0;
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@ -94,11 +96,8 @@ architecture arch of history_cache is
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constant IMF_SAMPLE_CNT_OFFSET : natural := 6;
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constant IMF_SAMPLE_CNT_OFFSET : natural := 6;
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constant IMF_DISPOSED_GEN_CNT_OFFSET : natural := IMF_SAMPLE_CNT_OFFSET+1 when (MAX_SAMPLES_PER_INSTANCE /= LENGTH_UNLIMITED) else IMF_STATUS_INFO_OFFSET+1;
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constant IMF_DISPOSED_GEN_CNT_OFFSET : natural := IMF_SAMPLE_CNT_OFFSET+1 when (MAX_SAMPLES_PER_INSTANCE /= LENGTH_UNLIMITED) else IMF_STATUS_INFO_OFFSET+1;
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constant IMF_NO_WRITERS_GEN_CNT_OFFSET : natural := IMF_DISPOSED_GEN_CNT_OFFSET+1;
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constant IMF_NO_WRITERS_GEN_CNT_OFFSET : natural := IMF_DISPOSED_GEN_CNT_OFFSET+1;
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constant IMF_IGNORE_DEADLINE_OFFSET : natural := IMF_NO_WRITERS_GEN_CNT_OFFSET+1 when (GENERATION_COUNTERS) else
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constant IMF_IGNORE_DEADLINE_OFFSET : natural := IMF_NO_WRITERS_GEN_CNT_OFFSET+1;
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IMF_SAMPLE_CNT_OFFSET+1 when (MAX_SAMPLES_PER_INSTANCE /= LENGTH_UNLIMITED) else IMF_STATUS_INFO_OFFSET+1;
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constant IMF_WRITER_BITMAP_OFFSET : natural := IMF_IGNORE_DEADLINE_OFFSET+2 when (TIME_BASED_FILTER_QOS /= DURATION_ZERO) else IMF_NO_WRITERS_GEN_CNT_OFFSET+1;
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constant IMF_WRITER_BITMAP_OFFSET : natural := IMF_IGNORE_DEADLINE_OFFSET+2 when (TIME_BASED_FILTER_QOS /= DURATION_ZERO) else
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IMF_NO_WRITERS_GEN_CNT_OFFSET+1 when (GENERATION_COUNTERS) else
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IMF_SAMPLE_CNT_OFFSET+1 when (MAX_SAMPLES_PER_INSTANCE /= LENGTH_UNLIMITED) else IMF_STATUS_INFO_OFFSET+1;
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--*****TYPE DECLARATION*****
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--*****TYPE DECLARATION*****
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-- FSM states. Explained below in detail
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-- FSM states. Explained below in detail
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@ -177,7 +176,7 @@ architecture arch of history_cache is
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signal sample_mem_full, sample_mem_full_next : std_logic := '0';
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signal sample_mem_full, sample_mem_full_next : std_logic := '0';
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signal writer_pos, writer_pos_next : natural range TODO := 0;
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signal writer_pos, writer_pos_next : natural range TODO := 0;
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signal writer_bitmap : ENDPOINT_BITMAP_ARRAY_TYPE;
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signal writer_bitmap : ENDPOINT_BITMAP_ARRAY_TYPE;
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signal instance_state : INSTANCE_STATE_TYPE := ALIVE;
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signal instance_state_update : INSTANCE_STATE_TYPE := ALIVE;
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signal key_hash, key_hash_next : KEY_HASH_TYPE := (others => (others => '0'));
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signal key_hash, key_hash_next : KEY_HASH_TYPE := (others => (others => '0'));
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signal remove_oldest_sample, remove_oldest_sample_next : std_logic := '0';
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signal remove_oldest_sample, remove_oldest_sample_next : std_logic := '0';
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signal remove_oldest_inst_sample, remove_oldest_inst_sample_next : std_logic := '0';
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signal remove_oldest_inst_sample, remove_oldest_inst_sample_next : std_logic := '0';
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@ -564,7 +563,7 @@ begin
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-- Wait for Instance Search to finish
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-- Wait for Instance Search to finish
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if (inst_op_done = '1') then
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if (inst_op_done = '1') then
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sample_addr_next <= sample_addr + 1; -- Disposed Gen Counter (Prev Address if GENERATION_COUNTERS=FALSE)
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sample_addr_next <= sample_addr + 1; -- Disposed Gen Counter
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-- Instance Found
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-- Instance Found
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if (inst_addr_base /= INSTANCE_MEMORY_MAX_ADDRESS) then
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if (inst_addr_base /= INSTANCE_MEMORY_MAX_ADDRESS) then
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@ -641,7 +640,7 @@ begin
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cnt_next <= 0;
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cnt_next <= 0;
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else
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else
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stage_next <= PRE_SAMPLE_FINALIZE;
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stage_next <= PRE_SAMPLE_FINALIZE;
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cnt_next <= 0 when GENERATION_COUNTERS else 2;
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cnt_next <= 0;
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end if;
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end if;
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else
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else
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-- Drop Change
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-- Drop Change
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@ -664,7 +663,7 @@ begin
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cnt_next <= 0;
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cnt_next <= 0;
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else
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else
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stage_next <= PRE_SAMPLE_FINALIZE;
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stage_next <= PRE_SAMPLE_FINALIZE;
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cnt_next <= 0 when GENERATION_COUNTERS else 2;
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cnt_next <= 0;
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end if;
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end if;
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else
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else
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-- Drop Change
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-- Drop Change
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@ -685,7 +684,7 @@ begin
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if (inst_data.status_info(NOT_ALIVE_DISPOSED_FLAG) /= '1' and inst_data.status_info(NOT_ALIVE_NO_WRITERS_FLAG) /= '1') then
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if (inst_data.status_info(NOT_ALIVE_DISPOSED_FLAG) /= '1' and inst_data.status_info(NOT_ALIVE_NO_WRITERS_FLAG) /= '1') then
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-- STATUS INFO
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-- STATUS INFO
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tmp_update <= tmp_update or STATUS_FLAG;
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tmp_update <= tmp_update or STATUS_FLAG;
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instance_state <= NOT_ALIVE_DISPOSED;
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instance_state_update <= NOT_ALIVE_DISPOSED;
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end if;
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end if;
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-- WRITER BITMAP
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-- WRITER BITMAP
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-- Convert Writer Bitmap to SLV
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-- Convert Writer Bitmap to SLV
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@ -710,25 +709,23 @@ begin
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if (inst_data.status_info(NOT_ALIVE_DISPOSED_FLAG) /= '1' and inst_data.status_info(NOT_ALIVE_NO_WRITERS_FLAG) /= '1' and tmp_bitmap = (tmp_bitmap => '0')) then
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if (inst_data.status_info(NOT_ALIVE_DISPOSED_FLAG) /= '1' and inst_data.status_info(NOT_ALIVE_NO_WRITERS_FLAG) /= '1' and tmp_bitmap = (tmp_bitmap => '0')) then
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-- STATUS INFO
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-- STATUS INFO
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tmp_update <= tmp_update or STATUS_FLAG;
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tmp_update <= tmp_update or STATUS_FLAG;
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instance_state <= NOT_ALIVE_NO_WRITERS;
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instance_state_update <= NOT_ALIVE_NO_WRITERS;
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end if;
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end if;
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-- Instance ALIVE/FILTERED
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-- Instance ALIVE/FILTERED
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else
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else
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-- STATUS INFO
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-- STATUS INFO
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tmp_update <= tmp_update or STATUS_FLAG;
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tmp_update <= tmp_update or STATUS_FLAG;
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instance_state <= ALIVE;
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instance_state_update <= ALIVE;
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-- GENERATION COUNTERS
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-- GENERATION COUNTERS
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if (GENERATION_COUNTERS) then
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-- NOT_ALIVE_DISPOSED -> ALIVE Transition
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-- NOT_ALIVE_DISPOSED -> ALIVE Transition
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if (inst_data.status_info(NOT_ALIVE_DISPOSED_FLAG) = '1') then
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if (inst_data.status_info(NOT_ALIVE_DISPOSED_FLAG) = '1') then
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tmp_update := tmp_update or DISPOSED_CNT_FLAG;
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tmp_update := tmp_update or DISPOSED_CNT_FLAG;
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gen_cnt <= inst_data.disposed_gen_cnt + 1;
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gen_cnt <= inst_data.disposed_gen_cnt + 1;
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-- NOT_ALIVE_NO_WRITERS -> ALIVE Transition
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-- NOT_ALIVE_NO_WRITERS -> ALIVE Transition
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elsif (inst_data.status_info(NOT_ALIVE_NO_WRITERS_FLAG) = '1') then
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elsif (inst_data.status_info(NOT_ALIVE_NO_WRITERS_FLAG) = '1') then
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tmp_update := tmp_update or NO_WRITERS_CNT_FLAG;
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tmp_update := tmp_update or NO_WRITERS_CNT_FLAG;
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gen_cnt <= inst_data.no_writers_gen_cnt + 1;
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gen_cnt <= inst_data.no_writers_gen_cnt + 1;
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end if;
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end if;
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end if;
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-- WRITER BITMAP
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-- WRITER BITMAP
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@ -765,7 +762,7 @@ begin
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cnt_next <= 0;
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cnt_next <= 0;
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else
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else
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stage_next <= PRE_SAMPLE_FINALIZE;
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stage_next <= PRE_SAMPLE_FINALIZE;
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cnt_next <= 0 when GENERATION_COUNTERS else 2;
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cnt_next <= 0;
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end if;
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end if;
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end if;
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end if;
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when FINALIZE_PAYLOAD =>
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when FINALIZE_PAYLOAD =>
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@ -786,7 +783,7 @@ begin
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payload_wen <= '1';
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payload_wen <= '1';
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stage_next <= PRE_SAMPLE_FINALIZE;
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stage_next <= PRE_SAMPLE_FINALIZE;
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cnt_next <= 0 when GENERATION_COUNTERS else 2;
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cnt_next <= 0;
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when others =>
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when others =>
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null;
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null;
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end case;
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end case;
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@ -798,28 +795,24 @@ begin
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case (cnt) is
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case (cnt) is
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-- Disposed Generation Counter
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-- Disposed Generation Counter
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when 0 =>
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when 0 =>
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if (GENERATION_COUNTERS) then
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sample_addr_next <= sample_addr + 1;
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sample_addr_next <= sample_addr + 1;
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sample_wen <= '1';
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sample_wen <= '1';
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-- NOT_ALIVE_DISPOSED -> ALIVE Transition
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-- NOT_ALIVE_DISPOSED -> ALIVE Transition
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if (inst_data.status_info(NOT_ALIVE_DISPOSED_FLAG) = '1' and sample_status_info(NOT_ALIVE_DISPOSED_FLAG) = '0' and sample_status_info(NOT_ALIVE_NO_WRITERS_FLAG) = '0') then
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if (inst_data.status_info(NOT_ALIVE_DISPOSED_FLAG) = '1' and sample_status_info(NOT_ALIVE_DISPOSED_FLAG) = '0' and sample_status_info(NOT_ALIVE_NO_WRITERS_FLAG) = '0') then
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sample_write_data <= gen_cnt + 1;
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sample_write_data <= gen_cnt + 1;
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else
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else
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sample_write_data <= gen_cnt;
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sample_write_data <= gen_cnt;
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end if;
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end if;
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end if;
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-- No Writer Generation Counter
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-- No Writer Generation Counter
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when 1 =>
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when 1 =>
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if (GENERATION_COUNTERS) then
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sample_wen <= '1';
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sample_wen <= '1';
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-- NOT_ALIVE_NO_WRITERS -> ALIVE Transition
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-- NOT_ALIVE_NO_WRITERS -> ALIVE Transition
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if (inst_data.status_info(NOT_ALIVE_NO_WRITERS_FLAG) = '1' and sample_status_info(NOT_ALIVE_DISPOSED_FLAG) = '0' and sample_status_info(NOT_ALIVE_NO_WRITERS_FLAG) = '0') then
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if (inst_data.status_info(NOT_ALIVE_NO_WRITERS_FLAG) = '1' and sample_status_info(NOT_ALIVE_DISPOSED_FLAG) = '0' and sample_status_info(NOT_ALIVE_NO_WRITERS_FLAG) = '0') then
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sample_write_data <= gen_cnt + 1;
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sample_write_data <= gen_cnt + 1;
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else
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else
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sample_write_data <= gen_cnt;
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sample_write_data <= gen_cnt;
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end if;
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end if;
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end if;
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when 2 =>
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when 2 =>
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-- First Sample
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-- First Sample
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@ -1221,7 +1214,7 @@ begin
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-- No More Writers for Instance
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-- No More Writers for Instance
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if (tmp_bitmap = (tmp_bitmap'range => '0')) then
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if (tmp_bitmap = (tmp_bitmap'range => '0')) then
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inst_op_start <= '1';
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inst_op_start <= '1';
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instance_state <= NOT_ALIVE_NO_WRITERS;
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instance_state_update <= NOT_ALIVE_NO_WRITERS;
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inst_opcode <= UPDATE_INSTANCE;
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inst_opcode <= UPDATE_INSTANCE;
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update_inst_flags <= STATUS_FLAG or WRITER_BITMAP_FLAG;
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update_inst_flags <= STATUS_FLAG or WRITER_BITMAP_FLAG;
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else
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else
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@ -1301,7 +1294,7 @@ begin
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-- Latch Signals needed for Mermory Operation (Use _next signals, because some signals are set in same clk)
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-- Latch Signals needed for Mermory Operation (Use _next signals, because some signals are set in same clk)
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inst_latch_data_next <= (
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inst_latch_data_next <= (
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key_hash => key_hash_next,
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key_hash => key_hash_next,
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instance_state => instance_state,
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instance_state => instance_state_update,
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sample_cnt => sample_cnt,
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sample_cnt => sample_cnt,
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gen_cnt => gen_cnt,
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gen_cnt => gen_cnt,
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deadline => deadline,
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deadline => deadline,
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@ -1358,11 +1351,11 @@ begin
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inst_stage_next <= UPDATE_INSTANCE;
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inst_stage_next <= UPDATE_INSTANCE;
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inst_addr_next <= inst_addr_update + IMF_SAMPLE_CNT_OFFSET;
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inst_addr_next <= inst_addr_update + IMF_SAMPLE_CNT_OFFSET;
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inst_cnt_next <= 3;
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inst_cnt_next <= 3;
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elsif (GENERATION_COUNTERS and (update_inst_flags and DISPOSED_CNT_FLAG) = DISPOSED_CNT_FLAG) then
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elsif ((update_inst_flags and DISPOSED_CNT_FLAG) = DISPOSED_CNT_FLAG) then
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inst_stage_next <= UPDATE_INSTANCE;
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inst_stage_next <= UPDATE_INSTANCE;
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inst_addr_next <= inst_addr_update + IMF_DISPOSED_GEN_CNT_OFFSET;
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inst_addr_next <= inst_addr_update + IMF_DISPOSED_GEN_CNT_OFFSET;
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inst_cnt_next <= 6;
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inst_cnt_next <= 6;
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elsif (GENERATION_COUNTERS and (update_inst_flags and NO_WRITERS_CNT_FLAG) = NO_WRITERS_CNT_FLAG) then
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elsif ((update_inst_flags and NO_WRITERS_CNT_FLAG) = NO_WRITERS_CNT_FLAG) then
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inst_stage_next <= UPDATE_INSTANCE;
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inst_stage_next <= UPDATE_INSTANCE;
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inst_addr_next <= inst_addr_update + IMF_NO_WRITERS_GEN_CNT_OFFSET;
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inst_addr_next <= inst_addr_update + IMF_NO_WRITERS_GEN_CNT_OFFSET;
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inst_cnt_next <= 7;
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inst_cnt_next <= 7;
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@ -1619,32 +1612,19 @@ begin
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-- Sample Count
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-- Sample Count
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when 7 =>
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when 7 =>
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inst_write_data <= std_logic_vector(to_unsigned(1, WORD_WIDTH));
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inst_write_data <= std_logic_vector(to_unsigned(1, WORD_WIDTH));
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-- Disposed Generation Count
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when 8 =>
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||||||
|
inst_write_data <= (others => '0');
|
||||||
|
-- No Writers Generation Count
|
||||||
|
when 9 =>
|
||||||
|
inst_write_data <= (others => '0');
|
||||||
|
|
||||||
if (GENERATION_COUNTERS) then
|
if (TIME_BASED_FILTER_QOS /= DURATION_ZERO) then
|
||||||
inst_cnt <= 8;
|
|
||||||
elsif (TIME_BASED_FILTER_QOS /= DURATION_ZERO) then
|
|
||||||
inst_cnt <= 10;
|
inst_cnt <= 10;
|
||||||
else
|
else
|
||||||
inst_stage_next <= SET_WRITER_BITMAP;
|
inst_stage_next <= SET_WRITER_BITMAP;
|
||||||
inst_cnt_next <= 0;
|
inst_cnt_next <= 0;
|
||||||
end if;
|
end if;
|
||||||
-- Disposed Generation Count
|
|
||||||
when 8 =>
|
|
||||||
if (GENERATION_COUNTERS) then
|
|
||||||
inst_write_data <= (others => '0');
|
|
||||||
end if;
|
|
||||||
-- No Writers Generation Count
|
|
||||||
when 9 =>
|
|
||||||
if (GENERATION_COUNTERS) then
|
|
||||||
inst_write_data <= (others => '0');
|
|
||||||
|
|
||||||
if (TIME_BASED_FILTER_QOS /= DURATION_ZERO) then
|
|
||||||
inst_cnt <= 10;
|
|
||||||
else
|
|
||||||
inst_stage_next <= SET_WRITER_BITMAP;
|
|
||||||
inst_cnt_next <= 0;
|
|
||||||
end if;
|
|
||||||
end if;
|
|
||||||
-- Ignore Deadline 1/2
|
-- Ignore Deadline 1/2
|
||||||
when 10 =>
|
when 10 =>
|
||||||
if (TIME_BASED_FILTER_QOS /= DURATION_ZERO) then
|
if (TIME_BASED_FILTER_QOS /= DURATION_ZERO) then
|
||||||
@ -1699,10 +1679,10 @@ begin
|
|||||||
if ((inst_latch_data.update_flags and SAMPLE_CNT_FLAG) = SAMPLE_CNT_FLAG) then
|
if ((inst_latch_data.update_flags and SAMPLE_CNT_FLAG) = SAMPLE_CNT_FLAG) then
|
||||||
inst_addr_next <= inst_addr_base + IMF_SAMPLE_CNT_OFFSET;
|
inst_addr_next <= inst_addr_base + IMF_SAMPLE_CNT_OFFSET;
|
||||||
inst_cnt_next <= 1;
|
inst_cnt_next <= 1;
|
||||||
elsif (GENERATION_COUNTERS and (inst_latch_data.update_flags and DISPOSED_CNT_FLAG) = DISPOSED_CNT_FLAG) then
|
elsif ((inst_latch_data.update_flags and DISPOSED_CNT_FLAG) = DISPOSED_CNT_FLAG) then
|
||||||
inst_addr_next <= inst_addr_base + IMF_DISPOSED_GEN_CNT_OFFSET;
|
inst_addr_next <= inst_addr_base + IMF_DISPOSED_GEN_CNT_OFFSET;
|
||||||
inst_cnt_next <= 2;
|
inst_cnt_next <= 2;
|
||||||
elsif (GENERATION_COUNTERS and (inst_latch_data.update_flags and NO_WRITERS_CNT_FLAG) = NO_WRITERS_CNT_FLAG) then
|
elsif ((inst_latch_data.update_flags and NO_WRITERS_CNT_FLAG) = NO_WRITERS_CNT_FLAG) then
|
||||||
inst_addr_next <= inst_addr_base + IMF_NO_WRITERS_GEN_CNT_OFFSET;
|
inst_addr_next <= inst_addr_base + IMF_NO_WRITERS_GEN_CNT_OFFSET;
|
||||||
inst_cnt_next <= 3;
|
inst_cnt_next <= 3;
|
||||||
elsif (TIME_BASED_FILTER_QOS /= DURATION_ZERO and (inst_latch_data.update_flags and IGNORE_DEADLINE_FLAG) = IGNORE_DEADLINE_FLAG) then
|
elsif (TIME_BASED_FILTER_QOS /= DURATION_ZERO and (inst_latch_data.update_flags and IGNORE_DEADLINE_FLAG) = IGNORE_DEADLINE_FLAG) then
|
||||||
@ -1721,10 +1701,10 @@ begin
|
|||||||
inst_wen <= '1';
|
inst_wen <= '1';
|
||||||
inst_write_data <= inst_latch_data.sample_cnt;
|
inst_write_data <= inst_latch_data.sample_cnt;
|
||||||
|
|
||||||
if (GENERATION_COUNTERS and (inst_latch_data.update_flags and DISPOSED_CNT_FLAG) = DISPOSED_CNT_FLAG) then
|
if ((inst_latch_data.update_flags and DISPOSED_CNT_FLAG) = DISPOSED_CNT_FLAG) then
|
||||||
inst_addr_next <= inst_addr_base + IMF_DISPOSED_GEN_CNT_OFFSET;
|
inst_addr_next <= inst_addr_base + IMF_DISPOSED_GEN_CNT_OFFSET;
|
||||||
inst_cnt_next <= 2;
|
inst_cnt_next <= 2;
|
||||||
elsif (GENERATION_COUNTERS and (inst_latch_data.update_flags and NO_WRITERS_CNT_FLAG) = NO_WRITERS_CNT_FLAG) then
|
elsif ((inst_latch_data.update_flags and NO_WRITERS_CNT_FLAG) = NO_WRITERS_CNT_FLAG) then
|
||||||
inst_addr_next <= inst_addr_base + IMF_NO_WRITERS_GEN_CNT_OFFSET;
|
inst_addr_next <= inst_addr_base + IMF_NO_WRITERS_GEN_CNT_OFFSET;
|
||||||
inst_cnt_next <= 3;
|
inst_cnt_next <= 3;
|
||||||
elsif (TIME_BASED_FILTER_QOS /= DURATION_ZERO and (inst_latch_data.update_flags and IGNORE_DEADLINE_FLAG) = IGNORE_DEADLINE_FLAG) then
|
elsif (TIME_BASED_FILTER_QOS /= DURATION_ZERO and (inst_latch_data.update_flags and IGNORE_DEADLINE_FLAG) = IGNORE_DEADLINE_FLAG) then
|
||||||
@ -1740,42 +1720,36 @@ begin
|
|||||||
end if;
|
end if;
|
||||||
-- Disposed Generation Count
|
-- Disposed Generation Count
|
||||||
when 2 =>
|
when 2 =>
|
||||||
if (GENERATION_COUNTERS) then
|
inst_wen <= '1';
|
||||||
inst_wen <= '1';
|
inst_write_data <= inst_latch_data.gen_cnt;
|
||||||
inst_write_data <= inst_latch_data.gen_cnt;
|
|
||||||
|
-- NOTE: Both Generation Counters cannot be updated on the same update procedure
|
||||||
if (GENERATION_COUNTERS and (inst_latch_data.update_flags and NO_WRITERS_CNT_FLAG) = NO_WRITERS_CNT_FLAG) then
|
if (TIME_BASED_FILTER_QOS /= DURATION_ZERO and (inst_latch_data.update_flags and IGNORE_DEADLINE_FLAG) = IGNORE_DEADLINE_FLAG) then
|
||||||
inst_addr_next <= inst_addr_base + IMF_NO_WRITERS_GEN_CNT_OFFSET;
|
inst_addr_next <= inst_addr_base + IMF_IGNORE_DEADLINE_OFFSET;
|
||||||
inst_cnt_next <= 3;
|
inst_cnt_next <= 4;
|
||||||
elsif (TIME_BASED_FILTER_QOS /= DURATION_ZERO and (inst_latch_data.update_flags and IGNORE_DEADLINE_FLAG) = IGNORE_DEADLINE_FLAG) then
|
elsif ((inst_latch_data.update_flags and WRITER_BITMAP_FLAG) = WRITER_BITMAP_FLAG) then
|
||||||
inst_addr_next <= inst_addr_base + IMF_IGNORE_DEADLINE_OFFSET;
|
inst_addr_next <= inst_addr_base + IMF_WRITER_BITMAP_OFFSET;
|
||||||
inst_cnt_next <= 4;
|
inst_stage_next <= SET_WRITER_BITMAP;
|
||||||
elsif ((inst_latch_data.update_flags and WRITER_BITMAP_FLAG) = WRITER_BITMAP_FLAG) then
|
inst_cnt_next <= 0;
|
||||||
inst_addr_next <= inst_addr_base + IMF_WRITER_BITMAP_OFFSET;
|
else
|
||||||
inst_stage_next <= SET_WRITER_BITMAP;
|
-- DONE
|
||||||
inst_cnt_next <= 0;
|
inst_stage_next <= IDLE;
|
||||||
else
|
|
||||||
-- DONE
|
|
||||||
inst_stage_next <= IDLE;
|
|
||||||
end if;
|
|
||||||
end if;
|
end if;
|
||||||
-- No Writers Generation Count
|
-- No Writers Generation Count
|
||||||
when 3 =>
|
when 3 =>
|
||||||
if (GENERATION_COUNTERS) then
|
inst_wen <= '1';
|
||||||
inst_wen <= '1';
|
inst_write_data <= inst_latch_data.gen_cnt;
|
||||||
inst_write_data <= inst_latch_data.gen_cnt;
|
|
||||||
|
if (TIME_BASED_FILTER_QOS /= DURATION_ZERO and (inst_latch_data.update_flags and IGNORE_DEADLINE_FLAG) = IGNORE_DEADLINE_FLAG) then
|
||||||
if (TIME_BASED_FILTER_QOS /= DURATION_ZERO and (inst_latch_data.update_flags and IGNORE_DEADLINE_FLAG) = IGNORE_DEADLINE_FLAG) then
|
inst_addr_next <= inst_addr_base + IMF_IGNORE_DEADLINE_OFFSET;
|
||||||
inst_addr_next <= inst_addr_base + IMF_IGNORE_DEADLINE_OFFSET;
|
inst_cnt_next <= 4;
|
||||||
inst_cnt_next <= 4;
|
elsif ((inst_latch_data.update_flags and WRITER_BITMAP_FLAG) = WRITER_BITMAP_FLAG) then
|
||||||
elsif ((inst_latch_data.update_flags and WRITER_BITMAP_FLAG) = WRITER_BITMAP_FLAG) then
|
inst_addr_next <= inst_addr_base + IMF_WRITER_BITMAP_OFFSET;
|
||||||
inst_addr_next <= inst_addr_base + IMF_WRITER_BITMAP_OFFSET;
|
inst_stage_next <= SET_WRITER_BITMAP;
|
||||||
inst_stage_next <= SET_WRITER_BITMAP;
|
inst_cnt_next <= 0;
|
||||||
inst_cnt_next <= 0;
|
else
|
||||||
else
|
-- DONE
|
||||||
-- DONE
|
inst_stage_next <= IDLE;
|
||||||
inst_stage_next <= IDLE;
|
|
||||||
end if;
|
|
||||||
end if;
|
end if;
|
||||||
-- Ignore Deadline 1/2
|
-- Ignore Deadline 1/2
|
||||||
when 4 =>
|
when 4 =>
|
||||||
|
|||||||
Loading…
Reference in New Issue
Block a user