From f97e7da7bb942091b9f0a2fd2e17d08cb3c6818c Mon Sep 17 00:00:00 2001 From: Greek Date: Tue, 23 Feb 2021 18:18:33 +0100 Subject: [PATCH] Fix syntax of rtps_writer --- src/REF.txt | 2 +- src/TODO.txt | 4 +- src/rtps_config_package.vhd | 2 +- src/rtps_writer.vhd | 654 +++++++++++++++++++++--------------- 4 files changed, 380 insertions(+), 282 deletions(-) diff --git a/src/REF.txt b/src/REF.txt index 55350cb..09a58b3 100644 --- a/src/REF.txt +++ b/src/REF.txt @@ -365,7 +365,7 @@ WRITER +-------------------------------------------------------------+ 04| IPv4_ADDRESS | +-----------------------------+-------------------------------+ -05| UDP_PORT | READER_FLAGS | +05| UDP_PORT | READER_FLAGS | +-----------------------------+-------------------------------+ 06| | + LEASE_DEADLINE + [Reliable Only] diff --git a/src/TODO.txt b/src/TODO.txt index 606d962..d92eaa3 100644 --- a/src/TODO.txt +++ b/src/TODO.txt @@ -257,7 +257,9 @@ DESIGN DECISIONS * Since the "reading" side needs to have consistent state during it's processing, it does not make sense to implement dual port RAMs for the History Cache. - +* Since the RTPS Writer only gets ACKNACK Messages from the matched Readers, and these Messages are + dropped by the rtps_handler if samller than expected, we do not need a "READ GUARD" in the RTPS + Writer. PROTOCOL UNCOMPLIANCE ===================== diff --git a/src/rtps_config_package.vhd b/src/rtps_config_package.vhd index 87e14d2..816e34a 100644 --- a/src/rtps_config_package.vhd +++ b/src/rtps_config_package.vhd @@ -41,7 +41,7 @@ package rtps_config_package is constant OPCODE_PARTICIPANT_UNMATCH : std_logic_vector(ENDPOINT_MATCH_OPCODE_WIDTH-1 downto 0) := x"55000002"; constant OPCODE_LIVELINESS_UPDATE : std_logic_vector(ENDPOINT_MATCH_OPCODE_WIDTH-1 downto 0) := x"55000003"; - type HISTORY_CACHE_OPCODE_TYPE is (NOP, ADD_CACHE_CHANGE, GET_CACHE_CHANGE, ACK_CACHE_CHANGE, NACK_CACHE_CHANGE, REMOVE_WRITER); + type HISTORY_CACHE_OPCODE_TYPE is (NOP, ADD_CACHE_CHANGE, GET_CACHE_CHANGE, ACK_CACHE_CHANGE, NACK_CACHE_CHANGE, REMOVE_CACHE_CHANGE, REMOVE_WRITER, GET_MIN_SN, GET_MAX_SN); type KEY_GENERATOR_OPCODE_TYPE is (NOP, WRITE_PAYLOAD, READ_KEY, READ_SIZE); type HISTORY_CACHE_RESPONSE_TYPE is (OK, REJECTED, INVALID, ERROR); diff --git a/src/rtps_writer.vhd b/src/rtps_writer.vhd index 34592c0..6bad20f 100644 --- a/src/rtps_writer.vhd +++ b/src/rtps_writer.vhd @@ -2,6 +2,7 @@ library ieee; use ieee.std_logic_1164.all; use ieee.numeric_std.all; +use work.math_pkg.all; use work.rtps_package.all; use work.user_config.all; use work.rtps_config_package.all; @@ -10,17 +11,19 @@ use work.rtps_config_package.all; entity rtps_writer is generic ( - RELIABILTY_QOS : std_logic_vector(CDR_ENUMERATION_WIDTH-1 downto 0) := DEFAULT_RELIABILTY_QOS; - LIVELINESS_QOS : std_logic_vector(CDR_ENUMERATION_WIDTH-1 downto 0) := DEFAULT_LIVELINESS_QOS; - DURABILITY_QOS : std_logic_vector(CDR_ENUMERATION_WIDTH-1 downto 0) := DEFAULT_DURABILITY_QOS; - ACKNACK_RESPONSE_DELAY : DURATION_TYPE := TODO; - ACKNACK_SUPPRESSION_DELAY : DURATION_TYPE := TODO; - LEASE_DURATION : DURATION_TYPE := DEFAULT_LEASE_DURATION; - HEARTBEAT_PERIOD : DURATION_TYPE := TODO; - ENTITYID : std_logic_vector(ENTITYID_WIDTH-1 downto 0) := ENTITYID_UNKNOWN; - WITH_KEY : boolean := FALSE; -- TODO: Default + RELIABILTY_QOS : std_logic_vector(CDR_ENUMERATION_WIDTH-1 downto 0); + LIVELINESS_QOS : std_logic_vector(CDR_ENUMERATION_WIDTH-1 downto 0); + DURABILITY_QOS : std_logic_vector(CDR_ENUMERATION_WIDTH-1 downto 0); + DESTINATION_ORDER_QOS : std_logic_vector(CDR_ENUMERATION_WIDTH-1 downto 0); + ACKNACK_RESPONSE_DELAY : DURATION_TYPE; + ACKNACK_SUPPRESSION_DELAY : DURATION_TYPE; + LEASE_DURATION : DURATION_TYPE; + HEARTBEAT_PERIOD : DURATION_TYPE; + ENTITYID : std_logic_vector(ENTITYID_WIDTH-1 downto 0); + WITH_KEY : boolean; + PUSH_MODE : boolean; INLINE_QOS : OUTPUT_DATA_TYPE; - PUSH_MODE : boolean := TRUE; + MAX_REMOTE_ENDPOINTS : natural := 50 ); port ( -- SYSTEM @@ -38,7 +41,7 @@ entity rtps_writer is data_in_meta : in std_logic_vector(WORD_WIDTH-1 downto 0); last_word_in_meta : in std_logic; -- TO RTPS_BUILTIN_ENDPOINT (META TRAFFIC) - alive : out std_logic; + alive_sig : out std_logic; -- RTPS OUTPUT wr_rtps : out std_logic; full_rtps : in std_logic; @@ -60,8 +63,7 @@ entity rtps_writer is last_word_in_hc : in std_logic; cc_instance_handle : in INSTANCE_HANDLE_TYPE; cc_kind : in CACHE_CHANGE_KIND_TYPE; - cc_source_timestamp : in TIME_TYPE; - + cc_source_timestamp : in TIME_TYPE ); end entity; @@ -69,8 +71,16 @@ architecture arch of rtps_writer is --*****CONSTANT DECLARATION***** -- *ENDPOINT MEMORY* + -- 4-Byte Word Size of a Remote Endpoint Entry in Memory + function gen_frame_size(qos : std_logic_vector(CDR_ENUMERATION_WIDTH-1 downto 0)) return natural is + variable ret : natural := 0; + begin + ret := 15 when (qos = RELIABLE_RELIABILITY_QOS) else 6; + return ret; + end function; + constant ENDPOINT_FRAME_SIZE : natural := gen_frame_size(RELIABILTY_QOS); -- Endpoint Memory Size in 4-Byte Words - constant ENDPOINT_MEMORY_SIZE : natural := TODO; + constant ENDPOINT_MEMORY_SIZE : natural := MAX_REMOTE_ENDPOINTS * ENDPOINT_FRAME_SIZE; -- Endpoint Memory Address Width constant ENDPOINT_MEMORY_ADDR_WIDTH : natural := log2c(ENDPOINT_MEMORY_SIZE); -- Highest Endpoint Memory Address @@ -83,15 +93,15 @@ architecture arch of rtps_writer is -- *ENDPOINT MEMORY FORMAT FORMAT FLAGS* -- Flags mapping to the respective Endpoint Memory Frame Fields constant EMF_FLAG_WIDTH : natural := 9; - constant EMF_ENTITYID_FLAG : std_logic_vector(0 to EMF_FLAG_WIDTH-1) := (0 => 1, others => '0'); - constant EMF_GUIDPREFIX_FLAG : std_logic_vector(0 to EMF_FLAG_WIDTH-1) := (1 => 1, others => '0'); - constant EMF_IPV4_ADDR_FLAG : std_logic_vector(0 to EMF_FLAG_WIDTH-1) := (2 => 1, others => '0'); - constant EMF_UDP_PORT_FLAG : std_logic_vector(0 to EMF_FLAG_WIDTH-1) := (3 => 1, others => '0'); - constant EMF_LEASE_DEADLINE_FLAG : std_logic_vector(0 to EMF_FLAG_WIDTH-1) := (4 => 1, others => '0'); - constant EMF_RES_TIME_FLAG : std_logic_vector(0 to EMF_FLAG_WIDTH-1) := (5 => 1, others => '0'); - constant EMF_ACK_SEQ_NR_BASE_FLAG : std_logic_vector(0 to EMF_FLAG_WIDTH-1) := (6 => 1, others => '0'); - constant EMF_REQ_SEQ_NR_BASE_FLAG : std_logic_vector(0 to EMF_FLAG_WIDTH-1) := (7 => 1, others => '0'); - constant EMF_REQ_SEQ_NR_BITMAP_FLAG : std_logic_vector(0 to EMF_FLAG_WIDTH-1) := (8 => 1, others => '0'); + constant EMF_ENTITYID_FLAG : std_logic_vector(0 to EMF_FLAG_WIDTH-1) := (0 => '1', others => '0'); + constant EMF_GUIDPREFIX_FLAG : std_logic_vector(0 to EMF_FLAG_WIDTH-1) := (1 => '1', others => '0'); + constant EMF_IPV4_ADDR_FLAG : std_logic_vector(0 to EMF_FLAG_WIDTH-1) := (2 => '1', others => '0'); + constant EMF_UDP_PORT_FLAG : std_logic_vector(0 to EMF_FLAG_WIDTH-1) := (3 => '1', others => '0'); + constant EMF_LEASE_DEADLINE_FLAG : std_logic_vector(0 to EMF_FLAG_WIDTH-1) := (4 => '1', others => '0'); + constant EMF_RES_TIME_FLAG : std_logic_vector(0 to EMF_FLAG_WIDTH-1) := (5 => '1', others => '0'); + constant EMF_ACK_SEQ_NR_BASE_FLAG : std_logic_vector(0 to EMF_FLAG_WIDTH-1) := (6 => '1', others => '0'); + constant EMF_REQ_SEQ_NR_BASE_FLAG : std_logic_vector(0 to EMF_FLAG_WIDTH-1) := (7 => '1', others => '0'); + constant EMF_REQ_SEQ_NR_BITMAP_FLAG : std_logic_vector(0 to EMF_FLAG_WIDTH-1) := (8 => '1', others => '0'); -- *ENDPOINT MEMORY FRAME FORMAT* @@ -115,7 +125,7 @@ architecture arch of rtps_writer is SEND_DATA_A, SEND_INLINE_QOS, SEND_DATA_B, SEND_GAP_A, SEND_GAP_B, SEND_HEARTBEAT, SKIP_PACKET, SKIP_META_OPERATION); -- Memory FSM states. Explained below in detail type MEM_STAGE_TYPE is (IDLE, SEARCH_ENDPOINT, GET_ENDPOINT_DATA, INSERT_ENDPOINT, UPDATE_ENDPOINT, REMOVE_ENDPOINT, FIND_EMPTY_SLOT, - RESET_MAX_POINTER, GET_NEXT_ENDPOINT); + RESET_MAX_POINTER, GET_NEXT_ENDPOINT, RESET_MEMORY); -- *Memory FSM Opcodes* -- OPCODE DESCRIPTION -- SEARCH_ENDPOINT Find Endpoint with specified GUID in memory @@ -186,7 +196,7 @@ architecture arch of rtps_writer is -- FSM state latch. Used to transition dynamically to different states from the same state. signal return_stage, return_stage_next : STAGE_TYPE := IDLE; -- General Purpose Counter - signal cnt, cnt_next : natural range TODO := 0; + signal cnt, cnt_next : natural range 0 to 11 := 0; -- Packet Opcode Latch (RTPS Message ID) signal opcode, opcode_next : std_logic_vector(SUBMESSAGE_ID_WIDTH-1 downto 0) := (others => '0'); -- Metatraffic Opcode Latch @@ -243,8 +253,6 @@ architecture arch of rtps_writer is signal cnt3, cnt3_next : natural range 0 to INLINE_QOS.length-1 := 0; -- Signal used to iterate through NACK Bitmaps signal nack_bitmap_pos, nack_bitmap_pos_next : natural range 0 to MAX_BITMAP_WIDTH-1 := 0; - -- Signal used to iterate through Request Bitmaps - signal req_bitmap_pos, req_bitmap_pos_next : natural range 0 to req_seq_nr_bitmap'length-1 := 0; -- Signals the start of a Memory Operation signal mem_op_start : std_logic := '0'; -- Opcode of the Memory Operation (Valid only when mem_op_start is high) @@ -261,6 +269,8 @@ architecture arch of rtps_writer is signal seq_nr : SEQUENCENUMBER_TYPE := SEQUENCENUMBER_UNKNOWN; -- Signal used to pass the Request Sequence Number Bitmap from main to memory process signal req_seq_nr_bitmap, req_seq_nr_bitmap_next : std_logic_vector(WORD_WIDTH-1 downto 0) := (others => '0'); + -- Signal used to iterate through Request Bitmaps + signal req_bitmap_pos, req_bitmap_pos_next : natural range 0 to req_seq_nr_bitmap'length-1 := 0; -- *MEMORY PROCESS* -- Memory FSM state @@ -274,13 +284,13 @@ architecture arch of rtps_writer is -- Highest Endpoint Memory Address (Points to first Address of last occupied Endpoint Frame) signal max_endpoint_addr, max_endpoint_addr_next : unsigned(ENDPOINT_MEMORY_ADDR_WIDTH-1 downto 0) := (others => '0'); -- General Purpose Couter - signal mem_cnt, mem_cnt_next : natural range TODO := 0; + signal mem_cnt, mem_cnt_next : natural range 0 to 29 := 0; -- Latch for Endpoint Data from Memory signal mem_endpoint_data, mem_endpoint_data_next : ENDPOINT_DATA_TYPE := ZERO_ENDPOINT_DATA; -- Latch for Endpoint Data from main process signal mem_endpoint_latch_data, mem_endpoint_latch_data_next : ENDPOINT_LATCH_DATA_TYPE := ZERO_ENDPOINT_LATCH_DATA; -- Position (In Endpoint Memory Frame Granularity) of current relevant Endpoint - signal mem_pos, mem_pos_next : natural range TODO := 0; + signal mem_pos, mem_pos_next : natural range 0 to MAX_REMOTE_ENDPOINTS-1 := 0; -- Signifies an abort of the currently initiated read transaction signal abort_read : std_logic := '0'; @@ -391,7 +401,6 @@ begin variable tmp_dw : DOUBLE_WORD_ARRAY := (others => (others => '0')); -- NOTE: We convert the bitamp to a slv to make operations easier (The tool should handle both cases equally) variable tmp_bitmap : std_logic_vector(0 to MAX_BITMAP_WIDTH-1) := (others => '0'); - variable rd_guard : std_logic := '0'; variable tmp_flags : std_logic_vector(0 to EMF_FLAG_WIDTH-1) := (others => '0'); begin -- DEFAULT Registered @@ -407,7 +416,6 @@ begin opcode_next <= opcode; rtps_flags_next <= rtps_flags; reader_flags_next <= reader_flags; - seq_nr_next <= seq_nr; sn_latch_1_next <= sn_latch_1; sn_latch_2_next <= sn_latch_2; sn_latch_3_next <= sn_latch_3; @@ -432,17 +440,19 @@ begin opcode_hc <= NOP; lease_deadline <= TIME_INVALID; res_time <= TIME_INVALID; + alive_sig <= '0'; rd_meta <= '0'; rd_user <= '0'; + wr_rtps <= '0'; + last_word_out_rtps <= '0'; mem_op_start <= '0'; start_hc <= '0'; - ready_in_dds <= '0'; + ready_in_hc <= '0'; get_data_hc <= '0'; - wr_rtps <= '1'; - rd_guard := '0'; - alive <= '0'; + seq_nr <= SEQUENCENUMBER_UNKNOWN; + seq_nr_hc <= SEQUENCENUMBER_UNKNOWN; mem_field_flags <= (others => '0'); - data_out_dds <= (others => '0'); + data_out_rtps <= (others => '0'); -- Assert Liveliness Latch Setter if (assert_liveliness = '1') then @@ -454,7 +464,7 @@ begin last_word_in_latch_next <= '1'; end if; - case (meta_stage) is + case (stage) is when IDLE => -- RESET addr_next <= (others => '0'); @@ -464,7 +474,7 @@ begin -- New Cache Change in HC if (data_available = '1') then -- Propagate Liveliness - alive <= '1'; + alive_sig <= '1'; new_push_next <= '1'; @@ -473,7 +483,7 @@ begin -- Manual Liveliness Assertion elsif (LIVELINESS_QOS = MANUAL_BY_TOPIC_LIVELINESS_QOS and assert_liveliness_latch = '1') then -- Propagate Liveliness - alive <= '1'; + alive_sig <= '1'; -- Reset heartbeat_time_next <= time + HEARTBEAT_PERIOD; @@ -531,7 +541,7 @@ begin end case; -- Input FIFO Guard elsif (empty_user = '0') then - rd_guard := '1'; + rd_user <= '1'; -- Latch Opcode opcode_next <= header_opcode; @@ -560,7 +570,7 @@ begin if (is_meta = '1') then rd_meta <= '1'; else - rd_guard := '1'; + rd_user <= '1'; end if; cnt_next <= cnt + 1; @@ -588,24 +598,26 @@ begin end if; if (is_meta = '1' and (meta_opcode = OPCODE_PARTICIPANT_UNMATCH or meta_opcode = OPCODE_LIVELINESS_UPDATE)) then - assert (last_word_in_meta = '1') report "last_word_in_meta not set" severity FAILURE; + --assert (last_word_in_meta = '1') report "last_word_in_meta not set" severity FAILURE; -- DONE Parsing stage_next <= INITIATE_ENDPOINT_SEARCH; else stage_next <= LATCH_ENTITYID; end if; + when others => + null; end case; end if; when LATCH_ENTITYID => -- Input FIFO Guard if ((is_meta = '1' and empty_meta = '0') or (is_meta = '0' and empty_user = '0')) then if (is_meta = '1') then - assert (meta_opcode /= OPCODE_ENDPOINT_UNMATCH or (meta_opcode = OPCODE_ENDPOINT_UNMATCH and last_word_in_meta = '1')) "last_word_in_meta not set" severity FAILURE; + --assert (meta_opcode /= OPCODE_ENDPOINT_UNMATCH or (meta_opcode = OPCODE_ENDPOINT_UNMATCH and last_word_in_meta = '1')) report "last_word_in_meta not set" severity FAILURE; rd_meta <= '1'; guid_next(3) <= data_in_meta; -- Memory Operation Guard else - rd_guard := '1'; + rd_user <= '1'; guid_next(3) <= data_in_user; end if; stage_next <= INITIATE_ENDPOINT_SEARCH; @@ -643,10 +655,10 @@ begin case (opcode) is when SID_ACKNACK => stage_next <= LATCH_ACKNACK; + cnt_next <= 0; mem_op_start <= '1'; mem_opcode <= SEARCH_ENDPOINT; mem_field_flags <= EMF_ACK_SEQ_NR_BASE_FLAG or EMF_RES_TIME_FLAG or EMF_REQ_SEQ_NR_BASE_FLAG or EMF_REQ_SEQ_NR_BITMAP_FLAG; - cnt_next <= 0; when others => stage_next <= SKIP_PACKET; end case; @@ -665,12 +677,11 @@ begin addr_next <= data_in_meta; -- UDP Port when 1 => - assert (last_word_in_meta = '1') report "last_word_in_meta not set" severity FAILURE; + --assert (last_word_in_meta = '1') report "last_word_in_meta not set" severity FAILURE; - portn_next <= data_in_meta(WORD_WIDTH-1 downto WORD_WIDTH-UDP_PORT_WIDTH-1); + portn_next <= data_in_meta(WORD_WIDTH-1 downto WORD_WIDTH-UDP_PORT_WIDTH); reader_flags_next <= data_in_meta(reader_flags'length-1 downto 0); - stage_next <= METATRAFFIC_OPERATION; when others => null; @@ -688,7 +699,7 @@ begin -- Update the Endpoint Data -- NOTE: The Lease Duration is NOT updated in case of an update. That is the responsibility of the Liveliness Update mem_op_start <= '1'; - mem_opcode <= UDPATE_ENDPOINT; + mem_opcode <= UPDATE_ENDPOINT; mem_field_flags <= EMF_IPV4_ADDR_FLAG or EMF_UDP_PORT_FLAG; end if; -- DONE @@ -787,7 +798,7 @@ begin if (RELIABILTY_QOS = RELIABLE_RELIABILITY_QOS) then -- Input FIFO Guard if (empty_user = '0') then - rd_guard := '1'; + rd_user <= '1'; -- Latch Source IP Address addr_next <= data_in_user; @@ -801,7 +812,7 @@ begin if (RELIABILTY_QOS = RELIABLE_RELIABILITY_QOS) then -- Input FIFO Guard if (empty_user = '0') then - rd_guard := '1'; + rd_user <= '1'; cnt_next <= cnt + 1; case (cnt) is @@ -947,7 +958,8 @@ begin end if; -- Wait for Operation Acknowledgement - if (res_hc = ACK) then + if (ack_hc = '1') then + start_hc <= '1'; -- Exit Condition if (global_ack_seq_nr_base = new_global_ack) then -- NACK Bitmap is not Empty @@ -1021,7 +1033,7 @@ begin -- Currently in Acknack Response Delay elsif (mem_endpoint_data.res_time(1)(0) = '0') then -- New Sequence Numbers Requested - if ((req_bitmap_pos or mem_endpoint_data.req_seq_nr_bitmap) /= mem_endpoint_data.req_seq_nr_bitmap) then + if ((req_seq_nr_bitmap or mem_endpoint_data.req_seq_nr_bitmap) /= mem_endpoint_data.req_seq_nr_bitmap) then mem_op_start <= '1'; mem_opcode <= UPDATE_ENDPOINT; mem_field_flags <= EMF_REQ_SEQ_NR_BITMAP_FLAG; @@ -1074,7 +1086,7 @@ begin cnt_next <= 3; else -- Reached End of Bitmap (NACK Bitmap out of window) - if (req_bitmap_pos = req_seq_nr_base'length-1) then + if (req_bitmap_pos = req_seq_nr_bitmap'length-1) then -- DONE (Nothing to update) stage_next <= SKIP_PACKET; else @@ -1093,7 +1105,7 @@ begin end if; -- End of Bitmap - if (nack_bitmap_pos = long_latch or req_bitmap_pos = req_seq_nr_base'length-1) then + if (nack_bitmap_pos = unsigned(long_latch) or req_bitmap_pos = req_seq_nr_bitmap'length-1) then stage_next <= PROCESS_NACK; cnt_next <= 1; end if; @@ -1112,6 +1124,7 @@ begin when 0 => mem_op_start <= '1'; mem_opcode <= GET_NEXT_ENDPOINT; + mem_field_flags <= EMF_LEASE_DEADLINE_FLAG or EMF_RES_TIME_FLAG; cnt_next <= 1; -- Check Endpoint when 1 => @@ -1137,7 +1150,7 @@ begin mem_op_start <= '1'; mem_opcode <= UPDATE_ENDPOINT; res_time <= TIME_INVALID; - mem_field_flags <= RES_TIME_FLAG; + mem_field_flags <= EMF_RES_TIME_FLAG; -- Continue Search cnt_next <= 0; -- If Response Delay Passed @@ -1159,10 +1172,14 @@ begin if (mem_endpoint_data.res_time < check_time) then check_time_next <= mem_endpoint_data.res_time; end if; - else - if (mem_endpoint_data.lease_deadline /= TIME_INVALID and mem_endpoint_data.lease_deadline < check_time) then + elsif (mem_endpoint_data.lease_deadline /= TIME_INVALID) then + if (mem_endpoint_data.lease_deadline < check_time) then check_time_next <= mem_endpoint_data.lease_deadline; end if; + elsif (RELIABILTY_QOS = RELIABLE_RELIABILITY_QOS and mem_endpoint_data.res_time /= TIME_INVALID) then + if (mem_endpoint_data.res_time < check_time) then + check_time_next <= mem_endpoint_data.res_time; + end if; end if; -- Continue Search @@ -1211,6 +1228,7 @@ begin opcode_hc <= GET_MIN_SN; if (ack_hc = '1') then + start_hc <= '0'; cnt_next <= cnt + 1; end if; -- READ MIN Sequence Number 1/2 @@ -1218,7 +1236,7 @@ begin ready_in_hc <= '1'; -- Input Guard if (valid_in_hc = '1') then - min_sn_next(0) <= data_in_hc; + min_sn_next(0) <= unsigned(data_in_hc); cnt_next <= cnt + 1; end if; -- READ MIN Sequence Number 2/2 @@ -1226,7 +1244,7 @@ begin ready_in_hc <= '1'; -- Input Guard if (valid_in_hc = '1') then - min_sn_next(1) <= data_in_hc; + min_sn_next(1) <= unsigned(data_in_hc); assert (last_word_in_hc = '1') severity FAILURE; if (DURABILITY_QOS /= VOLATILE_DURABILITY_QOS and historical_push = '1') then @@ -1250,6 +1268,7 @@ begin opcode_hc <= GET_MAX_SN; if (ack_hc = '1') then + start_hc <= '0'; cnt_next <= cnt + 1; end if; -- READ MAX Sequence Number 1/2 @@ -1257,7 +1276,7 @@ begin ready_in_hc <= '1'; -- Input Guard if (valid_in_hc = '1') then - max_sn_next(0) <= data_in_hc; + max_sn_next(0) <= unsigned(data_in_hc); cnt_next <= cnt + 1; end if; -- READ MAX Sequence Number 2/2 @@ -1265,7 +1284,7 @@ begin ready_in_hc <= '1'; -- Input Guard if (valid_in_hc = '1') then - max_sn_next(1) <= data_in_hc; + max_sn_next(1) <= unsigned(data_in_hc); assert (last_word_in_hc = '1') severity FAILURE; -- EXIT @@ -1313,7 +1332,7 @@ begin else -- DONE stage_next <= ENDPOINT_STALE_CHECK; - cnt_next <= cnt + 2; + cnt_next <= 2; end if; -- Next Requested SN found elsif (mem_endpoint_data.req_seq_nr_bitmap(req_bitmap_pos) = '1') then @@ -1330,6 +1349,7 @@ begin -- Wait until Operation Acknowledgement if (ack_hc = '1') then + start_hc <= '0'; cnt_next <= cnt + 1; end if; -- Handle Request @@ -1344,6 +1364,7 @@ begin gap_in_progress_next <= '0'; stage_next <= SEND_GAP_B; return_stage_next <= SEND_INFO_TS when (DESTINATION_ORDER_QOS = BY_SOURCE_TIMESTAMP_DESTINATION_ORDER_QOS) else SEND_DATA_A; + cnt_next <= 0; else -- Send DATA stage_next <= SEND_HEADER; @@ -1363,7 +1384,7 @@ begin when others => null; end case; - end case; + end if; when HANDLE_HEARTBEATS => -- Synthesis Guard if (RELIABILTY_QOS = RELIABLE_RELIABILITY_QOS or LIVELINESS_QOS = MANUAL_BY_TOPIC_LIVELINESS_QOS) then @@ -1448,6 +1469,7 @@ begin -- Wait until Operation Acknowledgement if (ack_hc = '1') then + start_hc <= '0'; -- EXIT cnt_next <= 0; end if; @@ -1462,6 +1484,7 @@ begin -- Wait until Operation Acknowledgement if (ack_hc = '1') then + start_hc <= '0'; cnt_next <= cnt + 1; end if; end if; @@ -1539,6 +1562,7 @@ begin -- Wait until Operation Acknowledgement if (ack_hc = '1') then + start_hc <= '0'; cnt_next <= cnt + 1; end if; end if; @@ -1550,6 +1574,7 @@ begin -- Wait until Operation Acknowledgement if (ack_hc = '1') then + start_hc <= '0'; cnt_next <= cnt + 1; end if; -- Handle Request @@ -1568,6 +1593,7 @@ begin gap_in_progress_next <= '0'; stage_next <= SEND_GAP_B; return_stage_next <= SEND_INFO_TS when (DESTINATION_ORDER_QOS = BY_SOURCE_TIMESTAMP_DESTINATION_ORDER_QOS) else SEND_DATA_A; + cnt_next <= 0; else -- Send DATA stage_next <= SEND_HEADER; @@ -1608,7 +1634,7 @@ begin if (RELIABILTY_QOS = RELIABLE_RELIABILITY_QOS) then -- Output FIFO Guard if (full_rtps = '0') then - wr_sig <= '1'; + wr_rtps <= '1'; cnt_next <= cnt + 1; case (cnt) is @@ -1654,10 +1680,10 @@ begin data_out_rtps <= SID_INFO_TS & "00000000" & std_logic_vector(to_unsigned(8, SUBMESSAGE_LENGTH_WIDTH)); -- Source Timestamp 1/2 when 1 => - data_out_rtps <= cc_source_timestamp(0); + data_out_rtps <= std_logic_vector(cc_source_timestamp(0)); -- Writer Entity ID when 2 => - data_out_rtps <= cc_source_timestamp(1); + data_out_rtps <= std_logic_vector(cc_source_timestamp(1)); stage_next <= SEND_DATA_A; cnt_next <= 0; @@ -1680,27 +1706,27 @@ begin -- extraFlags, octetsToInlineQoS when 1 => data_out_rtps <= x"0000" & std_logic_vector(to_unsigned(16, 16)); - wr_sig <= '1'; + wr_rtps <= '1'; cnt_next <= cnt + 1; -- Reader Entity ID when 2 => data_out_rtps <= ENTITYID_UNKNOWN; - wr_sig <= '1'; + wr_rtps <= '1'; cnt_next <= cnt + 1; -- Writer Entity ID when 3 => data_out_rtps <= ENTITYID; - wr_sig <= '1'; + wr_rtps <= '1'; cnt_next <= cnt + 1; -- Sequence Number 1/2 when 4 => data_out_rtps <= std_logic_vector(next_seq_nr(0)); - wr_sig <= '1'; + wr_rtps <= '1'; cnt_next <= cnt + 1; -- Sequence Number 2/2 when 5 => data_out_rtps <= std_logic_vector(next_seq_nr(1)); - wr_sig <= '1'; + wr_rtps <= '1'; -- Need to send Key Hash if (WITH_KEY) then @@ -1738,7 +1764,7 @@ begin -- Synthesis Guard if (WITH_KEY) then data_out_rtps <= std_logic_vector(cc_instance_handle(0)); - wr_sig <= '1'; + wr_rtps <= '1'; cnt_next <= cnt + 1; end if; -- Key Hash 2/4 @@ -1746,7 +1772,7 @@ begin -- Synthesis Guard if (WITH_KEY) then data_out_rtps <= std_logic_vector(cc_instance_handle(1)); - wr_sig <= '1'; + wr_rtps <= '1'; cnt_next <= cnt + 1; end if; -- Key Hash 3/4 @@ -1754,7 +1780,7 @@ begin -- Synthesis Guard if (WITH_KEY) then data_out_rtps <= std_logic_vector(cc_instance_handle(2)); - wr_sig <= '1'; + wr_rtps <= '1'; cnt_next <= cnt + 1; end if; -- Key Hash 4/4 @@ -1762,7 +1788,7 @@ begin -- Synthesis Guard if (WITH_KEY) then data_out_rtps <= std_logic_vector(cc_instance_handle(3)); - wr_sig <= '1'; + wr_rtps <= '1'; -- Need to send Status Info if (cc_kind /= ALIVE) then @@ -1778,7 +1804,7 @@ begin -- Status Info when 10 => data_out_rtps <= (others => '0'); - wr_sig <= '1'; + wr_rtps <= '1'; case (cc_kind) is when ALIVE_FILTERED => data_out_rtps(STATUS_INFO_FILTERED_FLAG) <= '1'; @@ -1799,8 +1825,8 @@ begin end if; -- Sentinel when 11 => - data_out_rtps <= PID_SENTINEL & std_logic_vector(to_unsigned(0, 16)); - wr_sig <= '1'; + data_out_rtps <= PID_SENTINEL & std_logic_vector(to_unsigned(0, PARAMETER_LENGTH_WIDTH)); + wr_rtps <= '1'; -- Payload Available (DATA or Serialized Key) if (cc_kind = ALIVE or (WITH_KEY and cc_kind /= ALIVE)) then @@ -1830,7 +1856,7 @@ begin -- Output FIFO Guard if (full_rtps = '0') then data_out_rtps <= INLINE_QOS.data(cnt3); - wr_sig <= '1'; + wr_rtps <= '1'; cnt3_next <= cnt3 + 1; -- Exit Condition @@ -1864,10 +1890,10 @@ begin if (valid_in_hc = '1') then data_out_rtps <= data_in_hc; - wr_sig <= '1'; + wr_rtps <= '1'; if (last_word_in_hc = '1') then - last_word_out_rtps = '1'; + last_word_out_rtps <= '1'; -- Continue if (RELIABILTY_QOS = RELIABLE_RELIABILITY_QOS and stale_check = '1') then @@ -1890,26 +1916,26 @@ begin when SEND_GAP_A => -- Output FIFO Guard if (full_rtps = '0') then - wr_sig <= '1'; + wr_rtps <= '1'; cnt_next <= cnt + 1; case (cnt) is -- DATA RTPS SUBMESSAGE (Participant Message) -- RTPS Submessage Header when 0 => - data_out <= SID_GAP & "00000000" & std_logic_vector(to_unsigned(28, 16)); + data_out_rtps <= SID_GAP & "00000000" & std_logic_vector(to_unsigned(28, 16)); -- Reader Entity ID when 1 => - data_out <= ENTITYID_UNKNOWN; + data_out_rtps <= ENTITYID_UNKNOWN; -- Writer Entity ID when 2 => - data_out <= ENTITYID; + data_out_rtps <= ENTITYID; -- GAP Start Sequence Number 1/2 when 3 => - data_out <= std_logic_vector(next_seq_nr(0)); + data_out_rtps <= std_logic_vector(next_seq_nr(0)); -- GAP Start Sequence Number 2/2 when 4 => - data_out <= std_logic_vector(next_seq_nr(1)); + data_out_rtps <= std_logic_vector(next_seq_nr(1)); -- Continue if (RELIABILTY_QOS = RELIABLE_RELIABILITY_QOS and stale_check = '1') then @@ -1928,19 +1954,19 @@ begin when SEND_GAP_B => -- Output FIFO Guard if (full_rtps = '0') then - wr_sig <= '1'; + wr_rtps <= '1'; cnt_next <= cnt + 1; case (cnt) is -- GAP List Sequence Number Set (Bitmap Base 1/2) when 0 => - data_out <= std_logic_vector(next_seq_nr(0)); + data_out_rtps <= std_logic_vector(next_seq_nr(0)); -- GAP List Sequence Number Set (Bitmap Base 2/2) when 1 => - data_out <= std_logic_vector(next_seq_nr(1)); + data_out_rtps <= std_logic_vector(next_seq_nr(1)); -- GAP List Sequence Number Set (NumBits) when 2 => - data_out <= (others => '0'); + data_out_rtps <= (others => '0'); -- Continue stage_next <= return_stage; @@ -1954,7 +1980,7 @@ begin if (RELIABILTY_QOS = RELIABLE_RELIABILITY_QOS or LIVELINESS_QOS = MANUAL_BY_TOPIC_LIVELINESS_QOS) then -- Output FIFO Guard if (full_rtps = '0') then - wr_sig <= '1'; + wr_rtps <= '1'; cnt_next <= cnt + 1; case (cnt) is @@ -1962,31 +1988,31 @@ begin -- RTPS Submessage Header when 0 => if (assert_liveliness_latch = '1') then - data_out <= SID_HEARTBEAT & "00000100" & std_logic_vector(to_unsigned(28, 16)); + data_out_rtps <= SID_HEARTBEAT & "00000100" & std_logic_vector(to_unsigned(28, 16)); else - data_out <= SID_HEARTBEAT & "00000000" & std_logic_vector(to_unsigned(28, 16)); + data_out_rtps <= SID_HEARTBEAT & "00000000" & std_logic_vector(to_unsigned(28, 16)); end if; -- Reader Entity ID when 1 => - data_out <= ENTITYID_UNKNOWN; + data_out_rtps <= ENTITYID_UNKNOWN; -- Writer Entity ID when 2 => - data_out <= ENTITYID; + data_out_rtps <= ENTITYID; -- First Sequence Number 1/2 when 3 => - data_out <= std_logic_vector(min_sn(0)); + data_out_rtps <= std_logic_vector(min_sn(0)); -- First Sequence Number 2/2 when 4 => - data_out <= std_logic_vector(min_sn(1)); + data_out_rtps <= std_logic_vector(min_sn(1)); -- Last Sequence Number 1/2 when 5 => - data_out <= std_logic_vector(last_seq_nr(0)); + data_out_rtps <= std_logic_vector(last_seq_nr(0)); -- Last Sequence Number 2/2 when 6 => - data_out <= std_logic_vector(last_seq_nr(1)); + data_out_rtps <= std_logic_vector(last_seq_nr(1)); -- Count when 7 => - data_out <= std_logic_vector(count); + data_out_rtps <= std_logic_vector(count); stage_next <= HANDLE_HEARTBEATS; cnt_next <= 1; @@ -1996,10 +2022,6 @@ begin end if; end if; when SKIP_PACKET => - -- NOTE: At the end of a Stale Entry Removal this stage is entered, without having started reading a Packet from input. - -- Reset Parameter End - parameter_end_next <= (others => '1'); - -- Consumed last word of Packet if (last_word_in_latch = '1' and last_word_in_user = '0') then -- Reset Last Word In Latch @@ -2009,36 +2031,22 @@ begin -- Input FIFO Guard elsif (empty_user = '0') then -- Skip-Read - rd_guard := '1'; + rd_user <= '1'; end if; when SKIP_META_OPERATION => - -- Skip-Read - rd_meta <= '1'; - - -- Exit Condition - if (last_word_in_meta = '1') then - stage_next <= IDLE; + -- Input Guard + if (empty_meta = '0') then + -- Skip-Read + rd_meta <= '1'; + + -- Exit Condition + if (last_word_in_meta = '1') then + stage_next <= IDLE; + end if; end if; when others => null; end case; - - -- OVERREAD GUARD - -- Read outside of packet Length - -- NOTE: If the Packet Length is smaller than expected there will be a read from input FIFO while - -- the Packet Length has been reached and will be caught by this clause. - -- The SKIP_PACKET clause prevents a read signal from occuring in this situation, and thus prevents from entering this state. - if ((last_word_in_latch = '1' and last_word_in_user = '0') and rd_guard = '1') then - -- Force rd_sig low - rd_sig <= '0'; - -- Continue parsing next Packet - stage_next <= IDLE; - -- Reset Last Word In Latch - last_word_in_latch_next <= '0'; - -- DEFAULT - else - rd_sig <= rd_guard; - end if; end process; -- *Memory State Machine* @@ -2062,7 +2070,6 @@ begin last_addr_next <= last_addr; mem_addr_latch_next <= mem_addr_latch; mem_endpoint_data_next <= mem_endpoint_data; - mem_guidprefix_next <= mem_guidprefix; max_endpoint_addr_next <= max_endpoint_addr; mem_endpoint_latch_data_next <= mem_endpoint_latch_data; mem_pos_next <= mem_pos; @@ -2112,15 +2119,15 @@ begin mem_cnt_next <= 0; elsif check_mask(mem_endpoint_latch_data.field_flag,EMF_UDP_PORT_FLAG) then mem_cnt_next <= 1; - elsif (RELIABILTY_QOS /= RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_LEASE_DEADLINE_FLAG)) then + elsif (RELIABILTY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_LEASE_DEADLINE_FLAG)) then mem_cnt_next <= 2; - elsif (RELIABILTY_QOS /= RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_RES_TIME_FLAG)) then + elsif (RELIABILTY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_RES_TIME_FLAG)) then mem_cnt_next <= 4; - elsif (RELIABILTY_QOS /= RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_ACK_SEQ_NR_BASE_FLAG)) then + elsif (RELIABILTY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_ACK_SEQ_NR_BASE_FLAG)) then mem_cnt_next <= 6; - elsif (RELIABILTY_QOS /= RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_REQ_SEQ_NR_BASE_FLAG)) then + elsif (RELIABILTY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_REQ_SEQ_NR_BASE_FLAG)) then mem_cnt_next <= 8; - elsif (RELIABILTY_QOS /= RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_REQ_SEQ_NR_BITMAP_FLAG)) then + elsif (RELIABILTY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_REQ_SEQ_NR_BITMAP_FLAG)) then mem_cnt_next <= 10; else -- DONE @@ -2157,15 +2164,15 @@ begin mem_cnt_next <= 4; elsif check_mask(mem_endpoint_latch_data.field_flag,EMF_UDP_PORT_FLAG) then mem_cnt_next <= 5; - elsif (RELIABILTY_QOS /= RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_LEASE_DEADLINE_FLAG)) then + elsif (RELIABILTY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_LEASE_DEADLINE_FLAG)) then mem_cnt_next <= 6; - elsif (RELIABILTY_QOS /= RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_RES_TIME_FLAG)) then + elsif (RELIABILTY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_RES_TIME_FLAG)) then mem_cnt_next <= 8; - elsif (RELIABILTY_QOS /= RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_ACK_SEQ_NR_BASE_FLAG)) then + elsif (RELIABILTY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_ACK_SEQ_NR_BASE_FLAG)) then mem_cnt_next <= 10; - elsif (RELIABILTY_QOS /= RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_REQ_SEQ_NR_BASE_FLAG)) then + elsif (RELIABILTY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_REQ_SEQ_NR_BASE_FLAG)) then mem_cnt_next <= 12; - elsif (RELIABILTY_QOS /= RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_REQ_SEQ_NR_BITMAP_FLAG)) then + elsif (RELIABILTY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_REQ_SEQ_NR_BITMAP_FLAG)) then mem_cnt_next <= 14; else -- DONE @@ -2220,6 +2227,7 @@ begin if (mem_valid_out = '1') then -- No Match if (mem_read_data /= mem_endpoint_latch_data.guid(3)) then + abort_read <= '1'; -- Reached End of Memory, No Match if (mem_addr_base = max_endpoint_addr) then mem_addr_base_next <= ENDPOINT_MEMORY_MAX_ADDRESS; --No match @@ -2230,7 +2238,7 @@ begin mem_addr_base_next <= mem_addr_base + ENDPOINT_FRAME_SIZE; mem_pos_next <= mem_pos + 1; mem_cnt_next <= 0; - abort_read <= '1'; + end if; else mem_cnt_next <= mem_cnt + 1; @@ -2243,6 +2251,7 @@ begin if (mem_valid_out = '1') then -- No Match if (mem_read_data /= mem_endpoint_latch_data.guid(0)) then + abort_read <= '1'; -- Reached End of Memory, No Match if (mem_addr_base = max_endpoint_addr) then mem_addr_base_next <= ENDPOINT_MEMORY_MAX_ADDRESS; --No match @@ -2253,7 +2262,6 @@ begin mem_addr_base_next <= mem_addr_base + ENDPOINT_FRAME_SIZE; mem_pos_next <= mem_pos + 1; mem_cnt_next <= 0; - abort_read <= '1'; end if; else mem_cnt_next <= mem_cnt + 1; @@ -2266,6 +2274,7 @@ begin if (mem_valid_out = '1') then -- No Match if (mem_read_data /= mem_endpoint_latch_data.guid(1)) then + abort_read <= '1'; -- Reached End of Memory, No Match if (mem_addr_base = max_endpoint_addr) then mem_addr_base_next <= ENDPOINT_MEMORY_MAX_ADDRESS; --No match @@ -2276,7 +2285,6 @@ begin mem_addr_base_next <= mem_addr_base + ENDPOINT_FRAME_SIZE; mem_pos_next <= mem_pos + 1; mem_cnt_next <= 0; - abort_read <= '1'; end if; else mem_cnt_next <= mem_cnt + 1; @@ -2289,6 +2297,7 @@ begin if (mem_valid_out = '1') then -- No Match if (mem_read_data /= mem_endpoint_latch_data.guid(2)) then + abort_read <= '1'; -- Reached End of Memory, No Match if (mem_addr_base = max_endpoint_addr) then mem_addr_base_next <= ENDPOINT_MEMORY_MAX_ADDRESS; --No match @@ -2299,7 +2308,6 @@ begin mem_addr_base_next <= mem_addr_base + ENDPOINT_FRAME_SIZE; mem_pos_next <= mem_pos + 1; mem_cnt_next <= 0; - abort_read <= '1'; end if; -- Match else @@ -2315,15 +2323,15 @@ begin mem_cnt_next <= 4; elsif check_mask(mem_endpoint_latch_data.field_flag,EMF_UDP_PORT_FLAG) then mem_cnt_next <= 5; - elsif (RELIABILTY_QOS /= RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_LEASE_DEADLINE_FLAG)) then + elsif (RELIABILTY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_LEASE_DEADLINE_FLAG)) then mem_cnt_next <= 6; - elsif (RELIABILTY_QOS /= RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_RES_TIME_FLAG)) then + elsif (RELIABILTY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_RES_TIME_FLAG)) then mem_cnt_next <= 8; - elsif (RELIABILTY_QOS /= RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_ACK_SEQ_NR_BASE_FLAG)) then + elsif (RELIABILTY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_ACK_SEQ_NR_BASE_FLAG)) then mem_cnt_next <= 10; - elsif (RELIABILTY_QOS /= RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_REQ_SEQ_NR_BASE_FLAG)) then + elsif (RELIABILTY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_REQ_SEQ_NR_BASE_FLAG)) then mem_cnt_next <= 12; - elsif (RELIABILTY_QOS /= RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_REQ_SEQ_NR_BITMAP_FLAG)) then + elsif (RELIABILTY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_REQ_SEQ_NR_BITMAP_FLAG)) then mem_cnt_next <= 14; else -- DONE @@ -2350,15 +2358,15 @@ begin mem_cnt_next <= 4; elsif check_mask(mem_endpoint_latch_data.field_flag,EMF_UDP_PORT_FLAG) then mem_cnt_next <= 5; - elsif (RELIABILTY_QOS /= RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_LEASE_DEADLINE_FLAG)) then + elsif (RELIABILTY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_LEASE_DEADLINE_FLAG)) then mem_cnt_next <= 6; - elsif (RELIABILTY_QOS /= RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_RES_TIME_FLAG)) then + elsif (RELIABILTY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_RES_TIME_FLAG)) then mem_cnt_next <= 8; - elsif (RELIABILTY_QOS /= RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_ACK_SEQ_NR_BASE_FLAG)) then + elsif (RELIABILTY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_ACK_SEQ_NR_BASE_FLAG)) then mem_cnt_next <= 10; - elsif (RELIABILTY_QOS /= RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_REQ_SEQ_NR_BASE_FLAG)) then + elsif (RELIABILTY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_REQ_SEQ_NR_BASE_FLAG)) then mem_cnt_next <= 12; - elsif (RELIABILTY_QOS /= RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_REQ_SEQ_NR_BITMAP_FLAG)) then + elsif (RELIABILTY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_REQ_SEQ_NR_BITMAP_FLAG)) then mem_cnt_next <= 14; else mem_cnt_next <= 15; @@ -2393,15 +2401,15 @@ begin mem_cnt_next <= 4; elsif check_mask(mem_endpoint_latch_data.field_flag,EMF_UDP_PORT_FLAG) then mem_cnt_next <= 5; - elsif (RELIABILTY_QOS /= RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_LEASE_DEADLINE_FLAG)) then + elsif (RELIABILTY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_LEASE_DEADLINE_FLAG)) then mem_cnt_next <= 6; - elsif (RELIABILTY_QOS /= RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_RES_TIME_FLAG)) then + elsif (RELIABILTY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_RES_TIME_FLAG)) then mem_cnt_next <= 8; - elsif (RELIABILTY_QOS /= RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_ACK_SEQ_NR_BASE_FLAG)) then + elsif (RELIABILTY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_ACK_SEQ_NR_BASE_FLAG)) then mem_cnt_next <= 10; - elsif (RELIABILTY_QOS /= RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_REQ_SEQ_NR_BASE_FLAG)) then + elsif (RELIABILTY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_REQ_SEQ_NR_BASE_FLAG)) then mem_cnt_next <= 12; - elsif (RELIABILTY_QOS /= RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_REQ_SEQ_NR_BITMAP_FLAG)) then + elsif (RELIABILTY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_REQ_SEQ_NR_BITMAP_FLAG)) then mem_cnt_next <= 14; else if check_mask(mem_endpoint_latch_data.field_flag,EMF_ENTITYID_FLAG) then @@ -2420,15 +2428,15 @@ begin if (mem_ready_in = '1') then if check_mask(mem_endpoint_latch_data.field_flag,EMF_UDP_PORT_FLAG) then mem_cnt_next <= 5; - elsif (RELIABILTY_QOS /= RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_LEASE_DEADLINE_FLAG)) then + elsif (RELIABILTY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_LEASE_DEADLINE_FLAG)) then mem_cnt_next <= 6; - elsif (RELIABILTY_QOS /= RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_RES_TIME_FLAG)) then + elsif (RELIABILTY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_RES_TIME_FLAG)) then mem_cnt_next <= 8; - elsif (RELIABILTY_QOS /= RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_ACK_SEQ_NR_BASE_FLAG)) then + elsif (RELIABILTY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_ACK_SEQ_NR_BASE_FLAG)) then mem_cnt_next <= 10; - elsif (RELIABILTY_QOS /= RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_REQ_SEQ_NR_BASE_FLAG)) then + elsif (RELIABILTY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_REQ_SEQ_NR_BASE_FLAG)) then mem_cnt_next <= 12; - elsif (RELIABILTY_QOS /= RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_REQ_SEQ_NR_BITMAP_FLAG)) then + elsif (RELIABILTY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_REQ_SEQ_NR_BITMAP_FLAG)) then mem_cnt_next <= 14; else if check_mask(mem_endpoint_latch_data.field_flag,EMF_ENTITYID_FLAG) then @@ -2440,22 +2448,22 @@ begin end if; end if; end if; - -- GET UDP Port/ Flags + -- GET UDP Port & Reader Flags when 5 => mem_valid_in <= '1'; mem_addr <= mem_addr_base + EMF_UDP_PORT_OFFSET; mem_read <= '1'; -- Memory Flow Control Guard if (mem_ready_in = '1') then - if (RELIABILTY_QOS /= RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_LEASE_DEADLINE_FLAG)) then + if (RELIABILTY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_LEASE_DEADLINE_FLAG)) then mem_cnt_next <= 6; - elsif (RELIABILTY_QOS /= RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_RES_TIME_FLAG)) then + elsif (RELIABILTY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_RES_TIME_FLAG)) then mem_cnt_next <= 8; - elsif (RELIABILTY_QOS /= RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_ACK_SEQ_NR_BASE_FLAG)) then + elsif (RELIABILTY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_ACK_SEQ_NR_BASE_FLAG)) then mem_cnt_next <= 10; - elsif (RELIABILTY_QOS /= RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_REQ_SEQ_NR_BASE_FLAG)) then + elsif (RELIABILTY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_REQ_SEQ_NR_BASE_FLAG)) then mem_cnt_next <= 12; - elsif (RELIABILTY_QOS /= RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_REQ_SEQ_NR_BITMAP_FLAG)) then + elsif (RELIABILTY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_REQ_SEQ_NR_BITMAP_FLAG)) then mem_cnt_next <= 14; else if check_mask(mem_endpoint_latch_data.field_flag,EMF_ENTITYID_FLAG) then @@ -2490,13 +2498,13 @@ begin mem_read <= '1'; -- Memory Flow Control Guard if (mem_ready_in = '1') then - if (RELIABILTY_QOS /= RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_RES_TIME_FLAG)) then + if (RELIABILTY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_RES_TIME_FLAG)) then mem_cnt_next <= 8; - elsif (RELIABILTY_QOS /= RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_ACK_SEQ_NR_BASE_FLAG)) then + elsif (RELIABILTY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_ACK_SEQ_NR_BASE_FLAG)) then mem_cnt_next <= 10; - elsif (RELIABILTY_QOS /= RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_REQ_SEQ_NR_BASE_FLAG)) then + elsif (RELIABILTY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_REQ_SEQ_NR_BASE_FLAG)) then mem_cnt_next <= 12; - elsif (RELIABILTY_QOS /= RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_REQ_SEQ_NR_BITMAP_FLAG)) then + elsif (RELIABILTY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_REQ_SEQ_NR_BITMAP_FLAG)) then mem_cnt_next <= 14; else if check_mask(mem_endpoint_latch_data.field_flag,EMF_ENTITYID_FLAG) then @@ -2534,11 +2542,11 @@ begin mem_read <= '1'; -- Memory Flow Control Guard if (mem_ready_in = '1') then - if (RELIABILTY_QOS /= RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_ACK_SEQ_NR_BASE_FLAG)) then + if (RELIABILTY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_ACK_SEQ_NR_BASE_FLAG)) then mem_cnt_next <= 10; - elsif (RELIABILTY_QOS /= RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_REQ_SEQ_NR_BASE_FLAG)) then + elsif (RELIABILTY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_REQ_SEQ_NR_BASE_FLAG)) then mem_cnt_next <= 12; - elsif (RELIABILTY_QOS /= RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_REQ_SEQ_NR_BITMAP_FLAG)) then + elsif (RELIABILTY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_REQ_SEQ_NR_BITMAP_FLAG)) then mem_cnt_next <= 14; else if check_mask(mem_endpoint_latch_data.field_flag,EMF_ENTITYID_FLAG) then @@ -2549,7 +2557,7 @@ begin mem_cnt_next <= 19; elsif check_mask(mem_endpoint_latch_data.field_flag,EMF_UDP_PORT_FLAG) then mem_cnt_next <= 20; - elsif (RELIABILTY_QOS /= RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_LEASE_DEADLINE_FLAG)) then + elsif (RELIABILTY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_LEASE_DEADLINE_FLAG)) then mem_cnt_next <= 21; else mem_cnt_next <= 23; @@ -2578,9 +2586,9 @@ begin mem_read <= '1'; -- Memory Flow Control Guard if (mem_ready_in = '1') then - if (RELIABILTY_QOS /= RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_REQ_SEQ_NR_BASE_FLAG)) then + if (RELIABILTY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_REQ_SEQ_NR_BASE_FLAG)) then mem_cnt_next <= 12; - elsif (RELIABILTY_QOS /= RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_REQ_SEQ_NR_BITMAP_FLAG)) then + elsif (RELIABILTY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_REQ_SEQ_NR_BITMAP_FLAG)) then mem_cnt_next <= 14; else if check_mask(mem_endpoint_latch_data.field_flag,EMF_ENTITYID_FLAG) then @@ -2591,9 +2599,9 @@ begin mem_cnt_next <= 19; elsif check_mask(mem_endpoint_latch_data.field_flag,EMF_UDP_PORT_FLAG) then mem_cnt_next <= 20; - elsif (RELIABILTY_QOS /= RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_LEASE_DEADLINE_FLAG)) then + elsif (RELIABILTY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_LEASE_DEADLINE_FLAG)) then mem_cnt_next <= 21; - elsif (RELIABILTY_QOS /= RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_RES_TIME_FLAG)) then + elsif (RELIABILTY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_RES_TIME_FLAG)) then mem_cnt_next <= 23; else mem_cnt_next <= 25; @@ -2622,7 +2630,7 @@ begin mem_read <= '1'; -- Memory Flow Control Guard if (mem_ready_in = '1') then - if (RELIABILTY_QOS /= RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_REQ_SEQ_NR_BITMAP_FLAG)) then + if (RELIABILTY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_REQ_SEQ_NR_BITMAP_FLAG)) then mem_cnt_next <= 14; else if check_mask(mem_endpoint_latch_data.field_flag,EMF_ENTITYID_FLAG) then @@ -2633,11 +2641,11 @@ begin mem_cnt_next <= 19; elsif check_mask(mem_endpoint_latch_data.field_flag,EMF_UDP_PORT_FLAG) then mem_cnt_next <= 20; - elsif (RELIABILTY_QOS /= RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_LEASE_DEADLINE_FLAG)) then + elsif (RELIABILTY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_LEASE_DEADLINE_FLAG)) then mem_cnt_next <= 21; - elsif (RELIABILTY_QOS /= RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_RES_TIME_FLAG)) then + elsif (RELIABILTY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_RES_TIME_FLAG)) then mem_cnt_next <= 23; - elsif (RELIABILTY_QOS /= RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_ACK_SEQ_NR_BASE_FLAG)) then + elsif (RELIABILTY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_ACK_SEQ_NR_BASE_FLAG)) then mem_cnt_next <= 25; else mem_cnt_next <= 27; @@ -2662,13 +2670,13 @@ begin mem_cnt_next <= 19; elsif check_mask(mem_endpoint_latch_data.field_flag,EMF_UDP_PORT_FLAG) then mem_cnt_next <= 20; - elsif (RELIABILTY_QOS /= RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_LEASE_DEADLINE_FLAG)) then + elsif (RELIABILTY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_LEASE_DEADLINE_FLAG)) then mem_cnt_next <= 21; - elsif (RELIABILTY_QOS /= RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_RES_TIME_FLAG)) then + elsif (RELIABILTY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_RES_TIME_FLAG)) then mem_cnt_next <= 23; - elsif (RELIABILTY_QOS /= RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_ACK_SEQ_NR_BASE_FLAG)) then + elsif (RELIABILTY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_ACK_SEQ_NR_BASE_FLAG)) then mem_cnt_next <= 25; - elsif (RELIABILTY_QOS /= RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_REQ_SEQ_NR_BASE_FLAG)) then + elsif (RELIABILTY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_REQ_SEQ_NR_BASE_FLAG)) then mem_cnt_next <= 27; else mem_cnt_next <= 29; @@ -2688,15 +2696,15 @@ begin mem_cnt_next <= 19; elsif check_mask(mem_endpoint_latch_data.field_flag,EMF_UDP_PORT_FLAG) then mem_cnt_next <= 20; - elsif (RELIABILTY_QOS /= RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_LEASE_DEADLINE_FLAG)) then + elsif (RELIABILTY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_LEASE_DEADLINE_FLAG)) then mem_cnt_next <= 21; - elsif (RELIABILTY_QOS /= RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_RES_TIME_FLAG)) then + elsif (RELIABILTY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_RES_TIME_FLAG)) then mem_cnt_next <= 23; - elsif (RELIABILTY_QOS /= RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_ACK_SEQ_NR_BASE_FLAG)) then + elsif (RELIABILTY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_ACK_SEQ_NR_BASE_FLAG)) then mem_cnt_next <= 25; - elsif (RELIABILTY_QOS /= RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_REQ_SEQ_NR_BASE_FLAG)) then + elsif (RELIABILTY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_REQ_SEQ_NR_BASE_FLAG)) then mem_cnt_next <= 27; - elsif (RELIABILTY_QOS /= RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_REQ_SEQ_NR_BITMAP_FLAG)) then + elsif (RELIABILTY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_REQ_SEQ_NR_BITMAP_FLAG)) then mem_cnt_next <= 29; else -- DONE @@ -2732,15 +2740,15 @@ begin mem_cnt_next <= 19; elsif check_mask(mem_endpoint_latch_data.field_flag,EMF_UDP_PORT_FLAG) then mem_cnt_next <= 20; - elsif (RELIABILTY_QOS /= RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_LEASE_DEADLINE_FLAG)) then + elsif (RELIABILTY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_LEASE_DEADLINE_FLAG)) then mem_cnt_next <= 21; - elsif (RELIABILTY_QOS /= RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_RES_TIME_FLAG)) then + elsif (RELIABILTY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_RES_TIME_FLAG)) then mem_cnt_next <= 23; - elsif (RELIABILTY_QOS /= RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_ACK_SEQ_NR_BASE_FLAG)) then + elsif (RELIABILTY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_ACK_SEQ_NR_BASE_FLAG)) then mem_cnt_next <= 25; - elsif (RELIABILTY_QOS /= RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_REQ_SEQ_NR_BASE_FLAG)) then + elsif (RELIABILTY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_REQ_SEQ_NR_BASE_FLAG)) then mem_cnt_next <= 27; - elsif (RELIABILTY_QOS /= RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_REQ_SEQ_NR_BITMAP_FLAG)) then + elsif (RELIABILTY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_REQ_SEQ_NR_BITMAP_FLAG)) then mem_cnt_next <= 29; else -- DONE @@ -2756,37 +2764,38 @@ begin if check_mask(mem_endpoint_latch_data.field_flag,EMF_UDP_PORT_FLAG) then mem_cnt_next <= 20; - elsif (RELIABILTY_QOS /= RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_LEASE_DEADLINE_FLAG)) then + elsif (RELIABILTY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_LEASE_DEADLINE_FLAG)) then mem_cnt_next <= 21; - elsif (RELIABILTY_QOS /= RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_RES_TIME_FLAG)) then + elsif (RELIABILTY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_RES_TIME_FLAG)) then mem_cnt_next <= 23; - elsif (RELIABILTY_QOS /= RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_ACK_SEQ_NR_BASE_FLAG)) then + elsif (RELIABILTY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_ACK_SEQ_NR_BASE_FLAG)) then mem_cnt_next <= 25; - elsif (RELIABILTY_QOS /= RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_REQ_SEQ_NR_BASE_FLAG)) then + elsif (RELIABILTY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_REQ_SEQ_NR_BASE_FLAG)) then mem_cnt_next <= 27; - elsif (RELIABILTY_QOS /= RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_REQ_SEQ_NR_BITMAP_FLAG)) then + elsif (RELIABILTY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_REQ_SEQ_NR_BITMAP_FLAG)) then mem_cnt_next <= 29; else -- DONE mem_stage_next <= IDLE; end if; end if; - -- READ UDP Port + -- READ UDP Port & Reader Flags when 20 => mem_ready_out <= '1'; -- Memory Flow Control Guard if (mem_valid_out = '1') then - mem_endpoint_data_next.portn <= mem_read_data; + mem_endpoint_data_next.portn <= mem_read_data(WORD_WIDTH-1 downto WORD_WIDTH-UDP_PORT_WIDTH); + mem_endpoint_data_next.flags <= mem_read_data(CDR_SHORT_WIDTH-1 downto 0); - if (RELIABILTY_QOS /= RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_LEASE_DEADLINE_FLAG)) then + if (RELIABILTY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_LEASE_DEADLINE_FLAG)) then mem_cnt_next <= 21; - elsif (RELIABILTY_QOS /= RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_RES_TIME_FLAG)) then + elsif (RELIABILTY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_RES_TIME_FLAG)) then mem_cnt_next <= 23; - elsif (RELIABILTY_QOS /= RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_ACK_SEQ_NR_BASE_FLAG)) then + elsif (RELIABILTY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_ACK_SEQ_NR_BASE_FLAG)) then mem_cnt_next <= 25; - elsif (RELIABILTY_QOS /= RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_REQ_SEQ_NR_BASE_FLAG)) then + elsif (RELIABILTY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_REQ_SEQ_NR_BASE_FLAG)) then mem_cnt_next <= 27; - elsif (RELIABILTY_QOS /= RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_REQ_SEQ_NR_BITMAP_FLAG)) then + elsif (RELIABILTY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_REQ_SEQ_NR_BITMAP_FLAG)) then mem_cnt_next <= 29; else -- DONE @@ -2800,7 +2809,7 @@ begin mem_ready_out <= '1'; -- Memory Flow Control Guard if (mem_valid_out = '1') then - mem_endpoint_data_next.lease_deadline(0) <= mem_read_data; + mem_endpoint_data_next.lease_deadline(0) <= unsigned(mem_read_data); mem_cnt_next <= mem_cnt + 1; end if; @@ -2812,15 +2821,15 @@ begin mem_ready_out <= '1'; -- Memory Flow Control Guard if (mem_valid_out = '1') then - mem_endpoint_data_next.addr <= mem_read_data; + mem_endpoint_data_next.lease_deadline(1) <= unsigned(mem_read_data); - if (RELIABILTY_QOS /= RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_RES_TIME_FLAG)) then + if (RELIABILTY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_RES_TIME_FLAG)) then mem_cnt_next <= 23; - elsif (RELIABILTY_QOS /= RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_ACK_SEQ_NR_BASE_FLAG)) then + elsif (RELIABILTY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_ACK_SEQ_NR_BASE_FLAG)) then mem_cnt_next <= 25; - elsif (RELIABILTY_QOS /= RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_REQ_SEQ_NR_BASE_FLAG)) then + elsif (RELIABILTY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_REQ_SEQ_NR_BASE_FLAG)) then mem_cnt_next <= 27; - elsif (RELIABILTY_QOS /= RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_REQ_SEQ_NR_BITMAP_FLAG)) then + elsif (RELIABILTY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_REQ_SEQ_NR_BITMAP_FLAG)) then mem_cnt_next <= 29; else -- DONE @@ -2835,7 +2844,7 @@ begin mem_ready_out <= '1'; -- Memory Flow Control Guard if (mem_valid_out = '1') then - mem_endpoint_data_next.res_time(0) <= mem_read_data; + mem_endpoint_data_next.res_time(0) <= unsigned(mem_read_data); mem_cnt_next <= mem_cnt + 1; end if; @@ -2847,13 +2856,13 @@ begin mem_ready_out <= '1'; -- Memory Flow Control Guard if (mem_valid_out = '1') then - mem_endpoint_data_next.res_time(1) <= mem_read_data; + mem_endpoint_data_next.res_time(1) <= unsigned(mem_read_data); - if (RELIABILTY_QOS /= RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_ACK_SEQ_NR_BASE_FLAG)) then + if (RELIABILTY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_ACK_SEQ_NR_BASE_FLAG)) then mem_cnt_next <= 25; - elsif (RELIABILTY_QOS /= RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_REQ_SEQ_NR_BASE_FLAG)) then + elsif (RELIABILTY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_REQ_SEQ_NR_BASE_FLAG)) then mem_cnt_next <= 27; - elsif (RELIABILTY_QOS /= RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_REQ_SEQ_NR_BITMAP_FLAG)) then + elsif (RELIABILTY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_REQ_SEQ_NR_BITMAP_FLAG)) then mem_cnt_next <= 29; else -- DONE @@ -2868,7 +2877,7 @@ begin mem_ready_out <= '1'; -- Memory Flow Control Guard if (mem_valid_out = '1') then - mem_endpoint_data_next.ack_seq_nr_base(0) <= mem_read_data; + mem_endpoint_data_next.ack_seq_nr_base(0) <= unsigned(mem_read_data); mem_cnt_next <= mem_cnt + 1; end if; @@ -2880,11 +2889,11 @@ begin mem_ready_out <= '1'; -- Memory Flow Control Guard if (mem_valid_out = '1') then - mem_endpoint_data_next.ack_seq_nr_base(1) <= mem_read_data; + mem_endpoint_data_next.ack_seq_nr_base(1) <= unsigned(mem_read_data); - if (RELIABILTY_QOS /= RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_REQ_SEQ_NR_BASE_FLAG)) then + if (RELIABILTY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_REQ_SEQ_NR_BASE_FLAG)) then mem_cnt_next <= 27; - elsif (RELIABILTY_QOS /= RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_REQ_SEQ_NR_BITMAP_FLAG)) then + elsif (RELIABILTY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_REQ_SEQ_NR_BITMAP_FLAG)) then mem_cnt_next <= 29; else -- DONE @@ -2899,7 +2908,7 @@ begin mem_ready_out <= '1'; -- Memory Flow Control Guard if (mem_valid_out = '1') then - mem_endpoint_data_next.req_seq_nr_base(0) <= mem_read_data; + mem_endpoint_data_next.req_seq_nr_base(0) <= unsigned(mem_read_data); mem_cnt_next <= mem_cnt + 1; end if; @@ -2911,9 +2920,9 @@ begin mem_ready_out <= '1'; -- Memory Flow Control Guard if (mem_valid_out = '1') then - mem_endpoint_data_next.req_seq_nr_base(1) <= mem_read_data; + mem_endpoint_data_next.req_seq_nr_base(1) <= unsigned(mem_read_data); - if (RELIABILTY_QOS /= RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_REQ_SEQ_NR_BITMAP_FLAG)) then + if (RELIABILTY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_REQ_SEQ_NR_BITMAP_FLAG)) then mem_cnt_next <= 29; else -- DONE @@ -2979,17 +2988,17 @@ begin if (mem_ready_in = '1') then mem_cnt_next <= mem_cnt + 1; end if; - -- UDPv4 Ports + -- UDPv4 Ports and Reader Flags when 5 => mem_valid_in <= '1'; mem_addr <= mem_addr_base + EMF_UDP_PORT_OFFSET; - mem_write_data <= mem_endpoint_latch_data.portn & ((mem_write_data'length-mem_endpoint_latch_data.portn'length-1) downto 0 => '0'); + mem_write_data <= mem_endpoint_latch_data.portn & mem_endpoint_latch_data.flags; if (mem_ready_in = '1') then if (RELIABILTY_QOS = RELIABLE_RELIABILITY_QOS) then mem_cnt_next <= mem_cnt + 1; else -- DONE - mem_stage_next <-= IDLE; + mem_stage_next <= IDLE; end if; end if; -- Lease Deadline 1/2 @@ -3020,7 +3029,7 @@ begin if (RELIABILTY_QOS = RELIABLE_RELIABILITY_QOS) then mem_valid_in <= '1'; mem_addr <= mem_addr_base + EMF_RES_TIME_OFFSET; - mem_write_data <= (others => '0'); + mem_write_data <= std_logic_vector(TIME_INVALID(0)); if (mem_ready_in = '1') then mem_cnt_next <= mem_cnt + 1; end if; @@ -3030,7 +3039,7 @@ begin if (RELIABILTY_QOS = RELIABLE_RELIABILITY_QOS) then mem_valid_in <= '1'; mem_addr <= mem_addr_base + EMF_RES_TIME_OFFSET + 1; - mem_write_data <= (others => '0'); + mem_write_data <= std_logic_vector(TIME_INVALID(1)); if (mem_ready_in = '1') then mem_cnt_next <= mem_cnt + 1; end if; @@ -3041,7 +3050,7 @@ begin if (RELIABILTY_QOS = RELIABLE_RELIABILITY_QOS) then mem_valid_in <= '1'; mem_addr <= mem_addr_base + EMF_ACK_SEQ_NR_BASE_OFFSET; - mem_write_data <= seq_nr(0); + mem_write_data <= std_logic_vector(seq_nr(0)); if (mem_ready_in = '1') then mem_cnt_next <= mem_cnt + 1; end if; @@ -3050,10 +3059,9 @@ begin when 11 => -- Synthesis Guard if (RELIABILTY_QOS = RELIABLE_RELIABILITY_QOS) then - mem_write_data <= (others => '0'); mem_valid_in <= '1'; mem_addr <= mem_addr_base + EMF_ACK_SEQ_NR_BASE_OFFSET + 1; - mem_write_data <= seq_nr(1); + mem_write_data <= std_logic_vector(seq_nr(1)); if (mem_ready_in = '1') then mem_cnt_next <= mem_cnt + 1; end if; @@ -3064,7 +3072,7 @@ begin if (RELIABILTY_QOS = RELIABLE_RELIABILITY_QOS) then mem_valid_in <= '1'; mem_addr <= mem_addr_base + EMF_REQ_SEQ_NR_BASE_OFFSET; - mem_write_data <= SEQUENCENUMBER_UNKNOWN(0); + mem_write_data <= std_logic_vector(SEQUENCENUMBER_UNKNOWN(0)); if (mem_ready_in = '1') then mem_cnt_next <= mem_cnt + 1; end if; @@ -3076,7 +3084,7 @@ begin mem_write_data <= (others => '0'); mem_valid_in <= '1'; mem_addr <= mem_addr_base + EMF_REQ_SEQ_NR_BASE_OFFSET + 1; - mem_write_data <= SEQUENCENUMBER_UNKNOWN(1); + mem_write_data <= std_logic_vector(SEQUENCENUMBER_UNKNOWN(1)); if (mem_ready_in = '1') then mem_cnt_next <= mem_cnt + 1; end if; @@ -3103,43 +3111,44 @@ begin mem_valid_in <= '1'; mem_addr <= mem_addr_base + EMF_IPV4_ADDR_OFFSET; mem_write_data <= mem_endpoint_latch_data.addr; - mem_endpoint_data.addr <= mem_endpoint_latch_data.addr; + mem_endpoint_data_next.addr <= mem_endpoint_latch_data.addr; -- Memory Flow Control Guard if (mem_ready_in = '1') then if check_mask(mem_endpoint_latch_data.field_flag,EMF_UDP_PORT_FLAG) then mem_cnt_next <= 1; - elsif (RELIABILTY_QOS /= RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_LEASE_DEADLINE_FLAG)) then + elsif (RELIABILTY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_LEASE_DEADLINE_FLAG)) then mem_cnt_next <= 2; - elsif (RELIABILTY_QOS /= RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_RES_TIME_FLAG)) then + elsif (RELIABILTY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_RES_TIME_FLAG)) then mem_cnt_next <= 4; - elsif (RELIABILTY_QOS /= RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_ACK_SEQ_NR_BASE_FLAG)) then + elsif (RELIABILTY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_ACK_SEQ_NR_BASE_FLAG)) then mem_cnt_next <= 6; - elsif (RELIABILTY_QOS /= RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_REQ_SEQ_NR_BASE_FLAG)) then + elsif (RELIABILTY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_REQ_SEQ_NR_BASE_FLAG)) then mem_cnt_next <= 8; - elsif (RELIABILTY_QOS /= RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_REQ_SEQ_NR_BITMAP_FLAG)) then + elsif (RELIABILTY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_REQ_SEQ_NR_BITMAP_FLAG)) then mem_cnt_next <= 10; else -- DONE mem_stage_next <= IDLE; end if; end if; - -- UDPv4 Ports + -- UDPv4 Ports & Reader Flags when 1 => mem_valid_in <= '1'; mem_addr <= mem_addr_base + EMF_UDP_PORT_OFFSET; - mem_write_data <= mem_endpoint_latch_data.portn & ((mem_write_data'length-mem_endpoint_latch_data.portn'length-1) downto 0 => '0'); - mem_endpoint_data.portn <= mem_endpoint_latch_data.portn; + mem_write_data <= mem_endpoint_latch_data.portn & mem_endpoint_latch_data.flags; + mem_endpoint_data_next.portn <= mem_endpoint_latch_data.portn; + mem_endpoint_data_next.flags <= mem_endpoint_latch_data.flags; -- Memory Flow Control Guard if (mem_ready_in = '1') then - if (RELIABILTY_QOS /= RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_LEASE_DEADLINE_FLAG)) then + if (RELIABILTY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_LEASE_DEADLINE_FLAG)) then mem_cnt_next <= 2; - elsif (RELIABILTY_QOS /= RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_RES_TIME_FLAG)) then + elsif (RELIABILTY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_RES_TIME_FLAG)) then mem_cnt_next <= 4; - elsif (RELIABILTY_QOS /= RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_ACK_SEQ_NR_BASE_FLAG)) then + elsif (RELIABILTY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_ACK_SEQ_NR_BASE_FLAG)) then mem_cnt_next <= 6; - elsif (RELIABILTY_QOS /= RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_REQ_SEQ_NR_BASE_FLAG)) then + elsif (RELIABILTY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_REQ_SEQ_NR_BASE_FLAG)) then mem_cnt_next <= 8; - elsif (RELIABILTY_QOS /= RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_REQ_SEQ_NR_BITMAP_FLAG)) then + elsif (RELIABILTY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_REQ_SEQ_NR_BITMAP_FLAG)) then mem_cnt_next <= 10; else -- DONE @@ -3165,16 +3174,16 @@ begin mem_valid_in <= '1'; mem_addr <= mem_addr_base + EMF_LEASE_DEADLINE_OFFSET + 1; mem_write_data <= std_logic_vector(mem_endpoint_latch_data.lease_deadline(1)); - mem_endpoint_data.lease_deadline <= mem_endpoint_latch_data.lease_deadline; + mem_endpoint_data_next.lease_deadline <= mem_endpoint_latch_data.lease_deadline; -- Memory Flow Control Guard if (mem_ready_in = '1') then - if (RELIABILTY_QOS /= RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_RES_TIME_FLAG)) then + if (RELIABILTY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_RES_TIME_FLAG)) then mem_cnt_next <= 4; - elsif (RELIABILTY_QOS /= RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_ACK_SEQ_NR_BASE_FLAG)) then + elsif (RELIABILTY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_ACK_SEQ_NR_BASE_FLAG)) then mem_cnt_next <= 6; - elsif (RELIABILTY_QOS /= RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_REQ_SEQ_NR_BASE_FLAG)) then + elsif (RELIABILTY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_REQ_SEQ_NR_BASE_FLAG)) then mem_cnt_next <= 8; - elsif (RELIABILTY_QOS /= RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_REQ_SEQ_NR_BITMAP_FLAG)) then + elsif (RELIABILTY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_REQ_SEQ_NR_BITMAP_FLAG)) then mem_cnt_next <= 10; else -- DONE @@ -3201,14 +3210,14 @@ begin mem_valid_in <= '1'; mem_addr <= mem_addr_base + EMF_RES_TIME_OFFSET + 1; mem_write_data <= std_logic_vector(mem_endpoint_latch_data.res_time(1)); - mem_endpoint_data.res_time <= mem_endpoint_latch_data.res_time; + mem_endpoint_data_next.res_time <= mem_endpoint_latch_data.res_time; -- Memory Flow Control Guard if (mem_ready_in = '1') then - if (RELIABILTY_QOS /= RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_ACK_SEQ_NR_BASE_FLAG)) then + if (RELIABILTY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_ACK_SEQ_NR_BASE_FLAG)) then mem_cnt_next <= 6; - elsif (RELIABILTY_QOS /= RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_REQ_SEQ_NR_BASE_FLAG)) then + elsif (RELIABILTY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_REQ_SEQ_NR_BASE_FLAG)) then mem_cnt_next <= 8; - elsif (RELIABILTY_QOS /= RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_REQ_SEQ_NR_BITMAP_FLAG)) then + elsif (RELIABILTY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_REQ_SEQ_NR_BITMAP_FLAG)) then mem_cnt_next <= 10; else -- DONE @@ -3224,7 +3233,7 @@ begin mem_addr <= mem_addr_base + EMF_ACK_SEQ_NR_BASE_OFFSET; mem_write_data <= std_logic_vector(mem_endpoint_latch_data.ack_seq_nr_base(0)); -- Memory Flow Control Guard - if (mem_ready_in = '1') + if (mem_ready_in = '1') then mem_cnt_next <= mem_cnt + 1; end if; end if; @@ -3235,12 +3244,12 @@ begin mem_valid_in <= '1'; mem_addr <= mem_addr_base + EMF_ACK_SEQ_NR_BASE_OFFSET + 1; mem_write_data <= std_logic_vector(mem_endpoint_latch_data.ack_seq_nr_base(1)); - mem_endpoint_data.ack_seq_nr_base <= mem_endpoint_latch_data.ack_seq_nr_base; + mem_endpoint_data_next.ack_seq_nr_base <= mem_endpoint_latch_data.ack_seq_nr_base; -- Memory Flow Control Guard if (mem_ready_in = '1') then - if (RELIABILTY_QOS /= RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_REQ_SEQ_NR_BASE_FLAG)) then + if (RELIABILTY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_REQ_SEQ_NR_BASE_FLAG)) then mem_cnt_next <= 8; - elsif (RELIABILTY_QOS /= RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_REQ_SEQ_NR_BITMAP_FLAG)) then + elsif (RELIABILTY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_REQ_SEQ_NR_BITMAP_FLAG)) then mem_cnt_next <= 10; else -- DONE @@ -3256,7 +3265,7 @@ begin mem_addr <= mem_addr_base + EMF_REQ_SEQ_NR_BASE_OFFSET; mem_write_data <= std_logic_vector(mem_endpoint_latch_data.req_seq_nr_base(0)); -- Memory Flow Control Guard - if (mem_ready_in = '1') + if (mem_ready_in = '1') then mem_cnt_next <= mem_cnt + 1; end if; end if; @@ -3267,10 +3276,10 @@ begin mem_valid_in <= '1'; mem_addr <= mem_addr_base + EMF_REQ_SEQ_NR_BASE_OFFSET + 1; mem_write_data <= std_logic_vector(mem_endpoint_latch_data.req_seq_nr_base(1)); - mem_endpoint_data.req_seq_nr_base <= mem_endpoint_latch_data.req_seq_nr_base; + mem_endpoint_data_next.req_seq_nr_base <= mem_endpoint_latch_data.req_seq_nr_base; -- Memory Flow Control Guard if (mem_ready_in = '1') then - if (RELIABILTY_QOS /= RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_REQ_SEQ_NR_BITMAP_FLAG)) then + if (RELIABILTY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_REQ_SEQ_NR_BITMAP_FLAG)) then mem_cnt_next <= 10; else -- DONE @@ -3285,7 +3294,7 @@ begin mem_valid_in <= '1'; mem_addr <= mem_addr_base + EMF_REQ_SEQ_NR_BITMAP_OFFSET; mem_write_data <= mem_endpoint_latch_data.req_seq_nr_bitmap; - mem_endpoint_data.req_seq_nr_bitmap <= mem_endpoint_latch_data.req_seq_nr_bitmap; + mem_endpoint_data_next.req_seq_nr_bitmap <= mem_endpoint_latch_data.req_seq_nr_bitmap; -- Memory Flow Control Guard if (mem_ready_in = '1') then -- DONE @@ -3397,7 +3406,6 @@ begin last_addr_next <= mem_addr_base; -- Continue Search mem_addr_base_next <= mem_addr_base + ENDPOINT_FRAME_SIZE; - mem_pos_next <= mem_pos + 1; mem_cnt_next <= 0; end if; -- Slot Empty @@ -3413,7 +3421,6 @@ begin else -- Continue Search mem_addr_base_next <= mem_addr_base + ENDPOINT_FRAME_SIZE; - mem_pos_next <= mem_pos + 1; mem_cnt_next <= 0; end if; end if; @@ -3452,15 +3459,15 @@ begin mem_cnt_next <= 4; elsif check_mask(mem_endpoint_latch_data.field_flag,EMF_UDP_PORT_FLAG) then mem_cnt_next <= 5; - elsif (RELIABILTY_QOS /= RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_LEASE_DEADLINE_FLAG)) then + elsif (RELIABILTY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_LEASE_DEADLINE_FLAG)) then mem_cnt_next <= 6; - elsif (RELIABILTY_QOS /= RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_RES_TIME_FLAG)) then + elsif (RELIABILTY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_RES_TIME_FLAG)) then mem_cnt_next <= 8; - elsif (RELIABILTY_QOS /= RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_ACK_SEQ_NR_BASE_FLAG)) then + elsif (RELIABILTY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_ACK_SEQ_NR_BASE_FLAG)) then mem_cnt_next <= 10; - elsif (RELIABILTY_QOS /= RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_REQ_SEQ_NR_BASE_FLAG)) then + elsif (RELIABILTY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_REQ_SEQ_NR_BASE_FLAG)) then mem_cnt_next <= 12; - elsif (RELIABILTY_QOS /= RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_REQ_SEQ_NR_BITMAP_FLAG)) then + elsif (RELIABILTY_QOS = RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_REQ_SEQ_NR_BITMAP_FLAG)) then mem_cnt_next <= 14; else -- DONE @@ -3515,4 +3522,93 @@ begin end case; end process; + sync_prc : process(clk) + begin + if rising_edge(clk) then + if (reset = '1') then + stage <= IDLE; + return_stage <= IDLE; + mem_stage <= RESET_MEMORY; + sn_latch_1 <= SEQUENCENUMBER_UNKNOWN; + sn_latch_2 <= SEQUENCENUMBER_UNKNOWN; + sn_latch_3 <= SEQUENCENUMBER_UNKNOWN; + global_ack_seq_nr_base <= SEQUENCENUMBER_UNKNOWN; + last_seq_nr <= SEQUENCENUMBER_UNKNOWN; + check_time <= TIME_INVALID; + heartbeat_time <= TIME_INVALID; + guid <= GUID_UNKNOWN; + addr <= IPv4_ADDRESS_INVALID; + portn <= UDP_PORT_INVALID; + mem_endpoint_data <= ZERO_ENDPOINT_DATA; + mem_endpoint_latch_data <= ZERO_ENDPOINT_LATCH_DATA; + cnt <= 0; + cnt2 <= 0; + cnt3 <= 0; + nack_bitmap_pos <= 0; + req_bitmap_pos <= 0; + mem_cnt <= 0; + mem_pos <= 0; + is_meta <= '0'; + last_word_in_latch <= '0'; + stale_check <= '0'; + gap_in_progress <= '0'; + new_push <= '0'; + historical_push <= '0'; + assert_liveliness_latch <= '0'; + meta_opcode <= (others => '0'); + opcode <= (others => '0'); + rtps_flags <= (others => '0'); + reader_flags <= (others => '0'); + count <= (others => '0'); + long_latch <= (others => '0'); + req_seq_nr_bitmap <= (others => '0'); + mem_addr_base <= (others => '0'); + last_addr <= (others => '0'); + mem_addr_latch <= (others => '0'); + max_endpoint_addr <= (others => '0'); + else + stage <= stage_next; + return_stage <= return_stage; + mem_stage <= mem_stage_next; + sn_latch_1 <= sn_latch_1_next; + sn_latch_2 <= sn_latch_2_next; + sn_latch_3 <= sn_latch_3_next; + global_ack_seq_nr_base <= global_ack_seq_nr_base_next; + last_seq_nr <= last_seq_nr_next; + check_time <= check_time_next; + heartbeat_time <= heartbeat_time_next; + guid <= guid_next; + addr <= addr_next; + portn <= portn_next; + mem_endpoint_data <= mem_endpoint_data_next; + mem_endpoint_latch_data <= mem_endpoint_latch_data_next; + cnt <= cnt_next; + cnt2 <= cnt2_next; + cnt3 <= cnt3_next; + nack_bitmap_pos <= nack_bitmap_pos_next; + req_bitmap_pos <= req_bitmap_pos_next; + mem_cnt <= mem_cnt_next; + mem_pos <= mem_pos_next; + is_meta <= is_meta_next; + last_word_in_latch <= last_word_in_latch_next; + stale_check <= stale_check_next; + gap_in_progress <= gap_in_progress_next; + new_push <= new_push_next; + historical_push <= historical_push_next; + assert_liveliness_latch <= assert_liveliness_latch_next; + meta_opcode <= meta_opcode_next; + opcode <= opcode_next; + rtps_flags <= rtps_flags_next; + reader_flags <= reader_flags_next; + count <= count_next; + long_latch <= long_latch_next; + req_seq_nr_bitmap <= req_seq_nr_bitmap_next; + mem_addr_base <= mem_addr_base_next; + last_addr <= last_addr_next; + mem_addr_latch <= mem_addr_latch_next; + max_endpoint_addr <= max_endpoint_addr_next; + end if; + end if; + end process; + end architecture; \ No newline at end of file