Fix Syntax in rtps_reader
This commit is contained in:
parent
52bd4053d1
commit
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@ -485,6 +485,7 @@ package rtps_package is
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function "-" (L: natural; R: DOUBLE_WORD_ARRAY) return DOUBLE_WORD_ARRAY;
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function "-" (L: natural; R: DOUBLE_WORD_ARRAY) return DOUBLE_WORD_ARRAY;
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function min(L, R : DOUBLE_WORD_ARRAY) return DOUBLE_WORD_ARRAY;
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function min(L, R : DOUBLE_WORD_ARRAY) return DOUBLE_WORD_ARRAY;
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function max(L, R : DOUBLE_WORD_ARRAY) return DOUBLE_WORD_ARRAY;
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function max(L, R : DOUBLE_WORD_ARRAY) return DOUBLE_WORD_ARRAY;
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function to_integer(dw : DOUBLE_WORD_ARRAY) return integer;
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end package;
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end package;
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package body rtps_package is
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package body rtps_package is
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@ -673,4 +674,9 @@ package body rtps_package is
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return ret;
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return ret;
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end function;
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end function;
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function to_integer(dw : DOUBLE_WORD_ARRAY) return integer is
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begin
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return to_integer(dw(0));
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end function;
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end package body;
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end package body;
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@ -2,6 +2,7 @@ library ieee;
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use ieee.std_logic_1164.all;
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use ieee.std_logic_1164.all;
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use ieee.numeric_std.all;
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use ieee.numeric_std.all;
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use work.math_pkg.all;
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use work.rtps_package.all;
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use work.rtps_package.all;
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use work.user_config.all;
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use work.user_config.all;
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use work.rtps_config_package.all;
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use work.rtps_config_package.all;
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@ -11,14 +12,15 @@ use work.rtps_config_package.all;
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entity rtps_reader is
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entity rtps_reader is
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generic (
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generic (
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RELIABILTY_QOS : std_logic_vector(CDR_ENUMERATION_WIDTH-1 downto 0) := DEFAULT_RELIABILTY_QOS;
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ENTITYID : std_logic_vector(ENTITYID_WIDTH-1 downto 0);
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LIVELINESS_QOS : std_logic_vector(CDR_ENUMERATION_WIDTH-1 downto 0) := DEFAULT_LIVELINESS_QOS;
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RELIABILTY_QOS : std_logic_vector(CDR_ENUMERATION_WIDTH-1 downto 0);
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DURABILITY_QOS : std_logic_vector(CDR_ENUMERATION_WIDTH-1 downto 0) := DEFAULT_DURABILITY_QOS;
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LIVELINESS_QOS : std_logic_vector(CDR_ENUMERATION_WIDTH-1 downto 0);
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HEARTBEAT_RESPONSE_DELAY : DURATION_TYPE := TODO;
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DURABILITY_QOS : std_logic_vector(CDR_ENUMERATION_WIDTH-1 downto 0);
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HEARTBEAT_SUPPRESSION_DELAY : DURATION_TYPE := TODO;
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HEARTBEAT_RESPONSE_DELAY : DURATION_TYPE;
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LEASE_DURATION : DURATION_TYPE := DEFAULT_LEASE_DURATION;
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HEARTBEAT_SUPPRESSION_DELAY : DURATION_TYPE;
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ENTITYID : std_logic_vector(ENTITYID_WIDTH-1 downto 0) := ENTITYID_UNKNOWN;
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LEASE_DURATION : DURATION_TYPE;
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WITH_KEY : boolean := FALSE -- TODO: Default
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WITH_KEY : boolean;
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MAX_REMOTE_ENDPOINTS : natural := 50
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);
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);
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port (
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port (
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-- SYSTEM
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-- SYSTEM
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@ -45,7 +47,7 @@ entity rtps_reader is
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opcode_hc : out HISTORY_CACHE_OPCODE_TYPE;
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opcode_hc : out HISTORY_CACHE_OPCODE_TYPE;
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ack_hc : in std_logic;
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ack_hc : in std_logic;
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done_hc : in std_logic;
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done_hc : in std_logic;
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ret_hc : in HISTORY_CACHE_RESPOSNE_TYPE;
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ret_hc : in HISTORY_CACHE_RESPONSE_TYPE;
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data_out_hc : out std_logic_vector(WORD_WIDTH-1 downto 0);
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data_out_hc : out std_logic_vector(WORD_WIDTH-1 downto 0);
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valid_out_hc : out std_logic;
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valid_out_hc : out std_logic;
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ready_out_hc : in std_logic;
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ready_out_hc : in std_logic;
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@ -57,8 +59,16 @@ architecture arch of rtps_reader is
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--*****CONSTANT DECLARATION*****
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--*****CONSTANT DECLARATION*****
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-- *ENDPOINT MEMORY*
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-- *ENDPOINT MEMORY*
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-- 4-Byte Word Size of a Participant Entry in Memory
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function gen_frame_size(qos : std_logic_vector(CDR_ENUMERATION_WIDTH-1 downto 0)) return natural is
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variable ret : natural := 0;
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begin
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ret := 12 when (qos = RELIABLE_RELIABILITY_QOS) else 8;
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return ret;
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end function;
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constant ENDPOINT_FRAME_SIZE : natural := gen_frame_size(RELIABILTY_QOS);
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-- Endpoint Memory Size in 4-Byte Words
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-- Endpoint Memory Size in 4-Byte Words
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constant ENDPOINT_MEMORY_SIZE : natural := TODO;
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constant ENDPOINT_MEMORY_SIZE : natural := MAX_REMOTE_ENDPOINTS * ENDPOINT_FRAME_SIZE;
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-- Endpoint Memory Address Width
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-- Endpoint Memory Address Width
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constant ENDPOINT_MEMORY_ADDR_WIDTH : natural := log2c(ENDPOINT_MEMORY_SIZE);
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constant ENDPOINT_MEMORY_ADDR_WIDTH : natural := log2c(ENDPOINT_MEMORY_SIZE);
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-- Highest Endpoint Memory Address
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-- Highest Endpoint Memory Address
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@ -71,13 +81,13 @@ architecture arch of rtps_reader is
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-- *ENDPOINT MEMORY FORMAT FORMAT FLAGS*
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-- *ENDPOINT MEMORY FORMAT FORMAT FLAGS*
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-- Flags mapping to the respective Endpoint Memory Frame Fields
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-- Flags mapping to the respective Endpoint Memory Frame Fields
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constant EMF_FLAG_WIDTH : natural := 7;
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constant EMF_FLAG_WIDTH : natural := 7;
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constant EMF_ENTITYID_FLAG : std_logic_vector(0 to EMF_FLAG_WIDTH-1) := (0 => 1, others => '0');
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constant EMF_ENTITYID_FLAG : std_logic_vector(0 to EMF_FLAG_WIDTH-1) := (0 => '1', others => '0');
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constant EMF_GUIDPREFIX_FLAG : std_logic_vector(0 to EMF_FLAG_WIDTH-1) := (1 => 1, others => '0');
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constant EMF_GUIDPREFIX_FLAG : std_logic_vector(0 to EMF_FLAG_WIDTH-1) := (1 => '1', others => '0');
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constant EMF_IPV4_ADDR_FLAG : std_logic_vector(0 to EMF_FLAG_WIDTH-1) := (2 => 1, others => '0');
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constant EMF_IPV4_ADDR_FLAG : std_logic_vector(0 to EMF_FLAG_WIDTH-1) := (2 => '1', others => '0');
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constant EMF_UDP_PORT_FLAG : std_logic_vector(0 to EMF_FLAG_WIDTH-1) := (3 => 1, others => '0');
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constant EMF_UDP_PORT_FLAG : std_logic_vector(0 to EMF_FLAG_WIDTH-1) := (3 => '1', others => '0');
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constant EMF_NEXT_SEQ_NR_FLAG : std_logic_vector(0 to EMF_FLAG_WIDTH-1) := (4 => 1, others => '0');
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constant EMF_NEXT_SEQ_NR_FLAG : std_logic_vector(0 to EMF_FLAG_WIDTH-1) := (4 => '1', others => '0');
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constant EMF_LEASE_DEADLINE_FLAG : std_logic_vector(0 to EMF_FLAG_WIDTH-1) := (5 => 1, others => '0');
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constant EMF_LEASE_DEADLINE_FLAG : std_logic_vector(0 to EMF_FLAG_WIDTH-1) := (5 => '1', others => '0');
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constant EMF_RES_TIME_FLAG : std_logic_vector(0 to EMF_FLAG_WIDTH-1) := (6 => 1, others => '0');
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constant EMF_RES_TIME_FLAG : std_logic_vector(0 to EMF_FLAG_WIDTH-1) := (6 => '1', others => '0');
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-- *ENDPOINT MEMORY FRAME FORMAT*
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-- *ENDPOINT MEMORY FRAME FORMAT*
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-- 4-Byte Word Offsets to Beginning of Respective Fields in the Endpoint Memory Frame
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-- 4-Byte Word Offsets to Beginning of Respective Fields in the Endpoint Memory Frame
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@ -85,7 +95,13 @@ architecture arch of rtps_reader is
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constant EMF_GUIDPREFIX_OFFSET : natural := 1;
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constant EMF_GUIDPREFIX_OFFSET : natural := 1;
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constant EMF_IPV4_ADDR_OFFSET : natural := 4;
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constant EMF_IPV4_ADDR_OFFSET : natural := 4;
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constant EMF_UDP_PORT_OFFSET : natural := 5;
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constant EMF_UDP_PORT_OFFSET : natural := 5;
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constant EMF_NEXT_SEQ_NR_OFFSET : natural := 6 when (RELIABILTY_QOS = RELIABLE_RELIABILITY_QOS) else EMF_GUIDPREFIX_OFFSET + 3;
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function gen_emf_udp_port_offset(qos : std_logic_vector(CDR_ENUMERATION_WIDTH-1 downto 0)) return natural is
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variable ret : natural := 0;
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begin
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ret := 6 when (qos = RELIABLE_RELIABILITY_QOS) else EMF_GUIDPREFIX_OFFSET + 3;
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return ret;
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end function;
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constant EMF_NEXT_SEQ_NR_OFFSET : natural := gen_emf_udp_port_offset(RELIABILTY_QOS);
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constant EMF_LEASE_DEADLINE_OFFSET : natural := EMF_NEXT_SEQ_NR_OFFSET + 2;
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constant EMF_LEASE_DEADLINE_OFFSET : natural := EMF_NEXT_SEQ_NR_OFFSET + 2;
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constant EMF_RES_TIME_OFFSET : natural := EMF_LEASE_DEADLINE_OFFSET + 2;
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constant EMF_RES_TIME_OFFSET : natural := EMF_LEASE_DEADLINE_OFFSET + 2;
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@ -156,6 +172,8 @@ architecture arch of rtps_reader is
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signal stage, stage_next : STAGE_TYPE := IDLE;
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signal stage, stage_next : STAGE_TYPE := IDLE;
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-- FSM state latch. Used to transition dynamically to different states from the same state.
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-- FSM state latch. Used to transition dynamically to different states from the same state.
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signal return_stage, return_stage_next : STAGE_TYPE := IDLE;
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signal return_stage, return_stage_next : STAGE_TYPE := IDLE;
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-- Intermediate input read signal. (Read from output port not allowed)
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signal rd_sig : std_logic := '0';
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-- Signal used to reset the word counter
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-- Signal used to reset the word counter
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signal reset_read_cnt : std_logic;
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signal reset_read_cnt : std_logic;
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-- Word (4-Byte) counter (Counts words read from input fifo)
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-- Word (4-Byte) counter (Counts words read from input fifo)
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@ -163,7 +181,7 @@ architecture arch of rtps_reader is
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-- Word aligned End of Parameter
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-- Word aligned End of Parameter
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signal parameter_end, parameter_end_next : unsigned(PARAMETER_LENGTH_WIDTH-1 downto 0) := (others => '0');
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signal parameter_end, parameter_end_next : unsigned(PARAMETER_LENGTH_WIDTH-1 downto 0) := (others => '0');
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-- General Purpose Counter
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-- General Purpose Counter
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signal cnt, cnt_next : natural range TODO := 0;
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signal cnt, cnt_next : natural range 0 to 9 := 0;
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-- Packet Opcode Latch (RTPS Message ID)
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-- Packet Opcode Latch (RTPS Message ID)
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signal opcode, opcode_next : std_logic_vector(SUBMESSAGE_ID_WIDTH-1 downto 0) := (others => '0');
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signal opcode, opcode_next : std_logic_vector(SUBMESSAGE_ID_WIDTH-1 downto 0) := (others => '0');
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-- Metatraffic Opcode Latch
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-- Metatraffic Opcode Latch
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@ -241,13 +259,13 @@ architecture arch of rtps_reader is
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-- Highest Endpoint Memory Address (Points to first Address of last occupied Endpoint Frame)
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-- Highest Endpoint Memory Address (Points to first Address of last occupied Endpoint Frame)
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signal max_endpoint_addr, max_endpoint_addr_next : unsigned(ENDPOINT_MEMORY_ADDR_WIDTH-1 downto 0) := (others => '0');
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signal max_endpoint_addr, max_endpoint_addr_next : unsigned(ENDPOINT_MEMORY_ADDR_WIDTH-1 downto 0) := (others => '0');
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-- General Purpose Couter
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-- General Purpose Couter
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signal mem_cnt, mem_cnt_next : natural range TODO := 0;
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signal mem_cnt, mem_cnt_next : natural range 0 to 23 := 0;
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-- Latch for Endpoint Data from Memory
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-- Latch for Endpoint Data from Memory
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signal mem_endpoint_data, mem_endpoint_data_next : ENDPOINT_DATA_TYPE := ZERO_ENDPOINT_DATA;
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signal mem_endpoint_data, mem_endpoint_data_next : ENDPOINT_DATA_TYPE := ZERO_ENDPOINT_DATA;
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-- Latch for Endpoint Data from main process
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-- Latch for Endpoint Data from main process
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signal mem_endpoint_latch_data, mem_endpoint_latch_data_next : ENDPOINT_LATCH_DATA_TYPE := ZERO_ENDPOINT_LATCH_DATA;
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signal mem_endpoint_latch_data, mem_endpoint_latch_data_next : ENDPOINT_LATCH_DATA_TYPE := ZERO_ENDPOINT_LATCH_DATA;
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-- Position (In Endpoint Memory Frame Granularity) of current relevant Endpoint
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-- Position (In Endpoint Memory Frame Granularity) of current relevant Endpoint
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signal mem_pos, mem_pos_next : natural range TODO := 0;
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signal mem_pos, mem_pos_next : natural range 0 to MAX_REMOTE_ENDPOINTS-1 := 0;
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-- Signifies an abort of the currently initiated read transaction
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-- Signifies an abort of the currently initiated read transaction
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signal abort_read : std_logic := '0';
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signal abort_read : std_logic := '0';
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@ -328,6 +346,7 @@ begin
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-- Big Endian Representation
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-- Big Endian Representation
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data_in_swapped <= endian_swap(endian_flag, data_in_user);
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data_in_swapped <= endian_swap(endian_flag, data_in_user);
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rd_user <= rd_sig;
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-- *Main State Machine*
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-- *Main State Machine*
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-- STATE DESCRIPTION
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-- STATE DESCRIPTION
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@ -402,9 +421,12 @@ begin
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start_hc <= '0';
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start_hc <= '0';
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valid_out_hc <= '0';
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valid_out_hc <= '0';
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last_word_out_hc <= '0';
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last_word_out_hc <= '0';
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wr_rtps <= '0';
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last_word_out_rtps <= '0';
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rd_guard := '0';
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rd_guard := '0';
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mem_field_flags <= (others => '0');
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mem_field_flags <= (others => '0');
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data_out_hc <= (others => '0');
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data_out_hc <= (others => '0');
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data_out_rtps <= (others => '0');
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@ -413,7 +435,7 @@ begin
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last_word_in_latch_next <= '1';
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last_word_in_latch_next <= '1';
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end if;
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end if;
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case (meta_stage) is
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case (stage) is
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when IDLE =>
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when IDLE =>
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-- RESET
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-- RESET
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lifespan_next <= TIME_INVALID;
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lifespan_next <= TIME_INVALID;
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@ -524,13 +546,15 @@ begin
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else
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else
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stage_next <= LATCH_ENTITYID;
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stage_next <= LATCH_ENTITYID;
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end if;
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end if;
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when others =>
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null;
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end case;
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end case;
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end if;
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end if;
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when LATCH_ENTITYID =>
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when LATCH_ENTITYID =>
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-- Input FIFO Guard
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-- Input FIFO Guard
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if ((is_meta = '1' and empty_meta = '0') or (is_meta = '0' and empty_user = '0')) then
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if ((is_meta = '1' and empty_meta = '0') or (is_meta = '0' and empty_user = '0')) then
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if (is_meta = '1') then
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if (is_meta = '1') then
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assert (meta_opcode /= OPCODE_ENDPOINT_UNMATCH or (meta_opcode = OPCODE_ENDPOINT_UNMATCH and last_word_in_meta = '1')) "last_word_in_meta not set" severity FAILURE;
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assert (meta_opcode /= OPCODE_ENDPOINT_UNMATCH or (meta_opcode = OPCODE_ENDPOINT_UNMATCH and last_word_in_meta = '1')) report "last_word_in_meta not set" severity FAILURE;
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rd_meta <= '1';
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rd_meta <= '1';
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guid_next(3) <= data_in_meta;
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guid_next(3) <= data_in_meta;
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-- Memory Operation Guard
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-- Memory Operation Guard
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@ -619,7 +643,7 @@ begin
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when 1 =>
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when 1 =>
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assert (last_word_in_meta = '1') report "last_word_in_meta not set" severity FAILURE;
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assert (last_word_in_meta = '1') report "last_word_in_meta not set" severity FAILURE;
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portn_next <= data_in_meta(WORD_WIDTH-1 downto WORD_WIDTH-UDP_PORT_WIDTH-1);
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portn_next <= data_in_meta(WORD_WIDTH-1 downto WORD_WIDTH-UDP_PORT_WIDTH);
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stage_next <= METATRAFFIC_OPERATION;
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stage_next <= METATRAFFIC_OPERATION;
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when others =>
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when others =>
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@ -639,7 +663,7 @@ begin
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-- Update the Endpoint Data
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-- Update the Endpoint Data
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-- NOTE: The Lease Duration is NOT updated in case of an update. That is the responsibility of the Liveliness Update
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-- NOTE: The Lease Duration is NOT updated in case of an update. That is the responsibility of the Liveliness Update
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mem_op_start <= '1';
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mem_op_start <= '1';
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mem_opcode <= UDPATE_ENDPOINT;
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mem_opcode <= UPDATE_ENDPOINT;
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mem_field_flags <= EMF_IPV4_ADDR_FLAG or EMF_UDP_PORT_FLAG;
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mem_field_flags <= EMF_IPV4_ADDR_FLAG or EMF_UDP_PORT_FLAG;
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end if;
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end if;
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-- DONE
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-- DONE
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@ -726,7 +750,7 @@ begin
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if (guid(0) = mem_endpoint_data.guid(0) and guid(1) = mem_endpoint_data.guid(1) and guid(2) = mem_endpoint_data.guid(2)) then
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if (guid(0) = mem_endpoint_data.guid(0) and guid(1) = mem_endpoint_data.guid(1) and guid(2) = mem_endpoint_data.guid(2)) then
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-- Renew Lease of Remote Endpoint
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-- Renew Lease of Remote Endpoint
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mem_op_start <= '1';
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mem_op_start <= '1';
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mem_opcode <= UDPATE_ENDPOINT;
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mem_opcode <= UPDATE_ENDPOINT;
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mem_field_flags <= EMF_LEASE_DEADLINE_FLAG;
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mem_field_flags <= EMF_LEASE_DEADLINE_FLAG;
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if (LEASE_DURATION /= DURATION_INFINITE) then
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if (LEASE_DURATION /= DURATION_INFINITE) then
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lease_deadline <= time + LEASE_DURATION;
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lease_deadline <= time + LEASE_DURATION;
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@ -904,7 +928,7 @@ begin
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next_seq_nr_next <= first_seq_nr;
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next_seq_nr_next <= first_seq_nr;
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mem_op_start <= '1';
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mem_op_start <= '1';
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mem_opcode <= UPDATE_ENDPOINT;
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mem_opcode <= UPDATE_ENDPOINT;
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tmp_flags <= tmp_flags or EMF_NEXT_SEQ_NR_FLAG;
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tmp_flags := tmp_flags or EMF_NEXT_SEQ_NR_FLAG;
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end if;
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end if;
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end if;
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end if;
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@ -1200,7 +1224,7 @@ begin
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-- Timestamp 1/2
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-- Timestamp 1/2
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when 1 =>
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when 1 =>
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valid_out_hc <= '1';
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valid_out_hc <= '1';
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data_out_hc <= ts(0);
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data_out_hc <= std_logic_vector(ts(0));
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-- Output Guard
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-- Output Guard
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if (ready_out_hc = '1') then
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if (ready_out_hc = '1') then
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cnt_next <= cnt + 1;
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cnt_next <= cnt + 1;
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@ -1208,7 +1232,7 @@ begin
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-- Timestamp 2/2
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-- Timestamp 2/2
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when 2 =>
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when 2 =>
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valid_out_hc <= '1';
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valid_out_hc <= '1';
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data_out_hc <= ts(1);
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data_out_hc <= std_logic_vector(ts(1));
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-- Output Guard
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-- Output Guard
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if (ready_out_hc = '1') then
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if (ready_out_hc = '1') then
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cnt_next <= cnt + 1;
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cnt_next <= cnt + 1;
|
||||||
@ -1216,7 +1240,7 @@ begin
|
|||||||
-- Lifespan Deadline 1/2
|
-- Lifespan Deadline 1/2
|
||||||
when 3 =>
|
when 3 =>
|
||||||
valid_out_hc <= '1';
|
valid_out_hc <= '1';
|
||||||
data_out_hc <= lifespan(0);
|
data_out_hc <= std_logic_vector(lifespan(0));
|
||||||
-- Output Guard
|
-- Output Guard
|
||||||
if (ready_out_hc = '1') then
|
if (ready_out_hc = '1') then
|
||||||
cnt_next <= cnt + 1;
|
cnt_next <= cnt + 1;
|
||||||
@ -1224,7 +1248,7 @@ begin
|
|||||||
-- Lifespan Deadline 2/2
|
-- Lifespan Deadline 2/2
|
||||||
when 4 =>
|
when 4 =>
|
||||||
valid_out_hc <= '1';
|
valid_out_hc <= '1';
|
||||||
data_out_hc <= lifespan(1);
|
data_out_hc <= std_logic_vector(lifespan(1));
|
||||||
-- Output Guard
|
-- Output Guard
|
||||||
if (ready_out_hc = '1') then
|
if (ready_out_hc = '1') then
|
||||||
-- Skip Key Hash, if not received
|
-- Skip Key Hash, if not received
|
||||||
@ -1378,7 +1402,7 @@ begin
|
|||||||
mem_op_start <= '1';
|
mem_op_start <= '1';
|
||||||
mem_opcode <= UPDATE_ENDPOINT;
|
mem_opcode <= UPDATE_ENDPOINT;
|
||||||
res_time <= TIME_INVALID;
|
res_time <= TIME_INVALID;
|
||||||
mem_field_flags <= RES_TIME_FLAG;
|
mem_field_flags <= EMF_RES_TIME_FLAG;
|
||||||
-- Continue Search
|
-- Continue Search
|
||||||
cnt_next <= 0;
|
cnt_next <= 0;
|
||||||
-- If Response Delay Passed
|
-- If Response Delay Passed
|
||||||
@ -1425,8 +1449,8 @@ begin
|
|||||||
res_time <= TIME_INVALID;
|
res_time <= TIME_INVALID;
|
||||||
end if;
|
end if;
|
||||||
mem_op_start <= '1';
|
mem_op_start <= '1';
|
||||||
mem_opcode <= UPDATE_PARTICIPANT;
|
mem_opcode <= UPDATE_ENDPOINT;
|
||||||
mem_field_flags <= RES_TIME_FLAG;
|
mem_field_flags <= EMF_RES_TIME_FLAG;
|
||||||
|
|
||||||
-- Send ACKNACK
|
-- Send ACKNACK
|
||||||
-- Increment Acknack Counter
|
-- Increment Acknack Counter
|
||||||
@ -1444,7 +1468,7 @@ begin
|
|||||||
if (RELIABILTY_QOS = RELIABLE_RELIABILITY_QOS) then
|
if (RELIABILTY_QOS = RELIABLE_RELIABILITY_QOS) then
|
||||||
-- Output FIFO Guard
|
-- Output FIFO Guard
|
||||||
if (full_rtps = '0') then
|
if (full_rtps = '0') then
|
||||||
wr_sig <= '1';
|
wr_rtps <= '1';
|
||||||
cnt_next <= cnt + 1;
|
cnt_next <= cnt + 1;
|
||||||
|
|
||||||
case (cnt) is
|
case (cnt) is
|
||||||
@ -1482,7 +1506,7 @@ begin
|
|||||||
if (RELIABILTY_QOS = RELIABLE_RELIABILITY_QOS) then
|
if (RELIABILTY_QOS = RELIABLE_RELIABILITY_QOS) then
|
||||||
-- Output FIFO Guard
|
-- Output FIFO Guard
|
||||||
if (full_rtps = '0') then
|
if (full_rtps = '0') then
|
||||||
wr_sig <= '1';
|
wr_rtps <= '1';
|
||||||
cnt_next <= cnt + 1;
|
cnt_next <= cnt + 1;
|
||||||
|
|
||||||
case (cnt) is
|
case (cnt) is
|
||||||
@ -1542,7 +1566,7 @@ begin
|
|||||||
elsif ((read_cnt & "00" ) >= parameter_end) then
|
elsif ((read_cnt & "00" ) >= parameter_end) then
|
||||||
-- Parse Next Parameter
|
-- Parse Next Parameter
|
||||||
-- NOTE: data_in_user is already showing the next parameter
|
-- NOTE: data_in_user is already showing the next parameter
|
||||||
stage_next <= PROCESS_PL;
|
stage_next <= PROCESS_INLINE_QOS;
|
||||||
-- Reset Parameter End
|
-- Reset Parameter End
|
||||||
parameter_end_next <= (others => '1');
|
parameter_end_next <= (others => '1');
|
||||||
-- Input FIFO Guard
|
-- Input FIFO Guard
|
||||||
@ -1630,7 +1654,6 @@ begin
|
|||||||
last_addr_next <= last_addr;
|
last_addr_next <= last_addr;
|
||||||
mem_addr_latch_next <= mem_addr_latch;
|
mem_addr_latch_next <= mem_addr_latch;
|
||||||
mem_endpoint_data_next <= mem_endpoint_data;
|
mem_endpoint_data_next <= mem_endpoint_data;
|
||||||
mem_guidprefix_next <= mem_guidprefix;
|
|
||||||
max_endpoint_addr_next <= max_endpoint_addr;
|
max_endpoint_addr_next <= max_endpoint_addr;
|
||||||
mem_endpoint_latch_data_next <= mem_endpoint_latch_data;
|
mem_endpoint_latch_data_next <= mem_endpoint_latch_data;
|
||||||
mem_pos_next <= mem_pos;
|
mem_pos_next <= mem_pos;
|
||||||
@ -1673,15 +1696,15 @@ begin
|
|||||||
mem_cnt_next <= 0;
|
mem_cnt_next <= 0;
|
||||||
when UPDATE_ENDPOINT =>
|
when UPDATE_ENDPOINT =>
|
||||||
mem_stage_next <= UPDATE_ENDPOINT;
|
mem_stage_next <= UPDATE_ENDPOINT;
|
||||||
if (RELIABILTY_QOS /= RELIABLE_RELIABILITY_QOS and check_mask(mem_field_flags.field_flag,EMF_IPV4_ADDR_FLAG)) then
|
if (RELIABILTY_QOS /= RELIABLE_RELIABILITY_QOS and check_mask(mem_field_flags,EMF_IPV4_ADDR_FLAG)) then
|
||||||
mem_cnt_next <= 0;
|
mem_cnt_next <= 0;
|
||||||
elsif (RELIABILTY_QOS /= RELIABLE_RELIABILITY_QOS and check_mask(mem_field_flags.field_flag,EMF_UDP_PORT_FLAG)) then
|
elsif (RELIABILTY_QOS /= RELIABLE_RELIABILITY_QOS and check_mask(mem_field_flags,EMF_UDP_PORT_FLAG)) then
|
||||||
mem_cnt_next <= 1;
|
mem_cnt_next <= 1;
|
||||||
elsif check_mask(mem_field_flags.field_flag,EMF_NEXT_SEQ_NR_FLAG) then
|
elsif check_mask(mem_field_flags,EMF_NEXT_SEQ_NR_FLAG) then
|
||||||
mem_cnt_next <= 2;
|
mem_cnt_next <= 2;
|
||||||
elsif check_mask(mem_field_flags.field_flag,EMF_LEASE_DEADLINE_FLAG) then
|
elsif check_mask(mem_field_flags,EMF_LEASE_DEADLINE_FLAG) then
|
||||||
mem_cnt_next <= 4;
|
mem_cnt_next <= 4;
|
||||||
elsif (RELIABILTY_QOS /= RELIABLE_RELIABILITY_QOS and check_mask(mem_field_flags.field_flag,EMF_RES_TIME_FLAG)) then
|
elsif (RELIABILTY_QOS /= RELIABLE_RELIABILITY_QOS and check_mask(mem_field_flags,EMF_RES_TIME_FLAG)) then
|
||||||
mem_cnt_next <= 6;
|
mem_cnt_next <= 6;
|
||||||
else
|
else
|
||||||
-- DONE
|
-- DONE
|
||||||
@ -1710,19 +1733,19 @@ begin
|
|||||||
-- Fetch Endpoint Data
|
-- Fetch Endpoint Data
|
||||||
mem_stage_next <= GET_ENDPOINT_DATA;
|
mem_stage_next <= GET_ENDPOINT_DATA;
|
||||||
mem_endpoint_data_next <= ZERO_ENDPOINT_DATA;
|
mem_endpoint_data_next <= ZERO_ENDPOINT_DATA;
|
||||||
if check_mask(mem_field_flags.field_flag,EMF_ENTITYID_FLAG) then
|
if check_mask(mem_field_flags,EMF_ENTITYID_FLAG) then
|
||||||
mem_cnt_next <= 0;
|
mem_cnt_next <= 0;
|
||||||
elsif check_mask(mem_field_flags.field_flag,EMF_GUIDPREFIX_FLAG) then
|
elsif check_mask(mem_field_flags,EMF_GUIDPREFIX_FLAG) then
|
||||||
mem_cnt_next <= 1;
|
mem_cnt_next <= 1;
|
||||||
elsif (RELIABILTY_QOS /= RELIABLE_RELIABILITY_QOS and check_mask(mem_field_flags.field_flag,EMF_IPV4_ADDR_FLAG)) then
|
elsif (RELIABILTY_QOS /= RELIABLE_RELIABILITY_QOS and check_mask(mem_field_flags,EMF_IPV4_ADDR_FLAG)) then
|
||||||
mem_cnt_next <= 4;
|
mem_cnt_next <= 4;
|
||||||
elsif (RELIABILTY_QOS /= RELIABLE_RELIABILITY_QOS and check_mask(mem_field_flags.field_flag,EMF_UDP_PORT_FLAG)) then
|
elsif (RELIABILTY_QOS /= RELIABLE_RELIABILITY_QOS and check_mask(mem_field_flags,EMF_UDP_PORT_FLAG)) then
|
||||||
mem_cnt_next <= 5;
|
mem_cnt_next <= 5;
|
||||||
elsif check_mask(mem_field_flags.field_flag,EMF_NEXT_SEQ_NR_FLAG) then
|
elsif check_mask(mem_field_flags,EMF_NEXT_SEQ_NR_FLAG) then
|
||||||
mem_cnt_next <= 6;
|
mem_cnt_next <= 6;
|
||||||
elsif check_mask(mem_field_flags.field_flag,EMF_LEASE_DEADLINE_FLAG) then
|
elsif check_mask(mem_field_flags,EMF_LEASE_DEADLINE_FLAG) then
|
||||||
mem_cnt_next <= 8;
|
mem_cnt_next <= 8;
|
||||||
elsif (RELIABILTY_QOS /= RELIABLE_RELIABILITY_QOS and check_mask(mem_field_flags.field_flag,EMF_RES_TIME_FLAG)) then
|
elsif (RELIABILTY_QOS /= RELIABLE_RELIABILITY_QOS and check_mask(mem_field_flags,EMF_RES_TIME_FLAG)) then
|
||||||
mem_cnt_next <= 10;
|
mem_cnt_next <= 10;
|
||||||
else
|
else
|
||||||
-- DONE
|
-- DONE
|
||||||
@ -1971,7 +1994,7 @@ begin
|
|||||||
mem_cnt_next <= 6;
|
mem_cnt_next <= 6;
|
||||||
elsif check_mask(mem_endpoint_latch_data.field_flag,EMF_LEASE_DEADLINE_FLAG) then
|
elsif check_mask(mem_endpoint_latch_data.field_flag,EMF_LEASE_DEADLINE_FLAG) then
|
||||||
mem_cnt_next <= 8;
|
mem_cnt_next <= 8;
|
||||||
elsif (RELIABILTY_QOS /= RELIABLE_RELIABILITY_QOS) and check_mask(mem_endpoint_latch_data.field_flag,EMF_RES_TIME_FLAG)) then
|
elsif ((RELIABILTY_QOS /= RELIABLE_RELIABILITY_QOS) and check_mask(mem_endpoint_latch_data.field_flag,EMF_RES_TIME_FLAG)) then
|
||||||
mem_cnt_next <= 10;
|
mem_cnt_next <= 10;
|
||||||
else
|
else
|
||||||
if check_mask(mem_endpoint_latch_data.field_flag,EMF_ENTITYID_FLAG) then
|
if check_mask(mem_endpoint_latch_data.field_flag,EMF_ENTITYID_FLAG) then
|
||||||
@ -2212,7 +2235,7 @@ begin
|
|||||||
mem_ready_out <= '1';
|
mem_ready_out <= '1';
|
||||||
-- Memory Flow Control Guard
|
-- Memory Flow Control Guard
|
||||||
if (mem_valid_out = '1') then
|
if (mem_valid_out = '1') then
|
||||||
mem_endpoint_data_next.portn <= mem_read_data;
|
mem_endpoint_data_next.portn <= mem_read_data(WORD_WIDTH-1 downto WORD_WIDTH-UDP_PORT_WIDTH);
|
||||||
|
|
||||||
if check_mask(mem_endpoint_latch_data.field_flag,EMF_NEXT_SEQ_NR_FLAG) then
|
if check_mask(mem_endpoint_latch_data.field_flag,EMF_NEXT_SEQ_NR_FLAG) then
|
||||||
mem_cnt_next <= 18;
|
mem_cnt_next <= 18;
|
||||||
@ -2231,7 +2254,7 @@ begin
|
|||||||
mem_ready_out <= '1';
|
mem_ready_out <= '1';
|
||||||
-- Memory Flow Control Guard
|
-- Memory Flow Control Guard
|
||||||
if (mem_valid_out = '1') then
|
if (mem_valid_out = '1') then
|
||||||
mem_endpoint_data_next.next_seq_nr(0) <= mem_read_data;
|
mem_endpoint_data_next.next_seq_nr(0) <= unsigned(mem_read_data);
|
||||||
|
|
||||||
mem_cnt_next <= mem_cnt + 1;
|
mem_cnt_next <= mem_cnt + 1;
|
||||||
end if;
|
end if;
|
||||||
@ -2240,7 +2263,7 @@ begin
|
|||||||
mem_ready_out <= '1';
|
mem_ready_out <= '1';
|
||||||
-- Memory Flow Control Guard
|
-- Memory Flow Control Guard
|
||||||
if (mem_valid_out = '1') then
|
if (mem_valid_out = '1') then
|
||||||
mem_endpoint_data_next.next_seq_nr(1) <= mem_read_data;
|
mem_endpoint_data_next.next_seq_nr(1) <= unsigned(mem_read_data);
|
||||||
|
|
||||||
if check_mask(mem_endpoint_latch_data.field_flag,EMF_LEASE_DEADLINE_FLAG) then
|
if check_mask(mem_endpoint_latch_data.field_flag,EMF_LEASE_DEADLINE_FLAG) then
|
||||||
mem_cnt_next <= 20;
|
mem_cnt_next <= 20;
|
||||||
@ -2256,7 +2279,7 @@ begin
|
|||||||
mem_ready_out <= '1';
|
mem_ready_out <= '1';
|
||||||
-- Memory Flow Control Guard
|
-- Memory Flow Control Guard
|
||||||
if (mem_valid_out = '1') then
|
if (mem_valid_out = '1') then
|
||||||
mem_endpoint_data_next.lease_deadline(0) <= mem_read_data;
|
mem_endpoint_data_next.lease_deadline(0) <= unsigned(mem_read_data);
|
||||||
|
|
||||||
mem_cnt_next <= mem_cnt + 1;
|
mem_cnt_next <= mem_cnt + 1;
|
||||||
end if;
|
end if;
|
||||||
@ -2265,7 +2288,7 @@ begin
|
|||||||
mem_ready_out <= '1';
|
mem_ready_out <= '1';
|
||||||
-- Memory Flow Control Guard
|
-- Memory Flow Control Guard
|
||||||
if (mem_valid_out = '1') then
|
if (mem_valid_out = '1') then
|
||||||
mem_endpoint_data_next.addr <= mem_read_data;
|
mem_endpoint_data_next.lease_deadline(1) <= unsigned(mem_read_data);
|
||||||
|
|
||||||
if (RELIABILTY_QOS /= RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_RES_TIME_FLAG)) then
|
if (RELIABILTY_QOS /= RELIABLE_RELIABILITY_QOS and check_mask(mem_endpoint_latch_data.field_flag,EMF_RES_TIME_FLAG)) then
|
||||||
mem_cnt_next <= 22;
|
mem_cnt_next <= 22;
|
||||||
@ -2281,7 +2304,7 @@ begin
|
|||||||
mem_ready_out <= '1';
|
mem_ready_out <= '1';
|
||||||
-- Memory Flow Control Guard
|
-- Memory Flow Control Guard
|
||||||
if (mem_valid_out = '1') then
|
if (mem_valid_out = '1') then
|
||||||
mem_endpoint_data_next.res_time(0) <= mem_read_data;
|
mem_endpoint_data_next.res_time(0) <= unsigned(mem_read_data);
|
||||||
|
|
||||||
mem_cnt_next <= mem_cnt + 1;
|
mem_cnt_next <= mem_cnt + 1;
|
||||||
end if;
|
end if;
|
||||||
@ -2293,7 +2316,7 @@ begin
|
|||||||
mem_ready_out <= '1';
|
mem_ready_out <= '1';
|
||||||
-- Memory Flow Control Guard
|
-- Memory Flow Control Guard
|
||||||
if (mem_valid_out = '1') then
|
if (mem_valid_out = '1') then
|
||||||
mem_endpoint_data_next.res_time(1) <= mem_read_data;
|
mem_endpoint_data_next.res_time(1) <= unsigned(mem_read_data);
|
||||||
|
|
||||||
-- DONE
|
-- DONE
|
||||||
mem_stage_next <= IDLE;
|
mem_stage_next <= IDLE;
|
||||||
@ -2362,7 +2385,7 @@ begin
|
|||||||
when 6 =>
|
when 6 =>
|
||||||
mem_valid_in <= '1';
|
mem_valid_in <= '1';
|
||||||
mem_addr <= mem_addr_base + EMF_NEXT_SEQ_NR_OFFSET;
|
mem_addr <= mem_addr_base + EMF_NEXT_SEQ_NR_OFFSET;
|
||||||
mem_write_data <= SEQUENCENUMBER_UNKNOWN(0) when (DURABILITY_QOS = VOLATILE_DURABILITY_QOS) else FIRST_SEQUENCENUMBER(0);
|
mem_write_data <= std_logic_vector(SEQUENCENUMBER_UNKNOWN(0)) when (DURABILITY_QOS = VOLATILE_DURABILITY_QOS) else std_logic_vector(FIRST_SEQUENCENUMBER(0));
|
||||||
if (mem_ready_in = '1') then
|
if (mem_ready_in = '1') then
|
||||||
mem_cnt_next <= mem_cnt + 1;
|
mem_cnt_next <= mem_cnt + 1;
|
||||||
end if;
|
end if;
|
||||||
@ -2371,7 +2394,7 @@ begin
|
|||||||
mem_write_data <= (others => '0');
|
mem_write_data <= (others => '0');
|
||||||
mem_valid_in <= '1';
|
mem_valid_in <= '1';
|
||||||
mem_addr <= mem_addr_base + EMF_NEXT_SEQ_NR_OFFSET + 1;
|
mem_addr <= mem_addr_base + EMF_NEXT_SEQ_NR_OFFSET + 1;
|
||||||
mem_write_data <= SEQUENCENUMBER_UNKNOWN(1) when (DURABILITY_QOS = VOLATILE_DURABILITY_QOS) else FIRST_SEQUENCENUMBER(1);
|
mem_write_data <= std_logic_vector(SEQUENCENUMBER_UNKNOWN(1)) when (DURABILITY_QOS = VOLATILE_DURABILITY_QOS) else std_logic_vector(FIRST_SEQUENCENUMBER(1));
|
||||||
if (mem_ready_in = '1') then
|
if (mem_ready_in = '1') then
|
||||||
mem_cnt_next <= mem_cnt + 1;
|
mem_cnt_next <= mem_cnt + 1;
|
||||||
end if;
|
end if;
|
||||||
@ -2475,7 +2498,7 @@ begin
|
|||||||
mem_addr <= mem_addr_base + EMF_NEXT_SEQ_NR_OFFSET;
|
mem_addr <= mem_addr_base + EMF_NEXT_SEQ_NR_OFFSET;
|
||||||
mem_write_data <= std_logic_vector(mem_endpoint_latch_data.next_seq_nr(0));
|
mem_write_data <= std_logic_vector(mem_endpoint_latch_data.next_seq_nr(0));
|
||||||
-- Memory Flow Control Guard
|
-- Memory Flow Control Guard
|
||||||
if (mem_ready_in = '1')
|
if (mem_ready_in = '1') then
|
||||||
mem_cnt_next <= mem_cnt + 1;
|
mem_cnt_next <= mem_cnt + 1;
|
||||||
end if;
|
end if;
|
||||||
-- Next Sequence Number 2/2
|
-- Next Sequence Number 2/2
|
||||||
@ -2548,7 +2571,7 @@ begin
|
|||||||
when others =>
|
when others =>
|
||||||
null;
|
null;
|
||||||
end case;
|
end case;
|
||||||
when REMOVE_ENDPOINT =>
|
when REMOVE_ENDPOINT =>
|
||||||
-- Mark with ENTITYID_UNKNOWN to mark slot empty_user
|
-- Mark with ENTITYID_UNKNOWN to mark slot empty_user
|
||||||
mem_valid_in <= '1';
|
mem_valid_in <= '1';
|
||||||
mem_addr <= mem_addr_base + EMF_ENTITYID_OFFSET;
|
mem_addr <= mem_addr_base + EMF_ENTITYID_OFFSET;
|
||||||
@ -2781,4 +2804,80 @@ begin
|
|||||||
end if;
|
end if;
|
||||||
end process;
|
end process;
|
||||||
|
|
||||||
|
sync_prc : process(clk)
|
||||||
|
begin
|
||||||
|
if rising_edge(clk) then
|
||||||
|
if (reset = '1') then
|
||||||
|
stage <= IDLE;
|
||||||
|
return_stage <= IDLE;
|
||||||
|
mem_stage <= RESET_MEMORY;
|
||||||
|
seq_nr <= SEQUENCENUMBER_UNKNOWN;
|
||||||
|
sn_latch_1 <= SEQUENCENUMBER_UNKNOWN;
|
||||||
|
sn_latch_2 <= SEQUENCENUMBER_UNKNOWN;
|
||||||
|
sn_latch_3 <= SEQUENCENUMBER_UNKNOWN;
|
||||||
|
ts <= TIME_INVALID;
|
||||||
|
check_time <= TIME_INVALID;
|
||||||
|
lifespan <= TIME_INVALID;
|
||||||
|
guid <= GUID_UNKNOWN;
|
||||||
|
addr <= IPv4_ADDRESS_INVALID;
|
||||||
|
portn <= UDP_PORT_INVALID;
|
||||||
|
mem_endpoint_data <= ZERO_ENDPOINT_DATA;
|
||||||
|
mem_endpoint_latch_data <= ZERO_ENDPOINT_LATCH_DATA;
|
||||||
|
cnt <= 0;
|
||||||
|
cnt2 <= 0;
|
||||||
|
bitmap_pos <= 0;
|
||||||
|
mem_cnt <= 0;
|
||||||
|
mem_pos <= 0;
|
||||||
|
is_meta <= '0';
|
||||||
|
key_hash_rcvd <= '0';
|
||||||
|
last_word_in_latch <= '0';
|
||||||
|
stale_check <= '0';
|
||||||
|
meta_opcode <= (others => '0');
|
||||||
|
status_info <= (others => '0');
|
||||||
|
mem_addr_base <= (others => '0');
|
||||||
|
last_addr <= (others => '0');
|
||||||
|
mem_addr_latch <= (others => '0');
|
||||||
|
max_endpoint_addr <= (others => '0');
|
||||||
|
flags <= (others => '0');
|
||||||
|
opcode <= (others => '0');
|
||||||
|
count <= (others => '0');
|
||||||
|
key_hash <= (others => (others => '0'));
|
||||||
|
else
|
||||||
|
stage <= stage_next;
|
||||||
|
return_stage <= return_stage_next;
|
||||||
|
mem_stage <= mem_stage_next;
|
||||||
|
seq_nr <= seq_nr_next;
|
||||||
|
sn_latch_1 <= sn_latch_1_next;
|
||||||
|
sn_latch_2 <= sn_latch_2_next;
|
||||||
|
sn_latch_3 <= sn_latch_3_next;
|
||||||
|
ts <= ts_next;
|
||||||
|
check_time <= check_time_next;
|
||||||
|
lifespan <= lifespan_next;
|
||||||
|
guid <= guid_next;
|
||||||
|
addr <= addr_next;
|
||||||
|
portn <= portn_next;
|
||||||
|
mem_endpoint_data <= mem_endpoint_data_next;
|
||||||
|
mem_endpoint_latch_data <= mem_endpoint_latch_data_next;
|
||||||
|
cnt <= cnt_next;
|
||||||
|
cnt2 <= cnt2_next;
|
||||||
|
bitmap_pos <= bitmap_pos_next;
|
||||||
|
mem_cnt <= mem_cnt_next;
|
||||||
|
mem_pos <= mem_pos_next;
|
||||||
|
is_meta <= is_meta_next;
|
||||||
|
key_hash_rcvd <= key_hash_rcvd_next;
|
||||||
|
last_word_in_latch <= last_word_in_latch_next;
|
||||||
|
stale_check <= stale_check_next;
|
||||||
|
meta_opcode <= meta_opcode_next;
|
||||||
|
status_info <= status_info_next;
|
||||||
|
mem_addr_base <= mem_addr_base_next;
|
||||||
|
last_addr <= last_addr_next;
|
||||||
|
mem_addr_latch <= mem_addr_latch_next;
|
||||||
|
max_endpoint_addr <= max_endpoint_addr_next;
|
||||||
|
flags <= flags_next;
|
||||||
|
opcode <= opcode_next;
|
||||||
|
count <= count_next;
|
||||||
|
key_hash <= key_hash_next;
|
||||||
|
end if;
|
||||||
|
end if;
|
||||||
|
end process;
|
||||||
end architecture;
|
end architecture;
|
||||||
Loading…
Reference in New Issue
Block a user