From fba065e59e70c8a8f4eb46b0921638369a4d3d24 Mon Sep 17 00:00:00 2001 From: Greek64 Date: Wed, 9 Mar 2022 14:59:05 +0100 Subject: [PATCH] BUG FIX: Remove inferred Latches --- src/Tests/Type2_reader_interface.vhd | 12 ++++++------ .../Fibonacci_ros_action_feedback_pub.vhd | 2 +- .../Fibonacci_ros_action_feedback_sub.vhd | 2 +- .../Fibonacci_ros_action_goal_srv_client.vhd | 6 +++--- .../Fibonacci_ros_action_goal_srv_server.vhd | 2 +- .../Fibonacci_ros_action_result_srv_client.vhd | 2 +- .../Fibonacci_ros_action_result_srv_server.vhd | 4 ++-- .../Fibonacci_ros_action_server.vhd | 8 ++++++-- .../action_msgs/CancelGoal_ros_srv_client.vhd | 6 +++--- .../action_msgs/CancelGoal_ros_srv_server.vhd | 10 +++++----- .../action_msgs/GoalStatusArray_ros_pub.vhd | 4 ++-- .../action_msgs/GoalStatusArray_ros_sub.vhd | 4 ++-- 12 files changed, 33 insertions(+), 29 deletions(-) diff --git a/src/Tests/Type2_reader_interface.vhd b/src/Tests/Type2_reader_interface.vhd index a1a89ca..05872e3 100644 --- a/src/Tests/Type2_reader_interface.vhd +++ b/src/Tests/Type2_reader_interface.vhd @@ -741,12 +741,12 @@ begin case (cnt) is -- Double Word 1/2 when 0 => - dw_latch_next <= write_sub_vector(dw_latch_next, data_in_latch, 0, TRUE); + dw_latch_next <= write_sub_vector(dw_latch, data_in_latch, 0, TRUE); stage_next <= FETCH; cnt_next <= cnt + 1; -- Double Word 2/2 when 1 => - dw_latch_next <= write_sub_vector(dw_latch_next, data_in_latch, 1, TRUE); + dw_latch_next <= write_sub_vector(dw_latch, data_in_latch, 1, TRUE); cnt_next <= cnt + 1; -- Push Double Word when 2 => @@ -793,22 +793,22 @@ begin case (cnt) is -- Quad Word 1/4 when 0 => - qw_latch_next <= write_sub_vector(qw_latch_next, data_in_latch, 0, TRUE); + qw_latch_next <= write_sub_vector(qw_latch, data_in_latch, 0, TRUE); stage_next <= FETCH; cnt_next <= cnt + 1; -- Quad Word 2/4 when 1 => - qw_latch_next <= write_sub_vector(qw_latch_next, data_in_latch, 1, TRUE); + qw_latch_next <= write_sub_vector(qw_latch, data_in_latch, 1, TRUE); stage_next <= FETCH; cnt_next <= cnt + 1; -- Quad Word 3/4 when 2 => - qw_latch_next <= write_sub_vector(qw_latch_next, data_in_latch, 2, TRUE); + qw_latch_next <= write_sub_vector(qw_latch, data_in_latch, 2, TRUE); stage_next <= FETCH; cnt_next <= cnt + 1; -- Quad Word 4/4 when 3 => - qw_latch_next <= write_sub_vector(qw_latch_next, data_in_latch, 3, TRUE); + qw_latch_next <= write_sub_vector(qw_latch, data_in_latch, 3, TRUE); cnt_next <= cnt + 1; -- Push Quad Word when 4 => diff --git a/src/ros2/example_interfaces/Fibonacci_ros_action_feedback_pub.vhd b/src/ros2/example_interfaces/Fibonacci_ros_action_feedback_pub.vhd index b0c0001..a71e914 100644 --- a/src/ros2/example_interfaces/Fibonacci_ros_action_feedback_pub.vhd +++ b/src/ros2/example_interfaces/Fibonacci_ros_action_feedback_pub.vhd @@ -259,7 +259,7 @@ begin target_align_next <= ALIGN_1; stage_next <= ALIGN_STREAM; else - data_out_latch_next <= write_sub_vector(data_out_latch_next, get_sub_vector(goal_id,uuid_cnt,CDR_INT8_WIDTH,TRUE), to_integer(align_offset(1 downto 0)), TRUE); + data_out_latch_next <= write_sub_vector(data_out_latch, get_sub_vector(goal_id,uuid_cnt,CDR_INT8_WIDTH,TRUE), to_integer(align_offset(1 downto 0)), TRUE); align_offset_next <= align_offset + 1; if (uuid_cnt = F_GOAL_ID_MAX_DEPTH-1) then diff --git a/src/ros2/example_interfaces/Fibonacci_ros_action_feedback_sub.vhd b/src/ros2/example_interfaces/Fibonacci_ros_action_feedback_sub.vhd index 356351c..614911b 100644 --- a/src/ros2/example_interfaces/Fibonacci_ros_action_feedback_sub.vhd +++ b/src/ros2/example_interfaces/Fibonacci_ros_action_feedback_sub.vhd @@ -337,7 +337,7 @@ begin target_align_next <= ALIGN_1; stage_next <= ALIGN_STREAM; else - goal_id_latch_next <= write_sub_vector(goal_id_latch_next, get_sub_vector(data_in_latch, to_integer(align_offset(1 downto 0)), CDR_INT8_WIDTH, TRUE), uuid_cnt, TRUE); + goal_id_latch_next <= write_sub_vector(goal_id_latch, get_sub_vector(data_in_latch, to_integer(align_offset(1 downto 0)), CDR_INT8_WIDTH, TRUE), uuid_cnt, TRUE); align_offset_next <= align_offset + 1; -- Need to fetch next Word diff --git a/src/ros2/example_interfaces/Fibonacci_ros_action_goal_srv_client.vhd b/src/ros2/example_interfaces/Fibonacci_ros_action_goal_srv_client.vhd index ccfadf9..9f0fe15 100644 --- a/src/ros2/example_interfaces/Fibonacci_ros_action_goal_srv_client.vhd +++ b/src/ros2/example_interfaces/Fibonacci_ros_action_goal_srv_client.vhd @@ -424,12 +424,12 @@ begin case (cnt) is -- Double Word 1/2 when 0 => - dw_latch_next <= write_sub_vector(dw_latch_next, endian_swap(endian_flag, data_in_latch), 0, TRUE); + dw_latch_next <= write_sub_vector(dw_latch, endian_swap(endian_flag, data_in_latch), 0, TRUE); stage_next <= FETCH; cnt_next <= cnt + 1; -- Double Word 2/2 when 1 => - dw_latch_next <= write_sub_vector(dw_latch_next, endian_swap(endian_flag, data_in_latch), 1, TRUE); + dw_latch_next <= write_sub_vector(dw_latch, endian_swap(endian_flag, data_in_latch), 1, TRUE); cnt_next <= cnt + 1; -- Push Double Word when 2 => @@ -624,7 +624,7 @@ begin target_align_next <= ALIGN_1; stage_next <= ALIGN_OUT_STREAM; else - data_out_latch_next <= write_sub_vector(data_out_latch_next, get_sub_vector(goal_id,uuid_cnt,CDR_INT8_WIDTH,TRUE), to_integer(align_offset(1 downto 0)), TRUE); + data_out_latch_next <= write_sub_vector(data_out_latch, get_sub_vector(goal_id,uuid_cnt,CDR_INT8_WIDTH,TRUE), to_integer(align_offset(1 downto 0)), TRUE); align_offset_next <= align_offset + 1; if (uuid_cnt = G_RQ_GOAL_ID_MAX_DEPTH-1) then diff --git a/src/ros2/example_interfaces/Fibonacci_ros_action_goal_srv_server.vhd b/src/ros2/example_interfaces/Fibonacci_ros_action_goal_srv_server.vhd index 5d87d0f..8a18f3d 100644 --- a/src/ros2/example_interfaces/Fibonacci_ros_action_goal_srv_server.vhd +++ b/src/ros2/example_interfaces/Fibonacci_ros_action_goal_srv_server.vhd @@ -402,7 +402,7 @@ begin target_align_next <= ALIGN_1; stage_next <= ALIGN_IN_STREAM; else - goal_id_latch_next <= write_sub_vector(goal_id_latch_next, get_sub_vector(data_in_latch, to_integer(align_offset(1 downto 0)), CDR_INT8_WIDTH, TRUE), uuid_cnt, TRUE); + goal_id_latch_next <= write_sub_vector(goal_id_latch, get_sub_vector(data_in_latch, to_integer(align_offset(1 downto 0)), CDR_INT8_WIDTH, TRUE), uuid_cnt, TRUE); align_offset_next <= align_offset + 1; -- Need to fetch next Word diff --git a/src/ros2/example_interfaces/Fibonacci_ros_action_result_srv_client.vhd b/src/ros2/example_interfaces/Fibonacci_ros_action_result_srv_client.vhd index 5a1c2f2..145ff7e 100644 --- a/src/ros2/example_interfaces/Fibonacci_ros_action_result_srv_client.vhd +++ b/src/ros2/example_interfaces/Fibonacci_ros_action_result_srv_client.vhd @@ -687,7 +687,7 @@ begin target_align_next <= ALIGN_1; stage_next <= ALIGN_OUT_STREAM; else - data_out_latch_next <= write_sub_vector(data_out_latch_next, get_sub_vector(goal_id,uuid_cnt,CDR_INT8_WIDTH,TRUE), to_integer(align_offset(1 downto 0)), TRUE); + data_out_latch_next <= write_sub_vector(data_out_latch, get_sub_vector(goal_id,uuid_cnt,CDR_INT8_WIDTH,TRUE), to_integer(align_offset(1 downto 0)), TRUE); align_offset_next <= align_offset + 1; if (uuid_cnt = R_RQ_MAX_GOAL_ID_SIZE-1) then diff --git a/src/ros2/example_interfaces/Fibonacci_ros_action_result_srv_server.vhd b/src/ros2/example_interfaces/Fibonacci_ros_action_result_srv_server.vhd index b6dc82b..957a3d3 100644 --- a/src/ros2/example_interfaces/Fibonacci_ros_action_result_srv_server.vhd +++ b/src/ros2/example_interfaces/Fibonacci_ros_action_result_srv_server.vhd @@ -440,7 +440,7 @@ begin target_align_next <= ALIGN_1; stage_next <= ALIGN_IN_STREAM; else - goal_id_latch_next <= write_sub_vector(goal_id_latch_next, get_sub_vector(data_in_latch, to_integer(align_offset(1 downto 0)), CDR_INT8_WIDTH, TRUE), uuid_cnt, TRUE); + goal_id_latch_next <= write_sub_vector(goal_id_latch, get_sub_vector(data_in_latch, to_integer(align_offset(1 downto 0)), CDR_INT8_WIDTH, TRUE), uuid_cnt, TRUE); align_offset_next <= align_offset + 1; -- Need to fetch next Word @@ -637,7 +637,7 @@ begin target_align_next <= ALIGN_1; stage_next <= ALIGN_OUT_STREAM; else - data_out_latch_next <= write_sub_vector(data_out_latch_next, endian_swap(LITTLE_ENDIAN, status), to_integer(align_offset(1 downto 0)), TRUE); + data_out_latch_next <= write_sub_vector(data_out_latch, endian_swap(LITTLE_ENDIAN, status), to_integer(align_offset(1 downto 0)), TRUE); align_offset_next <= align_offset + 1; -- ###GENERATED START### diff --git a/src/ros2/example_interfaces/Fibonacci_ros_action_server.vhd b/src/ros2/example_interfaces/Fibonacci_ros_action_server.vhd index 3bbbe0b..4287f43 100644 --- a/src/ros2/example_interfaces/Fibonacci_ros_action_server.vhd +++ b/src/ros2/example_interfaces/Fibonacci_ros_action_server.vhd @@ -777,8 +777,9 @@ begin cnt_next <= cnt; result_index_latch_next <= result_index_latch; -- DEFAULT Unregistered - r_sel_ack <= '0'; - abort_mem <= '0'; + index_result_ready <= '0'; + r_sel_ack <= '0'; + abort_mem <= '0'; -- ###GENERATED START### seq_cnt_next <= seq_cnt; r_seq_len_mem_addr <= (others => '0'); @@ -791,6 +792,9 @@ begin r_seq_mem_valid_in <= (others => '0'); r_seq_mem_data_in <= (others => (others => '0')); r_seq_mem_ready_out <= (others => '0'); + result_seq_r <= (others => '0'); + result_seq_valid <= '0'; + result_seq_ready <= '0'; seq_len_sig <= (others => '0'); seq_addr_sig <= (others => '0'); seq_wen_sig <= '0'; diff --git a/src/ros2/rcl_interfaces/action_msgs/CancelGoal_ros_srv_client.vhd b/src/ros2/rcl_interfaces/action_msgs/CancelGoal_ros_srv_client.vhd index aeb8eb4..d627f6b 100644 --- a/src/ros2/rcl_interfaces/action_msgs/CancelGoal_ros_srv_client.vhd +++ b/src/ros2/rcl_interfaces/action_msgs/CancelGoal_ros_srv_client.vhd @@ -569,12 +569,12 @@ begin case (cnt) is -- Double Word 1/2 when 0 => - dw_latch_next <= write_sub_vector(dw_latch_next, endian_swap(endian_flag, data_in_latch), 0, TRUE); + dw_latch_next <= write_sub_vector(dw_latch, endian_swap(endian_flag, data_in_latch), 0, TRUE); stage_next <= FETCH; cnt_next <= cnt + 1; -- Double Word 2/2 when 1 => - dw_latch_next <= write_sub_vector(dw_latch_next, endian_swap(endian_flag, data_in_latch), 1, TRUE); + dw_latch_next <= write_sub_vector(dw_latch, endian_swap(endian_flag, data_in_latch), 1, TRUE); cnt_next <= cnt + 1; -- Push Double Word when 2 => @@ -786,7 +786,7 @@ begin target_align_next <= ALIGN_1; stage_next <= ALIGN_OUT_STREAM; else - data_out_latch_next <= write_sub_vector(data_out_latch_next, get_sub_vector(goal_info_goal_id,uuid_cnt,CDR_INT8_WIDTH,TRUE), to_integer(align_offset(1 downto 0)), TRUE); + data_out_latch_next <= write_sub_vector(data_out_latch, get_sub_vector(goal_info_goal_id,uuid_cnt,CDR_INT8_WIDTH,TRUE), to_integer(align_offset(1 downto 0)), TRUE); align_offset_next <= align_offset + 1; if (uuid_cnt = RQ_GOAL_INFO_GOAL_ID_MAX_DEPTH-1) then diff --git a/src/ros2/rcl_interfaces/action_msgs/CancelGoal_ros_srv_server.vhd b/src/ros2/rcl_interfaces/action_msgs/CancelGoal_ros_srv_server.vhd index 39b9a20..8076eb8 100644 --- a/src/ros2/rcl_interfaces/action_msgs/CancelGoal_ros_srv_server.vhd +++ b/src/ros2/rcl_interfaces/action_msgs/CancelGoal_ros_srv_server.vhd @@ -485,7 +485,7 @@ begin target_align_next <= ALIGN_1; stage_next <= ALIGN_IN_STREAM; else - goal_info_goal_id_latch_next <= write_sub_vector(goal_info_goal_id_latch_next, get_sub_vector(data_in_latch, to_integer(align_offset(1 downto 0)), CDR_INT8_WIDTH, TRUE), uuid_cnt, TRUE); + goal_info_goal_id_latch_next <= write_sub_vector(goal_info_goal_id_latch, get_sub_vector(data_in_latch, to_integer(align_offset(1 downto 0)), CDR_INT8_WIDTH, TRUE), uuid_cnt, TRUE); align_offset_next <= align_offset + 1; -- Need to fetch next Word @@ -511,12 +511,12 @@ begin case (cnt) is -- Double Word 1/2 when 0 => - goal_info_stamp_latch_next <= write_sub_vector(goal_info_stamp_latch_next, endian_swap(endian_flag, data_in_latch), 0, TRUE); + goal_info_stamp_latch_next <= write_sub_vector(goal_info_stamp_latch, endian_swap(endian_flag, data_in_latch), 0, TRUE); stage_next <= FETCH; cnt_next <= cnt + 1; -- Double Word 2/2 when 1 => - goal_info_stamp_latch_next <= write_sub_vector(goal_info_stamp_latch_next, endian_swap(endian_flag, data_in_latch), 1, TRUE); + goal_info_stamp_latch_next <= write_sub_vector(goal_info_stamp_latch, endian_swap(endian_flag, data_in_latch), 1, TRUE); stage_next <= FETCH; align_offset_next <= align_offset + 8; @@ -710,7 +710,7 @@ begin target_align_next <= ALIGN_1; stage_next <= ALIGN_OUT_STREAM; else - data_out_latch_next <= write_sub_vector(data_out_latch_next, endian_swap(LITTLE_ENDIAN, return_code), to_integer(align_offset(1 downto 0)), TRUE); + data_out_latch_next <= write_sub_vector(data_out_latch, endian_swap(LITTLE_ENDIAN, return_code), to_integer(align_offset(1 downto 0)), TRUE); align_offset_next <= align_offset + 1; encode_stage_next <= WRITE_RR_GOALS_CANCELING_LENGTH; @@ -763,7 +763,7 @@ begin when 1 => -- Memory Operation Guard if (goals_canceling_goal_id_mem_valid_out = '1') then - data_out_latch_next <= write_sub_vector(data_out_latch_next, get_sub_vector(goals_canceling_goal_id_mem_data_out,uuid_cnt,CDR_INT8_WIDTH,TRUE), to_integer(align_offset(1 downto 0)), TRUE); + data_out_latch_next <= write_sub_vector(data_out_latch, get_sub_vector(goals_canceling_goal_id_mem_data_out,uuid_cnt,CDR_INT8_WIDTH,TRUE), to_integer(align_offset(1 downto 0)), TRUE); align_offset_next <= align_offset + 1; if (uuid_cnt = RR_GOALS_CANCELING_GOAL_ID_MAX_DEPTH-1) then diff --git a/src/ros2/rcl_interfaces/action_msgs/GoalStatusArray_ros_pub.vhd b/src/ros2/rcl_interfaces/action_msgs/GoalStatusArray_ros_pub.vhd index f5b2db4..620938a 100644 --- a/src/ros2/rcl_interfaces/action_msgs/GoalStatusArray_ros_pub.vhd +++ b/src/ros2/rcl_interfaces/action_msgs/GoalStatusArray_ros_pub.vhd @@ -365,7 +365,7 @@ begin when 1 => -- Memory Operation Guard if (status_list_goal_info_goal_id_mem_valid_out = '1') then - data_out_latch_next <= write_sub_vector(data_out_latch_next, get_sub_vector(status_list_goal_info_goal_id_mem_data_out,uuid_cnt,CDR_INT8_WIDTH,TRUE), to_integer(align_offset(1 downto 0)), TRUE); + data_out_latch_next <= write_sub_vector(data_out_latch, get_sub_vector(status_list_goal_info_goal_id_mem_data_out,uuid_cnt,CDR_INT8_WIDTH,TRUE), to_integer(align_offset(1 downto 0)), TRUE); align_offset_next <= align_offset + 1; if (uuid_cnt = STATUS_LIST_GOAL_INFO_GOAL_ID_MAX_DEPTH-1) then @@ -445,7 +445,7 @@ begin status_list_status_mem_ready_out <= '1'; -- Memory Operation Guard if (status_list_status_mem_valid_out = '1') then - data_out_latch_next <= write_sub_vector(data_out_latch_next, endian_swap(LITTLE_ENDIAN, status_list_status_mem_data_out), to_integer(align_offset(1 downto 0)), TRUE); + data_out_latch_next <= write_sub_vector(data_out_latch, endian_swap(LITTLE_ENDIAN, status_list_status_mem_data_out), to_integer(align_offset(1 downto 0)), TRUE); align_offset_next <= align_offset + 1; -- All Elements processed diff --git a/src/ros2/rcl_interfaces/action_msgs/GoalStatusArray_ros_sub.vhd b/src/ros2/rcl_interfaces/action_msgs/GoalStatusArray_ros_sub.vhd index a8c7add..c172264 100644 --- a/src/ros2/rcl_interfaces/action_msgs/GoalStatusArray_ros_sub.vhd +++ b/src/ros2/rcl_interfaces/action_msgs/GoalStatusArray_ros_sub.vhd @@ -471,12 +471,12 @@ begin case (cnt) is -- Double Word 1/2 when 0 => - dw_latch_next <= write_sub_vector(dw_latch_next, endian_swap(endian_flag, data_in_latch), 0, TRUE); + dw_latch_next <= write_sub_vector(dw_latch, endian_swap(endian_flag, data_in_latch), 0, TRUE); stage_next <= FETCH; cnt_next <= cnt + 1; -- Double Word 2/2 when 1 => - dw_latch_next <= write_sub_vector(dw_latch_next, endian_swap(endian_flag, data_in_latch), 1, TRUE); + dw_latch_next <= write_sub_vector(dw_latch, endian_swap(endian_flag, data_in_latch), 1, TRUE); cnt_next <= cnt + 1; -- Push Double Word when 2 =>