John Daktylidis
a1e0297fcb
The Golden Hardware Reference Design (GHRD) is used to implement designs with PS support. The UDP/IP stack of the Linux running on the PS is used to move UDP packets to/from the PL.
124 lines
14 KiB
Plaintext
124 lines
14 KiB
Plaintext
<session jtag_chain="DE-SoC [2-1]" jtag_device="@2: 5CSEBA6(.|ES)/5CSEMA6/.. (0x02D020DD)" sof_file="output_files/DE10_NANO_SoC_GHRD.sof">
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<display_tree gui_logging_enabled="0">
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<display_branch instance="auto_signaltap_0" log="USE_GLOBAL_TEMP" signal_set="USE_GLOBAL_TEMP" trigger="USE_GLOBAL_TEMP"/>
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</display_tree>
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<instance enabled="false" entity_name="sld_signaltap" is_auto_node="yes" is_expanded="true" name="auto_signaltap_0" source_file="sld_signaltap.vhd">
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<node_ip_info instance_id="0" mfg_id="110" node_id="0" version="6"/>
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<signal_set global_temp="1" is_expanded="true" name="signal_set: 2021/11/29 20:19:07 #0">
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<clock name="soc_system:u0|test_top:test_fpga_0|clk" polarity="posedge" tap_mode="classic"/>
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<config pipeline_level="0" ram_type="AUTO" reserved_data_nodes="0" reserved_storage_qualifier_nodes="0" reserved_trigger_nodes="0" sample_depth="256" trigger_in_enable="no" trigger_out_enable="no"/>
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<top_entity/>
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<signal_vec>
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<trigger_input_vec>
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<wire name="soc_system:u0|test_top:test_fpga_0|read" tap_mode="classic"/>
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</trigger_input_vec>
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<data_input_vec>
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<wire name="soc_system:u0|test_top:test_fpga_0|address[0]" tap_mode="classic"/>
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<wire name="soc_system:u0|test_top:test_fpga_0|address[1]" tap_mode="classic"/>
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<wire name="soc_system:u0|test_top:test_fpga_0|read" tap_mode="classic"/>
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<wire name="soc_system:u0|test_top:test_fpga_0|waitrequest" tap_mode="classic"/>
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<wire name="soc_system:u0|test_top:test_fpga_0|write" tap_mode="classic"/>
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</data_input_vec>
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<storage_qualifier_input_vec>
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<wire name="soc_system:u0|test_top:test_fpga_0|address[0]" tap_mode="classic"/>
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<wire name="soc_system:u0|test_top:test_fpga_0|address[1]" tap_mode="classic"/>
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<wire name="soc_system:u0|test_top:test_fpga_0|read" tap_mode="classic"/>
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<wire name="soc_system:u0|test_top:test_fpga_0|waitrequest" tap_mode="classic"/>
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<wire name="soc_system:u0|test_top:test_fpga_0|write" tap_mode="classic"/>
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</storage_qualifier_input_vec>
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</signal_vec>
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<presentation>
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<unified_setup_data_view>
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<node data_index="2" duplicate_name_allowed="false" is_data_input="true" is_node_valid="true" is_selected="false" is_storage_input="true" is_trigger_input="true" level-0="rising edge" name="soc_system:u0|test_top:test_fpga_0|read" pwr_level-0="dont_care" pwr_storage-0="dont_care" pwr_storage-1="dont_care" pwr_storage-2="dont_care" storage-0="dont_care" storage-1="dont_care" storage-2="dont_care" storage_index="2" tap_mode="classic" trigger_index="0" type="unknown"/>
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<node data_index="3" duplicate_name_allowed="false" is_data_input="true" is_node_valid="true" is_selected="false" is_storage_input="true" is_trigger_input="false" name="soc_system:u0|test_top:test_fpga_0|waitrequest" pwr_storage-0="dont_care" pwr_storage-1="dont_care" pwr_storage-2="dont_care" storage-0="dont_care" storage-1="dont_care" storage-2="dont_care" storage_index="3" tap_mode="classic" type="unknown"/>
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<node data_index="4" duplicate_name_allowed="false" is_data_input="true" is_node_valid="true" is_selected="false" is_storage_input="true" is_trigger_input="false" name="soc_system:u0|test_top:test_fpga_0|write" pwr_storage-0="dont_care" pwr_storage-1="dont_care" pwr_storage-2="dont_care" storage-0="dont_care" storage-1="dont_care" storage-2="dont_care" storage_index="4" tap_mode="classic" type="unknown"/>
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<node is_selected="false" level-0="alt_or" name="soc_system:u0|test_top:test_fpga_0|address[1..0]" order="msb_to_lsb" storage-0="alt_or" storage-1="alt_or" storage-2="alt_or" type="combinatorial">
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<node data_index="1" duplicate_name_allowed="false" is_data_input="true" is_node_valid="true" is_selected="false" is_storage_input="true" is_trigger_input="false" name="soc_system:u0|test_top:test_fpga_0|address[1]" pwr_storage-0="dont_care" pwr_storage-1="dont_care" pwr_storage-2="dont_care" storage-0="dont_care" storage-1="dont_care" storage-2="dont_care" storage_index="1" tap_mode="classic" type="unknown"/>
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<node data_index="0" duplicate_name_allowed="false" is_data_input="true" is_node_valid="true" is_selected="false" is_storage_input="true" is_trigger_input="false" name="soc_system:u0|test_top:test_fpga_0|address[0]" pwr_storage-0="dont_care" pwr_storage-1="dont_care" pwr_storage-2="dont_care" storage-0="dont_care" storage-1="dont_care" storage-2="dont_care" storage_index="0" tap_mode="classic" type="unknown"/>
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</node>
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</unified_setup_data_view>
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<data_view>
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<net data_index="2" duplicate_name_allowed="false" is_data_input="true" is_node_valid="true" is_selected="false" is_storage_input="true" is_trigger_input="true" level-0="rising edge" name="soc_system:u0|test_top:test_fpga_0|read" pwr_level-0="dont_care" pwr_storage-0="dont_care" pwr_storage-1="dont_care" pwr_storage-2="dont_care" storage-0="dont_care" storage-1="dont_care" storage-2="dont_care" storage_index="2" tap_mode="classic" trigger_index="0" type="unknown"/>
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<net data_index="3" duplicate_name_allowed="false" is_data_input="true" is_node_valid="true" is_selected="false" is_storage_input="true" is_trigger_input="false" name="soc_system:u0|test_top:test_fpga_0|waitrequest" pwr_storage-0="dont_care" pwr_storage-1="dont_care" pwr_storage-2="dont_care" storage-0="dont_care" storage-1="dont_care" storage-2="dont_care" storage_index="3" tap_mode="classic" type="unknown"/>
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<net data_index="4" duplicate_name_allowed="false" is_data_input="true" is_node_valid="true" is_selected="false" is_storage_input="true" is_trigger_input="false" name="soc_system:u0|test_top:test_fpga_0|write" pwr_storage-0="dont_care" pwr_storage-1="dont_care" pwr_storage-2="dont_care" storage-0="dont_care" storage-1="dont_care" storage-2="dont_care" storage_index="4" tap_mode="classic" type="unknown"/>
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<bus is_selected="false" level-0="alt_or" name="soc_system:u0|test_top:test_fpga_0|address[1..0]" order="msb_to_lsb" storage-0="alt_or" storage-1="alt_or" storage-2="alt_or" type="combinatorial">
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<net data_index="1" duplicate_name_allowed="false" is_data_input="true" is_node_valid="true" is_selected="false" is_storage_input="true" is_trigger_input="false" name="soc_system:u0|test_top:test_fpga_0|address[1]" pwr_storage-0="dont_care" pwr_storage-1="dont_care" pwr_storage-2="dont_care" storage-0="dont_care" storage-1="dont_care" storage-2="dont_care" storage_index="1" tap_mode="classic" type="unknown"/>
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<net data_index="0" duplicate_name_allowed="false" is_data_input="true" is_node_valid="true" is_selected="false" is_storage_input="true" is_trigger_input="false" name="soc_system:u0|test_top:test_fpga_0|address[0]" pwr_storage-0="dont_care" pwr_storage-1="dont_care" pwr_storage-2="dont_care" storage-0="dont_care" storage-1="dont_care" storage-2="dont_care" storage_index="0" tap_mode="classic" type="unknown"/>
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</bus>
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</data_view>
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<setup_view>
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<net data_index="2" duplicate_name_allowed="false" is_data_input="true" is_node_valid="true" is_selected="false" is_storage_input="true" is_trigger_input="true" level-0="rising edge" name="soc_system:u0|test_top:test_fpga_0|read" pwr_level-0="dont_care" pwr_storage-0="dont_care" pwr_storage-1="dont_care" pwr_storage-2="dont_care" storage-0="dont_care" storage-1="dont_care" storage-2="dont_care" storage_index="2" tap_mode="classic" trigger_index="0" type="unknown"/>
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<net data_index="3" duplicate_name_allowed="false" is_data_input="true" is_node_valid="true" is_selected="false" is_storage_input="true" is_trigger_input="false" name="soc_system:u0|test_top:test_fpga_0|waitrequest" pwr_storage-0="dont_care" pwr_storage-1="dont_care" pwr_storage-2="dont_care" storage-0="dont_care" storage-1="dont_care" storage-2="dont_care" storage_index="3" tap_mode="classic" type="unknown"/>
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<net data_index="4" duplicate_name_allowed="false" is_data_input="true" is_node_valid="true" is_selected="false" is_storage_input="true" is_trigger_input="false" name="soc_system:u0|test_top:test_fpga_0|write" pwr_storage-0="dont_care" pwr_storage-1="dont_care" pwr_storage-2="dont_care" storage-0="dont_care" storage-1="dont_care" storage-2="dont_care" storage_index="4" tap_mode="classic" type="unknown"/>
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<bus is_selected="false" level-0="alt_or" name="soc_system:u0|test_top:test_fpga_0|address[1..0]" order="msb_to_lsb" storage-0="alt_or" storage-1="alt_or" storage-2="alt_or" type="combinatorial">
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<net data_index="1" duplicate_name_allowed="false" is_data_input="true" is_node_valid="true" is_selected="false" is_storage_input="true" is_trigger_input="false" name="soc_system:u0|test_top:test_fpga_0|address[1]" pwr_storage-0="dont_care" pwr_storage-1="dont_care" pwr_storage-2="dont_care" storage-0="dont_care" storage-1="dont_care" storage-2="dont_care" storage_index="1" tap_mode="classic" type="unknown"/>
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<net data_index="0" duplicate_name_allowed="false" is_data_input="true" is_node_valid="true" is_selected="false" is_storage_input="true" is_trigger_input="false" name="soc_system:u0|test_top:test_fpga_0|address[0]" pwr_storage-0="dont_care" pwr_storage-1="dont_care" pwr_storage-2="dont_care" storage-0="dont_care" storage-1="dont_care" storage-2="dont_care" storage_index="0" tap_mode="classic" type="unknown"/>
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</bus>
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</setup_view>
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<trigger_in_editor/>
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<trigger_out_editor/>
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</presentation>
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<trigger CRC="323D930C" attribute_mem_mode="false" gap_record="true" global_temp="1" is_expanded="true" name="trigger: 2021/11/29 20:19:07 #1" position="pre" power_up_trigger_mode="false" record_data_gap="true" segment_size="64" storage_mode="off" storage_qualifier_disabled="no" storage_qualifier_port_is_pin="false" storage_qualifier_port_name="auto_stp_external_storage_qualifier" storage_qualifier_port_tap_mode="classic" trigger_type="circular">
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<power_up_trigger position="pre" storage_qualifier_disabled="no"/>
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<events use_custom_flow_control="no">
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<level enabled="yes" name="condition1" type="basic">'soc_system:u0|test_top:test_fpga_0|read' == rising edge
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<power_up enabled="yes">
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</power_up><op_node/>
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</level>
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</events>
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<storage_qualifier_events>
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<transitional>11111
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<pwr_up_transitional>11111</pwr_up_transitional>
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</transitional>
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<storage_qualifier_level type="basic">
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<power_up>
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</power_up>
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<op_node/>
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</storage_qualifier_level>
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<storage_qualifier_level type="basic">
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<power_up>
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</power_up>
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<op_node/>
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</storage_qualifier_level>
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<storage_qualifier_level type="basic">
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<power_up>
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</power_up>
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<op_node/>
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</storage_qualifier_level>
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</storage_qualifier_events>
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<log>
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<data global_temp="1" name="log: Trig @ 2021/11/29 23:53:19 (0:0:0.1 elapsed)" power_up_mode="false" sample_depth="256" trigger_position="32">00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001011010110101101011010110101101011010110101101011010110101101011010110101101011010110101101011010110101101011010110101101011010110101101011010110101101011010110101101011010110101101011010110101101011010110101101011010110101101011010110101101011010110101101011010110101101011010110101101011010110101101011010110101101011010110101101011010110101101011010110101101011010110101101011010110101101011010110101101011010110101101011010110101101011010110101101011010110101101011010110101101011010110101101011010110101101011010110101101011010110101101011010110101101011010110101101011010110101101011010110101101011010110101101011010110101101011010110101101011010110101101011010110101101011010110101101011010110101101011010110101101011010110101101011010110101101011010110101101011010110101101011010110101101011010110101101011010110101101011010110101101011010110101101011010110101101011010110101101011010110101101011010110101101011010110101101011010110101101011010110101101011010110101101011010110101101011010110101101011010110101101011010110101101011010110101101011010110101101011010110101101011010110101101011010110101101011010110</data>
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<extradata>11111111111111111111111111111111T1111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111111</extradata>
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</log>
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</trigger>
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</signal_set>
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<position_info>
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<single attribute="active tab" value="0"/>
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<single attribute="setup horizontal scroll position" value="0"/>
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<single attribute="setup vertical scroll position" value="0"/>
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<single attribute="data vertical scroll position" value="2"/>
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<single attribute="data horizontal scroll position" value="28"/>
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<single attribute="zoom level numerator" value="4096"/>
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<single attribute="zoom level denominator" value="1"/>
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<single attribute="zoom offset numerator" value="12"/>
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<single attribute="zoom offset denominator" value="1"/>
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</position_info>
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</instance>
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<mnemonics/>
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<global_info>
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<single attribute="active instance" value="0"/>
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<single attribute="config widget visible" value="1"/>
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<single attribute="data log widget visible" value="1"/>
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<single attribute="hierarchy widget height" value="129"/>
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<single attribute="hierarchy widget visible" value="1"/>
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<single attribute="instance widget visible" value="1"/>
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<single attribute="jtag widget visible" value="1"/>
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<single attribute="lock mode" value="0"/>
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<multi attribute="column width" size="23" value="34,34,319,74,38,78,95,96,98,98,88,88,110,101,101,101,101,101,101,101,101,107,78"/>
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<multi attribute="frame size" size="2" value="1360,667"/>
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<multi attribute="jtag widget size" size="2" value="328,197"/>
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<single attribute="sof manager visible" value="1"/>
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</global_info>
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<static_plugin_mnemonics/>
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</session>
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