55 lines
1.9 KiB
Plaintext
55 lines
1.9 KiB
Plaintext
RUN TESTS
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=========
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MANUALLY
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--------
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* Open modelsim
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* Change Directory to /sim
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* run 'build ../src/Tests/testbench.pro'
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AUTOMATICALLY
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-------------
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* Open Terminal in /sim directory
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* Run 'vsim -do test_all.do'
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NOTE: After some time the compilation of the simulator gets sluggisly slow.
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I noticed that deleting the Libraries and re-creating them re-vitalizes the speed
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In order to do so start a simulation (so that the Library is loaded), make sure that you end the current simulation, and type 'RemoveAllLibraries'. After a vsim re-start everything shoudl run faster
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RUN ON BOARD
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============
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COMMUNICATE WITH BOARD
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----------------------
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UART: BAUDRATE 115200, 8N1
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Login: USER=root, PASS=root
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MAC: A2:F9:79:A9:F8:10
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$picocom -b 115200 -d 8 -y n -p 1 /dev/ttyUSB0
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NOTE: Before unplugging the board, execute the 'halt' command to shutdown the board and prevent data corruption.
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The '~/test/udp_forwarder' is used to forward UDP packets ariving at the Linux side running on the ARM processor over to the FPGA, and back out.
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USAGE: ~/test/udp_forwarder ADDRESS DOMAIN_ID
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ADDRESS The SRC IPv4 Address of the FPGA implementation (In x.x.x.x format)
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NOTE: The system has to have a interface with the same address
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DOMAIN_ID The Domain ID of the FPGA implementation
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RBF FILE
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--------
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The board automatically flashes the 'soc_system.rbf' file in the root of the SD card to the FPGA.
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In order to create a *.rbf file from a *.sof file, you have to follow following instructions:
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* In Quartus go to "File"->"Convert Programming Files"
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* Select "Programming file type" = "Raw Binary File (.rbf)"
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* Select "Mode" = "Passive Parallel x16"
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* Select output file name/location
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* Select the respective *.sof file in "Input files to convert"
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* Click "Generate"
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NOTE: Don't forget to rename the file to "soc_system.rbf" when inserting it to the SD Card
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(All other *.rbf files are ignored. You could thus keep multiple backup files around)
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