rtps-fpga/syn/dds_reader_syn.vhd

library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;

use work.math_pkg.all;
use work.rtps_package.all;
use work.user_config.all;
use work.rtps_config_package.all;
use work.Type1_package.all;

entity dds_reader_syn is
    port (
        -- SYSTEM
        clk                             : in std_logic;
        reset                           : in std_logic;
        time                            : in TIME_TYPE;
        -- FROM RTPS ENDPOINT
        start_rtps                      : in std_logic;
        opcode_rtps                     : in HISTORY_CACHE_OPCODE_TYPE;
        ack_rtps                        : out std_logic;
        done_rtps                       : out std_logic;
        ret_rtps                        : out HISTORY_CACHE_RESPONSE_TYPE;
        data_in_rtps                    : in std_logic_vector(WORD_WIDTH-1 downto 0);
        valid_in_rtps                   : in std_logic;
        ready_in_rtps                   : out std_logic;
        last_word_in_rtps               : in std_logic;
        -- TO USER ENTITY
        start_dds                       : in std_logic;
        ack_dds                         : out std_logic;
        opcode_dds                      : in DDS_READER_OPCODE_TYPE;
        instance_state_dds              : in std_logic_vector(INSTANCE_STATE_KIND_WIDTH-1 downto 0);
        view_state_dds                  : in std_logic_vector(VIEW_STATE_KIND_WIDTH-1 downto 0);
        sample_state_dds                : in std_logic_vector(SAMPLE_STATE_KIND_WIDTH-1 downto 0);
        instance_handle_dds             : in INSTANCE_HANDLE_TYPE;
        max_samples_dds                 : in std_logic_vector(MAX_SAMPLES_WIDTH-1 downto 0);
        get_data_dds                    : in std_logic;
        done_dds                        : out std_logic;
        return_code_dds                 : out std_logic_vector(RETURN_CODE_WIDTH-1 downto 0);
        ready_out_dds                   : in std_logic;
        valid_out_dds                   : out std_logic;
        data_out_dds                    : out std_logic_vector(WORD_WIDTH-1 downto 0);
        last_word_out_dds               : out std_logic;
        -- Sample Info
        si_sample_state                 : out std_logic_vector(SAMPLE_STATE_KIND_WIDTH-1 downto 0);
        si_view_state                   : out std_logic_vector(VIEW_STATE_KIND_WIDTH-1 downto 0);
        si_instance_state               : out std_logic_vector(INSTANCE_STATE_KIND_WIDTH-1 downto 0);
        si_source_timestamp             : out TIME_TYPE;
        si_instance_handle              : out INSTANCE_HANDLE_TYPE;
        si_publication_handle           : out INSTANCE_HANDLE_TYPE;
        si_disposed_generation_count    : out std_logic_vector(DISPOSED_GENERATION_COUNT_WIDTH-1 downto 0);
        si_no_writers_generation_count  : out std_logic_vector(NO_WRITERS_GENERATION_COUNT_WIDTH-1 downto 0);
        si_sample_rank                  : out std_logic_vector(SAMPLE_RANK_WIDTH-1 downto 0);
        si_generation_rank              : out std_logic_vector(GENERATION_RANK_WIDTH-1 downto 0);
        si_absolute_generation_rank     : out std_logic_vector(ABSOLUTE_GENERATION_COUNT_WIDTH-1 downto 0);
        si_valid_data                   : out std_logic;
        si_valid                        : out std_logic;
        si_ack                          : in std_logic;
        eoc                             : out std_logic;
        -- Communication Status
        status                          : out std_logic_vector(STATUS_KIND_WIDTH-1 downto 0)
    );
end entity;

architecture arch of dds_reader_syn is
begin
    
    syn_inst : entity work.dds_reader(arch)
        generic map (
            TIME_BASED_FILTER_QOS       => ENDPOINT_TIME_BASED_FILTER_QOS(0),
            DEADLINE_QOS                => ENDPOINT_DEADLINE_QOS(0),
            MAX_INSTANCES               => ENDPOINT_MAX_INSTANCES(0),
            MAX_SAMPLES_PER_INSTANCE    => ENDPOINT_MAX_SAMPLES_PER_INSTANCE(0),
            MAX_SAMPLES                 => ENDPOINT_MAX_SAMPLES(0),
            HISTORY_QOS                 => ENDPOINT_HISTORY_QOS(0),
            RELIABILITY_QOS             => ENDPOINT_RELIABILITY_QOS(0),
            PRESENTATION_QOS            => ENDPOINT_PRESENTATION_QOS(0),
            DESTINATION_ORDER_QOS       => ENDPOINT_DESTINATION_ORDER_QOS(0),
            COHERENT_ACCESS             => ENDPOINT_COHERENT_ACCESS(0),
            ORDERED_ACCESS              => ENDPOINT_ORDERED_ACCESS(0),
            WITH_KEY                    => ENDPOINT_WITH_KEY(0),
            PAYLOAD_FRAME_SIZE          => MAX_TYPE1_SIZE
        )
        port map (
            clk                             => clk,
            reset                           => reset,
            time                            => time,
            start_rtps                      => start_rtps,
            opcode_rtps                     => opcode_rtps,
            ack_rtps                        => ack_rtps,
            done_rtps                       => done_rtps,
            ret_rtps                        => ret_rtps,
            data_in_rtps                    => data_in_rtps,
            valid_in_rtps                   => valid_in_rtps,
            ready_in_rtps                   => ready_in_rtps,
            last_word_in_rtps               => last_word_in_rtps,
            start_dds                       => start_dds,
            ack_dds                         => ack_dds,
            opcode_dds                      => opcode_dds,
            instance_state_dds              => instance_state_dds,
            view_state_dds                  => view_state_dds,
            sample_state_dds                => sample_state_dds,
            instance_handle_dds             => instance_handle_dds,
            max_samples_dds                 => max_samples_dds,
            get_data_dds                    => get_data_dds,
            done_dds                        => done_dds,
            return_code_dds                 => return_code_dds,
            ready_out_dds                   => ready_out_dds,
            valid_out_dds                   => valid_out_dds,
            data_out_dds                    => data_out_dds,
            last_word_out_dds               => last_word_out_dds,
            si_sample_state                 => si_sample_state,
            si_view_state                   => si_view_state,
            si_instance_state               => si_instance_state,
            si_source_timestamp             => si_source_timestamp,
            si_instance_handle              => si_instance_handle,
            si_publication_handle           => si_publication_handle,
            si_disposed_generation_count    => si_disposed_generation_count,
            si_no_writers_generation_count  => si_no_writers_generation_count,
            si_sample_rank                  => si_sample_rank,
            si_generation_rank              => si_generation_rank,
            si_absolute_generation_rank     => si_absolute_generation_rank,
            si_valid_data                   => si_valid_data,
            si_valid                        => si_valid,
            si_ack                          => si_ack,
            eoc                             => eoc,
            status                          => status
        );

end architecture;