b47d409f13
Remove non-Quartus-supported VHDL 2008 features. Remove inferred Latches. Add test Entities to see resulting hw synthesis of various code segments.
114 lines
5.1 KiB
VHDL
114 lines
5.1 KiB
VHDL
library ieee;
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use ieee.std_logic_1164.all;
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use ieee.numeric_std.all;
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use work.math_pkg.all;
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use work.rtps_package.all;
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use work.user_config.all;
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use work.rtps_config_package.all;
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use work.Type1_package.all;
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entity dds_writer_syn is
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port (
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-- SYSTEM
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clk : in std_logic;
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reset : in std_logic;
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time : in TIME_TYPE;
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-- TO/FROM RTPS ENDPOINT
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start_rtps : in std_logic;
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opcode_rtps : in HISTORY_CACHE_OPCODE_TYPE;
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ack_rtps : out std_logic;
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done_rtps : out std_logic;
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ret_rtps : out HISTORY_CACHE_RESPONSE_TYPE;
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seq_nr_rtps : in SEQUENCENUMBER_TYPE;
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get_data_rtps : in std_logic;
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data_out_rtps : out std_logic_vector(WORD_WIDTH-1 downto 0);
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valid_out_rtps : out std_logic;
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ready_out_rtps : in std_logic;
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last_word_out_rtps : out std_logic;
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liveliness_assertion : out std_logic;
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data_available : out std_logic;
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-- Cache Change
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cc_instance_handle : out INSTANCE_HANDLE_TYPE;
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cc_kind : out CACHE_CHANGE_KIND_TYPE;
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cc_source_timestamp : out TIME_TYPE;
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cc_seq_nr : out SEQUENCENUMBER_TYPE;
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-- TO/FROM USER ENTITY
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start_dds : in std_logic;
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ack_dds : out std_logic;
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opcode_dds : in DDS_WRITER_OPCODE_TYPE;
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instance_handle_dds : in INSTANCE_HANDLE_TYPE;
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source_ts_dds : in TIME_TYPE;
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max_wait_dds : in DURATION_TYPE;
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done_dds : out std_logic;
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return_code_dds : out std_logic_vector(RETURN_CODE_WIDTH-1 downto 0);
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ready_in_dds : out std_logic;
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valid_in_dds : in std_logic;
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data_in_dds : in std_logic_vector(WORD_WIDTH-1 downto 0);
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last_word_in_dds : in std_logic;
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ready_out_dds : in std_logic;
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valid_out_dds : out std_logic;
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data_out_dds : out std_logic_vector(WORD_WIDTH-1 downto 0);
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last_word_out_dds : out std_logic;
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-- Communication Status
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status : out std_logic_vector(STATUS_KIND_WIDTH-1 downto 0)
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);
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end entity;
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architecture arch of dds_writer_syn is
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begin
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syn_inst : entity work.dds_writer(arch)
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generic map (
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HISTORY_QOS => ENDPOINT_HISTORY_QOS(1),
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DEADLINE_QOS => ENDPOINT_DEADLINE_QOS(1),
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LIFESPAN_QOS => ENDPOINT_LIFESPAN_QOS(1),
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LEASE_DURATION => ENDPOINT_LEASE_DURATION(1),
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WITH_KEY => ENDPOINT_WITH_KEY(1),
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MAX_SAMPLES => ENDPOINT_MAX_SAMPLES(1),
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MAX_INSTANCES => ENDPOINT_MAX_INSTANCES(1),
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MAX_SAMPLES_PER_INSTANCE => ENDPOINT_MAX_SAMPLES_PER_INSTANCE(1),
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PAYLOAD_FRAME_SIZE => MAX_TYPE1_SIZE
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)
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port map (
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clk => clk,
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reset => reset,
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time => time,
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start_rtps => start_rtps,
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opcode_rtps => opcode_rtps,
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ack_rtps => ack_rtps,
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done_rtps => done_rtps,
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ret_rtps => ret_rtps,
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seq_nr_rtps => seq_nr_rtps,
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get_data_rtps => get_data_rtps,
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data_out_rtps => data_out_rtps,
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valid_out_rtps => valid_out_rtps,
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ready_out_rtps => ready_out_rtps,
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last_word_out_rtps => last_word_out_rtps,
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liveliness_assertion => liveliness_assertion,
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data_available => data_available,
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cc_instance_handle => cc_instance_handle,
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cc_kind => cc_kind,
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cc_source_timestamp => cc_source_timestamp,
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cc_seq_nr => cc_seq_nr,
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start_dds => start_dds,
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ack_dds => ack_dds,
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opcode_dds => opcode_dds,
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instance_handle_dds => instance_handle_dds,
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source_ts_dds => source_ts_dds,
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max_wait_dds => max_wait_dds,
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done_dds => done_dds,
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return_code_dds => return_code_dds,
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ready_in_dds => ready_in_dds,
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valid_in_dds => valid_in_dds,
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data_in_dds => data_in_dds,
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last_word_in_dds => last_word_in_dds,
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ready_out_dds => ready_out_dds,
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valid_out_dds => valid_out_dds,
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data_out_dds => data_out_dds,
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last_word_out_dds => last_word_out_dds,
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status => status
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);
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end architecture;
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