rtps-fpga/single_port_ram_cfg.vhd at 4420a62d638237ce90591a083d30face3e6a0695 - rtps-fpga - Gitea: Git with a cup of tea

greek64/rtps-fpga

Greek 6e20b8958d Add VHDL configuration for single_port_ram and FWFT_FIFO

Allow single_port_ram and FWFT_FIFO to have Altera specific
architectures.

2021-12-09 19:43:56 +01:00

4 lines

100 B

VHDL

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 configuration single_port_ram_cfg of single_port_ram is
     for arch
     end for;
 end configuration;