greek64/rtps-fpga
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90a4c7928a
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Greek 90a4c7928a Backport Memory Controller to rtps_builtin_endpoint 
Backport Memory Controller and Memory FSM from RTPS/DDS Endpoints to
RTPS Builtin Endpoint.
The Memory is now using a single linked list and the FSM uses Frame Field
Flags.
The main FSM uses check_time to initiate stale checks, and the stale
checks are done in the main FSM.
Testbench was modified to accomodate the changes (Previous L0 Test4 was
removed and integrated in L0 Test 1).
2021-05-11 13:23:55 +02:00
doc Add and update doc 2021-01-11 12:06:18 +01:00
sim Backport Memory Controller to rtps_builtin_endpoint 2021-05-11 13:23:55 +02:00
src Backport Memory Controller to rtps_builtin_endpoint 2021-05-11 13:23:55 +02:00
syn Add and update doc 2021-01-11 12:06:18 +01:00
.gitattributes * Added DDS/RTPS Documentation 2020-05-10 19:31:49 +02:00
.gitignore * Re-design rtps_builtin_endpoint 2020-11-29 23:34:28 +01:00
.gitmodules * Added OSVVM Library as Submodule 2020-11-15 20:34:39 +01:00
Report.txt * Added Documentation 2020-05-24 13:08:03 +02:00
VHDL-2008.txt * rtps_builtin_endpoint compiles 2020-10-26 23:43:54 +01:00