af1de8bab8
Templates with the pre-defined code hull for the reader_wrapper, writer_wrapper, and key_holder were created. A "cookbook" of how to expand this TEMPLATES to create type specific IDL conversions was also added. The "code generation" is kept general to allow a code generator to automatically produce this wrappers in the future.
21 lines
598 B
VHDL
21 lines
598 B
VHDL
library ieee;
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use ieee.std_logic_1164.all;
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use ieee.numeric_std.all;
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entity key_hash_generator is
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port (
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clk : in std_logic;
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reset : in std_logic;
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start : in std_logic;
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ack : out std_logic;
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data_in : in std_logic_vector(7 downto 0);
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valid_in : in std_logic;
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ready_in : out std_logic;
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last_word_in : in std_logic;
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key_hash : out std_logic_vector(127 downto 0);
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done : out std_logic
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);
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end entity; |