Remove non-Quartus-supported VHDL 2008 features. Remove inferred Latches. Add test Entities to see resulting hw synthesis of various code segments.
53 lines
2.0 KiB
VHDL
53 lines
2.0 KiB
VHDL
library ieee;
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use ieee.std_logic_1164.all;
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use ieee.numeric_std.all;
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package test_package is
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--generic( generic_var : natural := 1 );
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-- Number of Domains
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constant NUM_DOMAIN : integer := 1;
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-----------------------------------------------------------------------------------------------------
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-- *DO NOT MODIFY BEGIN*
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type USER_DOMAIN_ID_TYPE is array (NUM_DOMAIN-1 downto 0) of integer;
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-- *DO NOT MODIFY END*
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-----------------------------------------------------------------------------------------------------
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-- Array of Domain IDs
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constant USER_DOMAIN_ID : USER_DOMAIN_ID_TYPE := (0 => 1);
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constant DOMAIN_ID_WIDTH : integer := 32;
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type TEST_ARRAY_TYPE is array (1 downto 0) of string(1 to 10);
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constant TEST1 : string(1 to 10) := "Blah" & (1 to 6 => NUL);
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constant TEST2 : TEST_ARRAY_TYPE := (0 => "Blah" & (1 to 6 => NUL),
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1 => "Baba" & (1 to 6 => NUL));
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type DOMAIN_ID_TYPE is array (NUM_DOMAIN-1 downto 0) of std_logic_vector(DOMAIN_ID_WIDTH-1 downto 0);
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type TEST_ARRAY is array (natural range <>) of string(1 to 256);
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function gen_domain_ids (user_id : USER_DOMAIN_ID_TYPE) return DOMAIN_ID_TYPE;
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end package;
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package body test_package is
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function gen_domain_ids (user_id : USER_DOMAIN_ID_TYPE) return DOMAIN_ID_TYPE is
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variable ret : DOMAIN_ID_TYPE;
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begin
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ret := (others => (others => '0'));
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for i in 0 to user_id'length-1 loop
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-- Check if User provided Domain ID fits
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-- NOTE: Cannot assert due to vhdl integer overflow.
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--assert (user_id(i) < (2**DOMAIN_ID_WIDTH-1 - PORT_CONFIG_PB) / PORT_CONFIG_DG) report "Domain ID range exceeded" severity failure;
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ret(i) := std_logic_vector(to_unsigned(user_id(i), ret(i)'length));
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end loop;
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return ret;
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end function;
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constant DOMAIN_ID : DOMAIN_ID_TYPE := gen_domain_ids(USER_DOMAIN_ID);
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end package body;
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