rtps-fpga/VHDL-2008.txt
Greek d61b9dc80a * rtps_builtin_endpoint compiles
* Single port RAM implementation for Altera
* Added Altera doc
2020-10-26 23:43:54 +01:00

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Quartus 18.1 Unsupported
========================
* Unconstrained arrays in records (Supported in Pro)
* Vectors in aggregate statements
e.g. V := ("0000", others => '1');
* Unary logical operators
* Referencing generics in generic lists
*