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Greek eef62e17ce Add Level 1 Test 1 for Type2 Reader and Writer Wrapper
By connecting the output of the writer_wrapper to the input of the
reader_wrapper we can effectively test the encoding/decoding.
Since the writer_wrapper only uses Big Endian we cannot test Little
Endian handling.
2021-11-05 14:26:45 +01:00
doc Code Refactor 2021-05-15 20:39:56 +02:00
sim Add Level 1 Test 1 for Type2 Reader and Writer Wrapper 2021-11-05 14:26:45 +01:00
src Add Level 1 Test 1 for Type2 Reader and Writer Wrapper 2021-11-05 14:26:45 +01:00
syn Add and update doc 2021-01-11 12:06:18 +01:00
.gitattributes * Added DDS/RTPS Documentation 2020-05-10 19:31:49 +02:00
.gitignore Minor declaration & documentation fixes 2021-11-03 20:07:14 +01:00
.gitmodules * Added OSVVM Library as Submodule 2020-11-15 20:34:39 +01:00
Report.txt * Added Documentation 2020-05-24 13:08:03 +02:00
VHDL-2008.txt Code Refactor 2021-05-15 20:39:56 +02:00