greek64/rtps-fpga
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f2826ddd20
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Greek f2826ddd20 Change Sample Memory Format 
The Sample Memory was changed to contain only the Instance Memory
Address instead of the whole Key Hash. This simplifies the B process and
reduces memory footprint.
The instance memory process was also updated to handle the conditional
fields defined in the previous commit.
2021-01-17 21:01:15 +01:00
doc Add and update doc 2021-01-11 12:06:18 +01:00
sim * Added rtps_builting_endpoint_test7 2020-12-06 23:55:28 +01:00
src Change Sample Memory Format 2021-01-17 21:01:15 +01:00
syn Add and update doc 2021-01-11 12:06:18 +01:00
.gitattributes * Added DDS/RTPS Documentation 2020-05-10 19:31:49 +02:00
.gitignore * Re-design rtps_builtin_endpoint 2020-11-29 23:34:28 +01:00
.gitmodules * Added OSVVM Library as Submodule 2020-11-15 20:34:39 +01:00
Report.txt * Added Documentation 2020-05-24 13:08:03 +02:00
VHDL-2008.txt * rtps_builtin_endpoint compiles 2020-10-26 23:43:54 +01:00