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doc
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* Add documentation
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2020-04-27 13:41:10 +02:00 |
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modelsim
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* Added Zynq 7 documentation
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2020-04-01 14:12:04 +02:00 |
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src
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* Fix xillybus-FPGA data ordering
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2020-04-28 15:12:31 +02:00 |
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sw
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* Fix xillybus-FPGA data ordering
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2020-04-28 15:12:31 +02:00 |
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syn
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* Update docs
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2020-04-26 14:34:34 +02:00 |
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xillinux-syn
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* Add documentation
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2020-04-27 13:41:10 +02:00 |
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.gitattributes
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* Initial Commit
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2020-03-12 15:38:06 +01:00 |
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.gitignore
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* Update doc
|
2020-04-26 00:34:08 +02:00 |
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mapping.txt
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* Fix xillybus-FPGA data ordering
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2020-04-28 15:12:31 +02:00 |