labor-mst/mapping.txt
Greek ae928c116b * Fix xillybus-FPGA data ordering
* Add file explaining custom mapping
2020-04-28 15:12:31 +02:00

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JA4 ext_clk
JA1 sync_pulse [NOTE: If pin is left floating, it will register as a pulse]
SW7 standby
LED7 standy_status
BTNC reset
BTNU reset_debug