greek64/rtps-fpga
2
1
Fork 0
Code Issues Pull Requests Releases Wiki Activity

Add Little Endian tests for Fibonacci_ros_action_feedback and GoalStatusArray_ros

Browse Source
This commit is contained in:
John Ring 2022-02-04 18:59:58 +01:00
parent f137e8b06b
commit 158ab05a4d
7 changed files with 690 additions and 10 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
src/TEMPLATE_reader_interface.vhd
View File

@ -321,7 +321,7 @@ begin
-- Llength
when 2 =>
stage_next <= FETCH;
decode_stage_next <= return_stage;
decode_stage_next <= return_stage;
cnt_next <= 0;
-- Alignment Reset
align_offset_next <= (others => '0');

334
src/ros2/Tests/Level_1/L1_Fibonacci_ros_action_feedback_test2.vhd Normal file
View File

@ -0,0 +1,334 @@
library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;
library osvvm; -- Utility Library
context osvvm.OsvvmContext;
use work.rtps_package.all;
use work.ros_package.all;
use work.rtps_test_package.all;
use work.Fibonacci_package.all;
-- This testbench tests the General Behavour of ROS publishers and subscribers
-- More specifically following tests are done:
-- * Test Unssuported Opcode Operations
-- * Test RETCODE_NO_DATA response from DDS Reader
-- * Test RETCODE_ERROR response from DDS Reader
-- * Test RETCODE_ERROR response from DDS Writer
-- * Test Sample with No Valid response from DDS Reader
-- * Test Little Endian Encoding/Decoding of Messages
entity L1_Fibonacci_ros_action_feedback_test2 is
end entity;
architecture testbench of L1_Fibonacci_ros_action_feedback_test2 is
signal clk, reset : std_logic := '0';
signal valid, ready, last_word, last_word_out_w : std_logic := '0';
signal data : std_logic_vector(WORD_WIDTH-1 downto 0) := (others => '0');
signal start_sub, start_pub, ack_sub, ack_pub, taken_sub, taken_pub, done_sub, done_pub : std_logic := '0';
signal opcode_sub, opcode_pub : ROS_TOPIC_OPCODE_TYPE := NOP;
signal return_code_sub, return_code_pub : std_logic_vector(ROS_RETCODE_WIDTH-1 downto 0) := (others => '0');
signal start_r, si_valid_data_r : std_logic := '0';
signal return_code_r, return_code_w : std_logic_vector(RETURN_CODE_WIDTH-1 downto 0) := (others => '0');
signal ready_w, selector : std_logic := '0';
signal message_info_sub : MESSAGE_INFO_TYPE := EMPTY_MESSAGE_INFO;
--
signal goal_id_sub, goal_id_pub : std_logic_vector(UUID_WIDTH-1 downto 0) := (others => '0');
signal seq_len_sub, seq_len_pub, seq_addr_sub, seq_addr_pub : std_logic_vector(SEQ_ADDR_WIDTH-1 downto 0) := (others => '0');
signal seq_ready_sub, seq_ready_pub, seq_ren_sub, seq_ren_pub, seq_wen_pub, seq_valid_sub, seq_valid_pub, seq_ack_sub, seq_ack_pub : std_logic := '0';
signal seq_sub, seq_r_pub, seq_w_pub : std_logic_vector(CDR_LONG_WIDTH-1 downto 0) := (others => '0');
begin
uut_sub : entity work.Fibonacci_ros_action_feedback_sub(arch)
port map (
clk => clk,
reset => reset,
start_dds => start_r,--
ack_dds => '1',--
opcode_dds => open,
instance_state_dds => open,
view_state_dds => open,
sample_state_dds => open,
instance_handle_dds => open,
max_samples_dds => open,
get_data_dds => open,--
done_dds => '1',--
return_code_dds => return_code_r,--
valid_in_dds => valid,--
ready_in_dds => ready,--
data_in_dds => data,--
last_word_in_dds => last_word,--
si_sample_state_dds => ANY_SAMPLE_STATE,
si_view_state_dds => ANY_VIEW_STATE,
si_instance_state_dds => ANY_INSTANCE_STATE,
si_source_timestamp_dds => TIME_INVALID,
si_instance_handle_dds => HANDLE_NIL,
si_publication_handle_dds => HANDLE_NIL,
si_disposed_generation_count_dds => (others => '0'),
si_no_writers_generation_count_dds => (others => '0'),
si_sample_rank_dds => (others => '0'),
si_generation_rank_dds => (others => '0'),
si_absolute_generation_rank_dds => (others => '0'),
si_valid_data_dds => si_valid_data_r,--
si_valid_dds => '1',--
si_ack_dds => open,--
eoc_dds => '1',--
status_dds => (others => '0'),
start_user => start_sub,
opcode_user => opcode_sub,
ack_user => ack_sub,
done_user => done_sub,
return_code_user => return_code_sub,
data_available_user => open,
goal_id => goal_id_sub,
seq_len => seq_len_sub,
seq_addr => seq_addr_sub,
seq_ready => seq_ready_sub,
seq_ren => seq_ren_sub,
seq_valid => seq_valid_sub,
seq_ack => seq_ack_sub,
seq => seq_sub,
message_info_user => message_info_sub,
taken_user => taken_sub
);
uut_pub : entity work.Fibonacci_ros_action_feedback_pub(arch)
generic map (
LITTLE_ENDIAN => '1'
)
port map (
clk => clk,
reset => reset,
start_dds => open,--
ack_dds => '1',--
opcode_dds => open,
instance_handle_out_dds => open,
source_ts_dds => open,
max_wait_dds => open,
done_dds => '1',--
return_code_dds => return_code_w,--
instance_handle_in_dds => HANDLE_NIL,
valid_out_dds => valid,--
ready_out_dds => ready_w,--ready,--
data_out_dds => data,--
last_word_out_dds => last_word_out_w,--last_word,--
valid_in_dds => '0',
ready_in_dds => open,
data_in_dds => (others => '0'),
last_word_in_dds => '0',
status_dds => (others => '0'),
start_user => start_pub,--
ack_user => ack_pub,--
opcode_user => opcode_pub,--
goal_id => goal_id_pub,
seq_len => seq_len_pub,
seq_addr => seq_addr_pub,
seq_ready => seq_ready_pub,
seq_ren => seq_ren_pub,
seq_wen => seq_wen_pub,
seq_valid => seq_valid_pub,
seq_ack => seq_ack_pub,
seq_r => seq_r_pub,
seq_w => seq_w_pub,
done_user => done_pub,--
return_code_user => return_code_pub --
);
process (all)
begin
if (selector = '1') then
ready_w <= '1';
last_word <= '0';
else
ready_w <= ready;
last_word <= last_word_out_w;
end if;
end process;
stimulus_prc : process
variable RV : RandomPType;
variable GOAL_ID, SEQ : AlertLogIDType;
procedure wait_on_sig(signal sig : std_logic) is
begin
if (sig /= '1') then
wait on sig until sig = '1';
end if;
end procedure;
begin
SetAlertLogName("Fibonacci Action Feedback - Level 1 - (Little Endian) - General");
SetAlertEnable(FAILURE, TRUE);
SetAlertEnable(ERROR, TRUE);
SetAlertEnable(WARNING, TRUE);
SetLogEnable(DEBUG, FALSE);
SetLogEnable(PASSED, FALSE);
SetLogEnable(INFO, TRUE);
RV.InitSeed(RV'instance_name);
GOAL_ID := GetAlertLogID("GOAL_ID", ALERTLOG_BASE_ID);
SEQ := GetAlertLogID("SEQ", ALERTLOG_BASE_ID);
Log("Initial Reset", INFO);
selector <= '1';
return_code_r <= RETCODE_OK;
return_code_w <= RETCODE_OK;
si_valid_data_r <= '0';
start_sub <= '0';
start_pub <= '0';
reset <= '1';
wait until rising_edge(clk);
wait until rising_edge(clk);
reset <= '0';
Log("SUBSCRIBER: Test Unsupported Opcode", INFO);
start_sub <= '1';
opcode_sub <= PUBLISH;
wait_on_sig(ack_sub);
wait until rising_edge(clk);
start_sub <= '0';
wait_on_sig(done_sub);
wait for 1 ps; -- Make sure all signals stable
AlertIf(return_code_sub /= ROS_RET_UNSUPPORTED, "Unexpected Subscriber Response", FAILURE);
wait until rising_edge(clk);
Log("PUBLISHER: Test Unsupported Opcode", INFO);
start_pub <= '1';
opcode_pub <= TAKE;
wait_on_sig(ack_pub);
wait until rising_edge(clk);
start_pub <= '0';
wait_on_sig(done_pub);
wait for 1 ps; -- Make sure all signals stable
AlertIf(return_code_pub /= ROS_RET_UNSUPPORTED, "Unexpected Publisher Response", FAILURE);
wait until rising_edge(clk);
Log("SUBSCRIBER: Test No Data", INFO);
return_code_r <= RETCODE_NO_DATA;
start_sub <= '1';
opcode_sub <= TAKE;
wait_on_sig(ack_sub);
wait until rising_edge(clk);
start_sub <= '0';
wait_on_sig(done_sub);
wait for 1 ps; -- Make sure all signals stable
AlertIf(return_code_sub /= ROS_RET_OK, "Unexpected Subscriber Response", FAILURE);
AlertIf(taken_sub /= '0', "Subscriber taken is unexpectedly set", FAILURE);
wait until rising_edge(clk);
Log("SUBSCRIBER: Test Reader Error", INFO);
return_code_r <= RETCODE_ERROR;
start_sub <= '1';
opcode_sub <= TAKE;
wait_on_sig(ack_sub);
wait until rising_edge(clk);
start_sub <= '0';
wait_on_sig(done_sub);
wait for 1 ps; -- Make sure all signals stable
AlertIf(return_code_sub /= ROS_RET_ERROR, "Unexpected Subscriber Response", FAILURE);
wait until rising_edge(clk);
Log("PUBLISHER: Test Writer Error", INFO);
return_code_w <= RETCODE_ERROR;
start_pub <= '1';
opcode_pub <= PUBLISH;
wait_on_sig(ack_pub);
wait until rising_edge(clk);
start_pub <= '0';
wait_on_sig(done_pub);
wait for 1 ps; -- Make sure all signals stable
AlertIf(return_code_pub /= ROS_RET_ERROR, "Unexpected Publisher Response", FAILURE);
wait until rising_edge(clk);
return_code_r <= RETCODE_OK;
return_code_w <= RETCODE_OK;
selector <= '0';
Log("Setting Setting Data in Publisher Side", INFO);
goal_id_pub <= RV.RandSlv(goal_id_pub'length);
for i in 0 to 9 loop
seq_len_pub <= int(10,seq_len_pub'length);
seq_addr_pub <= int(i,seq_addr_pub'length);
seq_w_pub <= RV.RandSlv(seq_w_pub'length);
wait_on_sig(seq_ready_pub);
seq_wen_pub <= '1';
wait for TEST_CLOCK_PERIOD;
seq_wen_pub <= '0';
end loop;
Log("Publish message", INFO);
start_pub <= '1';
opcode_pub <= PUBLISH;
wait_on_sig(ack_pub);
wait until rising_edge(clk);
start_pub <= '0';
Log("Take message", INFO);
start_sub <= '1';
opcode_sub <= TAKE;
wait_on_sig(ack_sub);
wait until rising_edge(clk);
start_sub <= '0';
-- TEST NO VALID DATA
wait_on_sig(start_r);
wait until rising_edge(clk);
wait until rising_edge(clk);
wait_on_sig(start_r);
si_valid_data_r <= '1';
Log("Wait for Data", INFO);
wait_on_sig(done_sub);
wait until rising_edge(clk);
AlertIf(return_code_sub /= ROS_RET_OK, "Subscriber did Return ERROR", FAILURE);
AlertIf(taken_sub /= '1', "Subscriber did not take Message", FAILURE);
Log("Compare Messages", INFO);
AffirmIfEqual(GOAL_ID, goal_id_sub, goal_id_pub);
AffirmIfEqual(SEQ, seq_len_sub, seq_len_pub);
for i in 0 to to_integer(unsigned(seq_len_pub))-1 loop
seq_addr_pub <= int(i,seq_addr_pub'length);
seq_addr_sub <= int(i,seq_addr_sub'length);
wait_on_sig(seq_ready_pub);
wait_on_sig(seq_ready_sub);
seq_ren_pub <= '1';
seq_ren_sub <= '1';
wait for TEST_CLOCK_PERIOD;
seq_ren_pub <= '0';
seq_ren_sub <= '0';
wait_on_sig(seq_valid_pub);
wait_on_sig(seq_valid_sub);
AffirmIfEqual(SEQ, seq_sub, seq_r_pub);
seq_ack_pub <= '1';
seq_ack_sub <= '1';
wait for TEST_CLOCK_PERIOD;
seq_ack_pub <= '0';
seq_ack_sub <= '0';
end loop;
TranscriptOpen(RESULTS_FILE, APPEND_MODE);
SetTranscriptMirror;
ReportAlerts;
TranscriptClose;
std.env.stop;
wait;
end process;
clock_prc : process
begin
clk <= '0';
wait for TEST_CLOCK_PERIOD/2;
clk <= '1';
wait for TEST_CLOCK_PERIOD/2;
end process;
watchdog : process
begin
wait for 1 ms;
Alert("Test timeout", FAILURE);
std.env.stop;
end process;
end architecture;

342
src/ros2/Tests/Level_1/L1_GoalStatusArray_ros_test2.vhd Normal file
View File

@ -0,0 +1,342 @@
library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;
library osvvm; -- Utility Library
context osvvm.OsvvmContext;
use work.rtps_package.all;
use work.ros_package.all;
use work.rtps_test_package.all;
use work.GoalStatusArray_package.all;
-- This testbench tests the General Behavour of ROS publishers and subscribers
-- More specifically following tests are done:
-- * Test Unssuported Opcode Operations
-- * Test RETCODE_NO_DATA response from DDS Reader
-- * Test RETCODE_ERROR response from DDS Reader
-- * Test RETCODE_ERROR response from DDS Writer
-- * Test Sample with No Valid response from DDS Reader
-- * Test Little Endian Encoding/Decoding of Messages
entity L1_GoalStatusArray_ros_test2 is
end entity;
architecture testbench of L1_GoalStatusArray_ros_test2 is
signal clk, reset : std_logic := '0';
signal valid, ready, last_word, last_word_out_w : std_logic := '0';
signal data : std_logic_vector(WORD_WIDTH-1 downto 0) := (others => '0');
signal start_sub, start_pub, ack_sub, ack_pub, taken_sub, taken_pub, done_sub, done_pub : std_logic := '0';
signal opcode_sub, opcode_pub : ROS_TOPIC_OPCODE_TYPE := NOP;
signal return_code_sub, return_code_pub : std_logic_vector(ROS_RETCODE_WIDTH-1 downto 0) := (others => '0');
signal start_r, si_valid_data_r : std_logic := '0';
signal return_code_r, return_code_w : std_logic_vector(RETURN_CODE_WIDTH-1 downto 0) := (others => '0');
signal ready_w, selector : std_logic := '0';
signal message_info_sub : MESSAGE_INFO_TYPE := EMPTY_MESSAGE_INFO;
--
signal status_list_len_pub, status_list_len_sub, status_list_addr_pub, status_list_addr_sub : std_logic_vector(STATUS_LIST_ADDR_WIDTH-1 downto 0) := (others => '0');
signal status_list_ready_pub, status_list_ready_sub, status_list_ren_pub, status_list_ren_sub, status_list_valid_pub, status_list_valid_sub, status_list_ack_pub, status_list_ack_sub, status_list_wen_pub : std_logic := '0';
signal status_list_goal_info_goal_id_r_pub, status_list_goal_info_goal_id_w_pub, status_list_goal_info_goal_id_sub : std_logic_vector(UUID_WIDTH-1 downto 0) := (others => '0');
signal status_list_goal_info_stamp_r_pub, status_list_goal_info_stamp_w_pub, status_list_goal_info_stamp_sub : std_logic_vector(ROS_TIME_WIDTH-1 downto 0) := (others => '0');
signal status_list_status_r_pub, status_list_status_w_pub, status_list_status_sub : std_logic_vector(CDR_INT8_WIDTH-1 downto 0) := (others => '0');
begin
uut_sub : entity work.GoalStatusArray_ros_sub(arch)
port map (
clk => clk,
reset => reset,
start_dds => start_r,--
ack_dds => '1',--
opcode_dds => open,
instance_state_dds => open,
view_state_dds => open,
sample_state_dds => open,
instance_handle_dds => open,
max_samples_dds => open,
get_data_dds => open,--
done_dds => '1',--
return_code_dds => return_code_r,--
valid_in_dds => valid,--
ready_in_dds => ready,--
data_in_dds => data,--
last_word_in_dds => last_word,--
si_sample_state_dds => ANY_SAMPLE_STATE,
si_view_state_dds => ANY_VIEW_STATE,
si_instance_state_dds => ANY_INSTANCE_STATE,
si_source_timestamp_dds => TIME_INVALID,
si_instance_handle_dds => HANDLE_NIL,
si_publication_handle_dds => HANDLE_NIL,
si_disposed_generation_count_dds => (others => '0'),
si_no_writers_generation_count_dds => (others => '0'),
si_sample_rank_dds => (others => '0'),
si_generation_rank_dds => (others => '0'),
si_absolute_generation_rank_dds => (others => '0'),
si_valid_data_dds => si_valid_data_r,--
si_valid_dds => '1',--
si_ack_dds => open,--
eoc_dds => '1',--
status_dds => (others => '0'),
start_user => start_sub,
opcode_user => opcode_sub,
ack_user => ack_sub,
done_user => done_sub,
return_code_user => return_code_sub,
data_available_user => open,
status_list_len => status_list_len_sub,
status_list_addr => status_list_addr_sub,
status_list_ready => status_list_ready_sub,
status_list_ren => status_list_ren_sub,
status_list_valid => status_list_valid_sub,
status_list_ack => status_list_ack_sub,
status_list_goal_info_goal_id => status_list_goal_info_goal_id_sub,
status_list_goal_info_stamp => status_list_goal_info_stamp_sub,
status_list_status => status_list_status_sub,
message_info_user => message_info_sub,
taken_user => taken_sub
);
uut_pub : entity work.GoalStatusArray_ros_pub(arch)
generic map (
LITTLE_ENDIAN => '1'
)
port map (
clk => clk,
reset => reset,
start_dds => open,--
ack_dds => '1',--
opcode_dds => open,
instance_handle_out_dds => open,
source_ts_dds => open,
max_wait_dds => open,
done_dds => '1',--
return_code_dds => return_code_w,--
instance_handle_in_dds => HANDLE_NIL,
valid_out_dds => valid,--
ready_out_dds => ready_w,--ready,--
data_out_dds => data,--
last_word_out_dds => last_word_out_w,--last_word,--
valid_in_dds => '0',
ready_in_dds => open,
data_in_dds => (others => '0'),
last_word_in_dds => '0',
status_dds => (others => '0'),
start_user => start_pub,--
ack_user => ack_pub,--
opcode_user => opcode_pub,--
status_list_len => status_list_len_pub,
status_list_addr => status_list_addr_pub,
status_list_ready => status_list_ready_pub,
status_list_ren => status_list_ren_pub,
status_list_wen => status_list_wen_pub,
status_list_valid => status_list_valid_pub,
status_list_ack => status_list_ack_pub,
status_list_goal_info_goal_id_r => status_list_goal_info_goal_id_r_pub,
status_list_goal_info_goal_id_w => status_list_goal_info_goal_id_w_pub,
status_list_goal_info_stamp_r => status_list_goal_info_stamp_r_pub,
status_list_goal_info_stamp_w => status_list_goal_info_stamp_w_pub,
status_list_status_r => status_list_status_r_pub,
status_list_status_w => status_list_status_w_pub,
done_user => done_pub,--
return_code_user => return_code_pub --
);
process (all)
begin
if (selector = '1') then
ready_w <= '1';
last_word <= '0';
else
ready_w <= ready;
last_word <= last_word_out_w;
end if;
end process;
stimulus_prc : process
variable RV : RandomPType;
variable GOAL_ID, STAMP, STATUS : AlertLogIDType;
procedure wait_on_sig(signal sig : std_logic) is
begin
if (sig /= '1') then
wait on sig until sig = '1';
end if;
end procedure;
begin
SetAlertLogName("GoalStatusArray - Level 1 - (Little Endian) - General");
SetAlertEnable(FAILURE, TRUE);
SetAlertEnable(ERROR, TRUE);
SetAlertEnable(WARNING, TRUE);
SetLogEnable(DEBUG, FALSE);
SetLogEnable(PASSED, FALSE);
SetLogEnable(INFO, TRUE);
RV.InitSeed(RV'instance_name);
GOAL_ID := GetAlertLogID("GOAL_ID", ALERTLOG_BASE_ID);
STAMP := GetAlertLogID("STAMP", ALERTLOG_BASE_ID);
STATUS := GetAlertLogID("STATUS", ALERTLOG_BASE_ID);
Log("Initial Reset", INFO);
selector <= '1';
return_code_r <= RETCODE_OK;
return_code_w <= RETCODE_OK;
si_valid_data_r <= '0';
start_sub <= '0';
start_pub <= '0';
reset <= '1';
wait until rising_edge(clk);
wait until rising_edge(clk);
reset <= '0';
Log("SUBSCRIBER: Test Unsupported Opcode", INFO);
start_sub <= '1';
opcode_sub <= PUBLISH;
wait_on_sig(ack_sub);
wait until rising_edge(clk);
start_sub <= '0';
wait_on_sig(done_sub);
wait for 1 ps; -- Make sure all signals stable
AlertIf(return_code_sub /= ROS_RET_UNSUPPORTED, "Unexpected Subscriber Response", FAILURE);
wait until rising_edge(clk);
Log("PUBLISHER: Test Unsupported Opcode", INFO);
start_pub <= '1';
opcode_pub <= TAKE;
wait_on_sig(ack_pub);
wait until rising_edge(clk);
start_pub <= '0';
wait_on_sig(done_pub);
wait for 1 ps; -- Make sure all signals stable
AlertIf(return_code_pub /= ROS_RET_UNSUPPORTED, "Unexpected Publisher Response", FAILURE);
wait until rising_edge(clk);
Log("SUBSCRIBER: Test No Data", INFO);
return_code_r <= RETCODE_NO_DATA;
start_sub <= '1';
opcode_sub <= TAKE;
wait_on_sig(ack_sub);
wait until rising_edge(clk);
start_sub <= '0';
wait_on_sig(done_sub);
wait for 1 ps; -- Make sure all signals stable
AlertIf(return_code_sub /= ROS_RET_OK, "Unexpected Subscriber Response", FAILURE);
AlertIf(taken_sub /= '0', "Subscriber taken is unexpectedly set", FAILURE);
wait until rising_edge(clk);
Log("SUBSCRIBER: Test Reader Error", INFO);
return_code_r <= RETCODE_ERROR;
start_sub <= '1';
opcode_sub <= TAKE;
wait_on_sig(ack_sub);
wait until rising_edge(clk);
start_sub <= '0';
wait_on_sig(done_sub);
wait for 1 ps; -- Make sure all signals stable
AlertIf(return_code_sub /= ROS_RET_ERROR, "Unexpected Subscriber Response", FAILURE);
wait until rising_edge(clk);
Log("PUBLISHER: Test Writer Error", INFO);
return_code_w <= RETCODE_ERROR;
start_pub <= '1';
opcode_pub <= PUBLISH;
wait_on_sig(ack_pub);
wait until rising_edge(clk);
start_pub <= '0';
wait_on_sig(done_pub);
wait for 1 ps; -- Make sure all signals stable
AlertIf(return_code_pub /= ROS_RET_ERROR, "Unexpected Publisher Response", FAILURE);
wait until rising_edge(clk);
return_code_r <= RETCODE_OK;
return_code_w <= RETCODE_OK;
selector <= '0';
Log("Setting Setting Data in Publisher Side", INFO);
for i in 0 to 10 loop
status_list_len_pub <= int(11,status_list_len_pub'length);
status_list_addr_pub <= int(i,status_list_addr_pub'length);
status_list_goal_info_goal_id_w_pub <= RV.RandSlv(status_list_goal_info_goal_id_w_pub'length);
status_list_goal_info_stamp_w_pub <= RV.RandSlv(status_list_goal_info_stamp_w_pub'length);
status_list_status_w_pub <= RV.RandSlv(status_list_status_w_pub'length);
wait_on_sig(status_list_ready_pub);
status_list_wen_pub <= '1';
wait for TEST_CLOCK_PERIOD;
status_list_wen_pub <= '0';
end loop;
Log("Publish message", INFO);
start_pub <= '1';
opcode_pub <= PUBLISH;
wait_on_sig(ack_pub);
wait until rising_edge(clk);
start_pub <= '0';
Log("Take message", INFO);
start_sub <= '1';
opcode_sub <= TAKE;
wait_on_sig(ack_sub);
wait until rising_edge(clk);
start_sub <= '0';
-- TEST NO VALID DATA
wait_on_sig(start_r);
wait until rising_edge(clk);
wait until rising_edge(clk);
wait_on_sig(start_r);
si_valid_data_r <= '1';
Log("Wait for Data", INFO);
wait_on_sig(done_sub);
wait until rising_edge(clk);
AlertIf(return_code_sub /= ROS_RET_OK, "Subscriber did Return ERROR", FAILURE);
AlertIf(taken_sub /= '1', "Subscriber did not take Message", FAILURE);
Log("Compare Messages", INFO);
AffirmIfEqual(status_list_len_sub, status_list_len_pub);
for i in 0 to to_integer(unsigned(status_list_len_pub))-1 loop
status_list_addr_pub <= int(i,status_list_addr_pub'length);
status_list_addr_sub <= int(i,status_list_addr_sub'length);
wait_on_sig(status_list_ready_pub);
wait_on_sig(status_list_ready_sub);
status_list_ren_pub <= '1';
status_list_ren_sub <= '1';
wait for TEST_CLOCK_PERIOD;
status_list_ren_pub <= '0';
status_list_ren_sub <= '0';
wait_on_sig(status_list_valid_pub);
wait_on_sig(status_list_valid_sub);
AffirmIfEqual(GOAL_ID, status_list_goal_info_goal_id_sub, status_list_goal_info_goal_id_r_pub);
AffirmIfEqual(STAMP, status_list_goal_info_stamp_sub, status_list_goal_info_stamp_r_pub);
AffirmIfEqual(STATUS, status_list_status_sub, status_list_status_r_pub);
status_list_ack_pub <= '1';
status_list_ack_sub <= '1';
wait for TEST_CLOCK_PERIOD;
status_list_ack_pub <= '0';
status_list_ack_sub <= '0';
end loop;
TranscriptOpen(RESULTS_FILE, APPEND_MODE);
SetTranscriptMirror;
ReportAlerts;
TranscriptClose;
std.env.stop;
wait;
end process;
clock_prc : process
begin
clk <= '0';
wait for TEST_CLOCK_PERIOD/2;
clk <= '1';
wait for TEST_CLOCK_PERIOD/2;
end process;
watchdog : process
begin
wait for 1 ms;
Alert("Test timeout", FAILURE);
std.env.stop;
end process;
end architecture;

6
src/ros2/Tests/ros_testbench.pro
View File

@ -97,16 +97,20 @@ analyze ../example_interfaces/Fibonacci_package.vhd
analyze ../example_interfaces/Fibonacci_ros_action_feedback_pub.vhd
analyze ../example_interfaces/Fibonacci_ros_action_feedback_sub.vhd
analyze Level_1/L1_Fibonacci_ros_action_feedback_test1.vhd
analyze Level_1/L1_Fibonacci_ros_action_feedback_test2.vhd
analyze ../rcl_interfaces/action_msgs/GoalInfo_package.vhd
analyze ../rcl_interfaces/action_msgs/GoalStatus_package.vhd
analyze ../rcl_interfaces/action_msgs/GoalStatusArray_package.vhd
analyze ../rcl_interfaces/action_msgs/GoalStatusArray_ros_pub.vhd
analyze ../rcl_interfaces/action_msgs/GoalStatusArray_ros_sub.vhd
analyze Level_1/L1_GoalStatusArray_ros_test1.vhd
analyze Level_1/L1_GoalStatusArray_ros_test2.vhd
simulate L1_AddTwoInts_ros_srv_test1
simulate L1_AddTwoInts_ros_srv_test2
simulate L2_AddTwoInts_ros_srv_test1
simulate L1_Fibonacci_ros_action_feedback_test1
simulate L1_GoalStatusArray_ros_test1
simulate L1_Fibonacci_ros_action_feedback_test2
simulate L1_GoalStatusArray_ros_test1
simulate L1_GoalStatusArray_ros_test2

5
src/ros2/rcl_interfaces/action_msgs/GoalStatusArray_package.vhd
View File

@ -18,9 +18,10 @@ package GoalStatusArray_package is
constant MAX_STATUS_LIST_GOAL_INFO_STAMP_SEC_SIZE : natural := GoalInfo_package.MAX_STAMP_SEC_SIZE;
constant MAX_STATUS_LIST_GOAL_INFO_STAMP_NANOSEC_SIZE : natural := GoalInfo_package.MAX_STAMP_NANOSEC_SIZE;
constant MAX_STATUS_LIST_GOAL_INFO_STAMP_SIZE : natural := GoalInfo_package.MAX_STAMP_SIZE;
constant MAX_STATUS_LIST_GOAL_INFO_SIZE : natural := GoalInfo_package.MAX_GOALINFO_SIZE;
constant MAX_STATUS_LIST_STATUS_SIZE : natural := GoalStatus_package.MAX_STATUS_SIZE;
constant MAX_STATUS_LIST_SIZE : natural := GoalStatus_package.MAX_GOALSTATUS_SIZE;
constant MAX_STATUS_LIST_SIZE : natural := STATUS_LIST_MAX_DEPTH * (GoalStatus_package.MAX_GOALSTATUS_SIZE);
constant MAX_GOALSTATUSARRAY_SIZE : natural := STATUS_LIST_MAX_DEPTH * MAX_STATUS_LIST_SIZE;
constant MAX_GOALSTATUSARRAY_SIZE : natural := MAX_STATUS_LIST_SIZE;
end package;

9
src/ros2/rcl_interfaces/action_msgs/GoalStatusArray_ros_pub.vhd
View File

@ -180,7 +180,6 @@ begin
status_list_goal_info_stamp_mem_data_in <= status_list_goal_info_stamp_w;
status_list_status_r <= status_list_status_mem_data_out;
status_list_status_mem_data_in <= status_list_status_w;
-- ###GENERATED END###
main_prc : process (all)
@ -360,8 +359,7 @@ begin
status_list_goal_info_goal_id_mem_read <= '1';
-- Memory Operation Guard
if (status_list_goal_info_goal_id_mem_ready_in = '1') then
cnt_next <= cnt + 1;
uuid_cnt_next <= 0;
cnt_next <= cnt + 1;
end if;
-- WRITE
when 1 =>
@ -374,6 +372,7 @@ begin
status_list_goal_info_goal_id_mem_ready_out <= '1';
encode_stage_next <= WRITE_STATUS_LIST_GOAL_INFO_STAMP;
cnt_next <= 0;
uuid_cnt_next <= 0;
else
uuid_cnt_next <= uuid_cnt + 1;
end if;
@ -407,7 +406,7 @@ begin
when 1 =>
-- Memory Operation Guard
if (status_list_goal_info_stamp_mem_valid_out = '1') then
data_out_latch_next <= get_sub_vector(endian_swap(LITTLE_ENDIAN, status_list_goal_info_stamp_mem_data_out), 0, WORD_WIDTH, TRUE);
data_out_latch_next <= endian_swap(LITTLE_ENDIAN, get_sub_vector(status_list_goal_info_stamp_mem_data_out, 0, WORD_WIDTH, TRUE));
stage_next <= PUSH;
cnt_next <= cnt + 1;
end if;
@ -416,7 +415,7 @@ begin
status_list_goal_info_stamp_mem_ready_out <= '1';
-- Memory Operation Guard
if (status_list_goal_info_stamp_mem_valid_out = '1') then
data_out_latch_next <= get_sub_vector(endian_swap(LITTLE_ENDIAN, status_list_goal_info_stamp_mem_data_out), 1, WORD_WIDTH, TRUE);
data_out_latch_next <= endian_swap(LITTLE_ENDIAN, get_sub_vector(status_list_goal_info_stamp_mem_data_out, 1, WORD_WIDTH, TRUE));
stage_next <= PUSH;
align_offset_next <= align_offset + 8;
encode_stage_next <= WRITE_STATUS_LIST_STATUS;

2
src/ros2/rcl_interfaces/action_msgs/GoalStatusArray_ros_sub.vhd
View File

@ -456,6 +456,7 @@ begin
if (uuid_cnt = STATUS_LIST_GOAL_INFO_GOAL_ID_MAX_DEPTH-1) then
cnt_next <= cnt + 1;
uuid_cnt_next <= 0; -- Post-reset
else
uuid_cnt_next <= uuid_cnt + 1;
end if;
@ -467,7 +468,6 @@ begin
if (status_list_goal_info_goal_id_mem_ready_in = '1') then
decode_stage_next <= GET_STATUS_LIST_GOAL_INFO_STAMP;
cnt_next <= 0;
uuid_cnt_next <= 0; -- Post-reset
end if;
when others =>
null;