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Change memory format of rtps_writer to use double linked list

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This commit is contained in:
John Ring 2022-03-11 10:41:18 +01:00
parent 70f9a08802
commit 1e2a835c02
17 changed files with 922 additions and 737 deletions
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65
sim/L0_rtps_writer_test1_vbkdp.do Normal file
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@ -0,0 +1,65 @@
onerror {resume}
quietly WaveActivateNextPane {} 0
add wave -noupdate -divider SYSTEM
add wave -noupdate /l0_rtps_writer_test1_vbkdp/uut/clk
add wave -noupdate /l0_rtps_writer_test1_vbkdp/uut/reset
add wave -noupdate -divider INPUT
add wave -noupdate /l0_rtps_writer_test1_vbkdp/uut/empty_meta
add wave -noupdate /l0_rtps_writer_test1_vbkdp/uut/rd_meta
add wave -noupdate /l0_rtps_writer_test1_vbkdp/uut/last_word_in_meta
add wave -noupdate -radix hexadecimal /l0_rtps_writer_test1_vbkdp/uut/data_in_meta
add wave -noupdate -divider OUTPUT
add wave -noupdate /l0_rtps_writer_test1_vbkdp/uut/start_hc
add wave -noupdate /l0_rtps_writer_test1_vbkdp/uut/opcode_hc
add wave -noupdate /l0_rtps_writer_test1_vbkdp/uut/ack_hc
add wave -noupdate /l0_rtps_writer_test1_vbkdp/uut/done_hc
add wave -noupdate -divider {MAIN FSM}
add wave -noupdate /l0_rtps_writer_test1_vbkdp/uut/stage
add wave -noupdate /l0_rtps_writer_test1_vbkdp/uut/stage_next
add wave -noupdate /l0_rtps_writer_test1_vbkdp/uut/cnt
add wave -noupdate -divider {MEMORY FSM}
add wave -noupdate /l0_rtps_writer_test1_vbkdp/uut/mem_op_done
add wave -noupdate /l0_rtps_writer_test1_vbkdp/uut/mem_op_start
add wave -noupdate /l0_rtps_writer_test1_vbkdp/uut/mem_opcode
add wave -noupdate /l0_rtps_writer_test1_vbkdp/uut/mem_stage
add wave -noupdate /l0_rtps_writer_test1_vbkdp/uut/mem_cnt
add wave -noupdate -radix unsigned /l0_rtps_writer_test1_vbkdp/uut/mem_occupied_head
add wave -noupdate -radix unsigned /l0_rtps_writer_test1_vbkdp/uut/mem_empty_head
add wave -noupdate -radix unsigned /l0_rtps_writer_test1_vbkdp/uut/mem_prev_addr
add wave -noupdate /l0_rtps_writer_test1_vbkdp/uut/mem_prev_addr_valid
add wave -noupdate -radix unsigned /l0_rtps_writer_test1_vbkdp/uut/mem_addr_base
add wave -noupdate -expand -group MEM_CTRL -radix unsigned /l0_rtps_writer_test1_vbkdp/uut/mem_addr
add wave -noupdate -expand -group MEM_CTRL /l0_rtps_writer_test1_vbkdp/uut/mem_valid_in
add wave -noupdate -expand -group MEM_CTRL /l0_rtps_writer_test1_vbkdp/uut/mem_ready_in
add wave -noupdate -expand -group MEM_CTRL /l0_rtps_writer_test1_vbkdp/uut/mem_read
add wave -noupdate -expand -group MEM_CTRL -radix hexadecimal /l0_rtps_writer_test1_vbkdp/uut/mem_write_data
add wave -noupdate -expand -group MEM_CTRL /l0_rtps_writer_test1_vbkdp/uut/abort_read
add wave -noupdate -expand -group MEM_CTRL /l0_rtps_writer_test1_vbkdp/uut/mem_valid_out
add wave -noupdate -expand -group MEM_CTRL /l0_rtps_writer_test1_vbkdp/uut/mem_ready_out
add wave -noupdate -expand -group MEM_CTRL -radix hexadecimal /l0_rtps_writer_test1_vbkdp/uut/mem_read_data
add wave -noupdate -divider TESTBENCH
add wave -noupdate -group TESTBENCH /l0_rtps_writer_test1_vbkdp/start
add wave -noupdate -group TESTBENCH /l0_rtps_writer_test1_vbkdp/cnt_stim
add wave -noupdate -group TESTBENCH /l0_rtps_writer_test1_vbkdp/packet_sent
add wave -noupdate -group TESTBENCH /l0_rtps_writer_test1_vbkdp/mem_check_done
add wave -noupdate -group TESTBENCH /l0_rtps_writer_test1_vbkdp/stim_done
add wave -noupdate -group TESTBENCH /l0_rtps_writer_test1_vbkdp/test_done
add wave -noupdate -group TESTBENCH /l0_rtps_writer_test1_vbkdp/uut/idle_sig
TreeUpdate [SetDefaultTree]
WaveRestoreCursors {Begin {8325000 ps} 1} {Error {9725000 ps} 1} {Cursor {5753724 ps} 0}
quietly wave cursor active 3
configure wave -namecolwidth 150
configure wave -valuecolwidth 100
configure wave -justifyvalue left
configure wave -signalnamewidth 1
configure wave -snapdistance 10
configure wave -datasetprefix 0
configure wave -rowmargin 4
configure wave -childrowmargin 2
configure wave -gridoffset 0
configure wave -gridperiod 1
configure wave -griddelta 40
configure wave -timeline 0
configure wave -timelineunits ns
update
WaveRestoreZoom {0 ps} {1024 ns}

11
sim/L0_rtps_writer_test1_vrkdp.do
View File

@ -13,7 +13,6 @@ add wave -noupdate /l0_rtps_writer_test1_vrkdp/uut/start_hc
add wave -noupdate /l0_rtps_writer_test1_vrkdp/uut/opcode_hc add wave -noupdate /l0_rtps_writer_test1_vrkdp/uut/opcode_hc
add wave -noupdate /l0_rtps_writer_test1_vrkdp/uut/ack_hc add wave -noupdate /l0_rtps_writer_test1_vrkdp/uut/ack_hc
add wave -noupdate /l0_rtps_writer_test1_vrkdp/uut/done_hc add wave -noupdate /l0_rtps_writer_test1_vrkdp/uut/done_hc
add wave -noupdate -radix hexadecimal /l0_rtps_writer_test1_vrkdp/uut/data_out_hc
add wave -noupdate -divider {MAIN FSM} add wave -noupdate -divider {MAIN FSM}
add wave -noupdate /l0_rtps_writer_test1_vrkdp/uut/stage add wave -noupdate /l0_rtps_writer_test1_vrkdp/uut/stage
add wave -noupdate /l0_rtps_writer_test1_vrkdp/uut/stage_next add wave -noupdate /l0_rtps_writer_test1_vrkdp/uut/stage_next
@ -23,9 +22,11 @@ add wave -noupdate /l0_rtps_writer_test1_vrkdp/uut/mem_op_done
add wave -noupdate /l0_rtps_writer_test1_vrkdp/uut/mem_op_start add wave -noupdate /l0_rtps_writer_test1_vrkdp/uut/mem_op_start
add wave -noupdate /l0_rtps_writer_test1_vrkdp/uut/mem_opcode add wave -noupdate /l0_rtps_writer_test1_vrkdp/uut/mem_opcode
add wave -noupdate /l0_rtps_writer_test1_vrkdp/uut/mem_stage add wave -noupdate /l0_rtps_writer_test1_vrkdp/uut/mem_stage
add wave -noupdate /l0_rtps_writer_test1_vrkdp/uut/mem_stage_next
add wave -noupdate /l0_rtps_writer_test1_vrkdp/uut/mem_cnt add wave -noupdate /l0_rtps_writer_test1_vrkdp/uut/mem_cnt
add wave -noupdate /l0_rtps_writer_test1_vrkdp/uut/mem_pos add wave -noupdate -radix unsigned /l0_rtps_writer_test1_vrkdp/uut/mem_occupied_head
add wave -noupdate -radix unsigned /l0_rtps_writer_test1_vrkdp/uut/mem_empty_head
add wave -noupdate -radix unsigned /l0_rtps_writer_test1_vrkdp/uut/mem_prev_addr
add wave -noupdate /l0_rtps_writer_test1_vrkdp/uut/mem_prev_addr_valid
add wave -noupdate -radix unsigned /l0_rtps_writer_test1_vrkdp/uut/mem_addr_base add wave -noupdate -radix unsigned /l0_rtps_writer_test1_vrkdp/uut/mem_addr_base
add wave -noupdate -expand -group MEM_CTRL -radix unsigned /l0_rtps_writer_test1_vrkdp/uut/mem_addr add wave -noupdate -expand -group MEM_CTRL -radix unsigned /l0_rtps_writer_test1_vrkdp/uut/mem_addr
add wave -noupdate -expand -group MEM_CTRL /l0_rtps_writer_test1_vrkdp/uut/mem_valid_in add wave -noupdate -expand -group MEM_CTRL /l0_rtps_writer_test1_vrkdp/uut/mem_valid_in
@ -45,7 +46,7 @@ add wave -noupdate -group TESTBENCH /l0_rtps_writer_test1_vrkdp/stim_done
add wave -noupdate -group TESTBENCH /l0_rtps_writer_test1_vrkdp/test_done add wave -noupdate -group TESTBENCH /l0_rtps_writer_test1_vrkdp/test_done
add wave -noupdate -group TESTBENCH /l0_rtps_writer_test1_vrkdp/uut/idle_sig add wave -noupdate -group TESTBENCH /l0_rtps_writer_test1_vrkdp/uut/idle_sig
TreeUpdate [SetDefaultTree] TreeUpdate [SetDefaultTree]
WaveRestoreCursors {Begin {8325000 ps} 1} {Error {9725000 ps} 1} {Cursor {9175000 ps} 0} WaveRestoreCursors {Begin {8325000 ps} 1} {Error {9725000 ps} 1} {Cursor {5753724 ps} 0}
quietly wave cursor active 3 quietly wave cursor active 3
configure wave -namecolwidth 150 configure wave -namecolwidth 150
configure wave -valuecolwidth 100 configure wave -valuecolwidth 100
@ -61,4 +62,4 @@ configure wave -griddelta 40
configure wave -timeline 0 configure wave -timeline 0
configure wave -timelineunits ns configure wave -timelineunits ns
update update
WaveRestoreZoom {8888200 ps} {9912200 ps} WaveRestoreZoom {0 ps} {1024 ns}

6
src/REF.txt
View File

@ -406,7 +406,11 @@ WRITER
+ REQ_SEQ_NR_BASE + [Reliable Only] + REQ_SEQ_NR_BASE + [Reliable Only]
13| | 13| |
+---------------------------------------------------------------+ +---------------------------------------------------------------+
14| REQ_BITMAP | [Reliable Only] 14| REQ_BITMAP | [Reliable Only]
+---------------------------------------------------------------+
15| NEXT_ADDR |
+---------------------------------------------------------------+
16| PREV_ADDR |
+---------------------------------------------------------------+ +---------------------------------------------------------------+
READER_FLAGS READER_FLAGS

38
src/Tests/Level_0/L0_rtps_writer_test1_vbkdp.vhd
View File

@ -125,6 +125,8 @@ begin
variable p0, p1, participant : PARTICIPANT_DATA_TYPE := DEFAULT_PARTICIPANT_DATA; variable p0, p1, participant : PARTICIPANT_DATA_TYPE := DEFAULT_PARTICIPANT_DATA;
variable e0, e1, e2, e3, endpoint : ENDPOINT_DATA_TYPE := DEFAULT_ENDPOINT_DATA; variable e0, e1, e2, e3, endpoint : ENDPOINT_DATA_TYPE := DEFAULT_ENDPOINT_DATA;
alias empty_head is <<signal uut.empty_head_sig : natural>>;
-- Wrapper to use procedure as function -- Wrapper to use procedure as function
impure function gen_rand_loc_2 return LOCATOR_TYPE is impure function gen_rand_loc_2 return LOCATOR_TYPE is
variable ret : LOCATOR_TYPE := EMPTY_LOCATOR; variable ret : LOCATOR_TYPE := EMPTY_LOCATOR;
@ -196,7 +198,7 @@ begin
wait until rising_edge(clk); wait until rising_edge(clk);
wait until rising_edge(clk); wait until rising_edge(clk);
reset <= '0'; reset <= '0';
-- MEMORY STATE -/0,8,16
Log("Insert Endpoint 0 Participant 0", INFO); Log("Insert Endpoint 0 Participant 0", INFO);
endpoint := e0; endpoint := e0;
@ -208,7 +210,8 @@ begin
wait_on_sent; wait_on_sent;
stimulus := EMPTY_TEST_PACKET; stimulus := EMPTY_TEST_PACKET;
wait_on_mem_check; wait_on_mem_check;
-- MEMORY STATE [p0e0,0,0] AlertIf(empty_head /= 8, "Memory Empty List Head incorrect", FAILURE);
-- MEMORY STATE 0(P0E0)/8,16
Log("Insert Endpoint 1 Participant 0", INFO); Log("Insert Endpoint 1 Participant 0", INFO);
endpoint := e1; endpoint := e1;
@ -220,7 +223,8 @@ begin
wait_on_sent; wait_on_sent;
stimulus := EMPTY_TEST_PACKET; stimulus := EMPTY_TEST_PACKET;
wait_on_mem_check; wait_on_mem_check;
-- MEMORY STATE [p0e0,p0e1,0] AlertIf(empty_head /= 16, "Memory Empty List Head incorrect", FAILURE);
-- MEMORY STATE 8(P0E1),0(P0E0)/16
Log("Insert Endpoint 2 Participant 1", INFO); Log("Insert Endpoint 2 Participant 1", INFO);
endpoint := e2; endpoint := e2;
@ -232,7 +236,8 @@ begin
wait_on_sent; wait_on_sent;
stimulus := EMPTY_TEST_PACKET; stimulus := EMPTY_TEST_PACKET;
wait_on_mem_check; wait_on_mem_check;
-- MEMORY STATE [p0e0,p0e1,p1e2] AlertIf(empty_head /= 23, "Memory Empty List Head incorrect", FAILURE);
-- MEMORY STATE 16(P1E2),8(P0E1),0(P0E0)/-
Log("Ignore Endpoint 3 Participant 1 [Memory Full]", INFO); Log("Ignore Endpoint 3 Participant 1 [Memory Full]", INFO);
endpoint := e3; endpoint := e3;
@ -255,19 +260,20 @@ begin
wait_on_sent; wait_on_sent;
stimulus := EMPTY_TEST_PACKET; stimulus := EMPTY_TEST_PACKET;
wait_on_mem_check; wait_on_mem_check;
-- MEMORY STATE [p0e0,p0e1,p1e3] AlertIf(empty_head /= 23, "Memory Empty List Head incorrect", FAILURE);
-- MEMORY STATE 16(P1E2),8(P0E1),0(P0E0)/-
Log("Remove Endpoint 2 Participant 1", INFO); Log("Remove Endpoint 2 Participant 1", INFO);
endpoint := e2; endpoint := e2;
endpoint.nr := 2; endpoint.nr := 2;
endpoint.match := UNMATCH; endpoint.match := UNMATCH;
gen_endpoint_match_frame(endpoint, stimulus); gen_endpoint_match_frame(endpoint, stimulus);
SB_mem.Push(gen_reader_endpoint_mem_frame_b(endpoint));
start_test; start_test;
wait_on_sent; wait_on_sent;
stimulus := EMPTY_TEST_PACKET; stimulus := EMPTY_TEST_PACKET;
wait_on_mem_check; wait_on_mem_check;
-- MEMORY STATE [p0e0,p0e1,0] AlertIf(empty_head /= 16, "Memory Empty List Head incorrect", FAILURE);
-- MEMORY STATE 8(P0E1),0(P0E0)/16
Log("Insert Endpoint 3 Participant 1", INFO); Log("Insert Endpoint 3 Participant 1", INFO);
endpoint := e3; endpoint := e3;
@ -279,7 +285,8 @@ begin
wait_on_sent; wait_on_sent;
stimulus := EMPTY_TEST_PACKET; stimulus := EMPTY_TEST_PACKET;
wait_on_mem_check; wait_on_mem_check;
-- MEMORY STATE [p0e0,p0e1,p1e3] AlertIf(empty_head /= 23, "Memory Empty List Head incorrect", FAILURE);
-- MEMORY STATE 16(P1E3),8(P0E1),0(P0E0)/-
Log("Remove Participant 0", INFO); Log("Remove Participant 0", INFO);
participant := p0; participant := p0;
@ -289,17 +296,16 @@ begin
endpoint := e0; endpoint := e0;
endpoint.nr := 0; endpoint.nr := 0;
endpoint.match := UNMATCH; endpoint.match := UNMATCH;
SB_mem.Push(gen_reader_endpoint_mem_frame_b(endpoint));
-- Remove Endpoint 1 -- Remove Endpoint 1
endpoint := e1; endpoint := e1;
endpoint.nr := 1; endpoint.nr := 1;
endpoint.match := UNMATCH; endpoint.match := UNMATCH;
SB_mem.Push(gen_reader_endpoint_mem_frame_b(endpoint));
start_test; start_test;
wait_on_sent; wait_on_sent;
stimulus := EMPTY_TEST_PACKET; stimulus := EMPTY_TEST_PACKET;
wait_on_mem_check; wait_on_mem_check;
-- MEMORY STATE [0,0,p1e3] AlertIf(empty_head /= 0, "Memory Empty List Head incorrect", FAILURE);
-- MEMORY STATE 16(P1E3)/0,8
Log("Insert Endpoint 2 Participant 1", INFO); Log("Insert Endpoint 2 Participant 1", INFO);
endpoint := e2; endpoint := e2;
@ -311,7 +317,8 @@ begin
wait_on_sent; wait_on_sent;
stimulus := EMPTY_TEST_PACKET; stimulus := EMPTY_TEST_PACKET;
wait_on_mem_check; wait_on_mem_check;
-- MEMORY STATE [p1e2,0,p1e3] AlertIf(empty_head /= 8, "Memory Empty List Head incorrect", FAILURE);
-- MEMORY STATE 0(P1E2),16(P1E3)/8
Log("Unknown Metatraffic Operation followed by insertion of Enpoint 0 Participant 0", INFO); Log("Unknown Metatraffic Operation followed by insertion of Enpoint 0 Participant 0", INFO);
for i in 0 to 9 loop for i in 0 to 9 loop
@ -340,7 +347,8 @@ begin
wait_on_sent; wait_on_sent;
stimulus := EMPTY_TEST_PACKET; stimulus := EMPTY_TEST_PACKET;
wait_on_mem_check; wait_on_mem_check;
-- MEMORY STATE [p1e2,p0e0,p1e3] AlertIf(empty_head /= 23, "Memory Empty List Head incorrect", FAILURE);
-- MEMORY STATE 8(P0E0),0(P1E2),16(P1E3)/-
Log("Update Endpoint 2 Participant 1", INFO); Log("Update Endpoint 2 Participant 1", INFO);
endpoint := e2; endpoint := e2;
@ -353,8 +361,8 @@ begin
wait_on_sent; wait_on_sent;
stimulus := EMPTY_TEST_PACKET; stimulus := EMPTY_TEST_PACKET;
wait_on_mem_check; wait_on_mem_check;
-- MEMORY STATE [p1e2,p0e0,p1e3] AlertIf(empty_head /= 23, "Memory Empty List Head incorrect", FAILURE);
-- MEMORY STATE 8(P0E0),0(P1E2),16(P1E3)/-
stim_done <= '1'; stim_done <= '1';

38
src/Tests/Level_0/L0_rtps_writer_test1_vrkdp.vhd
View File

@ -125,6 +125,8 @@ begin
variable p0, p1, participant : PARTICIPANT_DATA_TYPE := DEFAULT_PARTICIPANT_DATA; variable p0, p1, participant : PARTICIPANT_DATA_TYPE := DEFAULT_PARTICIPANT_DATA;
variable e0, e1, e2, e3, endpoint : ENDPOINT_DATA_TYPE := DEFAULT_ENDPOINT_DATA; variable e0, e1, e2, e3, endpoint : ENDPOINT_DATA_TYPE := DEFAULT_ENDPOINT_DATA;
alias empty_head is <<signal uut.empty_head_sig : natural>>;
-- Wrapper to use procedure as function -- Wrapper to use procedure as function
impure function gen_rand_loc_2 return LOCATOR_TYPE is impure function gen_rand_loc_2 return LOCATOR_TYPE is
variable ret : LOCATOR_TYPE := EMPTY_LOCATOR; variable ret : LOCATOR_TYPE := EMPTY_LOCATOR;
@ -196,6 +198,7 @@ begin
wait until rising_edge(clk); wait until rising_edge(clk);
wait until rising_edge(clk); wait until rising_edge(clk);
reset <= '0'; reset <= '0';
-- MEMORY STATE -/0,17,34
Log("Insert Endpoint 0 Participant 0", INFO); Log("Insert Endpoint 0 Participant 0", INFO);
@ -208,7 +211,8 @@ begin
wait_on_sent; wait_on_sent;
stimulus := EMPTY_TEST_PACKET; stimulus := EMPTY_TEST_PACKET;
wait_on_mem_check; wait_on_mem_check;
-- MEMORY STATE [p0e0,0,0] AlertIf(empty_head /= 17, "Memory Empty List Head incorrect", FAILURE);
-- MEMORY STATE 0(P0E0)/17,34
Log("Insert Endpoint 1 Participant 0", INFO); Log("Insert Endpoint 1 Participant 0", INFO);
endpoint := e1; endpoint := e1;
@ -220,7 +224,8 @@ begin
wait_on_sent; wait_on_sent;
stimulus := EMPTY_TEST_PACKET; stimulus := EMPTY_TEST_PACKET;
wait_on_mem_check; wait_on_mem_check;
-- MEMORY STATE [p0e0,p0e1,0] AlertIf(empty_head /= 34, "Memory Empty List Head incorrect", FAILURE);
-- MEMORY STATE 17(P0E1),0(P0E0)/34
Log("Insert Endpoint 2 Participant 1", INFO); Log("Insert Endpoint 2 Participant 1", INFO);
endpoint := e2; endpoint := e2;
@ -232,7 +237,8 @@ begin
wait_on_sent; wait_on_sent;
stimulus := EMPTY_TEST_PACKET; stimulus := EMPTY_TEST_PACKET;
wait_on_mem_check; wait_on_mem_check;
-- MEMORY STATE [p0e0,p0e1,p1e2] AlertIf(empty_head /= 50, "Memory Empty List Head incorrect", FAILURE);
-- MEMORY STATE 34(P1E2),17(P0E1),0(P0E0)/-
Log("Ignore Endpoint 3 Participant 1 [Memory Full]", INFO); Log("Ignore Endpoint 3 Participant 1 [Memory Full]", INFO);
endpoint := e3; endpoint := e3;
@ -255,19 +261,20 @@ begin
wait_on_sent; wait_on_sent;
stimulus := EMPTY_TEST_PACKET; stimulus := EMPTY_TEST_PACKET;
wait_on_mem_check; wait_on_mem_check;
-- MEMORY STATE [p0e0,p0e1,p1e3] AlertIf(empty_head /= 50, "Memory Empty List Head incorrect", FAILURE);
-- MEMORY STATE 34(P1E2),17(P0E1),0(P0E0)/-
Log("Remove Endpoint 2 Participant 1", INFO); Log("Remove Endpoint 2 Participant 1", INFO);
endpoint := e2; endpoint := e2;
endpoint.nr := 2; endpoint.nr := 2;
endpoint.match := UNMATCH; endpoint.match := UNMATCH;
gen_endpoint_match_frame(endpoint, stimulus); gen_endpoint_match_frame(endpoint, stimulus);
SB_mem.Push(gen_reader_endpoint_mem_frame_a(endpoint));
start_test; start_test;
wait_on_sent; wait_on_sent;
stimulus := EMPTY_TEST_PACKET; stimulus := EMPTY_TEST_PACKET;
wait_on_mem_check; wait_on_mem_check;
-- MEMORY STATE [p0e0,p0e1,0] AlertIf(empty_head /= 34, "Memory Empty List Head incorrect", FAILURE);
-- MEMORY STATE 17(P0E1),0(P0E0)/34
Log("Insert Endpoint 3 Participant 1", INFO); Log("Insert Endpoint 3 Participant 1", INFO);
endpoint := e3; endpoint := e3;
@ -279,7 +286,8 @@ begin
wait_on_sent; wait_on_sent;
stimulus := EMPTY_TEST_PACKET; stimulus := EMPTY_TEST_PACKET;
wait_on_mem_check; wait_on_mem_check;
-- MEMORY STATE [p0e0,p0e1,p1e3] AlertIf(empty_head /= 50, "Memory Empty List Head incorrect", FAILURE);
-- MEMORY STATE 34(P1E3),17(P0E1),0(P0E0)/-
Log("Remove Participant 0", INFO); Log("Remove Participant 0", INFO);
participant := p0; participant := p0;
@ -289,17 +297,16 @@ begin
endpoint := e0; endpoint := e0;
endpoint.nr := 0; endpoint.nr := 0;
endpoint.match := UNMATCH; endpoint.match := UNMATCH;
SB_mem.Push(gen_reader_endpoint_mem_frame_a(endpoint));
-- Remove Endpoint 1 -- Remove Endpoint 1
endpoint := e1; endpoint := e1;
endpoint.nr := 1; endpoint.nr := 1;
endpoint.match := UNMATCH; endpoint.match := UNMATCH;
SB_mem.Push(gen_reader_endpoint_mem_frame_a(endpoint));
start_test; start_test;
wait_on_sent; wait_on_sent;
stimulus := EMPTY_TEST_PACKET; stimulus := EMPTY_TEST_PACKET;
wait_on_mem_check; wait_on_mem_check;
-- MEMORY STATE [0,0,p1e3] AlertIf(empty_head /= 0, "Memory Empty List Head incorrect", FAILURE);
-- MEMORY STATE 34(P1E3)/0,17
Log("Insert Endpoint 2 Participant 1", INFO); Log("Insert Endpoint 2 Participant 1", INFO);
endpoint := e2; endpoint := e2;
@ -311,7 +318,8 @@ begin
wait_on_sent; wait_on_sent;
stimulus := EMPTY_TEST_PACKET; stimulus := EMPTY_TEST_PACKET;
wait_on_mem_check; wait_on_mem_check;
-- MEMORY STATE [p1e2,0,p1e3] AlertIf(empty_head /= 17, "Memory Empty List Head incorrect", FAILURE);
-- MEMORY STATE 0(P1E2),34(P1E3)/17
Log("Unknown Metatraffic Operation followed by insertion of Enpoint 0 Participant 0", INFO); Log("Unknown Metatraffic Operation followed by insertion of Enpoint 0 Participant 0", INFO);
for i in 0 to 9 loop for i in 0 to 9 loop
@ -340,7 +348,8 @@ begin
wait_on_sent; wait_on_sent;
stimulus := EMPTY_TEST_PACKET; stimulus := EMPTY_TEST_PACKET;
wait_on_mem_check; wait_on_mem_check;
-- MEMORY STATE [p1e2,p0e0,p1e3] AlertIf(empty_head /= 50, "Memory Empty List Head incorrect", FAILURE);
-- MEMORY STATE 17(E0P0),0(P1E2),34(P1E3)/-
Log("Update Endpoint 2 Participant 1", INFO); Log("Update Endpoint 2 Participant 1", INFO);
endpoint := e2; endpoint := e2;
@ -353,9 +362,8 @@ begin
wait_on_sent; wait_on_sent;
stimulus := EMPTY_TEST_PACKET; stimulus := EMPTY_TEST_PACKET;
wait_on_mem_check; wait_on_mem_check;
-- MEMORY STATE [p1e2,p0e0,p1e3] AlertIf(empty_head /= 50, "Memory Empty List Head incorrect", FAILURE);
-- MEMORY STATE 17(E0P0),0(P1E2),34(P1E3)/-
stim_done <= '1'; stim_done <= '1';
wait_on_completion; wait_on_completion;

77
src/Tests/Level_0/L0_rtps_writer_test2_vrkdp.vhd
View File

@ -110,6 +110,7 @@ begin
variable sub : RTPS_SUBMESSAGE_TYPE := DEFAULT_RTPS_SUBMESSAGE; variable sub : RTPS_SUBMESSAGE_TYPE := DEFAULT_RTPS_SUBMESSAGE;
alias idle_sig is <<signal uut.idle_sig : std_logic>>; alias idle_sig is <<signal uut.idle_sig : std_logic>>;
alias empty_head is <<signal uut.empty_head_sig : natural>>;
-- Wrapper to use procedure as function -- Wrapper to use procedure as function
impure function gen_rand_loc_2 return LOCATOR_TYPE is impure function gen_rand_loc_2 return LOCATOR_TYPE is
@ -231,6 +232,11 @@ begin
wait until rising_edge(clk); wait until rising_edge(clk);
wait until rising_edge(clk); wait until rising_edge(clk);
reset <= '0'; reset <= '0';
wait until rising_edge(clk);
start_mem_check;
wait_on_mem_check;
AlertIf(empty_head /= 0, "Memory Empty List Head incorrect", FAILURE);
-- MEMORY STATE -/0,17,34
Log("Insert Endpoint 0", INFO); Log("Insert Endpoint 0", INFO);
@ -245,7 +251,8 @@ begin
stimulus_user := EMPTY_TEST_PACKET; stimulus_user := EMPTY_TEST_PACKET;
start_mem_check; start_mem_check;
wait_on_mem_check; wait_on_mem_check;
-- MEMORY STATE [e0,0,0] AlertIf(empty_head /= 17, "Memory Empty List Head incorrect", FAILURE);
-- MEMORY STATE 0(E0)/17,34
Log("Insert Endpoint 1", INFO); Log("Insert Endpoint 1", INFO);
endpoint := e1; endpoint := e1;
@ -259,7 +266,8 @@ begin
stimulus_user := EMPTY_TEST_PACKET; stimulus_user := EMPTY_TEST_PACKET;
start_mem_check; start_mem_check;
wait_on_mem_check; wait_on_mem_check;
-- MEMORY STATE [e0,e1,0] AlertIf(empty_head /= 34, "Memory Empty List Head incorrect", FAILURE);
-- MEMORY STATE 17(E1),0(E0)/34
Log("Insert Endpoint 2", INFO); Log("Insert Endpoint 2", INFO);
endpoint := e2; endpoint := e2;
@ -273,7 +281,8 @@ begin
stimulus_user := EMPTY_TEST_PACKET; stimulus_user := EMPTY_TEST_PACKET;
start_mem_check; start_mem_check;
wait_on_mem_check; wait_on_mem_check;
-- MEMORY STATE [e0,e1,e2] AlertIf(empty_head /= 50, "Memory Empty List Head incorrect", FAILURE);
-- MEMORY STATE 34(E2),17(E1),0(E0)/-
Log("Current Time: 0.5s", INFO); Log("Current Time: 0.5s", INFO);
test_time <= gen_duration(0,500); test_time <= gen_duration(0,500);
@ -296,33 +305,15 @@ begin
stimulus_user := EMPTY_TEST_PACKET; stimulus_user := EMPTY_TEST_PACKET;
wait_on_idle; wait_on_idle;
Log("Current Time: 1s", INFO); Log("Current Time: 1s [Removal of Enpoint 0]", INFO);
test_time <= gen_duration(1,0); test_time <= gen_duration(1,0);
wait until rising_edge(clk); wait until rising_edge(clk);
wait until rising_edge(clk); -- Allow idle_sig to go low wait until rising_edge(clk); -- Allow idle_sig to go low
start_mem_check;
wait_on_mem_check;
AlertIf(empty_head /= 0, "Memory Empty List Head incorrect", FAILURE);
wait_on_idle; wait_on_idle;
-- MEMORY STATE 34(E2),17(E1)/0
Log("Check Removal of Endpoint 0", INFO);
-- Re-check Mem-State
endpoint := e0;
endpoint.nr := 0;
endpoint.match := UNMATCH;
SB_mem.Push(gen_reader_endpoint_mem_frame_a(endpoint));
start_mem_check;
wait_on_mem_check;
endpoint := e1;
endpoint.nr := 1;
endpoint.match := MATCH;
SB_mem.Push(gen_reader_endpoint_mem_frame_a(endpoint));
start_mem_check;
wait_on_mem_check;
endpoint := e2;
endpoint.nr := 2;
endpoint.match := MATCH;
SB_mem.Push(gen_reader_endpoint_mem_frame_a(endpoint));
start_mem_check;
wait_on_mem_check;
-- MEMORY STATE [0,e1,e2]
Log("Insert Endpoint 3", INFO); Log("Insert Endpoint 3", INFO);
endpoint := e3; endpoint := e3;
@ -336,35 +327,18 @@ begin
stimulus_user := EMPTY_TEST_PACKET; stimulus_user := EMPTY_TEST_PACKET;
start_mem_check; start_mem_check;
wait_on_mem_check; wait_on_mem_check;
-- MEMORY STATE [e3,e1,e2] AlertIf(empty_head /= 50, "Memory Empty List Head incorrect", FAILURE);
-- MEMORY STATE 0(E3),34(E2),17(E1)/-
Log("Current Time: 1.5s", INFO); Log("Current Time: 1.5s [Removal of Enpoint 2]", INFO);
test_time <= gen_duration(1,500); test_time <= gen_duration(1,500);
wait until rising_edge(clk); wait until rising_edge(clk);
wait until rising_edge(clk); -- Allow idle_sig to go low wait until rising_edge(clk); -- Allow idle_sig to go low
start_mem_check;
wait_on_mem_check;
AlertIf(empty_head /= 34, "Memory Empty List Head incorrect", FAILURE);
wait_on_idle; wait_on_idle;
-- MEMORY STATE 0(E3),17(E1)/34
Log("Check Removal of Endpoint 2", INFO);
-- Re-check Mem-State
endpoint := e3;
endpoint.nr := 0;
endpoint.match := MATCH;
SB_mem.Push(gen_reader_endpoint_mem_frame_a(endpoint));
start_mem_check;
wait_on_mem_check;
endpoint := e1;
endpoint.nr := 1;
endpoint.match := MATCH;
SB_mem.Push(gen_reader_endpoint_mem_frame_a(endpoint));
start_mem_check;
wait_on_mem_check;
endpoint := e2;
endpoint.nr := 2;
endpoint.match := UNMATCH;
SB_mem.Push(gen_reader_endpoint_mem_frame_a(endpoint));
start_mem_check;
wait_on_mem_check;
-- MEMORY STATE [e3,e1,0]
Log("Current Time: 2s", INFO); Log("Current Time: 2s", INFO);
test_time <= gen_duration(2,0); test_time <= gen_duration(2,0);
@ -386,7 +360,8 @@ begin
SB_mem.Push(gen_reader_endpoint_mem_frame_a(endpoint)); SB_mem.Push(gen_reader_endpoint_mem_frame_a(endpoint));
start_mem_check; start_mem_check;
wait_on_mem_check; wait_on_mem_check;
-- MEMORY STATE [e3,e1,0] AlertIf(empty_head /= 34, "Memory Empty List Head incorrect", FAILURE);
-- MEMORY STATE 0(E3),17(E1)/34
stim_done <= '1'; stim_done <= '1';
wait_on_completion; wait_on_completion;

8
src/Tests/Level_1/L1_rtps_writer_test1_tbkdp.vhd
View File

@ -598,14 +598,14 @@ begin
wait until rising_edge(clk); wait until rising_edge(clk);
push_hc(ACK_CACHE_CHANGE, gen_sn(16)); push_hc(ACK_CACHE_CHANGE, gen_sn(16));
gen_header(e1);
gen_data(e1, test_cc(6));
push_reference;
wait_on_out_check;
gen_header(e4); gen_header(e4);
gen_data(e4, test_cc(6)); gen_data(e4, test_cc(6));
push_reference; push_reference;
wait_on_out_check; wait_on_out_check;
gen_header(e1);
gen_data(e1, test_cc(6));
push_reference;
wait_on_out_check;
wait_on_idle; wait_on_idle;
check_gsn(SEQUENCENUMBER_UNKNOWN); check_gsn(SEQUENCENUMBER_UNKNOWN);

96
src/Tests/Level_1/L1_rtps_writer_test1_trkdp.vhd
View File

@ -432,14 +432,14 @@ begin
new_cc <= '0'; new_cc <= '0';
wait until rising_edge(clk); wait until rising_edge(clk);
gen_header(e1);
gen_data(e1, test_cc(0));
push_reference;
wait_on_out_check;
gen_header(e3); gen_header(e3);
gen_data(e3, test_cc(0)); gen_data(e3, test_cc(0));
push_reference; push_reference;
wait_on_out_check; wait_on_out_check;
gen_header(e1);
gen_data(e1, test_cc(0));
push_reference;
wait_on_out_check;
wait_on_idle; wait_on_idle;
check_gsn(gen_sn(0)); check_gsn(gen_sn(0));
@ -481,22 +481,22 @@ begin
new_cc <= '0'; new_cc <= '0';
wait until rising_edge(clk); wait until rising_edge(clk);
gen_header(e1);
gen_data(e1, test_cc(1));
push_reference;
wait_on_out_check;
gen_header(e3); gen_header(e3);
gen_data(e3, test_cc(1)); gen_data(e3, test_cc(1));
push_reference; push_reference;
wait_on_out_check; wait_on_out_check;
gen_header(e1); gen_header(e1);
gen_data(e1, test_cc(2)); gen_data(e1, test_cc(1));
push_reference; push_reference;
wait_on_out_check; wait_on_out_check;
gen_header(e3); gen_header(e3);
gen_data(e3, test_cc(2)); gen_data(e3, test_cc(2));
push_reference; push_reference;
wait_on_out_check; wait_on_out_check;
gen_header(e1);
gen_data(e1, test_cc(2));
push_reference;
wait_on_out_check;
wait_on_idle; wait_on_idle;
check_gsn(gen_sn(1)); check_gsn(gen_sn(1));
@ -616,36 +616,36 @@ begin
new_cc <= '0'; new_cc <= '0';
wait until rising_edge(clk); wait until rising_edge(clk);
gen_header(e1); gen_header(e2);
gen_data(e1, test_cc(3)); gen_data(e2, test_cc(3));
push_reference;
wait_on_out_check;
gen_header(e3);
gen_data(e3, test_cc(3));
push_reference; push_reference;
wait_on_out_check; wait_on_out_check;
gen_header(e0); gen_header(e0);
gen_data(e0, test_cc(3)); gen_data(e0, test_cc(3));
push_reference; push_reference;
wait_on_out_check; wait_on_out_check;
gen_header(e2); gen_header(e3);
gen_data(e2, test_cc(3)); gen_data(e3, test_cc(3));
push_reference; push_reference;
wait_on_out_check; wait_on_out_check;
gen_header(e1); gen_header(e1);
gen_data(e1, test_cc(4)); gen_data(e1, test_cc(3));
push_reference; push_reference;
wait_on_out_check; wait_on_out_check;
gen_header(e3); gen_header(e2);
gen_data(e3, test_cc(4)); gen_data(e2, test_cc(4));
push_reference; push_reference;
wait_on_out_check; wait_on_out_check;
gen_header(e0); gen_header(e0);
gen_data(e0, test_cc(4)); gen_data(e0, test_cc(4));
push_reference; push_reference;
wait_on_out_check; wait_on_out_check;
gen_header(e2); gen_header(e3);
gen_data(e2, test_cc(4)); gen_data(e3, test_cc(4));
push_reference;
wait_on_out_check;
gen_header(e1);
gen_data(e1, test_cc(4));
push_reference; push_reference;
wait_on_out_check; wait_on_out_check;
wait_on_idle; wait_on_idle;
@ -755,52 +755,52 @@ begin
new_cc <= '0'; new_cc <= '0';
wait until rising_edge(clk); wait until rising_edge(clk);
gen_header(e1); gen_header(e2);
gen_data(e1, test_cc(3)); gen_data(e2, test_cc(3));
push_reference;
wait_on_out_check;
gen_header(e3);
gen_data(e3, test_cc(3));
push_reference; push_reference;
wait_on_out_check; wait_on_out_check;
gen_header(e0); gen_header(e0);
gen_data(e0, test_cc(3)); gen_data(e0, test_cc(3));
push_reference; push_reference;
wait_on_out_check; wait_on_out_check;
gen_header(e2); gen_header(e3);
gen_data(e2, test_cc(3)); gen_data(e3, test_cc(3));
push_reference; push_reference;
wait_on_out_check; wait_on_out_check;
gen_header(e1); gen_header(e1);
gen_data(e1, test_cc(4)); gen_data(e1, test_cc(3));
push_reference;
wait_on_out_check;
gen_header(e3);
gen_data(e3, test_cc(4));
push_reference;
wait_on_out_check;
gen_header(e0);
gen_data(e0, test_cc(4));
push_reference; push_reference;
wait_on_out_check; wait_on_out_check;
gen_header(e2); gen_header(e2);
gen_data(e2, test_cc(4)); gen_data(e2, test_cc(4));
push_reference; push_reference;
wait_on_out_check; wait_on_out_check;
gen_header(e1); gen_header(e0);
gen_data(e1, test_cc(5)); gen_data(e0, test_cc(4));
push_reference; push_reference;
wait_on_out_check; wait_on_out_check;
gen_header(e3); gen_header(e3);
gen_data(e3, test_cc(5)); gen_data(e3, test_cc(4));
push_reference;
wait_on_out_check;
gen_header(e1);
gen_data(e1, test_cc(4));
push_reference;
wait_on_out_check;
gen_header(e2);
gen_data(e2, test_cc(5));
push_reference; push_reference;
wait_on_out_check; wait_on_out_check;
gen_header(e0); gen_header(e0);
gen_data(e0, test_cc(5)); gen_data(e0, test_cc(5));
push_reference; push_reference;
wait_on_out_check; wait_on_out_check;
gen_header(e2); gen_header(e3);
gen_data(e2, test_cc(5)); gen_data(e3, test_cc(5));
push_reference;
wait_on_out_check;
gen_header(e1);
gen_data(e1, test_cc(5));
push_reference; push_reference;
wait_on_out_check; wait_on_out_check;
wait_on_idle; wait_on_idle;
@ -934,14 +934,14 @@ begin
wait until rising_edge(clk); wait until rising_edge(clk);
push_hc(ACK_CACHE_CHANGE, gen_sn(16)); push_hc(ACK_CACHE_CHANGE, gen_sn(16));
gen_header(e1);
gen_data(e1, test_cc(6));
push_reference;
wait_on_out_check;
gen_header(e4); gen_header(e4);
gen_data(e4, test_cc(6)); gen_data(e4, test_cc(6));
push_reference; push_reference;
wait_on_out_check; wait_on_out_check;
gen_header(e1);
gen_data(e1, test_cc(6));
push_reference;
wait_on_out_check;
wait_on_idle; wait_on_idle;
check_gsn(SEQUENCENUMBER_UNKNOWN); check_gsn(SEQUENCENUMBER_UNKNOWN);

8
src/Tests/Level_1/L1_rtps_writer_test1_vbkdp.vhd
View File

@ -572,14 +572,14 @@ begin
wait until rising_edge(clk); wait until rising_edge(clk);
push_hc(REMOVE_CACHE_CHANGE, gen_sn(16)); push_hc(REMOVE_CACHE_CHANGE, gen_sn(16));
gen_header(e1);
gen_data(e1, test_cc(6));
push_reference;
wait_on_out_check;
gen_header(e4); gen_header(e4);
gen_data(e4, test_cc(6)); gen_data(e4, test_cc(6));
push_reference; push_reference;
wait_on_out_check; wait_on_out_check;
gen_header(e1);
gen_data(e1, test_cc(6));
push_reference;
wait_on_out_check;
wait_on_idle; wait_on_idle;
check_gsn(SEQUENCENUMBER_UNKNOWN); check_gsn(SEQUENCENUMBER_UNKNOWN);

96
src/Tests/Level_1/L1_rtps_writer_test1_vrkdp.vhd
View File

@ -432,14 +432,14 @@ begin
new_cc <= '0'; new_cc <= '0';
wait until rising_edge(clk); wait until rising_edge(clk);
gen_header(e1);
gen_data(e1, test_cc(0));
push_reference;
wait_on_out_check;
gen_header(e3); gen_header(e3);
gen_data(e3, test_cc(0)); gen_data(e3, test_cc(0));
push_reference; push_reference;
wait_on_out_check; wait_on_out_check;
gen_header(e1);
gen_data(e1, test_cc(0));
push_reference;
wait_on_out_check;
wait_on_idle; wait_on_idle;
check_gsn(gen_sn(0)); check_gsn(gen_sn(0));
@ -481,22 +481,22 @@ begin
new_cc <= '0'; new_cc <= '0';
wait until rising_edge(clk); wait until rising_edge(clk);
gen_header(e1);
gen_data(e1, test_cc(1));
push_reference;
wait_on_out_check;
gen_header(e3); gen_header(e3);
gen_data(e3, test_cc(1)); gen_data(e3, test_cc(1));
push_reference; push_reference;
wait_on_out_check; wait_on_out_check;
gen_header(e1); gen_header(e1);
gen_data(e1, test_cc(2)); gen_data(e1, test_cc(1));
push_reference; push_reference;
wait_on_out_check; wait_on_out_check;
gen_header(e3); gen_header(e3);
gen_data(e3, test_cc(2)); gen_data(e3, test_cc(2));
push_reference; push_reference;
wait_on_out_check; wait_on_out_check;
gen_header(e1);
gen_data(e1, test_cc(2));
push_reference;
wait_on_out_check;
wait_on_idle; wait_on_idle;
check_gsn(gen_sn(1)); check_gsn(gen_sn(1));
@ -599,36 +599,36 @@ begin
new_cc <= '0'; new_cc <= '0';
wait until rising_edge(clk); wait until rising_edge(clk);
gen_header(e1); gen_header(e2);
gen_data(e1, test_cc(3)); gen_data(e2, test_cc(3));
push_reference;
wait_on_out_check;
gen_header(e3);
gen_data(e3, test_cc(3));
push_reference; push_reference;
wait_on_out_check; wait_on_out_check;
gen_header(e0); gen_header(e0);
gen_data(e0, test_cc(3)); gen_data(e0, test_cc(3));
push_reference; push_reference;
wait_on_out_check; wait_on_out_check;
gen_header(e2); gen_header(e3);
gen_data(e2, test_cc(3)); gen_data(e3, test_cc(3));
push_reference; push_reference;
wait_on_out_check; wait_on_out_check;
gen_header(e1); gen_header(e1);
gen_data(e1, test_cc(4)); gen_data(e1, test_cc(3));
push_reference; push_reference;
wait_on_out_check; wait_on_out_check;
gen_header(e3); gen_header(e2);
gen_data(e3, test_cc(4)); gen_data(e2, test_cc(4));
push_reference; push_reference;
wait_on_out_check; wait_on_out_check;
gen_header(e0); gen_header(e0);
gen_data(e0, test_cc(4)); gen_data(e0, test_cc(4));
push_reference; push_reference;
wait_on_out_check; wait_on_out_check;
gen_header(e2); gen_header(e3);
gen_data(e2, test_cc(4)); gen_data(e3, test_cc(4));
push_reference;
wait_on_out_check;
gen_header(e1);
gen_data(e1, test_cc(4));
push_reference; push_reference;
wait_on_out_check; wait_on_out_check;
wait_on_idle; wait_on_idle;
@ -736,52 +736,52 @@ begin
new_cc <= '0'; new_cc <= '0';
wait until rising_edge(clk); wait until rising_edge(clk);
gen_header(e1); gen_header(e2);
gen_data(e1, test_cc(3)); gen_data(e2, test_cc(3));
push_reference;
wait_on_out_check;
gen_header(e3);
gen_data(e3, test_cc(3));
push_reference; push_reference;
wait_on_out_check; wait_on_out_check;
gen_header(e0); gen_header(e0);
gen_data(e0, test_cc(3)); gen_data(e0, test_cc(3));
push_reference; push_reference;
wait_on_out_check; wait_on_out_check;
gen_header(e2); gen_header(e3);
gen_data(e2, test_cc(3)); gen_data(e3, test_cc(3));
push_reference; push_reference;
wait_on_out_check; wait_on_out_check;
gen_header(e1); gen_header(e1);
gen_data(e1, test_cc(4)); gen_data(e1, test_cc(3));
push_reference;
wait_on_out_check;
gen_header(e3);
gen_data(e3, test_cc(4));
push_reference;
wait_on_out_check;
gen_header(e0);
gen_data(e0, test_cc(4));
push_reference; push_reference;
wait_on_out_check; wait_on_out_check;
gen_header(e2); gen_header(e2);
gen_data(e2, test_cc(4)); gen_data(e2, test_cc(4));
push_reference; push_reference;
wait_on_out_check; wait_on_out_check;
gen_header(e1); gen_header(e0);
gen_data(e1, test_cc(5)); gen_data(e0, test_cc(4));
push_reference; push_reference;
wait_on_out_check; wait_on_out_check;
gen_header(e3); gen_header(e3);
gen_data(e3, test_cc(5)); gen_data(e3, test_cc(4));
push_reference;
wait_on_out_check;
gen_header(e1);
gen_data(e1, test_cc(4));
push_reference;
wait_on_out_check;
gen_header(e2);
gen_data(e2, test_cc(5));
push_reference; push_reference;
wait_on_out_check; wait_on_out_check;
gen_header(e0); gen_header(e0);
gen_data(e0, test_cc(5)); gen_data(e0, test_cc(5));
push_reference; push_reference;
wait_on_out_check; wait_on_out_check;
gen_header(e2); gen_header(e3);
gen_data(e2, test_cc(5)); gen_data(e3, test_cc(5));
push_reference;
wait_on_out_check;
gen_header(e1);
gen_data(e1, test_cc(5));
push_reference; push_reference;
wait_on_out_check; wait_on_out_check;
wait_on_idle; wait_on_idle;
@ -888,14 +888,14 @@ begin
wait until rising_edge(clk); wait until rising_edge(clk);
push_hc(REMOVE_CACHE_CHANGE, gen_sn(16)); push_hc(REMOVE_CACHE_CHANGE, gen_sn(16));
gen_header(e1);
gen_data(e1, test_cc(6));
push_reference;
wait_on_out_check;
gen_header(e4); gen_header(e4);
gen_data(e4, test_cc(6)); gen_data(e4, test_cc(6));
push_reference; push_reference;
wait_on_out_check; wait_on_out_check;
gen_header(e1);
gen_data(e1, test_cc(6));
push_reference;
wait_on_out_check;
wait_on_idle; wait_on_idle;
check_gsn(SEQUENCENUMBER_UNKNOWN); check_gsn(SEQUENCENUMBER_UNKNOWN);

96
src/Tests/Level_1/L1_rtps_writer_test1_vrksp.vhd
View File

@ -433,14 +433,14 @@ begin
new_cc <= '0'; new_cc <= '0';
wait until rising_edge(clk); wait until rising_edge(clk);
gen_header(e1);
gen_data(e1, test_cc(0));
push_reference;
wait_on_out_check;
gen_header(e3); gen_header(e3);
gen_data(e3, test_cc(0)); gen_data(e3, test_cc(0));
push_reference; push_reference;
wait_on_out_check; wait_on_out_check;
gen_header(e1);
gen_data(e1, test_cc(0));
push_reference;
wait_on_out_check;
wait_on_idle; wait_on_idle;
check_gsn(gen_sn(0)); check_gsn(gen_sn(0));
@ -482,22 +482,22 @@ begin
new_cc <= '0'; new_cc <= '0';
wait until rising_edge(clk); wait until rising_edge(clk);
gen_header(e1);
gen_data(e1, test_cc(1));
push_reference;
wait_on_out_check;
gen_header(e3); gen_header(e3);
gen_data(e3, test_cc(1)); gen_data(e3, test_cc(1));
push_reference; push_reference;
wait_on_out_check; wait_on_out_check;
gen_header(e1); gen_header(e1);
gen_data(e1, test_cc(2)); gen_data(e1, test_cc(1));
push_reference; push_reference;
wait_on_out_check; wait_on_out_check;
gen_header(e3); gen_header(e3);
gen_data(e3, test_cc(2)); gen_data(e3, test_cc(2));
push_reference; push_reference;
wait_on_out_check; wait_on_out_check;
gen_header(e1);
gen_data(e1, test_cc(2));
push_reference;
wait_on_out_check;
wait_on_idle; wait_on_idle;
check_gsn(gen_sn(1)); check_gsn(gen_sn(1));
@ -600,36 +600,36 @@ begin
new_cc <= '0'; new_cc <= '0';
wait until rising_edge(clk); wait until rising_edge(clk);
gen_header(e1); gen_header(e2);
gen_data(e1, test_cc(3)); gen_data(e2, test_cc(3));
push_reference;
wait_on_out_check;
gen_header(e3);
gen_data(e3, test_cc(3));
push_reference; push_reference;
wait_on_out_check; wait_on_out_check;
gen_header(e0); gen_header(e0);
gen_data(e0, test_cc(3)); gen_data(e0, test_cc(3));
push_reference; push_reference;
wait_on_out_check; wait_on_out_check;
gen_header(e2); gen_header(e3);
gen_data(e2, test_cc(3)); gen_data(e3, test_cc(3));
push_reference; push_reference;
wait_on_out_check; wait_on_out_check;
gen_header(e1); gen_header(e1);
gen_data(e1, test_cc(4)); gen_data(e1, test_cc(3));
push_reference; push_reference;
wait_on_out_check; wait_on_out_check;
gen_header(e3); gen_header(e2);
gen_data(e3, test_cc(4)); gen_data(e2, test_cc(4));
push_reference; push_reference;
wait_on_out_check; wait_on_out_check;
gen_header(e0); gen_header(e0);
gen_data(e0, test_cc(4)); gen_data(e0, test_cc(4));
push_reference; push_reference;
wait_on_out_check; wait_on_out_check;
gen_header(e2); gen_header(e3);
gen_data(e2, test_cc(4)); gen_data(e3, test_cc(4));
push_reference;
wait_on_out_check;
gen_header(e1);
gen_data(e1, test_cc(4));
push_reference; push_reference;
wait_on_out_check; wait_on_out_check;
wait_on_idle; wait_on_idle;
@ -737,52 +737,52 @@ begin
new_cc <= '0'; new_cc <= '0';
wait until rising_edge(clk); wait until rising_edge(clk);
gen_header(e1); gen_header(e2);
gen_data(e1, test_cc(3)); gen_data(e2, test_cc(3));
push_reference;
wait_on_out_check;
gen_header(e3);
gen_data(e3, test_cc(3));
push_reference; push_reference;
wait_on_out_check; wait_on_out_check;
gen_header(e0); gen_header(e0);
gen_data(e0, test_cc(3)); gen_data(e0, test_cc(3));
push_reference; push_reference;
wait_on_out_check; wait_on_out_check;
gen_header(e2); gen_header(e3);
gen_data(e2, test_cc(3)); gen_data(e3, test_cc(3));
push_reference; push_reference;
wait_on_out_check; wait_on_out_check;
gen_header(e1); gen_header(e1);
gen_data(e1, test_cc(4)); gen_data(e1, test_cc(3));
push_reference;
wait_on_out_check;
gen_header(e3);
gen_data(e3, test_cc(4));
push_reference;
wait_on_out_check;
gen_header(e0);
gen_data(e0, test_cc(4));
push_reference; push_reference;
wait_on_out_check; wait_on_out_check;
gen_header(e2); gen_header(e2);
gen_data(e2, test_cc(4)); gen_data(e2, test_cc(4));
push_reference; push_reference;
wait_on_out_check; wait_on_out_check;
gen_header(e1); gen_header(e0);
gen_data(e1, test_cc(5)); gen_data(e0, test_cc(4));
push_reference; push_reference;
wait_on_out_check; wait_on_out_check;
gen_header(e3); gen_header(e3);
gen_data(e3, test_cc(5)); gen_data(e3, test_cc(4));
push_reference;
wait_on_out_check;
gen_header(e1);
gen_data(e1, test_cc(4));
push_reference;
wait_on_out_check;
gen_header(e2);
gen_data(e2, test_cc(5));
push_reference; push_reference;
wait_on_out_check; wait_on_out_check;
gen_header(e0); gen_header(e0);
gen_data(e0, test_cc(5)); gen_data(e0, test_cc(5));
push_reference; push_reference;
wait_on_out_check; wait_on_out_check;
gen_header(e2); gen_header(e3);
gen_data(e2, test_cc(5)); gen_data(e3, test_cc(5));
push_reference;
wait_on_out_check;
gen_header(e1);
gen_data(e1, test_cc(5));
push_reference; push_reference;
wait_on_out_check; wait_on_out_check;
wait_on_idle; wait_on_idle;
@ -889,14 +889,14 @@ begin
wait until rising_edge(clk); wait until rising_edge(clk);
push_hc(REMOVE_CACHE_CHANGE, gen_sn(16)); push_hc(REMOVE_CACHE_CHANGE, gen_sn(16));
gen_header(e1);
gen_data(e1, test_cc(6));
push_reference;
wait_on_out_check;
gen_header(e4); gen_header(e4);
gen_data(e4, test_cc(6)); gen_data(e4, test_cc(6));
push_reference; push_reference;
wait_on_out_check; wait_on_out_check;
gen_header(e1);
gen_data(e1, test_cc(6));
push_reference;
wait_on_out_check;
wait_on_idle; wait_on_idle;
check_gsn(SEQUENCENUMBER_UNKNOWN); check_gsn(SEQUENCENUMBER_UNKNOWN);

96
src/Tests/Level_1/L1_rtps_writer_test1_vrndp.vhd
View File

@ -434,14 +434,14 @@ begin
new_cc <= '0'; new_cc <= '0';
wait until rising_edge(clk); wait until rising_edge(clk);
gen_header(e1);
gen_data(e1, test_cc(0));
push_reference;
wait_on_out_check;
gen_header(e3); gen_header(e3);
gen_data(e3, test_cc(0)); gen_data(e3, test_cc(0));
push_reference; push_reference;
wait_on_out_check; wait_on_out_check;
gen_header(e1);
gen_data(e1, test_cc(0));
push_reference;
wait_on_out_check;
wait_on_idle; wait_on_idle;
check_gsn(gen_sn(0)); check_gsn(gen_sn(0));
@ -481,22 +481,22 @@ begin
new_cc <= '0'; new_cc <= '0';
wait until rising_edge(clk); wait until rising_edge(clk);
gen_header(e1);
gen_data(e1, test_cc(1));
push_reference;
wait_on_out_check;
gen_header(e3); gen_header(e3);
gen_data(e3, test_cc(1)); gen_data(e3, test_cc(1));
push_reference; push_reference;
wait_on_out_check; wait_on_out_check;
gen_header(e1); gen_header(e1);
gen_data(e1, test_cc(2)); gen_data(e1, test_cc(1));
push_reference; push_reference;
wait_on_out_check; wait_on_out_check;
gen_header(e3); gen_header(e3);
gen_data(e3, test_cc(2)); gen_data(e3, test_cc(2));
push_reference; push_reference;
wait_on_out_check; wait_on_out_check;
gen_header(e1);
gen_data(e1, test_cc(2));
push_reference;
wait_on_out_check;
wait_on_idle; wait_on_idle;
check_gsn(gen_sn(1)); check_gsn(gen_sn(1));
@ -597,36 +597,36 @@ begin
new_cc <= '0'; new_cc <= '0';
wait until rising_edge(clk); wait until rising_edge(clk);
gen_header(e1); gen_header(e2);
gen_data(e1, test_cc(3)); gen_data(e2, test_cc(3));
push_reference;
wait_on_out_check;
gen_header(e3);
gen_data(e3, test_cc(3));
push_reference; push_reference;
wait_on_out_check; wait_on_out_check;
gen_header(e0); gen_header(e0);
gen_data(e0, test_cc(3)); gen_data(e0, test_cc(3));
push_reference; push_reference;
wait_on_out_check; wait_on_out_check;
gen_header(e2); gen_header(e3);
gen_data(e2, test_cc(3)); gen_data(e3, test_cc(3));
push_reference; push_reference;
wait_on_out_check; wait_on_out_check;
gen_header(e1); gen_header(e1);
gen_data(e1, test_cc(4)); gen_data(e1, test_cc(3));
push_reference; push_reference;
wait_on_out_check; wait_on_out_check;
gen_header(e3); gen_header(e2);
gen_data(e3, test_cc(4)); gen_data(e2, test_cc(4));
push_reference; push_reference;
wait_on_out_check; wait_on_out_check;
gen_header(e0); gen_header(e0);
gen_data(e0, test_cc(4)); gen_data(e0, test_cc(4));
push_reference; push_reference;
wait_on_out_check; wait_on_out_check;
gen_header(e2); gen_header(e3);
gen_data(e2, test_cc(4)); gen_data(e3, test_cc(4));
push_reference;
wait_on_out_check;
gen_header(e1);
gen_data(e1, test_cc(4));
push_reference; push_reference;
wait_on_out_check; wait_on_out_check;
wait_on_idle; wait_on_idle;
@ -731,52 +731,52 @@ begin
new_cc <= '0'; new_cc <= '0';
wait until rising_edge(clk); wait until rising_edge(clk);
gen_header(e1); gen_header(e2);
gen_data(e1, test_cc(3)); gen_data(e2, test_cc(3));
push_reference;
wait_on_out_check;
gen_header(e3);
gen_data(e3, test_cc(3));
push_reference; push_reference;
wait_on_out_check; wait_on_out_check;
gen_header(e0); gen_header(e0);
gen_data(e0, test_cc(3)); gen_data(e0, test_cc(3));
push_reference; push_reference;
wait_on_out_check; wait_on_out_check;
gen_header(e2); gen_header(e3);
gen_data(e2, test_cc(3)); gen_data(e3, test_cc(3));
push_reference; push_reference;
wait_on_out_check; wait_on_out_check;
gen_header(e1); gen_header(e1);
gen_data(e1, test_cc(4)); gen_data(e1, test_cc(3));
push_reference;
wait_on_out_check;
gen_header(e3);
gen_data(e3, test_cc(4));
push_reference;
wait_on_out_check;
gen_header(e0);
gen_data(e0, test_cc(4));
push_reference; push_reference;
wait_on_out_check; wait_on_out_check;
gen_header(e2); gen_header(e2);
gen_data(e2, test_cc(4)); gen_data(e2, test_cc(4));
push_reference; push_reference;
wait_on_out_check; wait_on_out_check;
gen_header(e1); gen_header(e0);
gen_data(e1, test_cc(5)); gen_data(e0, test_cc(4));
push_reference; push_reference;
wait_on_out_check; wait_on_out_check;
gen_header(e3); gen_header(e3);
gen_data(e3, test_cc(5)); gen_data(e3, test_cc(4));
push_reference;
wait_on_out_check;
gen_header(e1);
gen_data(e1, test_cc(4));
push_reference;
wait_on_out_check;
gen_header(e2);
gen_data(e2, test_cc(5));
push_reference; push_reference;
wait_on_out_check; wait_on_out_check;
gen_header(e0); gen_header(e0);
gen_data(e0, test_cc(5)); gen_data(e0, test_cc(5));
push_reference; push_reference;
wait_on_out_check; wait_on_out_check;
gen_header(e2); gen_header(e3);
gen_data(e2, test_cc(5)); gen_data(e3, test_cc(5));
push_reference;
wait_on_out_check;
gen_header(e1);
gen_data(e1, test_cc(5));
push_reference; push_reference;
wait_on_out_check; wait_on_out_check;
wait_on_idle; wait_on_idle;
@ -882,14 +882,14 @@ begin
wait until rising_edge(clk); wait until rising_edge(clk);
push_hc(REMOVE_CACHE_CHANGE, gen_sn(16)); push_hc(REMOVE_CACHE_CHANGE, gen_sn(16));
gen_header(e1);
gen_data(e1, test_cc(6));
push_reference;
wait_on_out_check;
gen_header(e4); gen_header(e4);
gen_data(e4, test_cc(6)); gen_data(e4, test_cc(6));
push_reference; push_reference;
wait_on_out_check; wait_on_out_check;
gen_header(e1);
gen_data(e1, test_cc(6));
push_reference;
wait_on_out_check;
wait_on_idle; wait_on_idle;
check_gsn(SEQUENCENUMBER_UNKNOWN); check_gsn(SEQUENCENUMBER_UNKNOWN);

24
src/Tests/Level_1/L1_rtps_writer_test2_vrkdn.vhd
View File

@ -471,14 +471,14 @@ begin
test_time <= gen_duration(1,0); test_time <= gen_duration(1,0);
wait until rising_edge(clk); wait until rising_edge(clk);
wait until rising_edge(clk); -- Allow idle_sig to go low wait until rising_edge(clk); -- Allow idle_sig to go low
gen_header(e0);
gen_gap(gen_sn(1), gen_sn(2));
push_reference;
wait_on_out_check;
gen_header(e1); gen_header(e1);
gen_data(e1, test_cc(0)); gen_data(e1, test_cc(0));
push_reference; push_reference;
wait_on_out_check; wait_on_out_check;
gen_header(e0);
gen_gap(gen_sn(1), gen_sn(2));
push_reference;
wait_on_out_check;
wait_on_idle; wait_on_idle;
check_gsn(gen_sn(1)); check_gsn(gen_sn(1));
@ -647,14 +647,14 @@ begin
test_time <= gen_duration(3,0); test_time <= gen_duration(3,0);
wait until rising_edge(clk); wait until rising_edge(clk);
wait until rising_edge(clk); -- Allow idle_sig to go low wait until rising_edge(clk); -- Allow idle_sig to go low
gen_header(e0);
gen_data(e0, test_cc(3));
push_reference;
wait_on_out_check;
gen_header(e1); gen_header(e1);
gen_data(e1, test_cc(4)); gen_data(e1, test_cc(4));
push_reference; push_reference;
wait_on_out_check; wait_on_out_check;
gen_header(e0);
gen_data(e0, test_cc(3));
push_reference;
wait_on_out_check;
wait_on_idle; wait_on_idle;
check_gsn(gen_sn(3)); check_gsn(gen_sn(3));
@ -795,6 +795,10 @@ begin
test_time <= gen_duration(5,0); test_time <= gen_duration(5,0);
wait until rising_edge(clk); wait until rising_edge(clk);
wait until rising_edge(clk); -- Allow idle_sig to go low wait until rising_edge(clk); -- Allow idle_sig to go low
gen_header(e1);
gen_data(e1, test_cc(5));
push_reference;
wait_on_out_check;
gen_header(e0); gen_header(e0);
gen_gap(gen_sn(14), gen_sn(15)); gen_gap(gen_sn(14), gen_sn(15));
gen_data(e0, test_cc(4)); gen_data(e0, test_cc(4));
@ -804,10 +808,6 @@ begin
gen_gap(gen_sn(16), gen_sn(17)); gen_gap(gen_sn(16), gen_sn(17));
push_reference; push_reference;
wait_on_out_check; wait_on_out_check;
gen_header(e1);
gen_data(e1, test_cc(5));
push_reference;
wait_on_out_check;
wait_on_idle; wait_on_idle;
check_gsn(gen_sn(10)); check_gsn(gen_sn(10));

24
src/Tests/Level_1/L1_rtps_writer_test2_vrksn.vhd
View File

@ -472,14 +472,14 @@ begin
test_time <= gen_duration(1,0); test_time <= gen_duration(1,0);
wait until rising_edge(clk); wait until rising_edge(clk);
wait until rising_edge(clk); -- Allow idle_sig to go low wait until rising_edge(clk); -- Allow idle_sig to go low
gen_header(e0);
gen_gap(gen_sn(1), gen_sn(2));
push_reference;
wait_on_out_check;
gen_header(e1); gen_header(e1);
gen_data(e1, test_cc(0)); gen_data(e1, test_cc(0));
push_reference; push_reference;
wait_on_out_check; wait_on_out_check;
gen_header(e0);
gen_gap(gen_sn(1), gen_sn(2));
push_reference;
wait_on_out_check;
wait_on_idle; wait_on_idle;
check_gsn(gen_sn(1)); check_gsn(gen_sn(1));
@ -648,14 +648,14 @@ begin
test_time <= gen_duration(3,0); test_time <= gen_duration(3,0);
wait until rising_edge(clk); wait until rising_edge(clk);
wait until rising_edge(clk); -- Allow idle_sig to go low wait until rising_edge(clk); -- Allow idle_sig to go low
gen_header(e0);
gen_data(e0, test_cc(3));
push_reference;
wait_on_out_check;
gen_header(e1); gen_header(e1);
gen_data(e1, test_cc(4)); gen_data(e1, test_cc(4));
push_reference; push_reference;
wait_on_out_check; wait_on_out_check;
gen_header(e0);
gen_data(e0, test_cc(3));
push_reference;
wait_on_out_check;
wait_on_idle; wait_on_idle;
check_gsn(gen_sn(3)); check_gsn(gen_sn(3));
@ -796,6 +796,10 @@ begin
test_time <= gen_duration(5,0); test_time <= gen_duration(5,0);
wait until rising_edge(clk); wait until rising_edge(clk);
wait until rising_edge(clk); -- Allow idle_sig to go low wait until rising_edge(clk); -- Allow idle_sig to go low
gen_header(e1);
gen_data(e1, test_cc(5));
push_reference;
wait_on_out_check;
gen_header(e0); gen_header(e0);
gen_gap(gen_sn(14), gen_sn(15)); gen_gap(gen_sn(14), gen_sn(15));
gen_data(e0, test_cc(4)); gen_data(e0, test_cc(4));
@ -805,10 +809,6 @@ begin
gen_gap(gen_sn(16), gen_sn(17)); gen_gap(gen_sn(16), gen_sn(17));
push_reference; push_reference;
wait_on_out_check; wait_on_out_check;
gen_header(e1);
gen_data(e1, test_cc(5));
push_reference;
wait_on_out_check;
wait_on_idle; wait_on_idle;
check_gsn(gen_sn(10)); check_gsn(gen_sn(10));

36
src/Tests/Level_1/L1_rtps_writer_test3_vrkdn.vhd
View File

@ -355,8 +355,8 @@ begin
test_time <= gen_duration(1,0); test_time <= gen_duration(1,0);
wait until rising_edge(clk); wait until rising_edge(clk);
wait until rising_edge(clk); -- Allow idle_sig to go low wait until rising_edge(clk); -- Allow idle_sig to go low
push_hb(e0, gen_sn(1), gen_sn(0), FALSE);
push_hb(e1, gen_sn(1), gen_sn(0), FALSE); push_hb(e1, gen_sn(1), gen_sn(0), FALSE);
push_hb(e0, gen_sn(1), gen_sn(0), FALSE);
count <= count + 1; count <= count + 1;
wait_on_out_check; wait_on_out_check;
wait_on_idle; wait_on_idle;
@ -380,8 +380,8 @@ begin
test_time <= gen_duration(2,0); test_time <= gen_duration(2,0);
wait until rising_edge(clk); wait until rising_edge(clk);
wait until rising_edge(clk); -- Allow idle_sig to go low wait until rising_edge(clk); -- Allow idle_sig to go low
push_hb(e0, gen_sn(1), gen_sn(1), FALSE);
push_hb(e1, gen_sn(1), gen_sn(1), FALSE); push_hb(e1, gen_sn(1), gen_sn(1), FALSE);
push_hb(e0, gen_sn(1), gen_sn(1), FALSE);
count <= count + 1; count <= count + 1;
wait_on_out_check; wait_on_out_check;
wait_on_idle; wait_on_idle;
@ -409,8 +409,8 @@ begin
wait_on_idle; wait_on_idle;
Log("Send HEARTBEAT to Endpoint 0,1 [Liveliness Flag]", INFO); Log("Send HEARTBEAT to Endpoint 0,1 [Liveliness Flag]", INFO);
push_hb(e0, gen_sn(1), gen_sn(3), TRUE);
push_hb(e1, gen_sn(1), gen_sn(3), TRUE); push_hb(e1, gen_sn(1), gen_sn(3), TRUE);
push_hb(e0, gen_sn(1), gen_sn(3), TRUE);
count <= count + 1; count <= count + 1;
wait_on_out_check; wait_on_out_check;
wait_on_idle; wait_on_idle;
@ -428,10 +428,10 @@ begin
test_time <= gen_duration(3,0); test_time <= gen_duration(3,0);
wait until rising_edge(clk); wait until rising_edge(clk);
wait until rising_edge(clk); -- Allow idle_sig to go low wait until rising_edge(clk); -- Allow idle_sig to go low
push_hb(e0, gen_sn(1), gen_sn(3), FALSE);
push_hb(e1, gen_sn(1), gen_sn(3), FALSE);
push_hb(e2, gen_sn(1), gen_sn(3), FALSE);
push_hb(e3, gen_sn(1), gen_sn(3), FALSE); push_hb(e3, gen_sn(1), gen_sn(3), FALSE);
push_hb(e2, gen_sn(1), gen_sn(3), FALSE);
push_hb(e1, gen_sn(1), gen_sn(3), FALSE);
push_hb(e0, gen_sn(1), gen_sn(3), FALSE);
count <= count + 1; count <= count + 1;
wait_on_out_check; wait_on_out_check;
wait_on_idle; wait_on_idle;
@ -486,11 +486,11 @@ begin
test_time <= gen_duration(4,0); test_time <= gen_duration(4,0);
wait until rising_edge(clk); wait until rising_edge(clk);
wait until rising_edge(clk); -- Allow idle_sig to go low wait until rising_edge(clk); -- Allow idle_sig to go low
push_hb(e0, gen_sn(10), gen_sn(50), FALSE);
push_hb(e1, gen_sn(10), gen_sn(50), FALSE);
push_hb(e2, gen_sn(10), gen_sn(50), FALSE);
push_hb(e3, gen_sn(10), gen_sn(50), FALSE);
push_hb(e4, gen_sn(10), gen_sn(50), FALSE); push_hb(e4, gen_sn(10), gen_sn(50), FALSE);
push_hb(e3, gen_sn(10), gen_sn(50), FALSE);
push_hb(e2, gen_sn(10), gen_sn(50), FALSE);
push_hb(e1, gen_sn(10), gen_sn(50), FALSE);
push_hb(e0, gen_sn(10), gen_sn(50), FALSE);
count <= count + 1; count <= count + 1;
wait_on_out_check; wait_on_out_check;
wait_on_idle; wait_on_idle;
@ -506,11 +506,11 @@ begin
test_time <= gen_duration(5,0); test_time <= gen_duration(5,0);
wait until rising_edge(clk); wait until rising_edge(clk);
wait until rising_edge(clk); -- Allow idle_sig to go low wait until rising_edge(clk); -- Allow idle_sig to go low
push_hb(e0, gen_sn(51), gen_sn(50), FALSE);
push_hb(e1, gen_sn(51), gen_sn(50), FALSE);
push_hb(e2, gen_sn(51), gen_sn(50), FALSE);
push_hb(e3, gen_sn(51), gen_sn(50), FALSE);
push_hb(e4, gen_sn(51), gen_sn(50), FALSE); push_hb(e4, gen_sn(51), gen_sn(50), FALSE);
push_hb(e3, gen_sn(51), gen_sn(50), FALSE);
push_hb(e2, gen_sn(51), gen_sn(50), FALSE);
push_hb(e1, gen_sn(51), gen_sn(50), FALSE);
push_hb(e0, gen_sn(51), gen_sn(50), FALSE);
count <= count + 1; count <= count + 1;
wait_on_out_check; wait_on_out_check;
wait_on_idle; wait_on_idle;
@ -523,11 +523,11 @@ begin
wait_on_idle; wait_on_idle;
Log("Send HEARTBEAT to Endpoint 0,1,2,3,4", INFO); Log("Send HEARTBEAT to Endpoint 0,1,2,3,4", INFO);
push_hb(e0, gen_sn(51), gen_sn(50), TRUE);
push_hb(e1, gen_sn(51), gen_sn(50), TRUE);
push_hb(e2, gen_sn(51), gen_sn(50), TRUE);
push_hb(e3, gen_sn(51), gen_sn(50), TRUE);
push_hb(e4, gen_sn(51), gen_sn(50), TRUE); push_hb(e4, gen_sn(51), gen_sn(50), TRUE);
push_hb(e3, gen_sn(51), gen_sn(50), TRUE);
push_hb(e2, gen_sn(51), gen_sn(50), TRUE);
push_hb(e1, gen_sn(51), gen_sn(50), TRUE);
push_hb(e0, gen_sn(51), gen_sn(50), TRUE);
count <= count + 1; count <= count + 1;
wait_on_out_check; wait_on_out_check;
wait_on_idle; wait_on_idle;

4
src/rtps_test_package.vhd
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@ -28,9 +28,9 @@ package rtps_test_package is
-- rtps_reader Endpoint Frame Size (RELIABLE=FALSE) -- rtps_reader Endpoint Frame Size (RELIABLE=FALSE)
constant WRITER_ENDPOINT_FRAME_SIZE_B : natural := 10; constant WRITER_ENDPOINT_FRAME_SIZE_B : natural := 10;
-- rtps_writer Endpoint Frame Size (RELIABLE=TRUE) -- rtps_writer Endpoint Frame Size (RELIABLE=TRUE)
constant READER_ENDPOINT_FRAME_SIZE_A : natural := 15; constant READER_ENDPOINT_FRAME_SIZE_A : natural := 17;
-- rtps_writer Endpoint Frame Size (RELIABLE=FALSE) -- rtps_writer Endpoint Frame Size (RELIABLE=FALSE)
constant READER_ENDPOINT_FRAME_SIZE_B : natural := 6; constant READER_ENDPOINT_FRAME_SIZE_B : natural := 8;
constant DEFAULT_GUIDPREFIX : GUIDPREFIX_TYPE; -- Deferred to Package Body constant DEFAULT_GUIDPREFIX : GUIDPREFIX_TYPE; -- Deferred to Package Body
constant DEFAULT_READER_ENTITYID : std_logic_vector(ENTITYID_WIDTH-1 downto 0); -- Deferred to Package Body constant DEFAULT_READER_ENTITYID : std_logic_vector(ENTITYID_WIDTH-1 downto 0); -- Deferred to Package Body

936
src/rtps_writer.vhd
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