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code refactoring

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This commit is contained in:
John Ring 2022-03-26 13:25:09 +01:00
parent 54602a1f21
commit 74af242bcc
11 changed files with 1304 additions and 1492 deletions
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74
sim/L0_dds_reader_test1_arzkriu.do
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File diff suppressed because one or more lines are too long

21
sim/L0_dds_writer_test1_aik.do
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@ -23,7 +23,6 @@ add wave -noupdate -group {RTPS OUT} -radix hexadecimal /l0_dds_writer_test1_aik
add wave -noupdate -group {RTPS OUT} /l0_dds_writer_test1_aik/uut/last_word_out_rtps add wave -noupdate -group {RTPS OUT} /l0_dds_writer_test1_aik/uut/last_word_out_rtps
add wave -noupdate -divider {DDS IN} add wave -noupdate -divider {DDS IN}
add wave -noupdate -expand -group DDS /l0_dds_writer_test1_aik/uut/start_dds add wave -noupdate -expand -group DDS /l0_dds_writer_test1_aik/uut/start_dds
add wave -noupdate -expand -group DDS -radix hexadecimal /l0_dds_writer_test1_aik/uut/instance_handle_dds
add wave -noupdate -expand -group DDS -radix unsigned /l0_dds_writer_test1_aik/uut/source_ts_dds add wave -noupdate -expand -group DDS -radix unsigned /l0_dds_writer_test1_aik/uut/source_ts_dds
add wave -noupdate -expand -group DDS /l0_dds_writer_test1_aik/uut/opcode_dds add wave -noupdate -expand -group DDS /l0_dds_writer_test1_aik/uut/opcode_dds
add wave -noupdate -expand -group DDS /l0_dds_writer_test1_aik/uut/ack_dds add wave -noupdate -expand -group DDS /l0_dds_writer_test1_aik/uut/ack_dds
@ -39,7 +38,6 @@ add wave -noupdate -expand -group DDS -radix hexadecimal /l0_dds_writer_test1_ai
add wave -noupdate -expand -group DDS /l0_dds_writer_test1_aik/uut/last_word_out_dds add wave -noupdate -expand -group DDS /l0_dds_writer_test1_aik/uut/last_word_out_dds
add wave -noupdate -divider {MAIN FSM} add wave -noupdate -divider {MAIN FSM}
add wave -noupdate /l0_dds_writer_test1_aik/uut/stage add wave -noupdate /l0_dds_writer_test1_aik/uut/stage
add wave -noupdate /l0_dds_writer_test1_aik/uut/stage_next
add wave -noupdate /l0_dds_writer_test1_aik/uut/cnt add wave -noupdate /l0_dds_writer_test1_aik/uut/cnt
add wave -noupdate -radix unsigned /l0_dds_writer_test1_aik/uut/global_seq_nr add wave -noupdate -radix unsigned /l0_dds_writer_test1_aik/uut/global_seq_nr
add wave -noupdate -radix unsigned /l0_dds_writer_test1_aik/uut/global_sample_cnt add wave -noupdate -radix unsigned /l0_dds_writer_test1_aik/uut/global_sample_cnt
@ -71,7 +69,6 @@ add wave -noupdate /l0_dds_writer_test1_aik/uut/inst_op_start
add wave -noupdate /l0_dds_writer_test1_aik/uut/inst_opcode add wave -noupdate /l0_dds_writer_test1_aik/uut/inst_opcode
add wave -noupdate /l0_dds_writer_test1_aik/uut/inst_op_done add wave -noupdate /l0_dds_writer_test1_aik/uut/inst_op_done
add wave -noupdate /l0_dds_writer_test1_aik/uut/inst_stage add wave -noupdate /l0_dds_writer_test1_aik/uut/inst_stage
add wave -noupdate /l0_dds_writer_test1_aik/uut/inst_stage_next
add wave -noupdate /l0_dds_writer_test1_aik/uut/inst_cnt add wave -noupdate /l0_dds_writer_test1_aik/uut/inst_cnt
add wave -noupdate -radix unsigned /l0_dds_writer_test1_aik/uut/inst_addr_base add wave -noupdate -radix unsigned /l0_dds_writer_test1_aik/uut/inst_addr_base
add wave -noupdate -group {INSTANCE MEM} /l0_dds_writer_test1_aik/uut/inst_abort_read add wave -noupdate -group {INSTANCE MEM} /l0_dds_writer_test1_aik/uut/inst_abort_read
@ -83,9 +80,7 @@ add wave -noupdate -group {INSTANCE MEM} -radix hexadecimal /l0_dds_writer_test1
add wave -noupdate -group {INSTANCE MEM} /l0_dds_writer_test1_aik/uut/gen_instance_mem_ctrl_inst/instance_mem_ctrl_inst/ready_out add wave -noupdate -group {INSTANCE MEM} /l0_dds_writer_test1_aik/uut/gen_instance_mem_ctrl_inst/instance_mem_ctrl_inst/ready_out
add wave -noupdate -group {INSTANCE MEM} /l0_dds_writer_test1_aik/uut/gen_instance_mem_ctrl_inst/instance_mem_ctrl_inst/valid_out add wave -noupdate -group {INSTANCE MEM} /l0_dds_writer_test1_aik/uut/gen_instance_mem_ctrl_inst/instance_mem_ctrl_inst/valid_out
add wave -noupdate -group {INSTANCE MEM} -radix hexadecimal /l0_dds_writer_test1_aik/uut/gen_instance_mem_ctrl_inst/instance_mem_ctrl_inst/data_out add wave -noupdate -group {INSTANCE MEM} -radix hexadecimal /l0_dds_writer_test1_aik/uut/gen_instance_mem_ctrl_inst/instance_mem_ctrl_inst/data_out
add wave -noupdate -childformat {{/l0_dds_writer_test1_aik/uut/inst_data.key_hash -radix hexadecimal} {/l0_dds_writer_test1_aik/uut/inst_data.status_info -radix binary} {/l0_dds_writer_test1_aik/uut/inst_data.sample_cnt -radix unsigned} {/l0_dds_writer_test1_aik/uut/inst_data.ack_cnt -radix unsigned}} -expand -subitemconfig {/l0_dds_writer_test1_aik/uut/inst_data.key_hash {-height 15 -radix hexadecimal} /l0_dds_writer_test1_aik/uut/inst_data.status_info {-height 15 -radix binary} /l0_dds_writer_test1_aik/uut/inst_data.sample_cnt {-height 15 -radix unsigned} /l0_dds_writer_test1_aik/uut/inst_data.ack_cnt {-height 15 -radix unsigned}} /l0_dds_writer_test1_aik/uut/inst_data add wave -noupdate -childformat {{/l0_dds_writer_test1_aik/uut/inst_data.addr -radix unsigned} {/l0_dds_writer_test1_aik/uut/inst_data.key_hash -radix hexadecimal} {/l0_dds_writer_test1_aik/uut/inst_data.status_info -radix binary} {/l0_dds_writer_test1_aik/uut/inst_data.sample_cnt -radix unsigned} {/l0_dds_writer_test1_aik/uut/inst_data.ack_cnt -radix unsigned}} -subitemconfig {/l0_dds_writer_test1_aik/uut/inst_data.addr {-radix unsigned} /l0_dds_writer_test1_aik/uut/inst_data.key_hash {-height 15 -radix hexadecimal} /l0_dds_writer_test1_aik/uut/inst_data.status_info {-height 15 -radix binary} /l0_dds_writer_test1_aik/uut/inst_data.sample_cnt {-height 15 -radix unsigned} /l0_dds_writer_test1_aik/uut/inst_data.ack_cnt {-height 15 -radix unsigned}} /l0_dds_writer_test1_aik/uut/inst_data
add wave -noupdate -radix unsigned /l0_dds_writer_test1_aik/uut/inst_next_addr_base
add wave -noupdate -radix unsigned /l0_dds_writer_test1_aik/uut/inst_prev_addr_base
add wave -noupdate -divider {KEY HOLDER} add wave -noupdate -divider {KEY HOLDER}
add wave -noupdate -group {KEY HOLDER} /l0_dds_writer_test1_aik/uut/start_kh add wave -noupdate -group {KEY HOLDER} /l0_dds_writer_test1_aik/uut/start_kh
add wave -noupdate -group {KEY HOLDER} /l0_dds_writer_test1_aik/uut/opcode_kh add wave -noupdate -group {KEY HOLDER} /l0_dds_writer_test1_aik/uut/opcode_kh
@ -115,23 +110,13 @@ add wave -noupdate -group {GENERAL POINTERS} -radix unsigned /l0_dds_writer_test
add wave -noupdate -group {GENERAL POINTERS} -radix unsigned /l0_dds_writer_test1_aik/uut/cur_inst add wave -noupdate -group {GENERAL POINTERS} -radix unsigned /l0_dds_writer_test1_aik/uut/cur_inst
add wave -noupdate -group {GENERAL POINTERS} -radix unsigned /l0_dds_writer_test1_aik/uut/next_inst add wave -noupdate -group {GENERAL POINTERS} -radix unsigned /l0_dds_writer_test1_aik/uut/next_inst
add wave -noupdate -divider TESTBENCH add wave -noupdate -divider TESTBENCH
add wave -noupdate -group TESTBENCH /l0_dds_writer_test1_aik/stim_start
add wave -noupdate -group TESTBENCH /l0_dds_writer_test1_aik/stim_stage
add wave -noupdate -group TESTBENCH /l0_dds_writer_test1_aik/stim_cnt
add wave -noupdate -group TESTBENCH /l0_dds_writer_test1_aik/stim_done
add wave -noupdate -group TESTBENCH /l0_dds_writer_test1_aik/ref_start
add wave -noupdate -group TESTBENCH /l0_dds_writer_test1_aik/ref_stage
add wave -noupdate -group TESTBENCH /l0_dds_writer_test1_aik/ref_cnt
add wave -noupdate -group TESTBENCH /l0_dds_writer_test1_aik/ref_done
add wave -noupdate -group TESTBENCH /l0_dds_writer_test1_aik/kh_cnt
add wave -noupdate -group TESTBENCH /l0_dds_writer_test1_aik/kh_stage
add wave -noupdate -divider MISC add wave -noupdate -divider MISC
add wave -noupdate /l0_dds_writer_test1_aik/uut/cnt2 add wave -noupdate /l0_dds_writer_test1_aik/uut/cnt2
add wave -noupdate /l0_dds_writer_test1_aik/uut/cnt3 add wave -noupdate /l0_dds_writer_test1_aik/uut/cnt3
add wave -noupdate -radix unsigned /l0_dds_writer_test1_aik/uut/long_latch add wave -noupdate -radix unsigned /l0_dds_writer_test1_aik/uut/long_latch
add wave -noupdate /l0_dds_writer_test1_aik/uut/sample_status_info add wave -noupdate /l0_dds_writer_test1_aik/uut/sample_status_info
TreeUpdate [SetDefaultTree] TreeUpdate [SetDefaultTree]
WaveRestoreCursors {{Cursor 1} {106575000 ps} 0} WaveRestoreCursors {{Cursor 1} {34725000 ps} 0}
quietly wave cursor active 1 quietly wave cursor active 1
configure wave -namecolwidth 187 configure wave -namecolwidth 187
configure wave -valuecolwidth 100 configure wave -valuecolwidth 100
@ -147,4 +132,4 @@ configure wave -griddelta 40
configure wave -timeline 0 configure wave -timeline 0
configure wave -timelineunits ns configure wave -timelineunits ns
update update
WaveRestoreZoom {106074680 ps} {107075321 ps} WaveRestoreZoom {34274712 ps} {35275353 ps}

40
src/REF.txt
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@ -603,27 +603,29 @@ READER
+---------------------------------------------------------------+ +---------------------------------------------------------------+
00| NEXT_ADDRESS | 00| NEXT_ADDRESS |
+---------------------------------------------------------------+ +---------------------------------------------------------------+
01| | 01| PREV_ADDRESS |
+ + +---------------------------------------------------------------+
02| | 02| |
+ KEY_HASH +
03| |
+ + + +
03| |
+ KEY_HASH +
04| | 04| |
+ +
05| |
+---------------------------------------------------------------+ +---------------------------------------------------------------+
05| STATUS_INFO | 06| STATUS_INFO |
+---------------------------------------------------------------+ +---------------------------------------------------------------+
06| SAMPLE_COUNT | 07| SAMPLE_COUNT |
+---------------------------------------------------------------+ +---------------------------------------------------------------+
07| DISPOSED_GENERATION_COUNT | 08| DISPOSED_GENERATION_COUNT |
+---------------------------------------------------------------+ +---------------------------------------------------------------+
08| NO_WRITERS_GENERATION_COUNT | 09| NO_WRITERS_GENERATION_COUNT |
+---------------------------------------------------------------+ +---------------------------------------------------------------+
09| |
+ IGNORE_DEADLINE + [only TIME_BASED_FILTER]
10| | 10| |
+---------------------------------------------------------------+ + IGNORE_DEADLINE + [only TIME_BASED_FILTER]
11| | 11| |
+---------------------------------------------------------------+
12| |
~ WRITER_BITMAP ~ ~ WRITER_BITMAP ~
**| | **| |
+---------------------------------------------------------------+ +---------------------------------------------------------------+
@ -652,19 +654,21 @@ WRITER
+---------------------------------------------------------------+ +---------------------------------------------------------------+
00| NEXT_ADDRESS | 00| NEXT_ADDRESS |
+---------------------------------------------------------------+ +---------------------------------------------------------------+
01| | 01| PREV_ADDRESS |
+ + +---------------------------------------------------------------+
02| | 02| |
+ KEY_HASH +
03| |
+ + + +
03| |
+ KEY_HASH +
04| | 04| |
+ +
05| |
+---------------------------------------------------------------+ +---------------------------------------------------------------+
05| STATUS_INFO | 06| STATUS_INFO |
+---------------------------------------------------------------+ +---------------------------------------------------------------+
06| SAMPLE_COUNT | 07| SAMPLE_COUNT |
+---------------------------------------------------------------+ +---------------------------------------------------------------+
07| ACK_COUNT | 08| ACK_COUNT |
+---------------------------------------------------------------+ +---------------------------------------------------------------+

1337
src/dds_reader.vhd
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File diff suppressed because it is too large Load Diff

841
src/dds_writer.vhd
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File diff suppressed because it is too large Load Diff

6
src/rtps_discovery_module.vhd
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@ -140,7 +140,7 @@ architecture arch of rtps_discovery_module is
LATCH_LIFESPAN_DURATION, RXO_RELIABILITY, RXO_DESTINATION_ORDER, RXO_OWNERSHIP, RXO_PRESENTATION, RXO_PARTITION, RXO_LATENCY_BUDGET, CHECK_MAX_SIZE_SERIALIZED, LATCH_LIFESPAN_DURATION, RXO_RELIABILITY, RXO_DESTINATION_ORDER, RXO_OWNERSHIP, RXO_PRESENTATION, RXO_PARTITION, RXO_LATENCY_BUDGET, CHECK_MAX_SIZE_SERIALIZED,
MATCH_DOMAIN_ID, MATCH_PROTOCOL_VERSION, LATCH_LOCATOR, LATCH_EXPECTS_INLINE_QOS, MATCH_GUID, CHECK_REMOTE_BUILTIN_ENDPOINTS, CHECK_STATUS_INFO, MATCH_DOMAIN_ID, MATCH_PROTOCOL_VERSION, LATCH_LOCATOR, LATCH_EXPECTS_INLINE_QOS, MATCH_GUID, CHECK_REMOTE_BUILTIN_ENDPOINTS, CHECK_STATUS_INFO,
PARTICIPANT_MATCH_STAGE, INFORM_ENDPOINTS_MATCH, INFORM_ENDPOINTS_UNMATCH, INFORM_ENDPOINTS_PARTICIPANT_UNMATCH, PARTICIPANT_STALE_CHECK, PARTICIPANT_MATCH_STAGE, INFORM_ENDPOINTS_MATCH, INFORM_ENDPOINTS_UNMATCH, INFORM_ENDPOINTS_PARTICIPANT_UNMATCH, PARTICIPANT_STALE_CHECK,
LATCH_REMOVED_GUIDPREFIX, PROCESS_HEARTBEAT, PROCESS_HEARTBEAT_SEQUENCE_NUMBERS, SEND_ACKNACK, SEND_HEARTBEAT, PROCESS_ACKNACK, PROCESS_HEARTBEAT, PROCESS_HEARTBEAT_SEQUENCE_NUMBERS, SEND_ACKNACK, SEND_HEARTBEAT, PROCESS_ACKNACK,
PROCESS_ACKNACK_SEQUENCE_NUMBERS, FIND_PARTICIPANT_DEST, SEND_HEADER, SEND_PARTICIPANT_ANNOUNCEMENT, SEND_PUB_DATA, SEND_SUB_DATA, PROCESS_ACKNACK_SEQUENCE_NUMBERS, FIND_PARTICIPANT_DEST, SEND_HEADER, SEND_PARTICIPANT_ANNOUNCEMENT, SEND_PUB_DATA, SEND_SUB_DATA,
SEND_MES_MAN_LIVE, SEND_MES_GAP, SEND_MES_AUTO_LIVE, LIVELINESS_UPDATE, SKIP_PARAMETER, SKIP_PACKET); SEND_MES_MAN_LIVE, SEND_MES_GAP, SEND_MES_AUTO_LIVE, LIVELINESS_UPDATE, SKIP_PARAMETER, SKIP_PACKET);
-- Memory FSM states. Explained below in detail -- Memory FSM states. Explained below in detail
@ -3958,8 +3958,6 @@ begin
-- Skip-Read -- Skip-Read
rd_guard := '1'; rd_guard := '1';
end if; end if;
when others =>
null;
end case; end case;
-- OVERREAD GUARD -- OVERREAD GUARD
@ -6225,8 +6223,6 @@ begin
when others => when others =>
null; null;
end case; end case;
when others =>
null;
end case; end case;
end process; end process;

2
src/rtps_handler.vhd
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@ -1306,8 +1306,6 @@ begin
rd_guard := '1'; rd_guard := '1';
end if; end if;
-- NOTE: Exit condition is via the OVERREAD GUARD -- NOTE: Exit condition is via the OVERREAD GUARD
when others =>
null;
end case; end case;
-- OVERREAD GUARD -- OVERREAD GUARD

4
src/rtps_out.vhd
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@ -236,8 +236,6 @@ begin
end if; end if;
end if; end if;
end if; end if;
when others =>
null;
end case; end case;
end process; end process;
@ -336,8 +334,6 @@ begin
-- DONE -- DONE
output_stage_next <= IDLE; output_stage_next <= IDLE;
end if; end if;
when others =>
null;
end case; end case;
end process; end process;

7
src/rtps_reader.vhd
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@ -142,7 +142,7 @@ architecture arch of rtps_reader is
type MEM_STAGE_TYPE is (IDLE, SEARCH_ENDPOINT, GET_ENDPOINT_DATA, INSERT_ENDPOINT, UPDATE_ENDPOINT, REMOVE_ENDPOINT, GET_NEXT_ENDPOINT, RESET_MEMORY); type MEM_STAGE_TYPE is (IDLE, SEARCH_ENDPOINT, GET_ENDPOINT_DATA, INSERT_ENDPOINT, UPDATE_ENDPOINT, REMOVE_ENDPOINT, GET_NEXT_ENDPOINT, RESET_MEMORY);
-- *Memory FSM Opcodes* -- *Memory FSM Opcodes*
-- OPCODE DESCRIPTION -- OPCODE DESCRIPTION
-- SEARCH_ENDPOINT Search memory for Endpoint with GUID equal to "guid" signal. -- SEARCH_ENDPOINT Search memory for Endpoint with GUID equal to "mem_r.guid" signal.
-- Set "mem_endpoint_data.addr" to base Address of found Endpoint, or ENDPOINT_MEMORY_MAX_ADDRESS if nothing found. -- Set "mem_endpoint_data.addr" to base Address of found Endpoint, or ENDPOINT_MEMORY_MAX_ADDRESS if nothing found.
-- "mem_endpoint_data" contains Endpoint Data according to "mem_r.field_flags". -- "mem_endpoint_data" contains Endpoint Data according to "mem_r.field_flags".
-- INSERT_ENDPOINT Insert Endpoint in memory -- INSERT_ENDPOINT Insert Endpoint in memory
@ -550,6 +550,7 @@ begin
payload_read <= '0'; payload_read <= '0';
payload_valid_in <= '0'; payload_valid_in <= '0';
payload_ready_out <= '0'; payload_ready_out <= '0';
payload_abort_read <= '0';
@ -2169,8 +2170,6 @@ begin
-- Skip-Read -- Skip-Read
rd_meta <= '1'; rd_meta <= '1';
end if; end if;
when others =>
null;
end case; end case;
-- OVERREAD GUARD -- OVERREAD GUARD
@ -3643,8 +3642,6 @@ begin
when others => when others =>
null; null;
end case; end case;
when others =>
null;
end case; end case;
end process; end process;

22
syn/rtps_reader_syn.vhd
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@ -17,12 +17,12 @@ entity rtps_reader_syn is
reset : in std_logic; reset : in std_logic;
time : in TIME_TYPE; time : in TIME_TYPE;
-- FROM RTPS HANDLER (USER TRAFFIC) -- FROM RTPS HANDLER (USER TRAFFIC)
empty_user : in std_logic_vector(0 to NUM_READERS-1); empty_user : in std_logic_vector(0 to 0);
rd_user : out std_logic; rd_user : out std_logic;
data_in_user : in std_logic_vector(WORD_WIDTH-1 downto 0); data_in_user : in std_logic_vector(WORD_WIDTH-1 downto 0);
last_word_in_user : in std_logic; last_word_in_user : in std_logic;
-- FROM RTPS BUILTIN ENDPOINT (META TRAFFIC) -- FROM RTPS BUILTIN ENDPOINT (META TRAFFIC)
empty_meta : in std_logic_vector(0 to NUM_READERS-1); empty_meta : in std_logic_vector(0 to 0);
rd_meta : out std_logic; rd_meta : out std_logic;
data_in_meta : in std_logic_vector(WORD_WIDTH-1 downto 0); data_in_meta : in std_logic_vector(WORD_WIDTH-1 downto 0);
last_word_in_meta : in std_logic; last_word_in_meta : in std_logic;
@ -32,15 +32,15 @@ entity rtps_reader_syn is
data_out_ro : out std_logic_vector(WORD_WIDTH-1 downto 0); data_out_ro : out std_logic_vector(WORD_WIDTH-1 downto 0);
last_word_out_ro : out std_logic; last_word_out_ro : out std_logic;
-- TO HISTORY CACHE -- TO HISTORY CACHE
start_hc : out std_logic_vector(0 to NUM_READERS-1); start_hc : out std_logic_vector(0 to 0);
opcode_hc : out HISTORY_CACHE_OPCODE_ARRAY_TYPE(0 to NUM_READERS-1); opcode_hc : out HISTORY_CACHE_OPCODE_ARRAY_TYPE(0 to 0);
ack_hc : in std_logic_vector(0 to NUM_READERS-1); ack_hc : in std_logic_vector(0 to 0);
done_hc : in std_logic_vector(0 to NUM_READERS-1); done_hc : in std_logic_vector(0 to 0);
ret_hc : in HISTORY_CACHE_RESPONSE_ARRAY_TYPE(0 to NUM_READERS-1); ret_hc : in HISTORY_CACHE_RESPONSE_ARRAY_TYPE(0 to 0);
valid_out_hc : out std_logic_vector(0 to NUM_READERS-1); valid_out_hc : out std_logic_vector(0 to 0);
ready_out_hc : in std_logic_vector(0 to NUM_READERS-1); ready_out_hc : in std_logic_vector(0 to 0);
data_out_hc : out WORD_ARRAY_TYPE(0 to NUM_READERS-1); data_out_hc : out WORD_ARRAY_TYPE(0 to 0);
last_word_out_hc : out std_logic_vector(0 to NUM_READERS-1) last_word_out_hc : out std_logic_vector(0 to 0)
); );
end entity; end entity;

40
syn/rtps_writer_syn.vhd
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@ -17,40 +17,40 @@ entity rtps_writer_syn is
reset : in std_logic; reset : in std_logic;
time : in TIME_TYPE; time : in TIME_TYPE;
-- FROM RTPS HANDLER (USER TRAFFIC) -- FROM RTPS HANDLER (USER TRAFFIC)
empty_user : in std_logic_vector(0 to NUM_WRITERS-1); empty_user : in std_logic_vector(0 to 0);
rd_user : out std_logic; rd_user : out std_logic;
data_in_user : in std_logic_vector(WORD_WIDTH-1 downto 0); data_in_user : in std_logic_vector(WORD_WIDTH-1 downto 0);
last_word_in_user : in std_logic; last_word_in_user : in std_logic;
-- FROM DISCOVERY MODULE (META TRAFFIC) -- FROM DISCOVERY MODULE (META TRAFFIC)
empty_meta : in std_logic_vector(0 to NUM_WRITERS-1); empty_meta : in std_logic_vector(0 to 0);
rd_meta : out std_logic; rd_meta : out std_logic;
data_in_meta : in std_logic_vector(WORD_WIDTH-1 downto 0); data_in_meta : in std_logic_vector(WORD_WIDTH-1 downto 0);
last_word_in_meta : in std_logic; last_word_in_meta : in std_logic;
-- TO DISCOVERY MODULE (META TRAFFIC) -- TO DISCOVERY MODULE (META TRAFFIC)
alive_sig : out std_logic_vector(0 to NUM_WRITERS-1); alive_sig : out std_logic_vector(0 to 0);
-- RTPS OUTPUT -- RTPS OUTPUT
full_ro : in std_logic; full_ro : in std_logic;
wr_ro : out std_logic; wr_ro : out std_logic;
data_out_ro : out std_logic_vector(WORD_WIDTH-1 downto 0); data_out_ro : out std_logic_vector(WORD_WIDTH-1 downto 0);
last_word_out_ro : out std_logic; last_word_out_ro : out std_logic;
-- FROM HISTORY CACHE -- FROM HISTORY CACHE
liveliness_assertion : in std_logic_vector(0 to NUM_WRITERS-1); liveliness_assertion : in std_logic_vector(0 to 0);
data_available : in std_logic_vector(0 to NUM_WRITERS-1); data_available : in std_logic_vector(0 to 0);
start_hc : out std_logic_vector(0 to NUM_WRITERS-1); start_hc : out std_logic_vector(0 to 0);
opcode_hc : out HISTORY_CACHE_OPCODE_ARRAY_TYPE(0 to NUM_WRITERS-1); opcode_hc : out HISTORY_CACHE_OPCODE_ARRAY_TYPE(0 to 0);
ack_hc : in std_logic_vector(0 to NUM_WRITERS-1); ack_hc : in std_logic_vector(0 to 0);
seq_nr_hc : out SEQUENCENUMBER_ARRAY_TYPE(0 to NUM_WRITERS-1); seq_nr_hc : out SEQUENCENUMBER_ARRAY_TYPE(0 to 0);
done_hc : in std_logic_vector(0 to NUM_WRITERS-1); done_hc : in std_logic_vector(0 to 0);
ret_hc : in HISTORY_CACHE_RESPONSE_ARRAY_TYPE(0 to NUM_WRITERS-1); ret_hc : in HISTORY_CACHE_RESPONSE_ARRAY_TYPE(0 to 0);
get_data_hc : out std_logic_vector(0 to NUM_WRITERS-1); get_data_hc : out std_logic_vector(0 to 0);
valid_in_hc : in std_logic_vector(0 to NUM_WRITERS-1); valid_in_hc : in std_logic_vector(0 to 0);
ready_in_hc : out std_logic_vector(0 to NUM_WRITERS-1); ready_in_hc : out std_logic_vector(0 to 0);
data_in_hc : in WORD_ARRAY_TYPE(0 to NUM_WRITERS-1); data_in_hc : in WORD_ARRAY_TYPE(0 to 0);
last_word_in_hc : in std_logic_vector(0 to NUM_WRITERS-1); last_word_in_hc : in std_logic_vector(0 to 0);
cc_instance_handle : in INSTANCE_HANDLE_ARRAY_TYPE(0 to NUM_WRITERS-1); cc_instance_handle : in INSTANCE_HANDLE_ARRAY_TYPE(0 to 0);
cc_kind : in CACHE_CHANGE_KIND_ARRAY_TYPE(0 to NUM_WRITERS-1); cc_kind : in CACHE_CHANGE_KIND_ARRAY_TYPE(0 to 0);
cc_source_timestamp : in TIME_ARRAY_TYPE(0 to NUM_WRITERS-1); cc_source_timestamp : in TIME_ARRAY_TYPE(0 to 0);
cc_seq_nr : in SEQUENCENUMBER_ARRAY_TYPE(0 to NUM_WRITERS-1) cc_seq_nr : in SEQUENCENUMBER_ARRAY_TYPE(0 to 0)
); );
end entity; end entity;