rtps-fpga/FWFT_FIFO_cfg.vhd at d537cd74602f93dfcf15a3db8bf1b11e01d04d53 - rtps-fpga - Gitea: Git with a cup of tea

greek64/rtps-fpga

Greek 6e20b8958d Add VHDL configuration for single_port_ram and FWFT_FIFO

Allow single_port_ram and FWFT_FIFO to have Altera specific
architectures.

2021-12-09 19:43:56 +01:00

4 lines

88 B

VHDL

Raw Blame History

 configuration FWFT_FIFO_cfg of FWFT_FIFO is
     for arch
     end for;
 end configuration;