labor-mst/xillinux-syn
Greek bb07d0a072 * Modify xillinux vivado project
- Add custom xillybus IP core to vivado design
	- Add feedback_top
TODO: Remove PS_GPIO and connect custom pins
2020-04-26 17:36:25 +02:00
..
bootfiles * Added Xillybus demo project 2020-04-26 11:42:06 +02:00
cores * Modify xillinux vivado project 2020-04-26 17:36:25 +02:00
system * Added Xillybus demo project 2020-04-26 11:42:06 +02:00
vhdl * Modify xillinux vivado project 2020-04-26 17:36:25 +02:00
vivado * Modify xillinux vivado project 2020-04-26 17:36:25 +02:00
vivado-essentials * Added Xillybus demo project 2020-04-26 11:42:06 +02:00
.gitignore * Added Xillybus demo project 2020-04-26 11:42:06 +02:00
xillydemo-vivado.tcl * Added Xillybus demo project 2020-04-26 11:42:06 +02:00