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Make codebase Quartus synthesizable

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Remove non-Quartus-supported VHDL 2008 features.
Remove inferred Latches.
Add test Entities to see resulting hw synthesis of various code
segments.
This commit is contained in:
Greek 2021-11-21 14:54:00 +01:00
parent cffaafb284
commit b47d409f13
28 changed files with 1253 additions and 222 deletions
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2
.gitignore vendored
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@ -23,6 +23,8 @@
!*.qsf
#QSYS File
!*.qsys
#Unignore VHDL Files in syn Directory First Level
!/syn/*.vhd
#Delete download from existence
/download

1
src/TEMPLATE_key_holder.vhd
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@ -124,6 +124,7 @@ begin
valid_out <= '0';
start_kh <= '0';
valid_in_kh <= '0';
last_word_in_kh <= '0';
data_in_kh <= (others => '0');
data_out <= (others => '0');
-- ###GENERATED START###

26
src/Tests/Level_2/L2_Testbench_Lib2.vhd
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@ -136,10 +136,15 @@ begin
dds_writer_w_inst : entity Testbench_Lib2.dds_writer(arch)
generic map (
ID => 0,
PAYLOAD_FRAME_SIZE => MAX_TYPE1_SIZE,
MAX_SAMPLES => int(5,CDR_LONG_WIDTH),
MAX_INSTANCES => int(5,CDR_LONG_WIDTH)
HISTORY_QOS => ENDPOINT_HISTORY_QOS(0),
DEADLINE_QOS => ENDPOINT_DEADLINE_QOS(0),
LIFESPAN_QOS => ENDPOINT_LIFESPAN_QOS(0),
LEASE_DURATION => ENDPOINT_LEASE_DURATION(0),
WITH_KEY => ENDPOINT_WITH_KEY(0),
MAX_SAMPLES => ENDPOINT_MAX_SAMPLES(0),
MAX_INSTANCES => ENDPOINT_MAX_INSTANCES(0),
MAX_SAMPLES_PER_INSTANCE => ENDPOINT_MAX_SAMPLES_PER_INSTANCE(0),
PAYLOAD_FRAME_SIZE => MAX_TYPE1_SIZE
)
port map (
-- SYSTEM
@ -188,7 +193,18 @@ begin
rtps_writer_w_inst : entity Testbench_Lib2.rtps_writer(arch)
generic map (
ID => 0,
RELIABILITY_QOS => ENDPOINT_RELIABILITY_QOS(0),
LIVELINESS_QOS => ENDPOINT_LIVELINESS_QOS(0),
DURABILITY_QOS => ENDPOINT_DURABILITY_QOS(0),
DESTINATION_ORDER_QOS => ENDPOINT_DESTINATION_ORDER_QOS(0),
ACKNACK_RESPONSE_DELAY => ENDPOINT_ACKNACK_RESPONSE_DELAY(0),
ACKNACK_SUPPRESSION_DELAY => ENDPOINT_ACKNACK_SUPPRESSION_DELAY(0),
LEASE_DURATION => ENDPOINT_LEASE_DURATION(0),
HEARTBEAT_PERIOD => ENDPOINT_HEARTBEAT_PERIOD(0),
ENTITYID => ENTITYID(0),
WITH_KEY => ENDPOINT_WITH_KEY(0),
PUSH_MODE => ENDPOINT_PUSH_MODE(0),
INLINE_QOS => gen_inline_qos(0),
MAX_REMOTE_ENDPOINTS => 5
)
port map (

25
src/Tests/Level_2/L2_Testbench_Lib3.vhd
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@ -192,10 +192,20 @@ begin
dds_reader_r_inst : entity Testbench_Lib3.dds_reader(arch)
generic map (
ID => 0,
TIME_BASED_FILTER_QOS => ENDPOINT_TIME_BASED_FILTER_QOS(0),
DEADLINE_QOS => ENDPOINT_DEADLINE_QOS(0),
MAX_INSTANCES => ENDPOINT_MAX_INSTANCES(0),
MAX_SAMPLES_PER_INSTANCE => ENDPOINT_MAX_SAMPLES_PER_INSTANCE(0),
MAX_SAMPLES => ENDPOINT_MAX_SAMPLES(0),
HISTORY_QOS => ENDPOINT_HISTORY_QOS(0),
RELIABILITY_QOS => ENDPOINT_RELIABILITY_QOS(0),
PRESENTATION_QOS => ENDPOINT_PRESENTATION_QOS(0),
DESTINATION_ORDER_QOS => ENDPOINT_DESTINATION_ORDER_QOS(0),
COHERENT_ACCESS => ENDPOINT_COHERENT_ACCESS(0),
ORDERED_ACCESS => ENDPOINT_ORDERED_ACCESS(0),
WITH_KEY => ENDPOINT_WITH_KEY(0),
PAYLOAD_FRAME_SIZE => MAX_TYPE1_SIZE,
MAX_SAMPLES => int(5,CDR_LONG_WIDTH),
MAX_INSTANCES => int(5,CDR_LONG_WIDTH)
MAX_REMOTE_ENDPOINTS => 5
)
port map (
-- SYSTEM
@ -250,7 +260,14 @@ begin
rtps_reader_r_inst : entity Testbench_Lib3.rtps_reader(arch)
generic map (
ID => 0,
ENTITYID => ENTITYID(0),
RELIABILITY_QOS => ENDPOINT_RELIABILITY_QOS(0),
LIVELINESS_QOS => ENDPOINT_LIVELINESS_QOS(0),
DURABILITY_QOS => ENDPOINT_DURABILITY_QOS(0),
HEARTBEAT_RESPONSE_DELAY => ENDPOINT_HEARTBEAT_RESPONSE_DELAY(0),
HEARTBEAT_SUPPRESSION_DELAY => ENDPOINT_HEARTBEAT_SUPPRESSION_DELAY(0),
LEASE_DURATION => ENDPOINT_LEASE_DURATION(0),
WITH_KEY => ENDPOINT_WITH_KEY(0),
MAX_REMOTE_ENDPOINTS => 5
)
port map (

1
src/Tests/Type1_key_holder.vhd
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@ -119,6 +119,7 @@ begin
valid_out <= '0';
start_kh <= '0';
valid_in_kh <= '0';
last_word_in_kh <= '0';
data_in_kh <= (others => '0');
data_out <= (others => '0');
-- ###GENERATED START###

1
src/Tests/Type2_key_holder.vhd
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@ -154,6 +154,7 @@ begin
valid_out <= '0';
start_kh <= '0';
valid_in_kh <= '0';
last_word_in_kh <= '0';
data_in_kh <= (others => '0');
data_out <= (others => '0');
-- ###GENERATED START###

4
src/Tests/test_config2.vhd
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@ -119,8 +119,8 @@ package user_config is
constant ENDPOINT_HISTORY_QOS : USER_ENUMERATION_ARRAY_TYPE(0 to NUM_ENDPOINTS-1) := (others => DEFAULT_HISTORY_QOS);
constant ENDPOINT_HISTORY_DEPTH : USER_LONG_ARRAY_TYPE(0 to NUM_ENDPOINTS-1) := (others => DEFAULT_HISTORY_DEPTH);
-- Array mapping RESOURCE_LIMITS QoS to Endpoints
constant ENDPOINT_MAX_SAMPLES : USER_LONG_ARRAY_TYPE(0 to NUM_ENDPOINTS-1) := (others => DEFAULT_MAX_SAMPLES);
constant ENDPOINT_MAX_INSTANCES : USER_LONG_ARRAY_TYPE(0 to NUM_ENDPOINTS-1) := (others => DEFAULT_MAX_INSTANCES);
constant ENDPOINT_MAX_SAMPLES : USER_LONG_ARRAY_TYPE(0 to NUM_ENDPOINTS-1) := (others => std_logic_vector(to_unsigned(5, CDR_LONG_WIDTH)));
constant ENDPOINT_MAX_INSTANCES : USER_LONG_ARRAY_TYPE(0 to NUM_ENDPOINTS-1) := (others => std_logic_vector(to_unsigned(5, CDR_LONG_WIDTH)));
constant ENDPOINT_MAX_SAMPLES_PER_INSTANCE : USER_LONG_ARRAY_TYPE(0 to NUM_ENDPOINTS-1) := (others => DEFAULT_MAX_SAMPLES_PER_INSTANCE);
-- XXX: ENTITY_FACTORY QoS Ignored
-- Array mapping WRITER_DATA_LIFECYCLE QoS to Endpoints (Only relevant to Writers)

4
src/Tests/test_config3.vhd
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@ -119,8 +119,8 @@ package user_config is
constant ENDPOINT_HISTORY_QOS : USER_ENUMERATION_ARRAY_TYPE(0 to NUM_ENDPOINTS-1) := (others => DEFAULT_HISTORY_QOS);
constant ENDPOINT_HISTORY_DEPTH : USER_LONG_ARRAY_TYPE(0 to NUM_ENDPOINTS-1) := (others => DEFAULT_HISTORY_DEPTH);
-- Array mapping RESOURCE_LIMITS QoS to Endpoints
constant ENDPOINT_MAX_SAMPLES : USER_LONG_ARRAY_TYPE(0 to NUM_ENDPOINTS-1) := (others => DEFAULT_MAX_SAMPLES);
constant ENDPOINT_MAX_INSTANCES : USER_LONG_ARRAY_TYPE(0 to NUM_ENDPOINTS-1) := (others => DEFAULT_MAX_INSTANCES);
constant ENDPOINT_MAX_SAMPLES : USER_LONG_ARRAY_TYPE(0 to NUM_ENDPOINTS-1) := (others => std_logic_vector(to_unsigned(5, CDR_LONG_WIDTH)));
constant ENDPOINT_MAX_INSTANCES : USER_LONG_ARRAY_TYPE(0 to NUM_ENDPOINTS-1) := (others => std_logic_vector(to_unsigned(5, CDR_LONG_WIDTH)));
constant ENDPOINT_MAX_SAMPLES_PER_INSTANCE : USER_LONG_ARRAY_TYPE(0 to NUM_ENDPOINTS-1) := (others => DEFAULT_MAX_SAMPLES_PER_INSTANCE);
-- XXX: ENTITY_FACTORY QoS Ignored
-- Array mapping WRITER_DATA_LIFECYCLE QoS to Endpoints (Only relevant to Writers)

1
src/Tests/test_key_hash_generator.vhd
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@ -22,6 +22,7 @@ begin
checksum_next <= checksum;
done_sig_next <= '0';
ack <= '0';
ready_in <= '0';
case (stage) is
when IDLE =>

81
src/dds_reader.vhd
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@ -11,19 +11,20 @@ use work.rtps_config_package.all;
entity dds_reader is
generic (
ID : ID_TYPE := 0;
TIME_BASED_FILTER_QOS : DURATION_TYPE := ENDPOINT_TIME_BASED_FILTER_QOS(ID);
DEADLINE_QOS : DURATION_TYPE := ENDPOINT_DEADLINE_QOS(ID);
MAX_INSTANCES : std_logic_vector(CDR_LONG_WIDTH-1 downto 0) := ENDPOINT_MAX_INSTANCES(ID);
MAX_SAMPLES_PER_INSTANCE : std_logic_vector(CDR_LONG_WIDTH-1 downto 0) := ENDPOINT_MAX_SAMPLES_PER_INSTANCE(ID);
MAX_SAMPLES : std_logic_vector(CDR_LONG_WIDTH-1 downto 0) := ENDPOINT_MAX_SAMPLES(ID);
HISTORY_QOS : std_logic_vector(CDR_ENUMERATION_WIDTH-1 downto 0) := ENDPOINT_HISTORY_QOS(ID);
RELIABILITY_QOS : std_logic_vector(CDR_ENUMERATION_WIDTH-1 downto 0) := ENDPOINT_RELIABILITY_QOS(ID);
PRESENTATION_QOS : std_logic_vector(CDR_ENUMERATION_WIDTH-1 downto 0) := ENDPOINT_PRESENTATION_QOS(ID);
DESTINATION_ORDER_QOS : std_logic_vector(CDR_ENUMERATION_WIDTH-1 downto 0) := ENDPOINT_DESTINATION_ORDER_QOS(ID);
COHERENT_ACCESS : boolean := ENDPOINT_COHERENT_ACCESS(ID);
ORDERED_ACCESS : boolean := ENDPOINT_ORDERED_ACCESS(ID);
WITH_KEY : boolean := ENDPOINT_WITH_KEY(ID);
-- XXX: Quartus Limitation [VHDL error at <location>: generic "<name>" cannot be used in its own interface list (ID: 10556)]
--ID : ID_TYPE := 0;
TIME_BASED_FILTER_QOS : DURATION_TYPE;-- := ENDPOINT_TIME_BASED_FILTER_QOS(ID);
DEADLINE_QOS : DURATION_TYPE;-- := ENDPOINT_DEADLINE_QOS(ID);
MAX_INSTANCES : std_logic_vector(CDR_LONG_WIDTH-1 downto 0);-- := ENDPOINT_MAX_INSTANCES(ID);
MAX_SAMPLES_PER_INSTANCE : std_logic_vector(CDR_LONG_WIDTH-1 downto 0);-- := ENDPOINT_MAX_SAMPLES_PER_INSTANCE(ID);
MAX_SAMPLES : std_logic_vector(CDR_LONG_WIDTH-1 downto 0);-- := ENDPOINT_MAX_SAMPLES(ID);
HISTORY_QOS : std_logic_vector(CDR_ENUMERATION_WIDTH-1 downto 0);-- := ENDPOINT_HISTORY_QOS(ID);
RELIABILITY_QOS : std_logic_vector(CDR_ENUMERATION_WIDTH-1 downto 0);-- := ENDPOINT_RELIABILITY_QOS(ID);
PRESENTATION_QOS : std_logic_vector(CDR_ENUMERATION_WIDTH-1 downto 0);-- := ENDPOINT_PRESENTATION_QOS(ID);
DESTINATION_ORDER_QOS : std_logic_vector(CDR_ENUMERATION_WIDTH-1 downto 0);-- := ENDPOINT_DESTINATION_ORDER_QOS(ID);
COHERENT_ACCESS : boolean;-- := ENDPOINT_COHERENT_ACCESS(ID);
ORDERED_ACCESS : boolean;-- := ENDPOINT_ORDERED_ACCESS(ID);
WITH_KEY : boolean;-- := ENDPOINT_WITH_KEY(ID);
PAYLOAD_FRAME_SIZE : natural;
MAX_REMOTE_ENDPOINTS : natural := 50
);
@ -179,7 +180,11 @@ architecture arch of dds_reader is
function gen_smf_disposed_gen_cnt_offset(WITH_KEY : boolean) return natural is
variable ret : natural := 0;
begin
ret := (SMF_INSTANCE_ADDR_OFFSET + 1) when WITH_KEY else SMF_INSTANCE_ADDR_OFFSET;
if (WITH_KEY) then
ret := SMF_INSTANCE_ADDR_OFFSET + 1;
else
ret := SMF_INSTANCE_ADDR_OFFSET;
end if;
return ret;
end function;
constant SMF_DISPOSED_GEN_CNT_OFFSET : natural := gen_smf_disposed_gen_cnt_offset(WITH_KEY);
@ -204,7 +209,11 @@ architecture arch of dds_reader is
function gen_imf_writer_bitmap_offset(time_based_filter : DURATION_TYPE) return natural is
variable ret : natural := 0;
begin
ret := IMF_IGNORE_DEADLINE_OFFSET+2 when (time_based_filter /= DURATION_ZERO) else IMF_IGNORE_DEADLINE_OFFSET;
if (time_based_filter /= DURATION_ZERO) then
ret := IMF_IGNORE_DEADLINE_OFFSET+2;
else
ret := IMF_IGNORE_DEADLINE_OFFSET;
end if;
return ret;
end function;
constant IMF_WRITER_BITMAP_OFFSET : natural := gen_imf_writer_bitmap_offset(TIME_BASED_FILTER_QOS);
@ -836,6 +845,12 @@ begin
sample_write_data <= (others => '0');
payload_addr <= (others => '0');
payload_write_data <= (others => '0');
inst_mem_fields <= (others => '0');
status_info_update <= (others => '0');
sample_cnt <= (others => '0');
gen_cnt <= (others => '0');
deadline <= TIME_INVALID;
case (stage) is
@ -1022,7 +1037,11 @@ begin
sample_p1_next <= SAMPLE_MEMORY_MAX_ADDRESS;
sample_p2_next <= SAMPLE_MEMORY_MAX_ADDRESS;
pre_calculated_next <= '0';
single_instance_next <= '0' when WITH_KEY else '1';
if (WITH_KEY) then
single_instance_next <= '0';
else
single_instance_next <= '1';
end if;
dynamic_next_instance_next <= '0';
collection_cnt_next <= (others => '0');
collection_cnt_max_next <= (others => '0');
@ -1828,7 +1847,11 @@ begin
inst_opcode <= INSERT_INSTANCE;
status_info_update <= (ISI_LIVELINESS_FLAG => '1', ISI_NOT_ALIVE_DISPOSED_FLAG => sample_status_info(SSI_DISPOSED_FLAG), others => '0');
sample_cnt <= to_unsigned(1, WORD_WIDTH);
deadline <= (time + TIME_BASED_FILTER_QOS) when (TIME_BASED_FILTER_QOS /= DURATION_ZERO) else TIME_INVALID;
if (TIME_BASED_FILTER_QOS /= DURATION_ZERO) then
deadline <= time + TIME_BASED_FILTER_QOS;
else
deadline <= TIME_INVALID;
end if;
tmp_bitmap := (others => '0');
tmp_bitmap(writer_id) := '1';
writer_bitmap <= to_writer_bitmap_array(tmp_bitmap);
@ -1887,7 +1910,11 @@ begin
inst_opcode <= INSERT_INSTANCE;
status_info_update <= (ISI_LIVELINESS_FLAG => '1', ISI_NOT_ALIVE_DISPOSED_FLAG => sample_status_info(SSI_DISPOSED_FLAG), others => '0');
sample_cnt <= to_unsigned(1, WORD_WIDTH);
deadline <= (time + TIME_BASED_FILTER_QOS) when (TIME_BASED_FILTER_QOS /= DURATION_ZERO) else TIME_INVALID;
if (TIME_BASED_FILTER_QOS /= DURATION_ZERO) then
deadline <= time + TIME_BASED_FILTER_QOS;
else
deadline <= TIME_INVALID;
end if;
tmp_bitmap := (others => '0');
tmp_bitmap(writer_id) := '1';
writer_bitmap <= to_writer_bitmap_array(tmp_bitmap);
@ -3253,7 +3280,11 @@ begin
inst_opcode <= INSERT_INSTANCE;
status_info_update <= (ISI_LIVELINESS_FLAG => '1', ISI_NOT_ALIVE_DISPOSED_FLAG => sample_status_info(SSI_DISPOSED_FLAG), others => '0');
sample_cnt <= to_unsigned(1, WORD_WIDTH);
deadline <= (time + TIME_BASED_FILTER_QOS) when (TIME_BASED_FILTER_QOS /= DURATION_ZERO) else TIME_INVALID;
if (TIME_BASED_FILTER_QOS /= DURATION_ZERO) then
deadline <= time + TIME_BASED_FILTER_QOS;
else
deadline <= TIME_INVALID;
end if;
tmp_bitmap := (others => '0');
tmp_bitmap(writer_id) := '1';
writer_bitmap <= to_writer_bitmap_array(tmp_bitmap);
@ -6725,7 +6756,11 @@ begin
view_state <= view_state_next;
si_instance_state_sig <= si_instance_state_sig_next;
instance_state <= instance_state_next;
inst_data <= inst_data_next when WITH_KEY else inst_data_next2;
if (WITH_KEY) then
inst_data <= inst_data_next;
else
inst_data <= inst_data_next2;
end if;
inst_latch_data <= inst_latch_data_next;
sample_rej_last_reason <= sample_rej_last_reason_next;
rtps_return_code_latch <= rtps_return_code_latch_next;
@ -6754,7 +6789,11 @@ begin
wait_for_sample_removal <= wait_for_sample_removal_next;
dis_gen_cnt_latch <= dis_gen_cnt_latch_next;
no_w_gen_cnt_latch <= no_w_gen_cnt_latch_next;
current_imf <= current_imf_next when WITH_KEY else (others => '1');
if (WITH_KEY) then
current_imf <= current_imf_next;
else
current_imf <= (others => '1');
end if;
sample_addr_latch_1 <= sample_addr_latch_1_next;
sample_addr_latch_2 <= sample_addr_latch_2_next;
sample_addr_latch_3 <= sample_addr_latch_3_next;

110
src/dds_writer.vhd
View File

@ -11,15 +11,16 @@ use work.rtps_config_package.all;
entity dds_writer is
generic (
ID : ID_TYPE := 0;
HISTORY_QOS : std_logic_vector(CDR_ENUMERATION_WIDTH-1 downto 0) := ENDPOINT_HISTORY_QOS(ID);
DEADLINE_QOS : DURATION_TYPE := ENDPOINT_DEADLINE_QOS(ID);
LIFESPAN_QOS : DURATION_TYPE := ENDPOINT_LIFESPAN_QOS(ID);
LEASE_DURATION : DURATION_TYPE := ENDPOINT_LEASE_DURATION(ID);
WITH_KEY : boolean := ENDPOINT_WITH_KEY(ID);
MAX_SAMPLES : std_logic_vector(CDR_LONG_WIDTH-1 downto 0) := ENDPOINT_MAX_SAMPLES(ID);
MAX_INSTANCES : std_logic_vector(CDR_LONG_WIDTH-1 downto 0) := ENDPOINT_MAX_INSTANCES(ID);
MAX_SAMPLES_PER_INSTANCE : std_logic_vector(CDR_LONG_WIDTH-1 downto 0) := ENDPOINT_MAX_SAMPLES_PER_INSTANCE(ID);
-- XXX: Quartus Limitation [VHDL error at <location>: generic "<name>" cannot be used in its own interface list (ID: 10556)]
--ID : ID_TYPE := 0;
HISTORY_QOS : std_logic_vector(CDR_ENUMERATION_WIDTH-1 downto 0);-- := ENDPOINT_HISTORY_QOS(ID);
DEADLINE_QOS : DURATION_TYPE;-- := ENDPOINT_DEADLINE_QOS(ID);
LIFESPAN_QOS : DURATION_TYPE;-- := ENDPOINT_LIFESPAN_QOS(ID);
LEASE_DURATION : DURATION_TYPE;-- := ENDPOINT_LEASE_DURATION(ID);
WITH_KEY : boolean;-- := ENDPOINT_WITH_KEY(ID);
MAX_SAMPLES : std_logic_vector(CDR_LONG_WIDTH-1 downto 0);-- := ENDPOINT_MAX_SAMPLES(ID);
MAX_INSTANCES : std_logic_vector(CDR_LONG_WIDTH-1 downto 0);-- := ENDPOINT_MAX_INSTANCES(ID);
MAX_SAMPLES_PER_INSTANCE : std_logic_vector(CDR_LONG_WIDTH-1 downto 0);-- := ENDPOINT_MAX_SAMPLES_PER_INSTANCE(ID);
PAYLOAD_FRAME_SIZE : natural
);
port (
@ -158,7 +159,11 @@ architecture arch of dds_writer is
function gen_smf_payload_addr_offset(lifespan : DURATION_TYPE) return natural is
variable ret : natural := 0;
begin
ret := (SMF_LIFESPAN_DEADLINE_OFFSET + 2) when (lifespan /= DURATION_INFINITE) else SMF_LIFESPAN_DEADLINE_OFFSET;
if (lifespan /= DURATION_INFINITE) then
ret := SMF_LIFESPAN_DEADLINE_OFFSET + 2;
else
ret := SMF_LIFESPAN_DEADLINE_OFFSET;
end if;
return ret;
end function;
constant SMF_PAYLOAD_ADDR_OFFSET : natural := gen_smf_payload_addr_offset(LIFESPAN_QOS);
@ -166,7 +171,11 @@ architecture arch of dds_writer is
function gen_smf_prev_addr_offset(WITH_KEY : boolean) return natural is
variable ret : natural := 0;
begin
ret := (SMF_INSTANCE_ADDR_OFFSET + 1) when WITH_KEY else SMF_INSTANCE_ADDR_OFFSET;
if (WITH_KEY) then
ret := SMF_INSTANCE_ADDR_OFFSET + 1;
else
ret := SMF_INSTANCE_ADDR_OFFSET;
end if;
return ret;
end function;
constant SMF_PREV_ADDR_OFFSET : natural := gen_smf_prev_addr_offset(WITH_KEY);
@ -346,8 +355,6 @@ architecture arch of dds_writer is
signal long_latch, long_latch_next : std_logic_vector(CDR_LONG_WIDTH-1 downto 0);
-- Signal used to pass Sample Status Infos to Instance Memory Process
signal status_info_update : std_logic_vector(CDR_LONG_WIDTH-1 downto 0);
-- Signal used to pass TIMEs to the Instance Memory Process
signal deadline : TIME_TYPE;
-- Signal containing the relevant Instance Memory Frame Fields of the Instance Memory Operation
signal inst_mem_fields : std_logic_vector(0 to IMF_FLAG_WIDTH-1);
-- Signal used to pass Instance Pointers to the Instance Memory Process
@ -718,6 +725,11 @@ begin
payload_write_data <= (others => '0');
data_out_rtps <= (others => '0');
data_out_dds <= (others => '0');
status_info_update <= (others => '0');
inst_mem_fields <= (others => '0');
sample_cnt <= (others => '0');
ack_cnt <= (others => '0');
case (stage) is
@ -1191,7 +1203,11 @@ begin
when 3 =>
sample_valid_in <= '1';
sample_addr <= cur_sample + SMF_TIMESTAMP_OFFSET;
sample_write_data <= std_logic_vector(source_ts(0)) when source_ts /= TIME_INVALID else std_logic_vector(time(0));
if (source_ts /= TIME_INVALID) then
sample_write_data <= std_logic_vector(source_ts(0));
else
sample_write_data <= std_logic_vector(time(0));
end if;
-- Memory Flow Control Guard
if (sample_ready_in = '1') then
cnt_next <= cnt + 1;
@ -1200,7 +1216,11 @@ begin
when 4 =>
sample_valid_in <= '1';
sample_addr <= cur_sample + SMF_TIMESTAMP_OFFSET + 1;
sample_write_data <= std_logic_vector(source_ts(1)) when source_ts /= TIME_INVALID else std_logic_vector(time(1));
if (source_ts /= TIME_INVALID) then
sample_write_data <= std_logic_vector(source_ts(1));
else
sample_write_data <= std_logic_vector(time(1));
end if;
-- Memory Flow Control Guard
if (sample_ready_in = '1') then
-- Synthesis Guard
@ -1653,7 +1673,11 @@ begin
else -- HISTORY_QOS = KEEP_LAST_HISTORY_QOS
-- Accept Change (Remove Oldest (ACKed) Instance Sample)
remove_oldest_inst_sample_next <= '1';
remove_ack_sample_next <= '1' when (inst_data.ack_cnt /= 0) else '0';
if (inst_data.ack_cnt /= 0) then
remove_ack_sample_next <= '1';
else
remove_ack_sample_next <= '0';
end if;
done_dds <= '1';
return_code_dds <= RETCODE_OK;
stage_next <= UPDATE_INSTANCE;
@ -1679,7 +1703,11 @@ begin
else -- HISTORY_QOS = KEEP_LAST_HISTORY_QOS
-- Accept Change (Remove Oldest (ACKed) Sample)
remove_oldest_sample_next <= '1';
remove_ack_sample_next <= '1' when (global_ack_cnt /= 0) else '0';
if (global_ack_cnt /= 0) then
remove_ack_sample_next <= '1';
else
remove_ack_sample_next <= '0';
end if;
done_dds <= '1';
return_code_dds <= RETCODE_OK;
stage_next <= UPDATE_INSTANCE;
@ -1743,7 +1771,11 @@ begin
else -- HISTORY_QOS = KEEP_LAST_HISTORY_QOS
-- Accept Change (Remove Oldest (ACKed) Sample)
remove_oldest_sample_next <= '1';
remove_ack_sample_next <= '1' when (global_ack_cnt /= 0) else '0';
if (global_ack_cnt /= 0) then
remove_ack_sample_next <= '1';
else
remove_ack_sample_next <= '0';
end if;
done_dds <= '1';
return_code_dds <= RETCODE_OK;
@ -1797,7 +1829,11 @@ begin
else -- HISTORY_QOS = KEEP_LAST_HISTORY_QOS
-- Accept Change (Remove Oldest (ACKed) Sample)
remove_oldest_sample_next <= '1';
remove_ack_sample_next <= '1' when (global_ack_cnt /= 0) else '0';
if (global_ack_cnt /= 0) then
remove_ack_sample_next <= '1';
else
remove_ack_sample_next <= '0';
end if;
done_dds <= '1';
return_code_dds <= RETCODE_OK;
@ -2921,10 +2957,18 @@ begin
sample_valid_in <= '1';
sample_addr <= cur_sample + SMF_STATUS_INFO_OFFSET;
sample_write_data <= sample_status_info;
sample_write_data(SSI_ACK_FLAG) <= '1' when (is_ack = '1') else '0';
if (is_ack = '1') then
sample_write_data(SSI_ACK_FLAG) <= '1';
else
sample_write_data(SSI_ACK_FLAG) <= '0';
end if;
-- Memory Flow Control Guard
if (sample_ready_in = '1') then
global_ack_cnt_next <= (global_ack_cnt + 1) when (is_ack = '1') else (global_ack_cnt - 1);
if (is_ack = '1') then
global_ack_cnt_next <= global_ack_cnt + 1;
else
global_ack_cnt_next <= global_ack_cnt - 1;
end if;
cnt_next <= cnt + 1;
end if;
-- SET Instance Data
@ -2939,7 +2983,11 @@ begin
inst_opcode <= UPDATE_INSTANCE;
inst_mem_fields <= IMF_ACK_CNT_FLAG;
inst_addr_update <= cur_inst;
ack_cnt <= (inst_data.ack_cnt + 1) when (is_ack = '1') else (inst_data.ack_cnt - 1);
if (is_ack = '1') then
ack_cnt <= inst_data.ack_cnt + 1;
else
ack_cnt <= inst_data.ack_cnt - 1;
end if;
-- Update Stale Instance Count
-- XXX: Possible Worst Case Path (Addition and Comparison in same clock)
@ -2955,7 +3003,11 @@ begin
stage_next <= IDLE;
end if;
else
inst_data_next2.ack_cnt <= (inst_data.ack_cnt + 1) when (is_ack = '1') else (inst_data.ack_cnt - 1);
if (is_ack = '1') then
inst_data_next2.ack_cnt <= inst_data.ack_cnt + 1;
else
inst_data_next2.ack_cnt <= inst_data.ack_cnt - 1;
end if;
-- DONE
done_rtps <= '1';
@ -4570,7 +4622,11 @@ begin
seq_nr <= seq_nr_next;
cc_seq_nr_sig <= cc_seq_nr_sig_next;
cc_kind_sig <= cc_kind_sig_next;
inst_data <= inst_data_next when WITH_KEY else inst_data_next2;
if (WITH_KEY) then
inst_data <= inst_data_next;
else
inst_data <= inst_data_next2;
end if;
inst_latch_data <= inst_latch_data_next;
cnt <= cnt_next;
cnt2 <= cnt2_next;
@ -4613,7 +4669,11 @@ begin
liveliness_lost_cnt <= liveliness_lost_cnt_next;
liveliness_lost_cnt_change <= liveliness_lost_cnt_change_next;
status_sig <= status_sig_next;
current_imf <= current_imf_next when WITH_KEY else (others => '1');
if (WITH_KEY) then
current_imf <= current_imf_next;
else
current_imf <= (others => '1');
end if;
inst_addr_base <= inst_addr_base_next;
inst_empty_head <= inst_empty_head_next;
inst_occupied_head <= inst_occupied_head_next;

17
src/rtps_builtin_endpoint.vhd
View File

@ -690,6 +690,7 @@ begin
extra_flags <= (others => '0');
mem_addr_update <= PARTICIPANT_MEMORY_MAX_ADDRESS;
deadline <= TIME_INVALID;
res_time <= TIME_INVALID;
-- Last Word Latch Setter
if (last_word_in = '1') then
@ -2547,7 +2548,13 @@ begin
-- Set Reader Flag
if (is_subscriber = '1') then
reader_flags_next(READER_EXPECTS_HISTORICAL_DATA_FLAG) <= '0' when (data_in_swapped = VOLATILE_DURABILITY_QOS) else '1';
-- XXX: Quartus Limitation
--reader_flags_next(READER_EXPECTS_HISTORICAL_DATA_FLAG) <= '0' when (data_in_swapped = VOLATILE_DURABILITY_QOS) else '1';
if (data_in_swapped = VOLATILE_DURABILITY_QOS) then
reader_flags_next(READER_EXPECTS_HISTORICAL_DATA_FLAG) <= '0';
else
reader_flags_next(READER_EXPECTS_HISTORICAL_DATA_FLAG) <= '1';
end if;
end if;
-- DONE
@ -2635,7 +2642,13 @@ begin
-- Set Reader Flag
if (is_subscriber = '1') then
reader_flags_next(READER_IS_BEST_EFFORT_FLAG) <= '1' when (data_in_swapped = BEST_EFFORT_RELIABILITY_QOS) else '0';
-- XXX: Quartus Limitation
--reader_flags_next(READER_IS_BEST_EFFORT_FLAG) <= '1' when (data_in_swapped = BEST_EFFORT_RELIABILITY_QOS) else '0';
if (data_in_swapped = BEST_EFFORT_RELIABILITY_QOS) then
reader_flags_next(READER_IS_BEST_EFFORT_FLAG) <= '1';
else
reader_flags_next(READER_IS_BEST_EFFORT_FLAG) <= '0';
end if;
end if;
cnt_next <= cnt + 1;
when 1 =>

32
src/rtps_config_package.vhd
View File

@ -1240,9 +1240,21 @@ package body rtps_config_package is
assert(input'length / width > index) report "Index out of bounds" severity FAILURE;
if (invert = TRUE) then
ret := input(input'length-(index*width)-1 downto input'length-((index+1)*width));
-- XXX: Synthesis Hack
--ret := input(input'length-(index*width)-1 downto input'length-((index+1)*width));
for i in 0 to (input'length/width)-1 loop
if (index = i) then
ret := input(input'length-(i*width)-1 downto input'length-((i+1)*width));
end if;
end loop;
else
ret := input(((index+1)*width)-1 downto index*width);
-- XXX: Synthesis Hack
--ret := input(((index+1)*width)-1 downto index*width);
for i in 0 to (input'length/width)-1 loop
if (index = i) then
ret := input(((i+1)*width)-1 downto i*width);
end if;
end loop;
end if;
return ret;
@ -1257,9 +1269,21 @@ package body rtps_config_package is
ret := input;
if (invert = TRUE) then
ret(input'length-(index*sub'length)-1 downto input'length-((index+1)*sub'length)) := sub;
-- XXX: Synthesis Hack
--ret(input'length-(index*sub'length)-1 downto input'length-((index+1)*sub'length)) := sub;
for i in 0 to (input'length/sub'length)-1 loop
if (index = i) then
ret(input'length-(i*sub'length)-1 downto input'length-((i+1)*sub'length)) := sub;
end if;
end loop;
else
ret(((index+1)*sub'length)-1 downto index*sub'length) := sub;
-- XXX: Synthesis Hack
--ret(((index+1)*sub'length)-1 downto index*sub'length) := sub;
for i in 0 to (input'length/sub'length)-1 loop
if (index = i) then
ret(((i+1)*sub'length)-1 downto i*sub'length) := sub;
end if;
end loop;
end if;
return ret;

87
src/rtps_reader.vhd
View File

@ -12,15 +12,16 @@ use work.rtps_config_package.all;
entity rtps_reader is
generic (
ID : ID_TYPE := 0;
ENTITYID : std_logic_vector(ENTITYID_WIDTH-1 downto 0) := ENTITYID(ID);
RELIABILITY_QOS : std_logic_vector(CDR_ENUMERATION_WIDTH-1 downto 0) := ENDPOINT_RELIABILITY_QOS(ID);
LIVELINESS_QOS : std_logic_vector(CDR_ENUMERATION_WIDTH-1 downto 0) := ENDPOINT_LIVELINESS_QOS(ID);
DURABILITY_QOS : std_logic_vector(CDR_ENUMERATION_WIDTH-1 downto 0) := ENDPOINT_DURABILITY_QOS(ID);
HEARTBEAT_RESPONSE_DELAY : DURATION_TYPE := ENDPOINT_HEARTBEAT_RESPONSE_DELAY(ID);
HEARTBEAT_SUPPRESSION_DELAY : DURATION_TYPE := ENDPOINT_HEARTBEAT_SUPPRESSION_DELAY(ID);
LEASE_DURATION : DURATION_TYPE := ENDPOINT_LEASE_DURATION(ID);
WITH_KEY : boolean := ENDPOINT_WITH_KEY(ID);
-- XXX: Quartus Limitation [VHDL error at <location>: generic "<name>" cannot be used in its own interface list (ID: 10556)]
--ID : ID_TYPE := 0;
ENTITYID : std_logic_vector(ENTITYID_WIDTH-1 downto 0);-- := ENTITYID(ID);
RELIABILITY_QOS : std_logic_vector(CDR_ENUMERATION_WIDTH-1 downto 0);-- := ENDPOINT_RELIABILITY_QOS(ID);
LIVELINESS_QOS : std_logic_vector(CDR_ENUMERATION_WIDTH-1 downto 0);-- := ENDPOINT_LIVELINESS_QOS(ID);
DURABILITY_QOS : std_logic_vector(CDR_ENUMERATION_WIDTH-1 downto 0);-- := ENDPOINT_DURABILITY_QOS(ID);
HEARTBEAT_RESPONSE_DELAY : DURATION_TYPE;-- := ENDPOINT_HEARTBEAT_RESPONSE_DELAY(ID);
HEARTBEAT_SUPPRESSION_DELAY : DURATION_TYPE;-- := ENDPOINT_HEARTBEAT_SUPPRESSION_DELAY(ID);
LEASE_DURATION : DURATION_TYPE;-- := ENDPOINT_LEASE_DURATION(ID);
WITH_KEY : boolean;-- := ENDPOINT_WITH_KEY(ID);
MAX_REMOTE_ENDPOINTS : natural := 50
);
port (
@ -64,7 +65,11 @@ architecture arch of rtps_reader is
function gen_frame_size(qos : std_logic_vector(CDR_ENUMERATION_WIDTH-1 downto 0)) return natural is
variable ret : natural := 0;
begin
ret := 12 when (qos = RELIABLE_RELIABILITY_QOS) else 8;
if (qos = RELIABLE_RELIABILITY_QOS) then
ret := 12;
else
ret := 8;
end if;
return ret;
end function;
constant ENDPOINT_FRAME_SIZE : natural := gen_frame_size(RELIABILITY_QOS);
@ -99,7 +104,11 @@ architecture arch of rtps_reader is
function gen_emf_next_seq_nr_offset(qos : std_logic_vector(CDR_ENUMERATION_WIDTH-1 downto 0)) return natural is
variable ret : natural := 0;
begin
ret := (EMF_UDP_PORT_OFFSET + 1) when (qos = RELIABLE_RELIABILITY_QOS) else (EMF_GUIDPREFIX_OFFSET + 3);
if (qos = RELIABLE_RELIABILITY_QOS) then
ret := EMF_UDP_PORT_OFFSET + 1;
else
ret := EMF_GUIDPREFIX_OFFSET + 3;
end if;
return ret;
end function;
constant EMF_NEXT_SEQ_NR_OFFSET : natural := gen_emf_next_seq_nr_offset(RELIABILITY_QOS);
@ -410,8 +419,8 @@ begin
sn_latch_1_next <= sn_latch_1;
sn_latch_2_next <= sn_latch_2;
sn_latch_3_next <= sn_latch_3;
bitmap_latch <= bitmap_latch_next;
bitmap_cnt <= bitmap_cnt_next;
bitmap_latch_next <= bitmap_latch;
bitmap_cnt_next <= bitmap_cnt;
bitmap_pos_next <= bitmap_pos;
key_hash_rcvd_next <= key_hash_rcvd;
key_hash_next <= key_hash;
@ -916,7 +925,11 @@ begin
-- If Reader is Volatile and we have not received anything from the writer yet
if (DURABILITY_QOS = VOLATILE_DURABILITY_QOS and mem_endpoint_data.next_seq_nr = SEQUENCENUMBER_UNKNOWN) then
-- Mark last available SN as next expected (Ignore historical data)
next_seq_nr_next <= last_seq_nr when (first_seq_nr <= last_seq_nr) else first_seq_nr;
if (first_seq_nr <= last_seq_nr) then
next_seq_nr_next <= last_seq_nr;
else
next_seq_nr_next <= first_seq_nr;
end if;
mem_op_start <= '1';
mem_opcode <= UPDATE_ENDPOINT;
tmp_flags := tmp_flags or EMF_NEXT_SEQ_NR_FLAG or EMF_RES_TIME_FLAG;
@ -925,7 +938,9 @@ begin
res_time <= time + HEARTBEAT_RESPONSE_DELAY;
-- NOTE: Last Bit denotes if this is Response or Suppression Delay
res_time(1)(0) <= '0';
tmp_dw := (time + HEARTBEAT_RESPONSE_DELAY) when ((time + HEARTBEAT_RESPONSE_DELAY) < tmp_dw);
if ((time + HEARTBEAT_RESPONSE_DELAY) < tmp_dw) then
tmp_dw := time + HEARTBEAT_RESPONSE_DELAY;
end if;
else
res_time <= TIME_INVALID;
end if;
@ -941,7 +956,9 @@ begin
res_time <= time + HEARTBEAT_RESPONSE_DELAY;
-- NOTE: Last Bit denotes if this is Response or Suppression Delay
res_time(1)(0) <= '0';
tmp_dw := (time + HEARTBEAT_RESPONSE_DELAY) when ((time + HEARTBEAT_RESPONSE_DELAY) < tmp_dw);
if ((time + HEARTBEAT_RESPONSE_DELAY) < tmp_dw) then
tmp_dw := time + HEARTBEAT_RESPONSE_DELAY;
end if;
else
res_time <= TIME_INVALID;
end if;
@ -955,7 +972,9 @@ begin
res_time <= time + HEARTBEAT_RESPONSE_DELAY;
-- NOTE: Last Bit denotes if this is Response or Suppression Delay
res_time(1)(0) <= '0';
tmp_dw := (time + HEARTBEAT_RESPONSE_DELAY) when ((time + HEARTBEAT_RESPONSE_DELAY) < tmp_dw);
if ((time + HEARTBEAT_RESPONSE_DELAY) < tmp_dw) then
tmp_dw := time + HEARTBEAT_RESPONSE_DELAY;
end if;
else
res_time <= TIME_INVALID;
end if;
@ -1189,7 +1208,11 @@ begin
-- TODO: Use source timestamp if clocks with remote synchronized
-- Calculate Sample Lifespan Deadline
lifespan_next <= (time + tmp_dw) when (tmp_dw /= DURATION_INFINITE) else TIME_INVALID;
if (tmp_dw /= DURATION_INFINITE) then
lifespan_next <= time + tmp_dw;
else
lifespan_next <= TIME_INVALID;
end if;
-- DONE
stage_next <= SKIP_PARAMETER;
@ -1274,7 +1297,9 @@ begin
when 0 =>
valid_out_hc <= '1';
data_out_hc <= status_info;
data_out_hc(SSI_KEY_HASH_FLAG) <= key_hash_rcvd when WITH_KEY;
if (WITH_KEY) then
data_out_hc(SSI_KEY_HASH_FLAG) <= key_hash_rcvd;
end if;
-- NOTE: The SSI_DATA_FLAG states if the Payload contains normal Data for the Sample or the Serialized Key for the Key Hash calculation
data_out_hc(SSI_DATA_FLAG) <= data_flag;
-- Output Guard
@ -1810,7 +1835,11 @@ begin
mem_endpoint_data_next.guid <= guid_next;
mem_endpoint_data_next.addr <= addr_next;
mem_endpoint_data_next.portn <= portn_next;
mem_endpoint_data_next.next_seq_nr <= SEQUENCENUMBER_UNKNOWN when (DURABILITY_QOS = VOLATILE_DURABILITY_QOS) else FIRST_SEQUENCENUMBER;
if (DURABILITY_QOS = VOLATILE_DURABILITY_QOS) then
mem_endpoint_data_next.next_seq_nr <= SEQUENCENUMBER_UNKNOWN;
else
mem_endpoint_data_next.next_seq_nr <= FIRST_SEQUENCENUMBER;
end if;
mem_endpoint_data_next.lease_deadline <= lease_deadline;
mem_endpoint_data_next.res_time <= TIME_INVALID;
@ -2496,7 +2525,11 @@ begin
mem_addr <= mem_addr_base + EMF_GUIDPREFIX_OFFSET + 2;
mem_write_data <= mem_endpoint_latch_data.guid(2);
if (mem_ready_in = '1') then
mem_cnt_next <= mem_cnt + 1 when (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS) else 6;
if (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS) then
mem_cnt_next <= mem_cnt + 1;
else
mem_cnt_next <= 6;
end if;
end if;
-- IPv4 Address
when 4 =>
@ -2524,7 +2557,11 @@ begin
when 6 =>
mem_valid_in <= '1';
mem_addr <= mem_addr_base + EMF_NEXT_SEQ_NR_OFFSET;
mem_write_data <= std_logic_vector(SEQUENCENUMBER_UNKNOWN(0)) when (DURABILITY_QOS = VOLATILE_DURABILITY_QOS) else std_logic_vector(FIRST_SEQUENCENUMBER(0));
if (DURABILITY_QOS = VOLATILE_DURABILITY_QOS) then
mem_write_data <= std_logic_vector(SEQUENCENUMBER_UNKNOWN(0));
else
mem_write_data <= std_logic_vector(FIRST_SEQUENCENUMBER(0));
end if;
if (mem_ready_in = '1') then
mem_cnt_next <= mem_cnt + 1;
end if;
@ -2533,7 +2570,11 @@ begin
mem_write_data <= (others => '0');
mem_valid_in <= '1';
mem_addr <= mem_addr_base + EMF_NEXT_SEQ_NR_OFFSET + 1;
mem_write_data <= std_logic_vector(SEQUENCENUMBER_UNKNOWN(1)) when (DURABILITY_QOS = VOLATILE_DURABILITY_QOS) else std_logic_vector(FIRST_SEQUENCENUMBER(1));
if (DURABILITY_QOS = VOLATILE_DURABILITY_QOS) then
mem_write_data <= std_logic_vector(SEQUENCENUMBER_UNKNOWN(1));
else
mem_write_data <= std_logic_vector(FIRST_SEQUENCENUMBER(1));
end if;
if (mem_ready_in = '1') then
mem_cnt_next <= mem_cnt + 1;
end if;

111
src/rtps_writer.vhd
View File

@ -11,19 +11,20 @@ use work.rtps_config_package.all;
entity rtps_writer is
generic (
ID : ID_TYPE := 0;
RELIABILITY_QOS : std_logic_vector(CDR_ENUMERATION_WIDTH-1 downto 0) := ENDPOINT_RELIABILITY_QOS(ID);
LIVELINESS_QOS : std_logic_vector(CDR_ENUMERATION_WIDTH-1 downto 0) := ENDPOINT_LIVELINESS_QOS(ID);
DURABILITY_QOS : std_logic_vector(CDR_ENUMERATION_WIDTH-1 downto 0) := ENDPOINT_DURABILITY_QOS(ID);
DESTINATION_ORDER_QOS : std_logic_vector(CDR_ENUMERATION_WIDTH-1 downto 0) := ENDPOINT_DESTINATION_ORDER_QOS(ID);
ACKNACK_RESPONSE_DELAY : DURATION_TYPE := ENDPOINT_ACKNACK_RESPONSE_DELAY(ID);
ACKNACK_SUPPRESSION_DELAY : DURATION_TYPE := ENDPOINT_ACKNACK_SUPPRESSION_DELAY(ID);
LEASE_DURATION : DURATION_TYPE := ENDPOINT_LEASE_DURATION(ID);
HEARTBEAT_PERIOD : DURATION_TYPE := ENDPOINT_HEARTBEAT_PERIOD(ID);
ENTITYID : std_logic_vector(ENTITYID_WIDTH-1 downto 0) := ENTITYID(ID);
WITH_KEY : boolean := ENDPOINT_WITH_KEY(ID);
PUSH_MODE : boolean := ENDPOINT_PUSH_MODE(ID);
INLINE_QOS : OUTPUT_DATA_TYPE := gen_inline_qos(ID);
-- XXX: Quartus Limitation [VHDL error at <location>: generic "<name>" cannot be used in its own interface list (ID: 10556)]
--ID : ID_TYPE := 0;
RELIABILITY_QOS : std_logic_vector(CDR_ENUMERATION_WIDTH-1 downto 0);-- := ENDPOINT_RELIABILITY_QOS(ID);
LIVELINESS_QOS : std_logic_vector(CDR_ENUMERATION_WIDTH-1 downto 0);-- := ENDPOINT_LIVELINESS_QOS(ID);
DURABILITY_QOS : std_logic_vector(CDR_ENUMERATION_WIDTH-1 downto 0);-- := ENDPOINT_DURABILITY_QOS(ID);
DESTINATION_ORDER_QOS : std_logic_vector(CDR_ENUMERATION_WIDTH-1 downto 0);-- := ENDPOINT_DESTINATION_ORDER_QOS(ID);
ACKNACK_RESPONSE_DELAY : DURATION_TYPE;-- := ENDPOINT_ACKNACK_RESPONSE_DELAY(ID);
ACKNACK_SUPPRESSION_DELAY : DURATION_TYPE;-- := ENDPOINT_ACKNACK_SUPPRESSION_DELAY(ID);
LEASE_DURATION : DURATION_TYPE;-- := ENDPOINT_LEASE_DURATION(ID);
HEARTBEAT_PERIOD : DURATION_TYPE;-- := ENDPOINT_HEARTBEAT_PERIOD(ID);
ENTITYID : std_logic_vector(ENTITYID_WIDTH-1 downto 0);-- := ENTITYID(ID);
WITH_KEY : boolean;-- := ENDPOINT_WITH_KEY(ID);
PUSH_MODE : boolean;-- := ENDPOINT_PUSH_MODE(ID);
INLINE_QOS : OUTPUT_DATA_TYPE;-- := gen_inline_qos(ID);
MAX_REMOTE_ENDPOINTS : natural := 50
);
port (
@ -77,7 +78,11 @@ architecture arch of rtps_writer is
function gen_frame_size(qos : std_logic_vector(CDR_ENUMERATION_WIDTH-1 downto 0)) return natural is
variable ret : natural := 0;
begin
ret := 15 when (qos = RELIABLE_RELIABILITY_QOS) else 6;
if (qos = RELIABLE_RELIABILITY_QOS) then
ret := 15;
else
ret := 6;
end if;
return ret;
end function;
constant ENDPOINT_FRAME_SIZE : natural := gen_frame_size(RELIABILITY_QOS);
@ -1062,7 +1067,11 @@ begin
cnt_next <= cnt + 1;
else
-- DONE
stage_next <= SKIP_PACKET when (is_meta = '0') else IDLE;
if (is_meta = '0') then
stage_next <= SKIP_PACKET;
else
stage_next <= IDLE;
end if;
end if;
else
-- NOTE: Remote Endpoints with RELIABILITY BEST_EFFORT have a ack_seq_nr_base = SEQUENCENUMBER_UNKNOWN, since
@ -1094,7 +1103,11 @@ begin
-- Exit Condition
if (global_ack_seq_nr_base = new_global_ack) then
-- DONE
stage_next <= SKIP_PACKET when (is_meta = '0') else IDLE;
if (is_meta = '0') then
stage_next <= SKIP_PACKET;
else
stage_next <= IDLE;
end if;
else
global_ack_seq_nr_base_next <= global_ack_seq_nr_base + 1;
end if;
@ -1337,13 +1350,21 @@ begin
gap_in_progress_next <= '0';
stage_next <= SEND_GAP_B;
cnt_next <= 0;
return_stage_next <= SEND_INFO_TS when (DESTINATION_ORDER_QOS = BY_SOURCE_TIMESTAMP_DESTINATION_ORDER_QOS) else SEND_DATA_A;
if (DESTINATION_ORDER_QOS = BY_SOURCE_TIMESTAMP_DESTINATION_ORDER_QOS) then
return_stage_next <= SEND_INFO_TS;
else
return_stage_next <= SEND_DATA_A;
end if;
return_cnt_next <= 0;
else
-- Send DATA
stage_next <= SEND_HEADER;
cnt_next <= 0;
return_stage_next <= SEND_INFO_TS when (DESTINATION_ORDER_QOS = BY_SOURCE_TIMESTAMP_DESTINATION_ORDER_QOS) else SEND_DATA_A;
if (DESTINATION_ORDER_QOS = BY_SOURCE_TIMESTAMP_DESTINATION_ORDER_QOS) then
return_stage_next <= SEND_INFO_TS;
else
return_stage_next <= SEND_DATA_A;
end if;
return_cnt_next <= 0;
end if;
elsif (ret_hc = INVALID) then
@ -1451,7 +1472,11 @@ begin
-- ACK newly sent Cache Changes if Writer is BEST_EFFORT, or if all remore Readers are BEST_EFFORT
if (RELIABILITY_QOS /= RELIABLE_RELIABILITY_QOS or global_ack_seq_nr_base = SEQUENCENUMBER_UNKNOWN) then
start_hc <= '1';
opcode_hc <= REMOVE_CACHE_CHANGE when (DURABILITY_QOS = VOLATILE_DURABILITY_QOS) else ACK_CACHE_CHANGE;
if (DURABILITY_QOS = VOLATILE_DURABILITY_QOS) then
opcode_hc <= REMOVE_CACHE_CHANGE;
else
opcode_hc <= ACK_CACHE_CHANGE;
end if;
seq_nr_hc <= last_seq_nr;
-- NOTE: Ignore return Code
@ -1489,7 +1514,11 @@ begin
stage_next <= SEND_HEADER;
cnt_next <= 0;
return_stage_next <= SEND_INFO_TS when (DESTINATION_ORDER_QOS = BY_SOURCE_TIMESTAMP_DESTINATION_ORDER_QOS) else SEND_DATA_A;
if (DESTINATION_ORDER_QOS = BY_SOURCE_TIMESTAMP_DESTINATION_ORDER_QOS) then
return_stage_next <= SEND_INFO_TS;
else
return_stage_next <= SEND_DATA_A;
end if;
return_cnt_next <= 0;
-- Cache Change Unavailable
else
@ -1542,7 +1571,11 @@ begin
else
next_seq_nr_next <= next_seq_nr + 1;
-- If remote Reader is RELIABLE, NACK the SN
cnt_next <= (cnt + 1) when (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and reader_flags(READER_IS_BEST_EFFORT_FLAG) = '0') else (cnt + 2);
if (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and reader_flags(READER_IS_BEST_EFFORT_FLAG) = '0') then
cnt_next <= cnt + 1;
else
cnt_next <= cnt + 2;
end if;
end if;
-- NACK SN
when 1 =>
@ -1589,13 +1622,21 @@ begin
gap_in_progress_next <= '0';
stage_next <= SEND_GAP_B;
cnt_next <= 0;
return_stage_next <= SEND_INFO_TS when (DESTINATION_ORDER_QOS = BY_SOURCE_TIMESTAMP_DESTINATION_ORDER_QOS) else SEND_DATA_A;
if (DESTINATION_ORDER_QOS = BY_SOURCE_TIMESTAMP_DESTINATION_ORDER_QOS) then
return_stage_next <= SEND_INFO_TS;
else
return_stage_next <= SEND_DATA_A;
end if;
return_cnt_next <= 0;
else
-- Send DATA
stage_next <= SEND_HEADER;
cnt_next <= 0;
return_stage_next <= SEND_INFO_TS when (DESTINATION_ORDER_QOS = BY_SOURCE_TIMESTAMP_DESTINATION_ORDER_QOS) else SEND_DATA_A;
if (DESTINATION_ORDER_QOS = BY_SOURCE_TIMESTAMP_DESTINATION_ORDER_QOS) then
return_stage_next <= SEND_INFO_TS;
else
return_stage_next <= SEND_DATA_A;
end if;
return_cnt_next <= 0;
end if;
elsif (ret_hc = INVALID) then
@ -1625,7 +1666,11 @@ begin
next_seq_nr_next <= min_sn;
cnt_next <= cnt + 2; -- Skip Increment
-- If remote Reader is RELIABLE, NACK the SN
cnt_next <= 1 when (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and reader_flags(READER_IS_BEST_EFFORT_FLAG) = '0') else 2;
if (RELIABILITY_QOS = RELIABLE_RELIABILITY_QOS and reader_flags(READER_IS_BEST_EFFORT_FLAG) = '0') then
cnt_next <= 1;
else
cnt_next <= 2;
end if;
end if;
when others =>
null;
@ -1719,9 +1764,21 @@ begin
-- RTPS Submessage Header
when 0 =>
data_out_ro <= SID_DATA & "00000000" & std_logic_vector(to_unsigned(0, SUBMESSAGE_LENGTH_WIDTH));
data_flag <= '1' when (cc_kind = ALIVE) else '0';
key_flag <= '1' when (WITH_KEY and cc_kind /= ALIVE) else '0';
qos_flag <= '1' when (cc_kind /= ALIVE or WITH_KEY or mem_endpoint_data.flags(READER_EXPECTS_INLINE_QOS_FLAG) = '1') else '0';
if (cc_kind = ALIVE) then
data_flag <= '1';
else
data_flag <= '0';
end if;
if (WITH_KEY and cc_kind /= ALIVE) then
key_flag <= '1';
else
key_flag <= '0';
end if;
if (cc_kind /= ALIVE or WITH_KEY or mem_endpoint_data.flags(READER_EXPECTS_INLINE_QOS_FLAG) = '1') then
qos_flag <= '1';
else
qos_flag <= '0';
end if;
wr_ro <= '1';
cnt_next <= cnt + 1;
-- extraFlags, octetsToInlineQoS

90
src/test.vhd
View File

@ -1,90 +0,0 @@
library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;
use work.math_pkg.all;
use work.test_package.all;
use work.rtps_package.all;
-- TODO: Remove alignment logic for RTPS Submessages, since all Submessages are 32-bit aligned
-- Checksum has to be checked before
entity test is
generic (
BUILD : boolean := FALSE
);
port (
clk : in std_logic; -- Input Clock
reset : in std_logic; -- Synchronous Reset
input : in std_logic_vector(31 downto 0);
output : out std_logic_vector(31 downto 0)
);
end entity;
architecture arch of test is
type STAGE_TYPE is (IDLE, STATE1, STATE2);
signal test_var : natural := 0;
signal stage, stage_next : STAGE_TYPE := IDLE;
function bitmap_converter(input : std_logic_vector) return natural is
variable ret : natural := 0;
begin
for i in 0 to input'length-1 loop
ret := ret + 1;
if (input(i) = '1') then
exit;
end if;
end loop;
return ret;
end function;
begin
output <= std_logic_vector(to_unsigned(bitmap_converter(input), output'length));
-- process(all)
-- begin
-- stage_next <= stage;
-- output <= (others => '0');
--
-- case (stage) is
-- when IDLE =>
-- case (input) is
-- when x"00000000" =>
-- if (BUILD) then
-- stage_next <= STATE1;
-- else
-- stage_next <= STATE2;
-- end if;
-- when x"00000001" =>
-- stage_next <= STATE2;
-- when others =>
-- null;
-- end case;
-- when STATE1 =>
-- if (BUILD) then
-- stage_next <= IDLE;
-- output <= x"DEADBEEF";
-- end if;
-- when STATE2 =>
-- stage_next <= IDLE;
-- output <= x"BEEFDEAD";
-- when others =>
-- null;
-- end case;
-- end process;
-- sync : process(all)
-- begin
-- if rising_edge(clk) then
-- if (reset = '1') then
-- stage <= IDLE;
-- else
-- stage <= stage_next;
-- end if;
-- end if;
-- end process;
end architecture;

47
syn/DE10-Nano/top.qsf
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@ -38,25 +38,44 @@
set_global_assignment -name FAMILY "Cyclone V"
set_global_assignment -name DEVICE 5CGXFC7C7F23C8
set_global_assignment -name TOP_LEVEL_ENTITY test
set_global_assignment -name DEVICE 5CSEBA6U23I7
set_global_assignment -name TOP_LEVEL_ENTITY dds_reader_syn
set_global_assignment -name ORIGINAL_QUARTUS_VERSION 20.1.0
set_global_assignment -name PROJECT_CREATION_TIME_DATE "13:33:09 NOVEMBER 02, 2020"
set_global_assignment -name LAST_QUARTUS_VERSION "20.1.0 Lite Edition"
set_global_assignment -name MIN_CORE_JUNCTION_TEMP 0
set_global_assignment -name MAX_CORE_JUNCTION_TEMP 85
set_global_assignment -name LAST_QUARTUS_VERSION "21.1.0 Lite Edition"
set_global_assignment -name MIN_CORE_JUNCTION_TEMP "-40"
set_global_assignment -name MAX_CORE_JUNCTION_TEMP 100
set_global_assignment -name POWER_PRESET_COOLING_SOLUTION "23 MM HEAT SINK WITH 200 LFPM AIRFLOW"
set_global_assignment -name POWER_BOARD_THERMAL_MODEL "NONE (CONSERVATIVE)"
set_global_assignment -name VHDL_FILE ../../src/test_package.vhd -hdl_version VHDL_2008
set_global_assignment -name VHDL_FILE ../../src/test.vhd -hdl_version VHDL_2008
set_global_assignment -name VHDL_FILE ../../src/user_config.vhd -hdl_version VHDL_2008
set_global_assignment -name VHDL_FILE ../../src/single_port_ram.vhd -hdl_version VHDL_2008
set_global_assignment -name VHDL_FILE ../../src/rtps_package.vhd -hdl_version VHDL_2008
set_global_assignment -name VHDL_FILE ../../src/rtps_handler.vhd -hdl_version VHDL_2008
set_global_assignment -name VHDL_FILE ../../src/rtps_config_package.vhd -hdl_version VHDL_2008
set_global_assignment -name VHDL_FILE ../../src/rtps_builtin_endpoint.vhd -hdl_version VHDL_2008
set_global_assignment -name VHDL_FILE ../../src/math_pkg.vhd -hdl_version VHDL_2008
set_global_assignment -name PARTITION_NETLIST_TYPE SOURCE -section_id Top
set_global_assignment -name PARTITION_FITTER_PRESERVATION_LEVEL PLACEMENT_AND_ROUTING -section_id Top
set_global_assignment -name PARTITION_COLOR 16764057 -section_id Top
set_global_assignment -name VHDL_FILE ../dds_reader_syn.vhd -hdl_version VHDL_2008
set_global_assignment -name VHDL_FILE ../../src/dds_reader.vhd -hdl_version VHDL_2008
set_global_assignment -name VHDL_FILE ../dds_writer_syn.vhd -hdl_version VHDL_2008
set_global_assignment -name VHDL_FILE ../../src/dds_writer.vhd -hdl_version VHDL_2008
set_global_assignment -name VHDL_FILE ../../src/Tests/test_key_hash_generator.vhd -hdl_version VHDL_2008
set_global_assignment -name VHDL_FILE ../../src/Tests/Type1_key_holder.vhd -hdl_version VHDL_2008
set_global_assignment -name VHDL_FILE ../../src/Tests/Type1_package.vhd -hdl_version VHDL_2008
set_global_assignment -name VHDL_FILE ../../src/key_hash_generator.vhd -hdl_version VHDL_2008
set_global_assignment -name VHDL_FILE ../../src/key_holder.vhd -hdl_version VHDL_2008
set_global_assignment -name VHDL_FILE ../rtps_reader_syn.vhd -hdl_version VHDL_2008
set_global_assignment -name VHDL_FILE ../../src/rtps_reader.vhd -hdl_version VHDL_2008
set_global_assignment -name VHDL_FILE ../rtps_writer_syn.vhd -hdl_version VHDL_2008
set_global_assignment -name VHDL_FILE ../../src/rtps_writer.vhd -hdl_version VHDL_2008
set_global_assignment -name VHDL_FILE ../../src/FWFT_FIFO.vhd -hdl_version VHDL_2008
set_global_assignment -name VHDL_FILE ../../src/mem_ctrl.vhd -hdl_version VHDL_2008
set_global_assignment -name VHDL_FILE ../../src/rtps_builtin_endpoint.vhd -hdl_version VHDL_2008
set_global_assignment -name VHDL_FILE ../../src/rtps_handler.vhd -hdl_version VHDL_2008
set_global_assignment -name VHDL_FILE ../test5.vhd -hdl_version VHDL_2008
set_global_assignment -name VHDL_FILE ../test4.vhd -hdl_version VHDL_2008
set_global_assignment -name VHDL_FILE ../test3.vhd -hdl_version VHDL_2008
set_global_assignment -name VHDL_FILE ../test2.vhd -hdl_version VHDL_2008
set_global_assignment -name VHDL_FILE ../test.vhd -hdl_version VHDL_2008
set_global_assignment -name VHDL_FILE ../test_package.vhd -hdl_version VHDL_2008
set_global_assignment -name VHDL_FILE ../../src/rtps_config_package.vhd -hdl_version VHDL_2008
set_global_assignment -name VHDL_FILE ../syn_config.vhd -hdl_version VHDL_2008
set_global_assignment -name VHDL_FILE ../../src/rtps_package.vhd -hdl_version VHDL_2008
set_global_assignment -name VHDL_FILE ../../src/math_pkg.vhd -hdl_version VHDL_2008
set_global_assignment -name VHDL_FILE ../../src/single_port_ram.vhd -hdl_version VHDL_2008
set_instance_assignment -name PARTITION_HIERARCHY root_partition -to | -section_id Top

129
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@ -0,0 +1,129 @@
library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;
use work.math_pkg.all;
use work.rtps_package.all;
use work.user_config.all;
use work.rtps_config_package.all;
use work.Type1_package.all;
entity dds_reader_syn is
port (
-- SYSTEM
clk : in std_logic;
reset : in std_logic;
time : in TIME_TYPE;
-- FROM RTPS ENDPOINT
start_rtps : in std_logic;
opcode_rtps : in HISTORY_CACHE_OPCODE_TYPE;
ack_rtps : out std_logic;
done_rtps : out std_logic;
ret_rtps : out HISTORY_CACHE_RESPONSE_TYPE;
data_in_rtps : in std_logic_vector(WORD_WIDTH-1 downto 0);
valid_in_rtps : in std_logic;
ready_in_rtps : out std_logic;
last_word_in_rtps : in std_logic;
-- TO USER ENTITY
start_dds : in std_logic;
ack_dds : out std_logic;
opcode_dds : in DDS_READER_OPCODE_TYPE;
instance_state_dds : in std_logic_vector(INSTANCE_STATE_KIND_WIDTH-1 downto 0);
view_state_dds : in std_logic_vector(VIEW_STATE_KIND_WIDTH-1 downto 0);
sample_state_dds : in std_logic_vector(SAMPLE_STATE_KIND_WIDTH-1 downto 0);
instance_handle_dds : in INSTANCE_HANDLE_TYPE;
max_samples_dds : in std_logic_vector(MAX_SAMPLES_WIDTH-1 downto 0);
get_data_dds : in std_logic;
done_dds : out std_logic;
return_code_dds : out std_logic_vector(RETURN_CODE_WIDTH-1 downto 0);
ready_out_dds : in std_logic;
valid_out_dds : out std_logic;
data_out_dds : out std_logic_vector(WORD_WIDTH-1 downto 0);
last_word_out_dds : out std_logic;
-- Sample Info
si_sample_state : out std_logic_vector(SAMPLE_STATE_KIND_WIDTH-1 downto 0);
si_view_state : out std_logic_vector(VIEW_STATE_KIND_WIDTH-1 downto 0);
si_instance_state : out std_logic_vector(INSTANCE_STATE_KIND_WIDTH-1 downto 0);
si_source_timestamp : out TIME_TYPE;
si_instance_handle : out INSTANCE_HANDLE_TYPE;
si_publication_handle : out INSTANCE_HANDLE_TYPE;
si_disposed_generation_count : out std_logic_vector(DISPOSED_GENERATION_COUNT_WIDTH-1 downto 0);
si_no_writers_generation_count : out std_logic_vector(NO_WRITERS_GENERATION_COUNT_WIDTH-1 downto 0);
si_sample_rank : out std_logic_vector(SAMPLE_RANK_WIDTH-1 downto 0);
si_generation_rank : out std_logic_vector(GENERATION_RANK_WIDTH-1 downto 0);
si_absolute_generation_rank : out std_logic_vector(ABSOLUTE_GENERATION_COUNT_WIDTH-1 downto 0);
si_valid_data : out std_logic;
si_valid : out std_logic;
si_ack : in std_logic;
eoc : out std_logic;
-- Communication Status
status : out std_logic_vector(STATUS_KIND_WIDTH-1 downto 0)
);
end entity;
architecture arch of dds_reader_syn is
begin
syn_inst : entity work.dds_reader(arch)
generic map (
TIME_BASED_FILTER_QOS => ENDPOINT_TIME_BASED_FILTER_QOS(0),
DEADLINE_QOS => ENDPOINT_DEADLINE_QOS(0),
MAX_INSTANCES => ENDPOINT_MAX_INSTANCES(0),
MAX_SAMPLES_PER_INSTANCE => ENDPOINT_MAX_SAMPLES_PER_INSTANCE(0),
MAX_SAMPLES => ENDPOINT_MAX_SAMPLES(0),
HISTORY_QOS => ENDPOINT_HISTORY_QOS(0),
RELIABILITY_QOS => ENDPOINT_RELIABILITY_QOS(0),
PRESENTATION_QOS => ENDPOINT_PRESENTATION_QOS(0),
DESTINATION_ORDER_QOS => ENDPOINT_DESTINATION_ORDER_QOS(0),
COHERENT_ACCESS => ENDPOINT_COHERENT_ACCESS(0),
ORDERED_ACCESS => ENDPOINT_ORDERED_ACCESS(0),
WITH_KEY => ENDPOINT_WITH_KEY(0),
PAYLOAD_FRAME_SIZE => MAX_TYPE1_SIZE
)
port map (
clk => clk,
reset => reset,
time => time,
start_rtps => start_rtps,
opcode_rtps => opcode_rtps,
ack_rtps => ack_rtps,
done_rtps => done_rtps,
ret_rtps => ret_rtps,
data_in_rtps => data_in_rtps,
valid_in_rtps => valid_in_rtps,
ready_in_rtps => ready_in_rtps,
last_word_in_rtps => last_word_in_rtps,
start_dds => start_dds,
ack_dds => ack_dds,
opcode_dds => opcode_dds,
instance_state_dds => instance_state_dds,
view_state_dds => view_state_dds,
sample_state_dds => sample_state_dds,
instance_handle_dds => instance_handle_dds,
max_samples_dds => max_samples_dds,
get_data_dds => get_data_dds,
done_dds => done_dds,
return_code_dds => return_code_dds,
ready_out_dds => ready_out_dds,
valid_out_dds => valid_out_dds,
data_out_dds => data_out_dds,
last_word_out_dds => last_word_out_dds,
si_sample_state => si_sample_state,
si_view_state => si_view_state,
si_instance_state => si_instance_state,
si_source_timestamp => si_source_timestamp,
si_instance_handle => si_instance_handle,
si_publication_handle => si_publication_handle,
si_disposed_generation_count => si_disposed_generation_count,
si_no_writers_generation_count => si_no_writers_generation_count,
si_sample_rank => si_sample_rank,
si_generation_rank => si_generation_rank,
si_absolute_generation_rank => si_absolute_generation_rank,
si_valid_data => si_valid_data,
si_valid => si_valid,
si_ack => si_ack,
eoc => eoc,
status => status
);
end architecture;

113
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@ -0,0 +1,113 @@
library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;
use work.math_pkg.all;
use work.rtps_package.all;
use work.user_config.all;
use work.rtps_config_package.all;
use work.Type1_package.all;
entity dds_writer_syn is
port (
-- SYSTEM
clk : in std_logic;
reset : in std_logic;
time : in TIME_TYPE;
-- TO/FROM RTPS ENDPOINT
start_rtps : in std_logic;
opcode_rtps : in HISTORY_CACHE_OPCODE_TYPE;
ack_rtps : out std_logic;
done_rtps : out std_logic;
ret_rtps : out HISTORY_CACHE_RESPONSE_TYPE;
seq_nr_rtps : in SEQUENCENUMBER_TYPE;
get_data_rtps : in std_logic;
data_out_rtps : out std_logic_vector(WORD_WIDTH-1 downto 0);
valid_out_rtps : out std_logic;
ready_out_rtps : in std_logic;
last_word_out_rtps : out std_logic;
liveliness_assertion : out std_logic;
data_available : out std_logic;
-- Cache Change
cc_instance_handle : out INSTANCE_HANDLE_TYPE;
cc_kind : out CACHE_CHANGE_KIND_TYPE;
cc_source_timestamp : out TIME_TYPE;
cc_seq_nr : out SEQUENCENUMBER_TYPE;
-- TO/FROM USER ENTITY
start_dds : in std_logic;
ack_dds : out std_logic;
opcode_dds : in DDS_WRITER_OPCODE_TYPE;
instance_handle_dds : in INSTANCE_HANDLE_TYPE;
source_ts_dds : in TIME_TYPE;
max_wait_dds : in DURATION_TYPE;
done_dds : out std_logic;
return_code_dds : out std_logic_vector(RETURN_CODE_WIDTH-1 downto 0);
ready_in_dds : out std_logic;
valid_in_dds : in std_logic;
data_in_dds : in std_logic_vector(WORD_WIDTH-1 downto 0);
last_word_in_dds : in std_logic;
ready_out_dds : in std_logic;
valid_out_dds : out std_logic;
data_out_dds : out std_logic_vector(WORD_WIDTH-1 downto 0);
last_word_out_dds : out std_logic;
-- Communication Status
status : out std_logic_vector(STATUS_KIND_WIDTH-1 downto 0)
);
end entity;
architecture arch of dds_writer_syn is
begin
syn_inst : entity work.dds_writer(arch)
generic map (
HISTORY_QOS => ENDPOINT_HISTORY_QOS(1),
DEADLINE_QOS => ENDPOINT_DEADLINE_QOS(1),
LIFESPAN_QOS => ENDPOINT_LIFESPAN_QOS(1),
LEASE_DURATION => ENDPOINT_LEASE_DURATION(1),
WITH_KEY => ENDPOINT_WITH_KEY(1),
MAX_SAMPLES => ENDPOINT_MAX_SAMPLES(1),
MAX_INSTANCES => ENDPOINT_MAX_INSTANCES(1),
MAX_SAMPLES_PER_INSTANCE => ENDPOINT_MAX_SAMPLES_PER_INSTANCE(1),
PAYLOAD_FRAME_SIZE => MAX_TYPE1_SIZE
)
port map (
clk => clk,
reset => reset,
time => time,
start_rtps => start_rtps,
opcode_rtps => opcode_rtps,
ack_rtps => ack_rtps,
done_rtps => done_rtps,
ret_rtps => ret_rtps,
seq_nr_rtps => seq_nr_rtps,
get_data_rtps => get_data_rtps,
data_out_rtps => data_out_rtps,
valid_out_rtps => valid_out_rtps,
ready_out_rtps => ready_out_rtps,
last_word_out_rtps => last_word_out_rtps,
liveliness_assertion => liveliness_assertion,
data_available => data_available,
cc_instance_handle => cc_instance_handle,
cc_kind => cc_kind,
cc_source_timestamp => cc_source_timestamp,
cc_seq_nr => cc_seq_nr,
start_dds => start_dds,
ack_dds => ack_dds,
opcode_dds => opcode_dds,
instance_handle_dds => instance_handle_dds,
source_ts_dds => source_ts_dds,
max_wait_dds => max_wait_dds,
done_dds => done_dds,
return_code_dds => return_code_dds,
ready_in_dds => ready_in_dds,
valid_in_dds => valid_in_dds,
data_in_dds => data_in_dds,
last_word_in_dds => last_word_in_dds,
ready_out_dds => ready_out_dds,
valid_out_dds => valid_out_dds,
data_out_dds => data_out_dds,
last_word_out_dds => last_word_out_dds,
status => status
);
end architecture;

85
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@ -0,0 +1,85 @@
library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;
use work.math_pkg.all;
use work.rtps_package.all;
use work.user_config.all;
use work.rtps_config_package.all;
entity rtps_reader_syn is
port (
-- SYSTEM
clk : in std_logic;
reset : in std_logic;
time : in TIME_TYPE;
-- FROM RTPS HANDLER (USER TRAFFIC)
empty_user : in std_logic;
rd_user : out std_logic;
data_in_user : in std_logic_vector(WORD_WIDTH-1 downto 0);
last_word_in_user : in std_logic;
-- FROM RTPS BUILTIN ENDPOINT (META TRAFFIC)
empty_meta : in std_logic;
rd_meta : out std_logic;
data_in_meta : in std_logic_vector(WORD_WIDTH-1 downto 0);
last_word_in_meta : in std_logic;
-- RTPS OUTPUT
full_ro : in std_logic;
wr_ro : out std_logic;
data_out_ro : out std_logic_vector(WORD_WIDTH-1 downto 0);
last_word_out_ro : out std_logic;
-- TO HISTORY CACHE
start_hc : out std_logic;
opcode_hc : out HISTORY_CACHE_OPCODE_TYPE;
ack_hc : in std_logic;
done_hc : in std_logic;
ret_hc : in HISTORY_CACHE_RESPONSE_TYPE;
data_out_hc : out std_logic_vector(WORD_WIDTH-1 downto 0);
valid_out_hc : out std_logic;
ready_out_hc : in std_logic;
last_word_out_hc : out std_logic
);
end entity;
architecture arch of rtps_reader_syn is
begin
syn_inst : entity work.rtps_reader(arch)
generic map (
ENTITYID => ENTITYID(0),
RELIABILITY_QOS => ENDPOINT_RELIABILITY_QOS(0),
LIVELINESS_QOS => ENDPOINT_LIVELINESS_QOS(0),
DURABILITY_QOS => ENDPOINT_DURABILITY_QOS(0),
HEARTBEAT_RESPONSE_DELAY => ENDPOINT_HEARTBEAT_RESPONSE_DELAY(0),
HEARTBEAT_SUPPRESSION_DELAY => ENDPOINT_HEARTBEAT_SUPPRESSION_DELAY(0),
LEASE_DURATION => ENDPOINT_LEASE_DURATION(0),
WITH_KEY => ENDPOINT_WITH_KEY(0)
)
port map (
clk => clk,
reset => reset,
time => time,
empty_user => empty_user,
rd_user => rd_user,
data_in_user => data_in_user,
last_word_in_user => last_word_in_user,
empty_meta => empty_meta,
rd_meta => rd_meta,
data_in_meta => data_in_meta,
last_word_in_meta => last_word_in_meta,
full_ro => full_ro,
wr_ro => wr_ro,
data_out_ro => data_out_ro,
last_word_out_ro => last_word_out_ro,
start_hc => start_hc,
opcode_hc => opcode_hc,
ack_hc => ack_hc,
done_hc => done_hc,
ret_hc => ret_hc,
data_out_hc => data_out_hc,
valid_out_hc => valid_out_hc,
ready_out_hc => ready_out_hc,
last_word_out_hc => last_word_out_hc
);
end architecture;

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@ -0,0 +1,109 @@
library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;
use work.math_pkg.all;
use work.rtps_package.all;
use work.user_config.all;
use work.rtps_config_package.all;
entity rtps_writer_syn is
port (
-- SYSTEM
clk : in std_logic;
reset : in std_logic;
time : in TIME_TYPE;
-- FROM RTPS HANDLER (USER TRAFFIC)
empty_user : in std_logic;
rd_user : out std_logic;
data_in_user : in std_logic_vector(WORD_WIDTH-1 downto 0);
last_word_in_user : in std_logic;
-- FROM RTPS BUILTIN ENDPOINT (META TRAFFIC)
empty_meta : in std_logic;
rd_meta : out std_logic;
data_in_meta : in std_logic_vector(WORD_WIDTH-1 downto 0);
last_word_in_meta : in std_logic;
-- TO RTPS BUILTIN ENDPOINT (META TRAFFIC)
alive_sig : out std_logic;
-- RTPS OUTPUT
full_ro : in std_logic;
wr_ro : out std_logic;
data_out_ro : out std_logic_vector(WORD_WIDTH-1 downto 0);
last_word_out_ro : out std_logic;
-- FROM HISTORY CACHE
liveliness_assertion : in std_logic;
data_available : in std_logic;
start_hc : out std_logic;
opcode_hc : out HISTORY_CACHE_OPCODE_TYPE;
ack_hc : in std_logic;
seq_nr_hc : out SEQUENCENUMBER_TYPE;
done_hc : in std_logic;
ret_hc : in HISTORY_CACHE_RESPONSE_TYPE;
get_data_hc : out std_logic;
data_in_hc : in std_logic_vector(WORD_WIDTH-1 downto 0);
valid_in_hc : in std_logic;
ready_in_hc : out std_logic;
last_word_in_hc : in std_logic;
cc_instance_handle : in INSTANCE_HANDLE_TYPE;
cc_kind : in CACHE_CHANGE_KIND_TYPE;
cc_source_timestamp : in TIME_TYPE;
cc_seq_nr : in SEQUENCENUMBER_TYPE
);
end entity;
architecture arch of rtps_writer_syn is
begin
syn_inst : entity work.rtps_writer(arch)
generic map (
RELIABILITY_QOS => ENDPOINT_RELIABILITY_QOS(1),
LIVELINESS_QOS => ENDPOINT_LIVELINESS_QOS(1),
DURABILITY_QOS => ENDPOINT_DURABILITY_QOS(1),
DESTINATION_ORDER_QOS => ENDPOINT_DESTINATION_ORDER_QOS(1),
ACKNACK_RESPONSE_DELAY => ENDPOINT_ACKNACK_RESPONSE_DELAY(1),
ACKNACK_SUPPRESSION_DELAY => ENDPOINT_ACKNACK_SUPPRESSION_DELAY(1),
LEASE_DURATION => ENDPOINT_LEASE_DURATION(1),
HEARTBEAT_PERIOD => ENDPOINT_HEARTBEAT_PERIOD(1),
ENTITYID => ENTITYID(1),
WITH_KEY => ENDPOINT_WITH_KEY(1),
PUSH_MODE => ENDPOINT_PUSH_MODE(1),
INLINE_QOS => gen_inline_qos(1)
)
port map (
-- SYSTEM
clk => clk,
reset => reset,
time => time,
empty_user => empty_user,
rd_user => rd_user,
data_in_user => data_in_user,
last_word_in_user => last_word_in_user,
empty_meta => empty_meta,
rd_meta => rd_meta,
data_in_meta => data_in_meta,
last_word_in_meta => last_word_in_meta,
alive_sig => alive_sig,
full_ro => full_ro,
wr_ro => wr_ro,
data_out_ro => data_out_ro,
last_word_out_ro => last_word_out_ro,
liveliness_assertion => liveliness_assertion,
data_available => data_available,
start_hc => start_hc,
opcode_hc => opcode_hc,
ack_hc => ack_hc,
seq_nr_hc => seq_nr_hc,
done_hc => done_hc,
ret_hc => ret_hc,
get_data_hc => get_data_hc,
data_in_hc => data_in_hc,
valid_in_hc => valid_in_hc,
ready_in_hc => ready_in_hc,
last_word_in_hc => last_word_in_hc,
cc_instance_handle => cc_instance_handle,
cc_kind => cc_kind,
cc_source_timestamp => cc_source_timestamp,
cc_seq_nr => cc_seq_nr
);
end architecture;

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library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;
use work.rtps_package.all;
package user_config is
--*****USER CONFIG*****
-- NOTE: All strings have to be padded to 256 characters
-- Unicast IPv4 Address used by all RTPS Entities [Default 192.168.0.80]
constant DEFAULT_IPv4_ADDRESS : std_logic_vector(IPv4_ADDRESS_WIDTH-1 downto 0) := x"C0A80080";
-- Number of RTPS Writer Endpoints
constant NUM_WRITERS : natural := 1;
-- Number of RTPS Reader Endpoints
constant NUM_READERS : natural := 1;
-- Number of RTPS Endpoints (Do not modify)
constant NUM_ENDPOINTS : natural := NUM_READERS+NUM_WRITERS;
-- PB Value of Default Port Generation (see DDSI-RTPS 2.3 Section 9.6.1)
constant PORT_CONFIG_PB : natural := 7400;
-- DG Value of Default Port Generation (see DDSI-RTPS 2.3 Section 9.6.1)
constant PORT_CONFIG_DG : natural := 250;
-- PG Value of Default Port Generation (see DDSI-RTPS 2.3 Section 9.6.1)
constant PORT_CONFIG_PG : natural := 2;
-- D0 Value of Default Port Generation (see DDSI-RTPS 2.3 Section 9.6.1)
constant PORT_CONFIG_D0 : natural := 0;
-- D1 Value of Default Port Generation (see DDSI-RTPS 2.3 Section 9.6.1)
constant PORT_CONFIG_D1 : natural := 10;
-- D2 Value of Default Port Generation (see DDSI-RTPS 2.3 Section 9.6.1)
constant PORT_CONFIG_D2 : natural := 1;
-- D3 Value of Default Port Generation (see DDSI-RTPS 2.3 Section 9.6.1)
constant PORT_CONFIG_D3 : natural := 11;
-- MAC Address of underlying network stack (Used to generate GUIDs)
constant MAC_ADDRESS : std_logic_vector(47 downto 0) := x"97917E0BA8CF";
-- Domain ID
constant USER_DOMAIN_ID : natural := 1;
-- Domain TAG
constant USER_DOMAIN_TAG : string(1 to 256) := (others => NUL); --""
--***RTPS ENDPOINTS***
-- Array denoting if Endpoints use Keyed Topics
constant ENDPOINT_WITH_KEY : USER_BOOLEAN_ARRAY_TYPE(0 to NUM_ENDPOINTS-1) := (others => TRUE);
-- Array denoting which mode the Endpoints are operating with
constant ENDPOINT_PUSH_MODE : USER_BOOLEAN_ARRAY_TYPE(0 to NUM_ENDPOINTS-1) := (others => TRUE);
-- Array mapping Topic Names to Endpoints
constant ENDPOINT_TOPIC_STRING : USER_STRING_ARRAY_TYPE(0 to NUM_ENDPOINTS-1) := (others => "Placeholder" & (12 to 256 => NUL));
-- Array mapping Type Names to Endpoints
constant ENDPOINT_TYPE_STRING : USER_STRING_ARRAY_TYPE(0 to NUM_ENDPOINTS-1) := (others => "Placeholder" & (12 to 256 => NUL));
-- *TIMING CHARACTERISTICS*
-- Timing Characteristics for Participant
constant PARTICIPANT_ANNOUNCEMENT_PERIOD : DURATION_TYPE := gen_duration(30,0); -- 30 s
constant PARTICIPANT_LEASE_DURATION : DURATION_TYPE := DEFAULT_PARTICIPANT_LEASE_DURATION;
-- Denotes how much faster then the deadline/period we schedule in order to account for transport delay.
constant DURATION_DELTA : DURATION_TYPE := gen_duration(0, 100*(10**6)); -- 100 ms
-- Timing Characteristics for built-in Endpoints
constant PARTICIPANT_HEARTBEAT_PERIOD : DURATION_TYPE := gen_duration(1,0); -- 1 s
constant PARTICIPANT_HEARTBEAT_RESPONSE_DELAY : DURATION_TYPE := gen_duration(0,500*(10**6)); -- 500 ms
constant PARTICIPANT_HEARTBEAT_SUPPRESSION_DELAY : DURATION_TYPE := gen_duration(0,0);
constant PARTICIPANT_ACKNACK_RESPONSE_DELAY : DURATION_TYPE := gen_duration(0,200*(10**6)); -- 200 ms
constant PARTICIPANT_ACKNACK_SUPPRESSION_DELAY : DURATION_TYPE := gen_duration(0,0);
-- Array mapping Timing Characteristics to Endpoints
constant ENDPOINT_HEARTBEAT_PERIOD : USER_DURATION_ARRAY_TYPE(0 to NUM_ENDPOINTS-1) := (others => gen_duration(1,0)); -- 1 s
constant ENDPOINT_HEARTBEAT_RESPONSE_DELAY : USER_DURATION_ARRAY_TYPE(0 to NUM_ENDPOINTS-1) := (others => gen_duration(0,500*(10**6))); -- 500 ms
constant ENDPOINT_HEARTBEAT_SUPPRESSION_DELAY : USER_DURATION_ARRAY_TYPE(0 to NUM_ENDPOINTS-1) := (others => gen_duration(0,0));
constant ENDPOINT_ACKNACK_RESPONSE_DELAY : USER_DURATION_ARRAY_TYPE(0 to NUM_ENDPOINTS-1) := (others => gen_duration(0,200*(10**6))); -- 200 ms
constant ENDPOINT_ACKNACK_SUPPRESSION_DELAY : USER_DURATION_ARRAY_TYPE(0 to NUM_ENDPOINTS-1) := (others => gen_duration(0,0));
--***ENDPOINT DDS QOS***
-- Array mapping DURABILITY QoS to Endpoints
constant ENDPOINT_DURABILITY_QOS : USER_ENUMERATION_ARRAY_TYPE(0 to NUM_ENDPOINTS-1) := (others => DEFAULT_DURABILITY_QOS);
constant ENDPOINT_DURABILITY_SERVICE_CLEANUP_DELAY : USER_DURATION_ARRAY_TYPE(0 to NUM_ENDPOINTS-1) := (others => DEFAULT_DURABILITY_SERVICE_CLEANUP_DELAY);
constant ENDPOINT_DURABILITY_SERVICE_HISTORY : USER_LONG_ARRAY_TYPE(0 to NUM_ENDPOINTS-1) := (others => DEFAULT_DURABILITY_SERVICE_HISTORY);
constant ENDPOINT_DURABILITY_SERVICE_HISTORY_DEPTH : USER_LONG_ARRAY_TYPE(0 to NUM_ENDPOINTS-1) := (others => DEFAULT_DURABILITY_SERVICE_HISTORY_DEPTH);
constant ENDPOINT_DURABILITY_SERVICE_MAX_SAMPLES : USER_LONG_ARRAY_TYPE(0 to NUM_ENDPOINTS-1) := (others => DEFAULT_DURABILITY_SERVICE_MAX_SAMPLES);
constant ENDPOINT_DURABILITY_SERVICE_MAX_INSTANCES : USER_LONG_ARRAY_TYPE(0 to NUM_ENDPOINTS-1) := (others => DEFAULT_DURABILITY_SERVICE_MAX_INSTANCES);
constant ENDPOINT_DURABILITY_SERVICE_MAX_SAMPLES_PER_INSTANCE : USER_LONG_ARRAY_TYPE(0 to NUM_ENDPOINTS-1) := (others => DEFAULT_DURABILITY_SERVICE_MAX_SAMPLES_PER_INSTANCE);
-- Array mapping PRESENTATION QoS to Endpoints
constant ENDPOINT_PRESENTATION_QOS : USER_ENUMERATION_ARRAY_TYPE(0 to NUM_ENDPOINTS-1) := (others => DEFAULT_PRESENTATION_QOS);
constant ENDPOINT_COHERENT_ACCESS : USER_BOOLEAN_ARRAY_TYPE(0 to NUM_ENDPOINTS-1) := (others => DEFAULT_COHERENT_ACCESS);
constant ENDPOINT_ORDERED_ACCESS : USER_BOOLEAN_ARRAY_TYPE(0 to NUM_ENDPOINTS-1) := (others => DEFAULT_ORDERED_ACCESS);
-- Array mapping DEADLINE QoS to Endpoints
constant ENDPOINT_DEADLINE_QOS : USER_DURATION_ARRAY_TYPE(0 to NUM_ENDPOINTS-1) := (others => gen_duration(60,0)); -- 60s
-- Array mapping LATENCY_BUDGET QoS to Endpoints
constant ENDPOINT_LATENCY_BUDGET_QOS : USER_DURATION_ARRAY_TYPE(0 to NUM_ENDPOINTS-1) := (others => DEFAULT_LATENCY_BUDGET_QOS);
-- Array mapping OWNERSHIP QoS to Endpoints
constant ENDPOINT_OWNERSHIP_QOS : USER_ENUMERATION_ARRAY_TYPE(0 to NUM_ENDPOINTS-1) := (others => DEFAULT_OWNERSHIP_QOS);
-- Array mapping OWNERSHIP_STRENGTH QoS to Endpoints (Only relevant to Writers)
constant ENDPOINT_OWNERSHIP_STRENGTH_QOS : USER_LONG_ARRAY_TYPE(0 to NUM_ENDPOINTS-1) := (others => DEFAULT_OWNERSHIP_STRENGTH_QOS);
-- Array mapping LIVELINESS QoS to Endpoints
constant ENDPOINT_LIVELINESS_QOS : USER_ENUMERATION_ARRAY_TYPE(0 to NUM_ENDPOINTS-1) := (others => DEFAULT_LIVELINESS_QOS);
constant ENDPOINT_LEASE_DURATION : USER_DURATION_ARRAY_TYPE(0 to NUM_ENDPOINTS-1) := (others => gen_duration(100,0)); -- 100s
-- Array mapping TIME_BASED_FILTER QoS to Endpoints (Only relevant to Readers)
constant ENDPOINT_TIME_BASED_FILTER_QOS : USER_DURATION_ARRAY_TYPE(0 to NUM_ENDPOINTS-1) := (others => gen_duration(1,0)); -- 1s
-- XXX: PARTITION QoS Ignored
-- Array mapping RELIABILITY QoS to Endpoints
constant ENDPOINT_RELIABILITY_QOS : USER_ENUMERATION_ARRAY_TYPE(0 to NUM_ENDPOINTS-1) := (others => DEFAULT_RELIABILITY_QOS);
-- (Only relevant to Writers)
constant ENDPOINT_MAX_BLOCKING_TIME : USER_DURATION_ARRAY_TYPE(0 to NUM_ENDPOINTS-1) := (others => DEFAULT_MAX_BLOCKING_TIME);
-- Array mapping TRANSPORT_PRIORITY QoS to Endpoints (Only relevant to Writers)
constant ENDPOINT_TRANSPORT_PRIORITY_QOS : USER_LONG_ARRAY_TYPE(0 to NUM_ENDPOINTS-1) := (others => DEFAULT_TRANSPORT_PRIORITY_QOS);
-- Array mapping LIFESPAN QoS to Endpoints (Only relevant to Writers)
constant ENDPOINT_LIFESPAN_QOS : USER_DURATION_ARRAY_TYPE(0 to NUM_ENDPOINTS-1) := (others => gen_duration(40,0)); -- 40s
-- Array mapping DESTINATION_ORDER QoS to Endpoints
constant ENDPOINT_DESTINATION_ORDER_QOS : USER_ENUMERATION_ARRAY_TYPE(0 to NUM_ENDPOINTS-1) := (others => DEFAULT_DESTINATION_ORDER_QOS);
-- Array mapping HISTORY QoS to Endpoints
constant ENDPOINT_HISTORY_QOS : USER_ENUMERATION_ARRAY_TYPE(0 to NUM_ENDPOINTS-1) := (others => DEFAULT_HISTORY_QOS);
constant ENDPOINT_HISTORY_DEPTH : USER_LONG_ARRAY_TYPE(0 to NUM_ENDPOINTS-1) := (others => DEFAULT_HISTORY_DEPTH);
-- Array mapping RESOURCE_LIMITS QoS to Endpoints
constant ENDPOINT_MAX_SAMPLES : USER_LONG_ARRAY_TYPE(0 to NUM_ENDPOINTS-1) := (others => std_logic_vector(to_unsigned(50, CDR_LONG_WIDTH)));
constant ENDPOINT_MAX_INSTANCES : USER_LONG_ARRAY_TYPE(0 to NUM_ENDPOINTS-1) := (others => std_logic_vector(to_unsigned(50, CDR_LONG_WIDTH)));
constant ENDPOINT_MAX_SAMPLES_PER_INSTANCE : USER_LONG_ARRAY_TYPE(0 to NUM_ENDPOINTS-1) := (others => DEFAULT_MAX_SAMPLES_PER_INSTANCE);
-- XXX: ENTITY_FACTORY QoS Ignored
-- Array mapping WRITER_DATA_LIFECYCLE QoS to Endpoints (Only relevant to Writers)
constant ENDPOINT_AUTODISPOSE_UNREGISTERED_INSTANCES : USER_BOOLEAN_ARRAY_TYPE(0 to NUM_ENDPOINTS-1) := (others => DEFAULT_AUTODISPOSE_UNREGISTERED_INSTANCES);
-- Array mapping Reader_DATA_LIFECYCLE QoS to Endpoints (Only relevant to Readers)
constant ENDPOINT_AUTOPURGE_NOWRITER_SAMPLES_DELAY : USER_DURATION_ARRAY_TYPE(0 to NUM_ENDPOINTS-1) := (others => DEFAULT_AUTOPURGE_NOWRITER_SAMPLES_DELAY);
constant ENDPOINT_AUTOPURGE_DISPOSED_SAMPLES_DELAY : USER_DURATION_ARRAY_TYPE(0 to NUM_ENDPOINTS-1) := (others => DEFAULT_AUTOPURGE_DISPOSED_SAMPLES_DELAY);
-- NOTE: The buffer will not only store participants, but also endpoint data
-- Used to determine the size of the builtin endpoint buffer
constant MAX_REMOTE_PARTICIPANTS : natural := 50;
-- Set to TRUE for Simulation Testing (Extra Code generated)
constant SIMULATION_FLAG : boolean := FALSE;
end package;

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library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;
use work.math_pkg.all;
use work.rtps_package.all;
-- Test synthesis of SLV bit counter
entity test is
port (
clk : in std_logic;
reset : in std_logic;
input : in std_logic_vector(31 downto 0);
output : out std_logic_vector(31 downto 0)
);
end entity;
architecture arch of test is
function bitmap_converter(input : std_logic_vector) return natural is
variable ret : natural := 0;
begin
for i in 0 to input'length-1 loop
ret := ret + 1;
if (input(i) = '1') then
exit;
end if;
end loop;
return ret;
end function;
begin
output <= std_logic_vector(to_unsigned(bitmap_converter(input), output'length));
end architecture;

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library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;
use work.math_pkg.all;
use work.rtps_package.all;
-- Test synthesis of 3-way min comparison
entity test2 is
port (
clk : in std_logic;
reset : in std_logic;
t1 : in TIME_TYPE;
t2 : in TIME_TYPE;
t3 : in TIME_TYPE;
t : in TIME_TYPE;
t_out : out TIME_TYPE
);
end entity;
architecture arch of test2 is
function min_time(t1, t2, t3, t : TIME_TYPE) return TIME_TYPE is
variable ret : TIME_TYPE;
begin
if (not (t1 <= t)) then
ret := t1;
end if;
if (not (t2 <= t) and t2 < ret) then
ret := t2;
end if;
if (not (t3 <= t) and t3 < ret) then
ret := t3;
end if;
return ret;
end function;
begin
process (all)
begin
if rising_edge(clk) then
if (reset = '1') then
t_out <= TIME_INVALID;
else
t_out <= min_time(t1,t2,t3,t);
end if;
end if;
end process;
end architecture;

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library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;
use work.math_pkg.all;
use work.rtps_package.all;
-- Test how FSM states guarded with a synthesis guard are handled.
entity test3 is
generic (
BUILD : boolean := FALSE
);
port (
clk : in std_logic;
reset : in std_logic;
input : in std_logic_vector(31 downto 0);
output : out std_logic_vector(31 downto 0)
);
end entity;
architecture arch of test3 is
type STAGE_TYPE is (IDLE, STATE1, STATE2);
signal stage, stage_next : STAGE_TYPE := IDLE;
begin
process(all)
begin
stage_next <= stage;
output <= (others => '0');
case (stage) is
when IDLE =>
case (input) is
when x"00000000" =>
if (BUILD) then
stage_next <= STATE1;
else
stage_next <= STATE2;
end if;
when x"00000001" =>
stage_next <= STATE2;
when others =>
null;
end case;
when STATE1 =>
if (BUILD) then
stage_next <= IDLE;
output <= x"DEADBEEF";
end if;
when STATE2 =>
stage_next <= IDLE;
output <= x"BEEFDEAD";
when others =>
null;
end case;
end process;
sync : process(all)
begin
if rising_edge(clk) then
if (reset = '1') then
stage <= IDLE;
else
stage <= stage_next;
end if;
end if;
end process;
end architecture;

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library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;
use work.math_pkg.all;
use work.rtps_package.all;
-- Test synthesis of array indexing
entity test4 is
port (
clk : in std_logic;
reset : in std_logic;
input : in std_logic_vector(31 downto 0);
input2 : in std_logic_vector(31 downto 0);
output : out std_logic_vector(31 downto 0)
);
end entity;
architecture arch of test4 is
type TEST_ARRAY_TYPE is array (0 to 3) of std_logic_vector(31 downto 0);
signal test_array : TEST_ARRAY_TYPE;
begin
process (all)
begin
if rising_edge(clk) then
if (reset = '1') then
output <= (others => '0');
test_array <= (others => (others => '0'));
else
case (to_integer(unsigned(input))) is
when 0 =>
output <= test_array(0);
test_array(0) <= input2;
when 1 =>
output <= test_array(1);
test_array(1) <= input2;
when 2 =>
output <= test_array(2);
test_array(2) <= input2;
when 3 =>
output <= test_array(3);
test_array(3) <= input2;
when others =>
end case;
end if;
end if;
end process;
-- process (all)
-- begin
-- if rising_edge(clk) then
-- if (reset = '1') then
-- output <= (others => '0');
-- test_array <= (others => (others => '0'));
-- else
-- test_array(to_integer(unsigned(input))) <= input2;
-- output <= test_array(to_integer(unsigned(input)));
-- end if;
-- end if;
-- end process;
end architecture;

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library ieee;
use ieee.std_logic_1164.all;
use ieee.numeric_std.all;
use work.math_pkg.all;
use work.rtps_package.all;
use work.rtps_config_package.all;
-- Test synthesis of array indexing
entity test5 is
port (
clk : in std_logic;
reset : in std_logic;
input : in std_logic_vector(31 downto 0);
input2 : in std_logic_vector(31 downto 0);
output : out std_logic_vector(7 downto 0)
);
end entity;
architecture arch of test5 is
begin
process (all)
begin
if rising_edge(clk) then
if (reset = '1') then
output <= (others => '0');
else
output <= get_sub_vector(input, to_integer(unsigned(input2(1 downto 0))), 8, TRUE);
end if;
end if;
end process;
end architecture;

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