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BUG FIX: Remove inferred Latches

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This commit is contained in:
John Ring 2022-03-09 14:59:05 +01:00
parent e7ed1eab28
commit fba065e59e
12 changed files with 33 additions and 29 deletions
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12
src/Tests/Type2_reader_interface.vhd
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@ -741,12 +741,12 @@ begin
case (cnt) is case (cnt) is
-- Double Word 1/2 -- Double Word 1/2
when 0 => when 0 =>
dw_latch_next <= write_sub_vector(dw_latch_next, data_in_latch, 0, TRUE); dw_latch_next <= write_sub_vector(dw_latch, data_in_latch, 0, TRUE);
stage_next <= FETCH; stage_next <= FETCH;
cnt_next <= cnt + 1; cnt_next <= cnt + 1;
-- Double Word 2/2 -- Double Word 2/2
when 1 => when 1 =>
dw_latch_next <= write_sub_vector(dw_latch_next, data_in_latch, 1, TRUE); dw_latch_next <= write_sub_vector(dw_latch, data_in_latch, 1, TRUE);
cnt_next <= cnt + 1; cnt_next <= cnt + 1;
-- Push Double Word -- Push Double Word
when 2 => when 2 =>
@ -793,22 +793,22 @@ begin
case (cnt) is case (cnt) is
-- Quad Word 1/4 -- Quad Word 1/4
when 0 => when 0 =>
qw_latch_next <= write_sub_vector(qw_latch_next, data_in_latch, 0, TRUE); qw_latch_next <= write_sub_vector(qw_latch, data_in_latch, 0, TRUE);
stage_next <= FETCH; stage_next <= FETCH;
cnt_next <= cnt + 1; cnt_next <= cnt + 1;
-- Quad Word 2/4 -- Quad Word 2/4
when 1 => when 1 =>
qw_latch_next <= write_sub_vector(qw_latch_next, data_in_latch, 1, TRUE); qw_latch_next <= write_sub_vector(qw_latch, data_in_latch, 1, TRUE);
stage_next <= FETCH; stage_next <= FETCH;
cnt_next <= cnt + 1; cnt_next <= cnt + 1;
-- Quad Word 3/4 -- Quad Word 3/4
when 2 => when 2 =>
qw_latch_next <= write_sub_vector(qw_latch_next, data_in_latch, 2, TRUE); qw_latch_next <= write_sub_vector(qw_latch, data_in_latch, 2, TRUE);
stage_next <= FETCH; stage_next <= FETCH;
cnt_next <= cnt + 1; cnt_next <= cnt + 1;
-- Quad Word 4/4 -- Quad Word 4/4
when 3 => when 3 =>
qw_latch_next <= write_sub_vector(qw_latch_next, data_in_latch, 3, TRUE); qw_latch_next <= write_sub_vector(qw_latch, data_in_latch, 3, TRUE);
cnt_next <= cnt + 1; cnt_next <= cnt + 1;
-- Push Quad Word -- Push Quad Word
when 4 => when 4 =>

2
src/ros2/example_interfaces/Fibonacci_ros_action_feedback_pub.vhd
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@ -259,7 +259,7 @@ begin
target_align_next <= ALIGN_1; target_align_next <= ALIGN_1;
stage_next <= ALIGN_STREAM; stage_next <= ALIGN_STREAM;
else else
data_out_latch_next <= write_sub_vector(data_out_latch_next, get_sub_vector(goal_id,uuid_cnt,CDR_INT8_WIDTH,TRUE), to_integer(align_offset(1 downto 0)), TRUE); data_out_latch_next <= write_sub_vector(data_out_latch, get_sub_vector(goal_id,uuid_cnt,CDR_INT8_WIDTH,TRUE), to_integer(align_offset(1 downto 0)), TRUE);
align_offset_next <= align_offset + 1; align_offset_next <= align_offset + 1;
if (uuid_cnt = F_GOAL_ID_MAX_DEPTH-1) then if (uuid_cnt = F_GOAL_ID_MAX_DEPTH-1) then

2
src/ros2/example_interfaces/Fibonacci_ros_action_feedback_sub.vhd
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@ -337,7 +337,7 @@ begin
target_align_next <= ALIGN_1; target_align_next <= ALIGN_1;
stage_next <= ALIGN_STREAM; stage_next <= ALIGN_STREAM;
else else
goal_id_latch_next <= write_sub_vector(goal_id_latch_next, get_sub_vector(data_in_latch, to_integer(align_offset(1 downto 0)), CDR_INT8_WIDTH, TRUE), uuid_cnt, TRUE); goal_id_latch_next <= write_sub_vector(goal_id_latch, get_sub_vector(data_in_latch, to_integer(align_offset(1 downto 0)), CDR_INT8_WIDTH, TRUE), uuid_cnt, TRUE);
align_offset_next <= align_offset + 1; align_offset_next <= align_offset + 1;
-- Need to fetch next Word -- Need to fetch next Word

6
src/ros2/example_interfaces/Fibonacci_ros_action_goal_srv_client.vhd
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@ -424,12 +424,12 @@ begin
case (cnt) is case (cnt) is
-- Double Word 1/2 -- Double Word 1/2
when 0 => when 0 =>
dw_latch_next <= write_sub_vector(dw_latch_next, endian_swap(endian_flag, data_in_latch), 0, TRUE); dw_latch_next <= write_sub_vector(dw_latch, endian_swap(endian_flag, data_in_latch), 0, TRUE);
stage_next <= FETCH; stage_next <= FETCH;
cnt_next <= cnt + 1; cnt_next <= cnt + 1;
-- Double Word 2/2 -- Double Word 2/2
when 1 => when 1 =>
dw_latch_next <= write_sub_vector(dw_latch_next, endian_swap(endian_flag, data_in_latch), 1, TRUE); dw_latch_next <= write_sub_vector(dw_latch, endian_swap(endian_flag, data_in_latch), 1, TRUE);
cnt_next <= cnt + 1; cnt_next <= cnt + 1;
-- Push Double Word -- Push Double Word
when 2 => when 2 =>
@ -624,7 +624,7 @@ begin
target_align_next <= ALIGN_1; target_align_next <= ALIGN_1;
stage_next <= ALIGN_OUT_STREAM; stage_next <= ALIGN_OUT_STREAM;
else else
data_out_latch_next <= write_sub_vector(data_out_latch_next, get_sub_vector(goal_id,uuid_cnt,CDR_INT8_WIDTH,TRUE), to_integer(align_offset(1 downto 0)), TRUE); data_out_latch_next <= write_sub_vector(data_out_latch, get_sub_vector(goal_id,uuid_cnt,CDR_INT8_WIDTH,TRUE), to_integer(align_offset(1 downto 0)), TRUE);
align_offset_next <= align_offset + 1; align_offset_next <= align_offset + 1;
if (uuid_cnt = G_RQ_GOAL_ID_MAX_DEPTH-1) then if (uuid_cnt = G_RQ_GOAL_ID_MAX_DEPTH-1) then

2
src/ros2/example_interfaces/Fibonacci_ros_action_goal_srv_server.vhd
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@ -402,7 +402,7 @@ begin
target_align_next <= ALIGN_1; target_align_next <= ALIGN_1;
stage_next <= ALIGN_IN_STREAM; stage_next <= ALIGN_IN_STREAM;
else else
goal_id_latch_next <= write_sub_vector(goal_id_latch_next, get_sub_vector(data_in_latch, to_integer(align_offset(1 downto 0)), CDR_INT8_WIDTH, TRUE), uuid_cnt, TRUE); goal_id_latch_next <= write_sub_vector(goal_id_latch, get_sub_vector(data_in_latch, to_integer(align_offset(1 downto 0)), CDR_INT8_WIDTH, TRUE), uuid_cnt, TRUE);
align_offset_next <= align_offset + 1; align_offset_next <= align_offset + 1;
-- Need to fetch next Word -- Need to fetch next Word

2
src/ros2/example_interfaces/Fibonacci_ros_action_result_srv_client.vhd
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@ -687,7 +687,7 @@ begin
target_align_next <= ALIGN_1; target_align_next <= ALIGN_1;
stage_next <= ALIGN_OUT_STREAM; stage_next <= ALIGN_OUT_STREAM;
else else
data_out_latch_next <= write_sub_vector(data_out_latch_next, get_sub_vector(goal_id,uuid_cnt,CDR_INT8_WIDTH,TRUE), to_integer(align_offset(1 downto 0)), TRUE); data_out_latch_next <= write_sub_vector(data_out_latch, get_sub_vector(goal_id,uuid_cnt,CDR_INT8_WIDTH,TRUE), to_integer(align_offset(1 downto 0)), TRUE);
align_offset_next <= align_offset + 1; align_offset_next <= align_offset + 1;
if (uuid_cnt = R_RQ_MAX_GOAL_ID_SIZE-1) then if (uuid_cnt = R_RQ_MAX_GOAL_ID_SIZE-1) then

4
src/ros2/example_interfaces/Fibonacci_ros_action_result_srv_server.vhd
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@ -440,7 +440,7 @@ begin
target_align_next <= ALIGN_1; target_align_next <= ALIGN_1;
stage_next <= ALIGN_IN_STREAM; stage_next <= ALIGN_IN_STREAM;
else else
goal_id_latch_next <= write_sub_vector(goal_id_latch_next, get_sub_vector(data_in_latch, to_integer(align_offset(1 downto 0)), CDR_INT8_WIDTH, TRUE), uuid_cnt, TRUE); goal_id_latch_next <= write_sub_vector(goal_id_latch, get_sub_vector(data_in_latch, to_integer(align_offset(1 downto 0)), CDR_INT8_WIDTH, TRUE), uuid_cnt, TRUE);
align_offset_next <= align_offset + 1; align_offset_next <= align_offset + 1;
-- Need to fetch next Word -- Need to fetch next Word
@ -637,7 +637,7 @@ begin
target_align_next <= ALIGN_1; target_align_next <= ALIGN_1;
stage_next <= ALIGN_OUT_STREAM; stage_next <= ALIGN_OUT_STREAM;
else else
data_out_latch_next <= write_sub_vector(data_out_latch_next, endian_swap(LITTLE_ENDIAN, status), to_integer(align_offset(1 downto 0)), TRUE); data_out_latch_next <= write_sub_vector(data_out_latch, endian_swap(LITTLE_ENDIAN, status), to_integer(align_offset(1 downto 0)), TRUE);
align_offset_next <= align_offset + 1; align_offset_next <= align_offset + 1;
-- ###GENERATED START### -- ###GENERATED START###

8
src/ros2/example_interfaces/Fibonacci_ros_action_server.vhd
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@ -777,8 +777,9 @@ begin
cnt_next <= cnt; cnt_next <= cnt;
result_index_latch_next <= result_index_latch; result_index_latch_next <= result_index_latch;
-- DEFAULT Unregistered -- DEFAULT Unregistered
r_sel_ack <= '0'; index_result_ready <= '0';
abort_mem <= '0'; r_sel_ack <= '0';
abort_mem <= '0';
-- ###GENERATED START### -- ###GENERATED START###
seq_cnt_next <= seq_cnt; seq_cnt_next <= seq_cnt;
r_seq_len_mem_addr <= (others => '0'); r_seq_len_mem_addr <= (others => '0');
@ -791,6 +792,9 @@ begin
r_seq_mem_valid_in <= (others => '0'); r_seq_mem_valid_in <= (others => '0');
r_seq_mem_data_in <= (others => (others => '0')); r_seq_mem_data_in <= (others => (others => '0'));
r_seq_mem_ready_out <= (others => '0'); r_seq_mem_ready_out <= (others => '0');
result_seq_r <= (others => '0');
result_seq_valid <= '0';
result_seq_ready <= '0';
seq_len_sig <= (others => '0'); seq_len_sig <= (others => '0');
seq_addr_sig <= (others => '0'); seq_addr_sig <= (others => '0');
seq_wen_sig <= '0'; seq_wen_sig <= '0';

6
src/ros2/rcl_interfaces/action_msgs/CancelGoal_ros_srv_client.vhd
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@ -569,12 +569,12 @@ begin
case (cnt) is case (cnt) is
-- Double Word 1/2 -- Double Word 1/2
when 0 => when 0 =>
dw_latch_next <= write_sub_vector(dw_latch_next, endian_swap(endian_flag, data_in_latch), 0, TRUE); dw_latch_next <= write_sub_vector(dw_latch, endian_swap(endian_flag, data_in_latch), 0, TRUE);
stage_next <= FETCH; stage_next <= FETCH;
cnt_next <= cnt + 1; cnt_next <= cnt + 1;
-- Double Word 2/2 -- Double Word 2/2
when 1 => when 1 =>
dw_latch_next <= write_sub_vector(dw_latch_next, endian_swap(endian_flag, data_in_latch), 1, TRUE); dw_latch_next <= write_sub_vector(dw_latch, endian_swap(endian_flag, data_in_latch), 1, TRUE);
cnt_next <= cnt + 1; cnt_next <= cnt + 1;
-- Push Double Word -- Push Double Word
when 2 => when 2 =>
@ -786,7 +786,7 @@ begin
target_align_next <= ALIGN_1; target_align_next <= ALIGN_1;
stage_next <= ALIGN_OUT_STREAM; stage_next <= ALIGN_OUT_STREAM;
else else
data_out_latch_next <= write_sub_vector(data_out_latch_next, get_sub_vector(goal_info_goal_id,uuid_cnt,CDR_INT8_WIDTH,TRUE), to_integer(align_offset(1 downto 0)), TRUE); data_out_latch_next <= write_sub_vector(data_out_latch, get_sub_vector(goal_info_goal_id,uuid_cnt,CDR_INT8_WIDTH,TRUE), to_integer(align_offset(1 downto 0)), TRUE);
align_offset_next <= align_offset + 1; align_offset_next <= align_offset + 1;
if (uuid_cnt = RQ_GOAL_INFO_GOAL_ID_MAX_DEPTH-1) then if (uuid_cnt = RQ_GOAL_INFO_GOAL_ID_MAX_DEPTH-1) then

10
src/ros2/rcl_interfaces/action_msgs/CancelGoal_ros_srv_server.vhd
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@ -485,7 +485,7 @@ begin
target_align_next <= ALIGN_1; target_align_next <= ALIGN_1;
stage_next <= ALIGN_IN_STREAM; stage_next <= ALIGN_IN_STREAM;
else else
goal_info_goal_id_latch_next <= write_sub_vector(goal_info_goal_id_latch_next, get_sub_vector(data_in_latch, to_integer(align_offset(1 downto 0)), CDR_INT8_WIDTH, TRUE), uuid_cnt, TRUE); goal_info_goal_id_latch_next <= write_sub_vector(goal_info_goal_id_latch, get_sub_vector(data_in_latch, to_integer(align_offset(1 downto 0)), CDR_INT8_WIDTH, TRUE), uuid_cnt, TRUE);
align_offset_next <= align_offset + 1; align_offset_next <= align_offset + 1;
-- Need to fetch next Word -- Need to fetch next Word
@ -511,12 +511,12 @@ begin
case (cnt) is case (cnt) is
-- Double Word 1/2 -- Double Word 1/2
when 0 => when 0 =>
goal_info_stamp_latch_next <= write_sub_vector(goal_info_stamp_latch_next, endian_swap(endian_flag, data_in_latch), 0, TRUE); goal_info_stamp_latch_next <= write_sub_vector(goal_info_stamp_latch, endian_swap(endian_flag, data_in_latch), 0, TRUE);
stage_next <= FETCH; stage_next <= FETCH;
cnt_next <= cnt + 1; cnt_next <= cnt + 1;
-- Double Word 2/2 -- Double Word 2/2
when 1 => when 1 =>
goal_info_stamp_latch_next <= write_sub_vector(goal_info_stamp_latch_next, endian_swap(endian_flag, data_in_latch), 1, TRUE); goal_info_stamp_latch_next <= write_sub_vector(goal_info_stamp_latch, endian_swap(endian_flag, data_in_latch), 1, TRUE);
stage_next <= FETCH; stage_next <= FETCH;
align_offset_next <= align_offset + 8; align_offset_next <= align_offset + 8;
@ -710,7 +710,7 @@ begin
target_align_next <= ALIGN_1; target_align_next <= ALIGN_1;
stage_next <= ALIGN_OUT_STREAM; stage_next <= ALIGN_OUT_STREAM;
else else
data_out_latch_next <= write_sub_vector(data_out_latch_next, endian_swap(LITTLE_ENDIAN, return_code), to_integer(align_offset(1 downto 0)), TRUE); data_out_latch_next <= write_sub_vector(data_out_latch, endian_swap(LITTLE_ENDIAN, return_code), to_integer(align_offset(1 downto 0)), TRUE);
align_offset_next <= align_offset + 1; align_offset_next <= align_offset + 1;
encode_stage_next <= WRITE_RR_GOALS_CANCELING_LENGTH; encode_stage_next <= WRITE_RR_GOALS_CANCELING_LENGTH;
@ -763,7 +763,7 @@ begin
when 1 => when 1 =>
-- Memory Operation Guard -- Memory Operation Guard
if (goals_canceling_goal_id_mem_valid_out = '1') then if (goals_canceling_goal_id_mem_valid_out = '1') then
data_out_latch_next <= write_sub_vector(data_out_latch_next, get_sub_vector(goals_canceling_goal_id_mem_data_out,uuid_cnt,CDR_INT8_WIDTH,TRUE), to_integer(align_offset(1 downto 0)), TRUE); data_out_latch_next <= write_sub_vector(data_out_latch, get_sub_vector(goals_canceling_goal_id_mem_data_out,uuid_cnt,CDR_INT8_WIDTH,TRUE), to_integer(align_offset(1 downto 0)), TRUE);
align_offset_next <= align_offset + 1; align_offset_next <= align_offset + 1;
if (uuid_cnt = RR_GOALS_CANCELING_GOAL_ID_MAX_DEPTH-1) then if (uuid_cnt = RR_GOALS_CANCELING_GOAL_ID_MAX_DEPTH-1) then

4
src/ros2/rcl_interfaces/action_msgs/GoalStatusArray_ros_pub.vhd
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@ -365,7 +365,7 @@ begin
when 1 => when 1 =>
-- Memory Operation Guard -- Memory Operation Guard
if (status_list_goal_info_goal_id_mem_valid_out = '1') then if (status_list_goal_info_goal_id_mem_valid_out = '1') then
data_out_latch_next <= write_sub_vector(data_out_latch_next, get_sub_vector(status_list_goal_info_goal_id_mem_data_out,uuid_cnt,CDR_INT8_WIDTH,TRUE), to_integer(align_offset(1 downto 0)), TRUE); data_out_latch_next <= write_sub_vector(data_out_latch, get_sub_vector(status_list_goal_info_goal_id_mem_data_out,uuid_cnt,CDR_INT8_WIDTH,TRUE), to_integer(align_offset(1 downto 0)), TRUE);
align_offset_next <= align_offset + 1; align_offset_next <= align_offset + 1;
if (uuid_cnt = STATUS_LIST_GOAL_INFO_GOAL_ID_MAX_DEPTH-1) then if (uuid_cnt = STATUS_LIST_GOAL_INFO_GOAL_ID_MAX_DEPTH-1) then
@ -445,7 +445,7 @@ begin
status_list_status_mem_ready_out <= '1'; status_list_status_mem_ready_out <= '1';
-- Memory Operation Guard -- Memory Operation Guard
if (status_list_status_mem_valid_out = '1') then if (status_list_status_mem_valid_out = '1') then
data_out_latch_next <= write_sub_vector(data_out_latch_next, endian_swap(LITTLE_ENDIAN, status_list_status_mem_data_out), to_integer(align_offset(1 downto 0)), TRUE); data_out_latch_next <= write_sub_vector(data_out_latch, endian_swap(LITTLE_ENDIAN, status_list_status_mem_data_out), to_integer(align_offset(1 downto 0)), TRUE);
align_offset_next <= align_offset + 1; align_offset_next <= align_offset + 1;
-- All Elements processed -- All Elements processed

4
src/ros2/rcl_interfaces/action_msgs/GoalStatusArray_ros_sub.vhd
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@ -471,12 +471,12 @@ begin
case (cnt) is case (cnt) is
-- Double Word 1/2 -- Double Word 1/2
when 0 => when 0 =>
dw_latch_next <= write_sub_vector(dw_latch_next, endian_swap(endian_flag, data_in_latch), 0, TRUE); dw_latch_next <= write_sub_vector(dw_latch, endian_swap(endian_flag, data_in_latch), 0, TRUE);
stage_next <= FETCH; stage_next <= FETCH;
cnt_next <= cnt + 1; cnt_next <= cnt + 1;
-- Double Word 2/2 -- Double Word 2/2
when 1 => when 1 =>
dw_latch_next <= write_sub_vector(dw_latch_next, endian_swap(endian_flag, data_in_latch), 1, TRUE); dw_latch_next <= write_sub_vector(dw_latch, endian_swap(endian_flag, data_in_latch), 1, TRUE);
cnt_next <= cnt + 1; cnt_next <= cnt + 1;
-- Push Double Word -- Push Double Word
when 2 => when 2 =>