BUG FIX: Change Fibonacci_ros_action_server memory operation guard

This commit is contained in:
John Ring 2022-03-09 14:48:44 +01:00
parent 27e5b808b0
commit e7ed1eab28

View File

@ -865,7 +865,7 @@ begin
-- WRITE
when 1 =>
-- Memory Operation Guard
if (result_seq_ready = '1' and r_seq_mem_valid_out(to_integer(unsigned(r_index))) = '1') then
if (seq_ready_sig = '1' and r_seq_mem_valid_out(to_integer(unsigned(r_index))) = '1') then
seq_addr_sig <= std_logic_vector(to_unsigned(seq_cnt,R_RR_SEQ_ADDR_WIDTH));
seq_wen_sig <= '1';
seq_w_sig <= r_seq_mem_data_out(to_integer(unsigned(r_index)));