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5e7ea79887
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Convert dds_writer to Vector Endpoint
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2022-04-10 11:04:02 +02:00 |
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Greek
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e0280ea490
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Define RTPS/DDS Configuration in record type
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2022-01-16 16:16:58 +01:00 |
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Greek
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f13d28d811
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Add/Modify synthesis entities to synthesize test_loopback
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2021-12-09 23:32:08 +01:00 |
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5d9acb6f41
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Add directive to allow QSYS Compilation
QSYS does not allow to change the VHDL version of processed files.
All respective files have to have a comment directive forcing the VHDL version.
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2021-12-09 19:44:38 +01:00 |
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Greek
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b47d409f13
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Make codebase Quartus synthesizable
Remove non-Quartus-supported VHDL 2008 features.
Remove inferred Latches.
Add test Entities to see resulting hw synthesis of various code
segments.
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2021-12-07 13:05:24 +01:00 |
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