rtps-fpga/syn/DE10_NANO_SoC_GHRD
John Daktylidis 4c51a3944a Add UDP loopback in De10-Nano GHRD Project and generate output files
The UDP loopback just reads from the input FIFO, reverses src and destination
addresses, and writes back to the output FIFO.
This can be used to measure the throughput of the HPS-FPGA communication
2023-07-29 12:23:06 +02:00
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ip Add GHRD Quartus Project 2023-07-23 14:12:50 +02:00
output_files/BACKUP Add UDP loopback in De10-Nano GHRD Project and generate output files 2023-07-29 12:23:06 +02:00
DE10_NANO_SoC_GHRD.qpf Add GHRD Quartus Project 2023-07-23 14:12:50 +02:00
DE10_NANO_SoC_GHRD.qsf Add GHRD Quartus Project 2023-07-23 14:12:50 +02:00
DE10_NANO_SOC_GHRD.sdc Add GHRD Quartus Project 2023-07-23 14:12:50 +02:00
DE10_NANO_SoC_GHRD.v Add GHRD Quartus Project 2023-07-23 14:12:50 +02:00
generate_hps_qsys_header.sh Add GHRD Quartus Project 2023-07-23 14:12:50 +02:00
soc_system.qsys Add GHRD Quartus Project 2023-07-23 14:12:50 +02:00
stp1.stp Add GHRD Quartus Project 2023-07-23 14:12:50 +02:00
stp2.stp Add GHRD Quartus Project 2023-07-23 14:12:50 +02:00
test_fpga_hw.tcl Add UDP loopback in De10-Nano GHRD Project and generate output files 2023-07-29 12:23:06 +02:00
test_fpga_hw.tcl.ros_action.BAK Add ROS RTT in DE10-Nano GHRD Project and generate output files 2023-07-28 23:52:18 +02:00
test_fpga_hw.tcl.ros_rtt.BAK Add UDP loopback in De10-Nano GHRD Project and generate output files 2023-07-29 12:23:06 +02:00