Greek
922c7cdb83
* Add Project Description and Documentation (Readme.md)
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* Add diagram
* Modify counters of PMOD-AD1 and PMOD-DA3 controllers to use less bits
* Increase factor width to 5 bits
- Highest bit is truncated
* Add download directory to git repo
2020-04-29 20:59:35 +02:00
Greek
a5c68d1fea
* Add documentation
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- Zedboard Rev.D Errata
* Add debug leds to top entity
* Pin mapping
2020-04-27 13:41:10 +02:00
Greek
4fc3cfb9a3
* Update docs
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- Download correct 7-series reference
* Add design top entity
* Add synchronizer
* Fix syntax, synth errors
2020-04-26 14:34:34 +02:00
Greek
aa53591056
* Update doc
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- Add Xillybus doc
- Add additional 7-series doc
2020-04-26 00:34:08 +02:00
Greek
7392d9f72f
* Add library/macro relevant documentation
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* Implemented closed feedback loop
- Scaler
- Dealy Line
- Add Sub
2020-04-03 17:50:25 +02:00
Greek
a28aab25fa
* Added Zynq 7 documentation
...
* Updated sync processes for async reset
* Implemented simple open loop design
- Added testbench and .do file
2020-04-01 14:12:04 +02:00
Greek
d82505b819
* Initial Commit
2020-03-12 15:38:06 +01:00
